CN1187798C - Method for decreasing wet etching speed of silicon nitride - Google Patents

Method for decreasing wet etching speed of silicon nitride Download PDF

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Publication number
CN1187798C
CN1187798C CNB021161100A CN02116110A CN1187798C CN 1187798 C CN1187798 C CN 1187798C CN B021161100 A CNB021161100 A CN B021161100A CN 02116110 A CN02116110 A CN 02116110A CN 1187798 C CN1187798 C CN 1187798C
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silicon nitride
nitride layer
wet etching
layer
etching speed
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CN1452220A (en
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周保华
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Winbond Electronics Corp
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Winbond Electronics Corp
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Abstract

The present invention discloses a method for decreasing the wet etching speed of silicon nitride, which comprises the following steps: ions containing nitrogen are distributed and planted in silicon nitride layers; then, a hot drawing process is used for repairing the damage which is caused by distribution and plantation; Si-N key junctions are formed to decrease the wet etching speed of the silicon nitride layers. The etching selectivity of silicon oxide to silicon nitride can be enhanced by the method of the present invention so as to solve the problem that a silicon nitride layer can not be used as an etching stop layer of a low pressure chemical vapor deposition (LPCVD) of low temperature deposit.

Description

Reduce the method for the wet etching speed of silicon nitride
Technical field
The present invention relates to a kind of semiconductor fabrication, and be particularly related to a kind of method that reduces the wet etching speed of silicon nitride.
Background technology
Silicon nitride (Si 3N 4) be a kind of in semiconductor is made common dielectric material, its topmost application is the etching mask (for example in the processing procedure of self-aligned contacts window) as silicon oxide layer.In present semiconductor was made, silicon nitride mainly was with Low Pressure Chemical Vapor Deposition (Low PressureChemical Vapor Deposition; LPCVD) or plasma enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition; PECVD) form.Above-mentioned two kinds of formed silicon nitride layers of method do not have too big difference on dry etch rate, but on wet etching speed, fast about 10 times of PECVD silicon nitride layers than lpcvd silicon nitride layer.
Traditional lpcvd silicon nitride layer all is with SiH usually 2Cl 2With NH 3For the reactant deposition forms, required temperature is about about 700 ℃ to 800 ℃.And a kind of use Si is arranged at present 2Cl 6Be the deposition lpcvd silicon nitride of main reaction thing, then depositing temperature can be dropped to below 650 ℃, as 250 ℃ (VLSITechnology, 1999.Digest of Technical Papers.1999 Symposium on pages47-48).The depositional mode of this kind low temperature can reduce heat budget, therefore is highly suitable in the making of DRAM (Dynamic Random Access Memory) (DRAM).Yet, the lpcvd silicon nitride of this kind low temperature depositing has the too fast shortcoming of wet etching speed, for example, during the silica that forms with the lpcvd silicon nitride of 625 ℃ of deposit of 0.25% hydrofluoric acid solution etching and thermal oxidation method, both almost do not have etching selectivity, and this makes the etch stop layer when this kind silicon nitride layer can't be as the wet etching silica.
When design specification reaches 110nm or 100nm, has metal-insulator-metal (Metal-Insulator-Metal; MIM) cylindrical capacitor of structure is one of optimal candidate of DRAM of future generation.Please refer to Fig. 1-1, when making this kind cylindrical capacitor, need silicon nitride layer 16 usually as the stop layer of wet etching and the diffusion trapping layer of metal.In order to form columniform bottom electrode, the silicon oxide layer 18 on the silicon nitride layer 16 need be removed it in the mode of wet etching, shown in Fig. 1-2.Though the lpcvd silicon nitride layer that forms 700～800 ℃ of depositions can be used as etch stop layer in a conventional manner, but in the manufacture process of stacking-type DRAM, because the making of capacitor is after transistor forms, if use the lpcvd silicon nitride layer of high temperature deposition can increase the contact resistance that connects the diffusion region, and then have influence on transistorized performance.Therefore, if can use the lpcvd silicon nitride layer of low temperature depositing will help reducing heat budget, but at first must solve the too fast problem of its wet etching speed herein.
United States Patent (USP) discloses a kind of method that increases wet etching speed No. 5385630, but it is to use N 2Injecting increases the etch-rate of sacrificial oxide layer with respect to field oxide.
Summary of the invention
For addressing the above problem, main purpose of the present invention just provides a kind of method that reduces silicon nitride with respect to the wet etching speed of silica.
For reaching above-mentioned purpose, method of the present invention comprises the following steps:
Deposition one silicon nitride layer in the semiconductor substrate;
Inject nitrogen containing plasma in this silicon nitride layer; And
This silicon nitride layer is annealed.
Described silicon nitride series of strata are formed with Low Pressure Chemical Vapor Deposition.
Described silicon nitride layer is with Si 2Cl 6With NH 3For the reactant deposition forms.
Described nitrogen containing plasma is N 2 +Ion; The implantation dosage of described nitrogen containing plasma is 1E12～1E17cm -2The injection energy of described nitrogen containing plasma is 0.5～20KeV.
Described annealing is carried out under 600～900 ℃; Described annealing continues 5 seconds～30 minutes.
The present invention also provides a kind of manufacturing method of semiconductor module, comprises the following steps:
Deposit a silicon nitride layer in the semiconductor substrate;
Inject nitrogen containing plasma in this silicon nitride layer;
This silicon nitride layer is annealed;
The deposition one silica layer is on this silicon nitride layer; And
Optionally remove this silicon oxide layer with wet etch method.
Described silicon nitride layer is formed with Low Pressure Chemical Vapor Deposition.
Described silicon nitride layer is with Si 2Cl 6With NH 3For the reactant deposition forms.
Described nitrogen containing plasma is N 2 +Ion; The implantation dosage of described nitrogen containing plasma is 1E12～1E17cm -2The injection energy of described nitrogen containing plasma is 0.5～20KeV;
Described annealing is carried out under 600～950 ℃; Described annealing continues 5 seconds～30 minutes.
Be with this silica of diluent hydrofluoric acid solution etching.
The present invention also provides a kind of manufacture method of cylindrical capacitor, comprises the following steps:
Deposit a silicon nitride layer in the semiconductor substrate, this silicon nitride layer is with Low Pressure Chemical Vapor Deposition, utilizes Si 2Cl 6With NH 3For the reactant deposition forms;
With dosage is 1E12～1E17cm -2The nitrogen cation be injected in this silicon nitride layer;
Under 600～950 ℃, this silicon nitride layer is annealed;
The deposition one silica layer is on this silicon nitride layer; And
With diluent hydrofluoric acid solution this silicon oxide layer of etching optionally.
Described silicon nitride layer is to form 650 ℃ of-250 ℃ of depositions, and described nitrogen containing plasma is N 2 +Ion.
The injection energy of described nitrogen containing plasma is 0.5～20KeV;
Described annealing continues 5 seconds～30 minutes.
Advantage of the present invention is: can reduce the wet etching speed of silicon nitride with respect to silica, therefore improved the etching selection rate of silica to silicon nitride, can't be as the problem of etch stop layer to solve Low Pressure Chemical Vapor Deposition (LPCVD) at the silicon nitride layer of low temperature depositing.Method of the present invention is specially adapted to the manufacturing of (but being not limited to) follow-on cylindrical capacitor DRAM.
Description of drawings
Fig. 1-1～Fig. 1-2 is a series of profiles, in order to the existing part flow process of making cylindrical capacitor to be described.
Fig. 2-1～Fig. 2-3 is a series of profiles, reduces the method for the wet etching speed of silicon nitride in order to explanation a preferred embodiment of the present invention.
Fig. 3 is the hydrogen concentration variation diagram of SiH and NH in the silicon nitride layer, among the figure and show the peak district of SiN.
Fig. 4 is the etching ratio of nitrogenize silicon/oxidative silicon and the graph of a relation of the silicon nitride etch degree of depth.
The number in the figure explanation:
10,14,18～silicon oxide layer;
11～conductive plunger;
12,16～silicon nitride layer;
19～metal level;
100～semiconductor-based the end;
102～silicon nitride layer;
102a～the be rich in silicon nitride layer of nitrogen;
The injecting program of 104～nitrogen ion;
106～cycle of annealing;
108～silicon oxide layer.
Embodiment
For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and conjunction with figs., be described in detail below:
Fig. 2-1 illustrates initial step of the present invention, is formed with a silicon nitride layer 102 on semiconductor substrate 100.In the part of silicon nitride layer below 102, may comprise several layers of metal interconnecting or several electrical interconnective semiconductor subassemblies, as MOS transistor, resistance, logic module etc., for the purpose of the aspect, the semiconductor-based end and the integrated circuit package of silicon nitride layer below 102 only represented it with label 100.Method of the present invention is mainly used in the lpcvd silicon nitride layer of low temperature depositing, and this kind silicon nitride layer is normally below 650 ℃, with Si 2Cl 6With NH 3For the reactant deposition forms.The thickness of silicon nitride layer, generally speaking, if as etch stop layer, as the silicon nitride layer in Fig. 1-1 16, its thickness is greatly between 30～60nm.
Please refer to Fig. 2-2, carry out the injecting program 104 of nitrogen ion, N 2 +Ion is injected in the silicon nitride layer, forms the silicon nitride layer 102a that is rich in nitrogen (N-enriched).Dosage and concentration that ion injects can change according to the thickness of silicon nitride layer, but generally speaking, the implantation dosage of nitrogen ion is about 1E12～1E17cm -2Between, inject energy between 0.5～20KeV.In preferred embodiment, if the thickness of silicon nitride layer greatly between 30～60nm, then preferable implantation dosage is about 1E13～1E15cm -2Between, preferable injection energy is between 1～5KeV.
Next, ion carries out annealing process 106 one after injecting and finishing.This annealing can be carried out under 600～950 ℃, continues 5 seconds～30 minutes.The preferably can carry out under 800～950 ℃, continues 5 seconds～20 seconds.This road annealing process can repair in the silicon nitride layer because the mistake row of the infringement that ion bombardment caused and SiH and NH key, in addition, and Si and H formation SiN and NH key that the previous nitrogen ion that injects more can suspend with silicon nitride layer.This point has passed through the FT-IR experiment confirm, please refer to Fig. 3, and it illustrates the hydrogen concentration variation diagram (among the figure and show the peak district of SiN) of SiH and NH in the silicon nitride layer, and wherein ordinate is the hydrogen atom (Hatoms/cm of unit are 2), abscissa (1) is for after the silicon nitride layer deposition, and (2) with 20 seconds (not injecting any ion) of 900 ℃ of annealing, (3) are with 3KeV implantation concentration 5E13cm with silicon nitride layer -2N 2 +Ion, and then with 900 ℃ of annealing 20 seconds, (4) were with 3KeV implantation concentration 5E14cm -2N 2 +Ion, and then with 900 ℃ of annealing 20 seconds, (5) were with 3KeV implantation concentration 5E15cm -2N 2 +Ion, and then with 900 ℃ of annealing 20 seconds.By Fig. 3 (3), (4) as can be known, after injection of nitrogen ion and annealing, the hydrogen concentration of SiH and NH has increased, and on the other hand, also risen in the peak district of SiN key, and expression SiN key has increased really.But on the contrary, in Fig. 3 (5), when the concentration excess of nitrogen ion, too much nitrogen ion can't form SiN or NH key, and after annealing, the nitrogen ion of bond does not make the structure holeization (porous) of silicon nitride layer, can quicken etch-rate on the contrary.
Fig. 4 is the measurement of carrying out etch-rate with 0.25% dilute hydrofluoric acid solution, and its longitudinal axis is the etching ratio of nitrogenize silicon/oxidative silicon, and transverse axis is the etch depth of silicon nitride.Under normal circumstances, with Si 2Cl 6In the etching of the silicon nitride of 625 ℃ of deposit and silica than nearly 1.But as shown in Figure 4, for hydrofluoric acid higher resistivity is arranged obviously through the silicon nitride layer after the injection-annealing in process.Among the figure with 3KeV implantation concentration 5E14cm -2N 2 +Ion, again with 20 seconds silicon nitride layers of 900 ℃ of annealing, its etching ratio can remain to 0.5, and to proceed to 8nm up to etching dark.
Please refer to Fig. 2-3, later manufacture process also is included in silicon nitride layer 102a and goes up deposition layer of oxide layer 108, for example is with the formed silicon oxide layer of chemical vapour deposition (CVD).In addition to make desired structure such as conductive plunger, cylindrical bottom electrode etc. as manufacturing process such as deposition, little shadow, etching, cmps in the semiconductor fabrication, because the non-pass the present invention's of these steps emphasis does not repeat them here.And then with one wet etching program with oxide layer 108 from silicon nitride layer 102a surface removal.The wet etching of silicon oxide layer 108 can use diluent hydrofluoric acid solution, and during etching, the beneath silicon nitride layer 102a that is rich in nitrogen just can be used as etch stop layer.
Though the present invention is with preferred embodiment openly as above, it is not to be used for limiting the present invention, anyly has the knack of this technical matters person, without departing from the spirit and scope of the present invention, and when doing to change and retouching.Therefore, protection scope of the present invention should be as the criterion with the protection range that claims were defined of present patent application.

Claims (19)

1. a method that reduces the wet etching speed of silicon nitride comprises the following steps:
Deposition one silicon nitride layer in the semiconductor substrate;
Inject the nitrogen cation in this silicon nitride layer; And
This silicon nitride layer is annealed.
2. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1, it is characterized in that: described silicon nitride layer is formed with Low Pressure Chemical Vapor Deposition.
3. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1, it is characterized in that: described silicon nitride layer is with Si 2Cl 6With NH 3For the reactant deposition forms.
4. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1 is characterized in that: the implantation dosage of described nitrogen cation is 1E12～1E17cm -2
5. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1 is characterized in that: the injection energy of described nitrogen cation is 0.5～20KeV.
6. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1 is characterized in that: described annealing is to carry out under 600～900 ℃.
7. a kind of method that reduces the wet etching speed of silicon nitride as claimed in claim 1 is characterized in that: described annealing continues 5 seconds～30 minutes.
8. a manufacturing method of semiconductor module comprises the following steps:
Deposit a silicon nitride layer in the semiconductor substrate;
Inject the nitrogen cation in this silicon nitride layer;
This silicon nitride layer is annealed;
The deposition one silica layer is on this silicon nitride layer; And
Optionally remove this silicon oxide layer with wet etch method.
9. a kind of manufacturing method of semiconductor module as claimed in claim 8 is characterized in that: described silicon nitride layer is formed with Low Pressure Chemical Vapor Deposition.
10. a kind of manufacturing method of semiconductor module as claimed in claim 9 is characterized in that: described silicon nitride layer is with Si 2Cl 6With NH 3For the reactant deposition forms.
11. a kind of manufacturing method of semiconductor module as claimed in claim 8 is characterized in that: the implantation dosage of described nitrogen cation is 1E12～1E17cm -2
12. a kind of manufacturing method of semiconductor module as claimed in claim 11 is characterized in that: the injection energy of described nitrogen cation is 0.5～20KeV.
13. a kind of manufacturing method of semiconductor module as claimed in claim 8 is characterized in that: described annealing is to carry out under 600～950 ℃.
14. a kind of manufacturing method of semiconductor module as claimed in claim 13 is characterized in that: described annealing continues 5 seconds～30 minutes.
15. a kind of manufacturing method of semiconductor module as claimed in claim 8 is characterized in that: be with this silica of diluent hydrofluoric acid solution etching.
16. the manufacture method of a cylindrical capacitor comprises the following steps:
Deposit a silicon nitride layer in the semiconductor substrate, this silicon nitride layer is with Low Pressure Chemical Vapor Deposition, utilizes Si 2Cl 6With NH 3For the reactant deposition forms;
With dosage is 1E12～1E17cm -2The nitrogen cation be injected in this silicon nitride layer;
Under 600～950 ℃, this silicon nitride layer is annealed;
The deposition one silica layer is on this silicon nitride layer; And
With diluent hydrofluoric acid solution this silicon oxide layer of etching optionally.
17. the manufacture method of a kind of cylindrical capacitor as claimed in claim 16 is characterized in that: described silicon nitride layer is to form 650～250 ℃ of depositions.
18. the manufacture method of a kind of cylindrical capacitor as claimed in claim 16 is characterized in that: the injection energy of described nitrogen cation is 0.5～20KeV.
19. the manufacture method of a kind of cylindrical capacitor as claimed in claim 16 is characterized in that: described annealing continues 5 seconds～30 minutes.
CNB021161100A 2002-04-18 2002-04-18 Method for decreasing wet etching speed of silicon nitride Expired - Lifetime CN1187798C (en)

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US7316970B2 (en) * 2004-07-14 2008-01-08 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming high selectivity protection layer on semiconductor device
CN103187293B (en) * 2011-12-31 2015-10-14 中芯国际集成电路制造(北京)有限公司 The manufacture method of semiconductor device

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