CN1185618A - Cauculating method of decoder compensating defect of storage - Google Patents

Cauculating method of decoder compensating defect of storage Download PDF

Info

Publication number
CN1185618A
CN1185618A CN96123236A CN96123236A CN1185618A CN 1185618 A CN1185618 A CN 1185618A CN 96123236 A CN96123236 A CN 96123236A CN 96123236 A CN96123236 A CN 96123236A CN 1185618 A CN1185618 A CN 1185618A
Authority
CN
China
Prior art keywords
block
memory buffer
algorithm
data
demoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN96123236A
Other languages
Chinese (zh)
Inventor
陈志贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Microelectronics Corp
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to CN96123236A priority Critical patent/CN1185618A/en
Publication of CN1185618A publication Critical patent/CN1185618A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

The calculation steps of the invented decoder for compensating the defect of storage, the decoder is provided between a micro-controller and buffer storage in a system, include that the instruction of said micro-controller is received by the decoder, and the defected location group in the storage is scanned, the defected-location corresponded sector position is recorded into a column, then it is identified that whether the data is written down to the buffer storage and then the buffer-storage location sector for writing down the data is selected, finally the location-sector position is compared with the defected location-sector column to ensure the data written down to good sectors in buffter-storage and correct data access.

Description

The algorithm of the demoder that compensation memory is damaged
The present invention relates to the algorithm of the demoder of a kind of compensation memory damaged (Defect Memory), the algorithm of the CD drive demoder that particularly a kind of compensation memory is damaged.
Fig. 1 is the structural drawing of a kind of known typical light disk drive (CD-ROM Drive) system 100, please refer to Fig. 1, wherein analogue signal processor (Analog Signal Processor) 40 is responsible for the control of motor rotary speed and the decoding first time and the decoding for the second time of dish 60 data respectively with digital signal processor (Digittal Signal Processor) 50.Demoder 10 is responsible for decoding for the third time and the control of main frame (Host) interface.Memory buffer (Buffer Menory) 20 is done the temporary and main frame zero access (Cache) of decoding for demoder 10.Microcontroller (Microcontroller) 30 and software 70 are carried out the control of overall flow in addition.Through the data of analogue signal processor 40 with digital signal processor 50 outputs, be the data of general audio disc (CD-Audio), can export loudspeaker to via digital analog converter 90, and after the data of CD (CD-ROM) are decoded for the third time by demoder 10 again, through ide interface or small computer system interface (Small Computer System Interface; SCSI) 80 export main frame (for example PC) to.
Known general demoder 10 when main frame requires data and demoder 10 to receive orders, sends just for microcontroller 30 and interrupts.Microcontroller 30 is obtained order by demoder 10 places, learns main frame requirement sector position and length from order, so require digital signal processor 50 sense data from the CD 60 again, delivers to demoder 10, and requires demoder 10 to accept data.10 elder generations of demoder are temporary to memory buffer 80 with data, write back by taking out decoding in the memory buffer 80 then again.At last, microcontroller 30 requires demoder 10 again, and the data of finishing decoding are sent back main frame.
More than be the flow process of known general decoding, its storer as buffering/zero access must be normal good dynamic RAM (DRAM) or static RAM (SRAM).Yet, because several bits damages of portioned product can take place quality problems occasionally, perhaps, damage during the plant produced storer because of long-term use produces storer.If have some storage unit or bit (Cellsor Bits) to damage in the storer, will cause decoded result incorrect or pass the mistake of host data back.Factor causes operation result incorrect according to mistake, is intolerable to computer operation.
Therefore, fundamental purpose of the present invention just provides the damaged algorithm of a kind of compensation memory circuit, and is damaged in order to this storer of compensation on the CD drive demoder.
For realizing above-mentioned and other purposes of the present invention, the algorithm of the demoder that a kind of compensation memory is damaged, wherein, this decoder application and is connected between the microcontroller and a memory buffer in the system in a system, and this algorithm comprises the following steps:
A, each time during system boot, demoder receives the instruction of microcontroller, and memory buffer scan, and whether damage bit group is arranged in the detection memory buffer;
B, will damage the corresponding block location records in bit group position with these and become a bad block table;
C, differentiate whether will write data to memory buffer:
(1) if do not have, then end data write operation;
(2), then select a memory buffer block to write data if having; And
Whether d, to differentiate the block position of writing down in memory buffer block position and the bad block table identical:
(1) if the block position is identical, then gets back to step c;
(2) if block position difference then with data write buffering memory block, and is got back to step c;
Said method makes data write a good memory buffer block.
According to a preferred embodiment of the present invention, the algorithm of the demoder of the damaged circuit of a kind of compensation memory, wherein, this decoder application is in a system, it includes one at least and skips bad block circuit and a multiplier and totalizer combinational circuit, and be connected between the microcontroller and a memory buffer in the system, this algorithm comprises the following steps:
A, each time during system boot, demoder receives the instruction of microcontroller, and memory buffer is scanned, and in the detection memory buffer whether bad block is arranged;
B, the bad block number of memory buffer is set in the bad block access function resister array of skipping the bad block circuit;
C, when demoder uses memory buffer, a block number that use converts a new block number to via skipping the bad block circuit, skips the bad block number of memory buffer; And
D, new block number convert the memory buffer block address that will use to via multiplier and totalizer combinational circuit.
For above-mentioned and other purposes of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. is described in detail as follows, in the accompanying drawing:
Fig. 1 is a known typical optical disc drive system structural drawing;
Fig. 2 is the algorithm flow chart according to the damaged demoder of compensation memory of the present invention;
Fig. 3 is the hardware block diagram according to the decoding circuit 370 of a preferred embodiment of the present invention;
Fig. 4 is a hardware block diagram of skipping bad block circuit 300 among Fig. 3.
On CD, the storage of data is to be unit with sector (Sector), each sector length after decoding is 2352 bit groups (Bytes), the data that wherein comprise 2048 bit groups usually, the synchro control of 12 bit groups, 4 bit groups read header (Header), and the error correcting code of 288 bit groups etc. (its look format specification and slightly different).Demoder corresponds to sector on the CD with regular length when the access memory buffer, just memory buffer is divided into several blocks (Blocks).Be 1 block (suppose and whole 2352 bit groups will be write) for example, or be 1 block (as long as supposing to write the data division of 2048 bit groups) with 2k bit group with 3k bit group.Suppose that whole memory buffer are 256k bit group, if be 1 block length with 3k, then whole memory buffer can be divided into block 0, block 1 ..., 85 blocks such as block 84.
Then, please be simultaneously with reference to Fig. 1 and Fig. 2.Fig. 2 illustrates the algorithm flow chart according to the damaged demoder of a kind of compensation memory of the present invention.Square frame 200 and square frame 201 expressions, when optical disc drive system 100 starts each time, demoder 10 is accepted microcontroller 30 instructions, and whole memory buffer 20 is done scanning, and detects whether the bit of damage group is arranged in the memory buffer 20.This kind scanning technique is ripe common technology in personal computer industry, if by simply write/read/compare (Write/Read/Compare) can realize.Wherein, demoder 10 can provide some access function resisters (Register), allows microcontroller 30 read-write, and is converted to the storer control signal data are write or read.For example, table 1 is the definition of a register.
Then, square frame 202 expressions, after microcontroller 30 had scanned memory buffer 20, (for example depositing in the array of a predefined) remembered in the block position that is about to damage the position correspondence of bit group, and the block location records that just will damage bit group position correspondence becomes a bad block table.
Come again, square frame 203 expressions, after having set up the bad block table, microcontroller 30 differentiates whether the data of wanting write buffering memory 20 are arranged.If there are not the data that will write, then to square frame 207, the end data write activity; If the data that will write are arranged, then continue the step of square frame 204.
Then, square frame 204 expressions, when requiring demoder 10, microcontroller 30 accepts data and when decoding, will be at demoder 10 with data of optical disk or in decoded data write buffering memory 20 processes, must choose a memory buffer 20 blocks earlier as storing block, its memory buffer of choosing 20 block positions are extremely used in order greatly by little usually.And demoder 10 can be controlled the position of sector write buffering memory 20 blocks of CD 60 by microcontroller 30.Here can finish by access function resister equally, for example table 2 promptly provides one group of register, allows microcontroller 30 control the position and the length of write buffering memories 20 blocks.
Table 1
The address State The register title Content description
??04h ?R/W UACH The high segment register of microcontroller address counter: 7~6: keep 5~0: the UACH position 21~16 of microcontroller address counter
??05h ?R/W UACM Segment register in the microcontroller address counter: 7~0: the UACM position 15~8 of microcontroller address counter
??06h ?R/W UACL The microcontroller address counter hangs down segment register: 7~0: the UACL position 7~0 of microcontroller address counter is noted: UACH/M/L increases by 1 after each access
??07h ??R RAMRD Microcontroller reads to hold register: 7~0: the RAMRD-memory buffer read port of microcontroller
??W ?RAMWR Microcontroller is write the end register: 7~0: the RAMRD-memory buffer write port of microcontroller
Next, require demoder 10 to accept data and when decoding, choose memory buffer 20 block processes each time, all need memory buffer 20 blocks and the comparison of bad block table that will use at microcontroller 30.Therefore, square frame 205 representative will write buffering memory 20 block positions and the bad block table make comparisons:
(1) if the position of writing down in memory buffer 20 block positions and the bad block table is identical, then reselects a memory buffer 20 blocks, promptly return square frame 203 to write data.
(2) if the position of writing down in memory buffer block 20 positions and the bad block table is different,, data are write this memory buffer 20 blocks then to square frame 205.Then, return square frame 203.
As mentioned above, illustrate, in fact can expand the storage device that is carried out up to all analog structures (,, using memory buffer) by microprocessor controls so long as do interface with demoder though the present invention is example with the optical disc drive system.Wei Lai high-density optical disk (DVD-ROM) machine or hard disc (Hard Disk) machine etc. for example.
Principal character of the present invention is, cooperates microcontroller with demoder, comes swept memory damaged, detects and avoid to damage the bit group, data can be write good memory block, keeps the correctness of data access, reaches the damaged purpose of compensation memory.No matter what just have when being storer production is damaged, or storer produces damage because of long-term the use, and the present invention can compensate, and under the situation that influences usefulness hardly, reduces the cost of overall optical disk driver system.
Table 2
Index R/W Register Content description
43 R/W The N sector Decoding sector counter: 7~0:N sector-decoding sector counter
44 Keep
45 Keep
46 R/W DBLKL The low section of decoded blocks index: 7~0: the DBLKL position 7~0 of decoded blocks index
47 R/W DBLKH The high section of decoded blocks index: 7~3: keep, always 0 2~0: the DBLKH position 10~8 of decoded blocks index is noted: in the process of operation decode operation, DBLKL and DBLKH register are by write-protect.
Next be according to a preferred embodiment of the present invention, referring again to Fig. 1, receive the instruction of microcontroller 30 at demoder 10, scanned after the memory buffer 20, demoder 10 provides at least one group of access function resister for this microcontroller 30, set the bad block of memory buffer 20, make when demoder 10 uses memory buffer 20, skip the bad block position of having set automatically.That is microcontroller 30 is when using the block of memory buffer 20, bad block table that needn't comparison of aforementioned, and this part is calculated and can be automatically performed by hardware, to save the operation time of microcontroller 30.The register of relevant present embodiment can reference table 3 example.Table 3 is an example with the bad block that can reach 3 places in the compensation memory buffer 20, and in fact this registers group can optionally expand (then just enough handling all situations with 2~4 groups in the practical application) arbitrarily.
Come again, please refer to Fig. 1 and Fig. 2.Fig. 3 illustrates the hardware block diagram of the decoding circuit 370 of a preferred embodiment of the present invention, this decoding circuit 370 is the partial circuit of demoder 10, purposes is converted to buffer memory address (Address) 360 for the block number (Block Number) 320 that will use, if bad block circuit 300 is skipped in omission, be exactly known decoding circuit among the figure.During CD drive start at first each time, skip bad block circuit 300 and accept the bad block number data 330 that microcontroller 30 writes, set the bad block of memory buffer 20.Come again, when demoder 10 will use memory buffer, skip the block number 320 that 300 acceptance of bad block circuit will be used, convert it to new block number 340, so that can skip memory buffer 20 bad block numbers.Then, multiplier and totalizer combinational circuit 310 are accepted new block number 340 and block skew (Block Offset) 350, output buffer storage 20 addresses 360.For example, suppose to use block number 320 to be n, new block number 340 is nn, and block skew 350 is f, and each block length is m, and memory buffer 20 addresses 360 are a, then a=nn * m+f.
Table 3
Index ?R/W Register Content description
????70 ?R/W ?DEFI Block 1 damaged indexed registers: 7~0: the DEFI position 7~0 of block 1 damaged index
????71 ?R/W ?DEF2 Block 2 damaged indexed registers: 7~0: the DEF2 position 7~0 of block 2 damaged index
????72 ?R/W ?DEF3 Block 3 damaged indexed registers: 7~0: the DEF3 position 7~0 of block 3 damaged index
????: ????: ??: ??: ???: ???: ???????????????: ???????????????:
And then please refer to Fig. 4, it illustrates the hardware block diagram of skipping bad block circuit 300 among Fig. 3.This is skipped bad block circuit 300 and has the bad block access function resister array 400 that x+1 bad block access function resister B (0)~B (x) forms, x+1 subtracter (Substracter) 410, x+1 comparer (Comparator) 420, and 1 totalizer (Adder) 430.The memory content of bad block access function resister B (0) in the bad block access function resister array 400~B (x), the packing into of bad block number data 330 of having been scanned memory buffer 20 back gained by microprocessor 30 set, per 1 access function resister 1 number of bad block of packing into, all the other the untapped access function resisters maximal value (Max) of then packing into.Subtracter 410 is input as B (j), is output as B (j)-j.Comparer 420 is differentiated the size that will use block number 320 (being assumed to be n) and B (j)-j, if n 〉=B (j)-j then is output as 1, if n<B (j)-j then is output as 0.Totalizer 430 then is with the output of n and each comparer 410 (1 or 0) addition, tries to achieve new block number 340.
Referring again to Fig. 3 and Fig. 4, suppose that bad block access function resister array 400 has 4 groups of access function resister B (0)~B (3) (2~4 groups of general situations are just enough), and when start memory buffer 20 the bit group of damage is arranged through scanning discovery block 2 and block 5, therefore set B (0) ← 2, B (1) ← 5, B (2) ← Max, B (3) ← Max.
When n=0, n=0<B (0)-0 and n=0<B (1)-1 and n=0<B (2)-2 and n=0<B (3)-3, each comparer 410 result is 0,0,0,0, so nn=n+0+0+0+0=0.
In like manner, when n=1, each comparer 410 result is 0,0,0,0, so nn=n+0+0+0+0=1.
Work as n=2, each comparer 410 result is 1,0,0,0, so nn=n+1+0+0+0=3.
Work as n=3, each comparer 410 result is 1,0,0,0, so nn=n+1+0+0+0=4
Work as n=4, each comparer 410 result is 1,1,0,0, so nn=n+1+1+0+0=6.
Work as n=5, each comparer 410 result is 1,1,0,0, so nn=n+1+1+0+0=7.
In like manner can get n=6,7,8 ...Thereby this circuit design can be skipped the block of damage.
Though with as above preferable implementation the present invention; yet it is not in order to limit the present invention; any those skilled in the art; under the situation that does not break away from the spirit and scope of the present invention; can this be changed and retouch, so protection scope of the present invention should being as the criterion by the claims regulation.

Claims (10)

1, the algorithm of the demoder that a kind of compensation memory is damaged, wherein, this decoder application and is connected between the microcontroller and a memory buffer in this system in a system; This algorithm comprises the following steps:
A, each time during this system boot, this demoder receives the instruction of this microcontroller, and this memory buffer is scanned, and detects whether the bit of damage group is arranged in the memory buffer;
B, will damage the corresponding block location records in bit group position with these and become a bad block table;
Whether c, differentiating will be with a data write buffering memory, wherein:
(1) if do not have, then end data write operation;
(2), then select a memory buffer block to write data if having; And
Whether d, to differentiate the block position of writing down in this memory buffer block position and this bad block table identical, wherein:
(1) if the block position is identical, then gets back to this step c;
(2) if block position difference then writes these data this memory buffer block, and gets back to this step c;
Make these data write a good memory buffer block whereby.
2, algorithm as claimed in claim 1, wherein these data can be data of optical disk.
3, algorithm as claimed in claim 1, wherein these data can be that CD is through decoded data.
4, algorithm as claimed in claim 1, wherein this system is a CD drive.
5, algorithm as claimed in claim 1, wherein this system is the high density compact disc driver.
6, algorithm as claimed in claim 1, wherein this system is a hard disk drive.
7, the algorithm of the demoder of the damaged circuit of a kind of compensation memory, wherein, this decoder application is in a system, which comprises at least one and skip bad block circuit and a multiplier and totalizer combinational circuit, and be connected between the microcontroller and a memory buffer in this system, this algorithm comprises the following steps:
A, each time during system boot, demoder receives the instruction of this microcontroller, and this memory buffer is scanned, and detects whether bad block is arranged in this memory buffer;
B, the bad block number of this memory buffer is set in the bad block access function resister array of skipping the bad block circuit;
C, when this demoder uses this memory buffer, a block number that use converts a new block number to via skipping the bad block circuit, to skip the bad block number of this memory buffer; And
D, this new block number convert the memory buffer block address that will use to via multiplier and totalizer combinational circuit.
8, algorithm as claimed in claim 7, wherein this system is a CD drive.
9, algorithm as claimed in claim 7, wherein this system is the high density compact disc driver.
10, algorithm as claimed in claim 7, wherein this system is a hard disk drive.
CN96123236A 1996-12-19 1996-12-19 Cauculating method of decoder compensating defect of storage Pending CN1185618A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN96123236A CN1185618A (en) 1996-12-19 1996-12-19 Cauculating method of decoder compensating defect of storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN96123236A CN1185618A (en) 1996-12-19 1996-12-19 Cauculating method of decoder compensating defect of storage

Publications (1)

Publication Number Publication Date
CN1185618A true CN1185618A (en) 1998-06-24

Family

ID=5127606

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96123236A Pending CN1185618A (en) 1996-12-19 1996-12-19 Cauculating method of decoder compensating defect of storage

Country Status (1)

Country Link
CN (1) CN1185618A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100382202C (en) * 2002-01-23 2008-04-16 旺宏电子股份有限公司 Method and device for dynamically hiding memory defect
CN100442376C (en) * 2005-05-20 2008-12-10 联发科技股份有限公司 Data processing method when CD driver recording user data onto defective CD

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100382202C (en) * 2002-01-23 2008-04-16 旺宏电子股份有限公司 Method and device for dynamically hiding memory defect
CN100442376C (en) * 2005-05-20 2008-12-10 联发科技股份有限公司 Data processing method when CD driver recording user data onto defective CD

Similar Documents

Publication Publication Date Title
US6201655B1 (en) Rotational storage device
US5319627A (en) Method for managing a defect in an optical disk by assigning logical addresses based upon cumulative number of defects in the disk
US5508989A (en) Optical disc apparatus
US6336202B1 (en) Data storage system, storage medium and method of controlling a data storage system
US6651208B1 (en) Method and system for multiple column syndrome generation
US5864440A (en) Data processing method and data storage system
AU2763300A (en) A method of recording realtime data and a realtime data recording apparatus
CN1185618A (en) Cauculating method of decoder compensating defect of storage
CN1472742A (en) Method for recording data on compact disc by good recording blocks to replace defected blocks
US6275456B1 (en) Method of processing data of defect sector in a DVD-RAM system and the DVD-RAM system.
US6778480B2 (en) Method and apparatus for automatic slip defect management in a DVD drive
CN1409314A (en) Fault detection capable of recording storage medium
US6697921B1 (en) Signal processor providing an increased memory access rate
US6499082B1 (en) Method of transferring data from large capacity data storage device
US7823045B2 (en) Error correction apparatus and method thereof
CN1430225A (en) Generating method and device of correcting code block and optical recording medium containing correcting code block
JP3307529B2 (en) Data processing method and data storage device
US20050240750A1 (en) Interleaved mapping method and apparatus for accessing memory
US6873334B2 (en) Method of buffer management and task scheduling for two-dimensional data transforming
KR100328818B1 (en) How to save data in flash memory
TW322559B (en) The method by using decoder to support defect memory
GB2324176A (en) Compensating for defective memory associated with a decoder
US7076579B2 (en) Structure and method for multi-section management of a buffer
CN1949382A (en) Method for managing damage block and device thereof
KR100234391B1 (en) ECC memory control apparatus of digital video disk

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C01 Deemed withdrawal of patent application (patent law 1993)
WD01 Invention patent application deemed withdrawn after publication