CN118540779A

CN118540779A - Signal detection method, apparatus, device, storage medium, and program product

Info

Publication number: CN118540779A
Application number: CN202310161852.8A
Authority: CN
Inventors: 刘武当; 胡胜发
Original assignee: Guangzhou Ankai Microelectronics Co ltd
Current assignee: Guangzhou Ankai Microelectronics Co ltd
Priority date: 2023-02-23
Filing date: 2023-02-23
Publication date: 2024-08-23

Abstract

The application relates to a signal detection method, a device, equipment, a storage medium and a program product, which are used for determining a plurality of candidate synchronous sequences based on a received baseband signal and a preset synchronous sequence length, then determining the synchronous performance metric value of each candidate synchronous sequence based on the phase and the amplitude of each candidate synchronous sequence, and determining a target synchronous sequence according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement. The method can improve the signal synchronization performance in the signal detection process.

Description

Signal detection method, apparatus, device, storage medium, and program product

Technical Field

The present application relates to the field of wireless communications technologies, and in particular, to a signal detection method, apparatus, device, storage medium, and program product.

Background

In wireless communication systems, signal synchronization is one of the key technologies of receivers. In a wireless communication system, a coherent synchronization algorithm and a differential coherent synchronization algorithm are generally adopted to realize signal synchronization, and the method has the advantages of high synchronization accuracy, strong frequency offset resistance, large calculation amount, high synchronization cost and less application in a Bluetooth receiver.

In the related art, in order to reduce the cost of a receiver, the receiver generally performs signal detection by using phase information of a received signal to achieve synchronization of signals. However, the signal detection method in the related art has a problem of poor signal synchronization performance in the signal detection process.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a signal detection method, apparatus, device, storage medium, and program product that can improve signal synchronization performance in a signal detection process.

In a first aspect, the present application provides a signal detection method, the method comprising:

determining a plurality of candidate synchronous sequences based on the received baseband signal and the preset synchronous sequence length;

determining a synchronization performance metric value of each candidate synchronization sequence based on the phase and amplitude of each candidate synchronization sequence;

Determining a target synchronous sequence according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement.

In one embodiment, determining a plurality of candidate synchronization sequences based on the received baseband signal and a preset synchronization sequence length includes:

intercepting the baseband signal to obtain a signal to be detected;

And determining a plurality of candidate synchronous sequences according to the signal to be detected and the synchronous sequence length.

In one embodiment, signal interception is performed on the baseband signal to obtain a signal to be detected, including:

acquiring the interception position and the interception length of a baseband signal;

and intercepting the baseband signal with the same intercepting length from the intercepting position in the baseband signal to obtain a signal to be detected.

In one embodiment, determining a plurality of candidate synchronization sequences according to the signal to be detected and the synchronization sequence length includes:

Acquiring an oversampling multiple of a baseband signal;

Based on the oversampling multiple, the length of the synchronous sequence is adopted to carry out sliding window interception on the signal to be detected, and a plurality of candidate synchronous sequences are obtained.

In one embodiment, determining the synchronization performance metric value for each candidate synchronization sequence based on the phase and amplitude of each candidate synchronization sequence comprises:

For any candidate synchronous sequence, determining the phase correlation value of the candidate synchronous sequence according to the phase of the candidate synchronous sequence;

determining the amplitude correlation value of the candidate synchronous sequence according to the amplitude of the candidate synchronous sequence;

And determining the synchronization performance metric value of the candidate synchronization sequence according to the phase correlation value and the amplitude correlation value.

In one embodiment, determining the phase correlation value of the candidate sync sequence according to the phase of the candidate sync sequence includes:

Acquiring the phase difference value of every two adjacent symbols in the candidate synchronous sequence;

and determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of every two adjacent symbols in the candidate synchronous sequence.

In one embodiment, determining the phase correlation value of the candidate sync sequence according to the phase difference value of every two adjacent symbols in the candidate sync sequence includes:

Performing frequency deviation removal processing on each phase difference value to obtain a frequency deviation removal phase difference value of each phase difference value;

and determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of each frequency deviation removal and the phase difference polarity of the preset synchronous sequence.

In one embodiment, determining the amplitude correlation value of the candidate sync sequence according to the amplitude of the candidate sync sequence includes:

And accumulating the amplitude values of all the symbols in the candidate synchronous sequence to obtain the amplitude correlation value of the candidate synchronous sequence.

In one embodiment, determining the synchronization performance metric value of the candidate synchronization sequence based on the phase correlation value and the amplitude correlation value includes:

Acquiring preset phase weights and amplitude weights;

And carrying out weighted addition processing on the phase correlation value and the amplitude correlation value according to the phase weight and the amplitude weight to obtain a synchronization performance metric value of the candidate synchronization sequence.

In one embodiment, determining the target synchronization sequence according to the synchronization performance metric value of each candidate synchronization sequence includes:

And determining the candidate synchronous sequence with the largest synchronous performance metric value in the candidate synchronous sequences as a target synchronous sequence.

In one embodiment, before determining the plurality of candidate synchronization sequences according to the signal to be detected and the synchronization sequence length, the method further comprises:

For any point in the signal to be detected, acquiring an initial phase, an initial amplitude and an initial quadrature component of the point;

and determining the phase and the amplitude of the sample point according to the initial phase, the initial amplitude and the initial quadrature component of the sample point.

In one embodiment, determining the phase and amplitude of the sample from the initial phase, initial amplitude and initial quadrature component of the sample comprises:

determining a twiddle factor based on the initial orthogonal component;

And according to the rotation factor, iteratively updating the phase, the amplitude and the orthogonal component of the sample point until a preset convergence condition is reached, so as to obtain the phase and the amplitude of the sample point.

In a second aspect, the present application also provides a signal detection apparatus, the apparatus comprising:

The first determining module is used for determining a plurality of candidate synchronous sequences based on the received baseband signal and the preset synchronous sequence length;

The second determining module is used for determining the synchronization performance metric value of each candidate synchronization sequence based on the phase and the amplitude of each candidate synchronization sequence;

the third determining module is used for determining a target synchronous sequence according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement.

In a third aspect, an embodiment of the present application provides a computer device, including a memory and a processor, the memory storing a computer program, the processor implementing the steps of the method provided by any of the embodiments of the first aspect, when the computer program is executed.

In a fourth aspect, embodiments of the present application provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method provided by any of the embodiments of the first aspect described above.

In a fifth aspect, embodiments of the present application also provide a computer program product comprising a computer program which, when executed by a processor, implements the steps of the method provided by any of the embodiments of the first aspect described above.

The signal detection method, the device, the equipment, the storage medium and the program product are used for determining a plurality of candidate synchronous sequences based on the received baseband signal and the preset synchronous sequence length, then determining the synchronous performance metric value of each candidate synchronous sequence based on the phase and the amplitude of each candidate synchronous sequence, and determining the target synchronous sequence according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement. According to the method, a plurality of candidate synchronous sequences are obtained in a baseband signal, then the synchronous performance metric value of each candidate synchronous sequence is determined according to the phase and the amplitude of each candidate synchronous sequence, the synchronous performance metric value of the candidate synchronous sequence is determined according to two different dimensions of the phase and the amplitude, the accuracy of the synchronous performance metric value of the candidate synchronous sequence is improved, the candidate synchronous sequence with the synchronous performance meeting the preset requirement is determined as a target synchronous sequence, and under the condition that the accuracy of the synchronous performance metric value of the candidate synchronous sequence is high, the accuracy of the target synchronous sequence is also high, so that the synchronous performance of signals in the signal detection process is improved.

Drawings

FIG. 1 is a diagram of an application environment for a signal detection method in one embodiment;

FIG. 2 is a flow chart of a signal detection method in one embodiment;

FIG. 3 is a flow diagram of determining candidate sync sequences in one embodiment;

FIG. 4 is a schematic diagram of a structure of a signal to be detected in one embodiment;

FIG. 5 is a flowchart illustrating a method for determining candidate sync sequences according to another embodiment;

FIG. 6 is a schematic diagram of a signal to be detected in another embodiment;

FIG. 7 is a flow chart of determining a signal to be detected in one embodiment;

FIG. 8 is a schematic diagram of a baseband signal structure in one embodiment;

FIG. 9 is a flowchart of a signal detection method according to another embodiment;

FIG. 10 is a flowchart of a signal detection method according to another embodiment;

FIG. 11 is a flowchart of a signal detection method according to another embodiment;

FIG. 12 is a schematic diagram of a synchronization sequence defined by a specification in one embodiment;

FIG. 13 is a flowchart of a signal detection method according to another embodiment;

FIG. 14 is a flow diagram of acquiring phase and amplitude in one embodiment;

FIG. 15 is a flow chart of another embodiment for obtaining phase and amplitude values;

FIG. 16 is a graph showing the comparison results in one embodiment;

FIG. 17 is a flowchart of a signal detection method according to another embodiment;

FIG. 18 is a block diagram of a signal detection device in one embodiment;

fig. 19 is an internal structural view of the computer device in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

The signal detection method provided by the embodiment of the application can be applied to an application environment shown in fig. 1. Wherein the transmitter 102 communicates with the receiver 104 via a wireless medium. The transmitter 102 and the receiver 104 are devices for transmitting and receiving signals in a wireless communication system, wherein the transmitter 102 and the receiver 104 are corresponding, the transmitter 102 may be a bluetooth transmitter, and the receiver 104 may be a bluetooth receiver.

In the related art, in order to reduce the operation complexity, the receiver converts the baseband complex signal into a phase value and processes the phase value, but the root mean square error of the synchronization performance is larger.

Also, in practice, the enhanced data rate (ENHANCED DATA RATE, EDR) synchronization sequence in the bluetooth frame is modulated using pi/4-differential quadrature phase shift keying (DIFFERENTIAL QUATERNARY PHASE SHIFT KEYING, DQPSK) or 8-phase differential phase shift keying (DIFFERENTIAL PHASE SHIFT KEYING, DPSK). At this time, the signal no longer maintains the constant envelope characteristic of the gaussian frequency shift keying (Gaussian Frequency SHIFT KEYING, GFSK) signal, and if only the phase information of the signal is used, the synchronization accuracy is significantly reduced.

Based on this, the present application provides a signal detection method, apparatus, device, storage medium and program product, which can improve signal synchronization performance in the signal detection process.

In one embodiment, as shown in fig. 2, a signal detection method is provided, which uses the receiver 104 in fig. 1 as an execution body, and includes the following steps:

s201, determining a plurality of candidate synchronous sequences based on the received baseband signal and the preset synchronous sequence length.

After the receiver receives the transmission signal sent by the transmitter, the transmission signal is received by the receiver after being demodulated by the carrier, and the signal received by the receiver is called a baseband signal, wherein the baseband signal comprises an in-phase (I)/quadrature (Q) signal.

The baseband signal received by the receiver generally includes information such as an access code, a header, a synchronization sequence, and a tail, and signal synchronization of the receiver mainly aims at a synchronization sequence part in the baseband signal, so that the synchronization sequence part in the baseband signal needs to be acquired after the receiver receives the baseband signal.

However, in practical applications, the receiver cannot accurately determine the position of the synchronization sequence in the baseband signal, and therefore, it is necessary to perform signal detection on the baseband signal to determine the synchronization sequence.

Therefore, a plurality of candidate synchronous sequences can be obtained from the baseband signal according to the preset synchronous sequence length, and the final target synchronous sequence is determined by analyzing the plurality of candidate synchronous sequences.

S202, determining the synchronization performance metric value of each candidate synchronization sequence based on the phase and the amplitude of each candidate synchronization sequence.

The phase is a scale describing the relative position of a certain point in the periodic signal in a cycle at a specific moment, the scale is a measure describing the waveform change of the signal, and the amplitude is the corresponding magnitude of the signal vibration, so that the synchronization performance measure value of the candidate synchronization sequence is determined according to the phase and the amplitude of the candidate synchronization sequence, and the synchronization performance measure value can be more accurate. The synchronization performance metric characterizes the goodness of the candidate synchronization sequence.

After obtaining the plurality of candidate synchronization sequences, a synchronization performance metric value of each candidate synchronization sequence may be determined based on a phase and an amplitude of each candidate synchronization sequence.

In one embodiment, the method for obtaining the phase and the amplitude of the candidate synchronization sequences may be obtained according to a preset solution model, specifically, the candidate synchronization sequences are respectively input into the solution model, and the phase and the amplitude of each candidate synchronization sequence are output through analysis of the solution model on each candidate synchronization sequence.

In another embodiment, the phase and amplitude of the candidate sync sequence are already stored in a database, and the phase and amplitude of each symbol in the candidate sync sequence are obtained directly from the database.

For any candidate synchronization sequence, the method of obtaining the synchronization performance metric value of the candidate synchronization sequence may be to measure the phase and amplitude of the candidate synchronization sequence to obtain a phase metric value and an amplitude metric value, and then use the sum of the phase metric value and the amplitude metric value as the synchronization performance metric value of the candidate synchronization sequence.

Optionally, the method of measuring the phase and the amplitude of the candidate synchronization sequence may be that, according to the magnitude of the phase and a preset phase threshold, a phase measurement value is determined, where the phase measurement value represents the deviation degree of the magnitude of the phase of the candidate synchronization sequence and the phase threshold; and determining an amplitude metric value according to the amplitude value and a preset amplitude threshold value, wherein the amplitude metric value represents the deviation degree of the amplitude value of the candidate synchronous sequence and the amplitude threshold value.

The method of obtaining the synchronization performance metric of the candidate synchronization sequence may also be to directly use the sum of the phase and the amplitude of the candidate synchronization sequence as the synchronization performance metric of the candidate synchronization sequence.

S203, determining a target synchronous sequence according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement.

The synchronization performance of the target synchronization sequence meets a preset requirement, wherein the preset requirement can be that the synchronization performance metric value is larger than a preset synchronization performance threshold value, namely, candidate synchronization sequences with the synchronization performance metric value larger than the preset synchronization performance threshold value in all candidate synchronization sequences are obtained, the candidate synchronization sequences with the synchronization performance metric value larger than the preset synchronization performance threshold value are used as target synchronization sequences, or the centered candidate synchronization sequences are selected from the candidate synchronization sequences with the synchronization performance metric value larger than the preset synchronization performance threshold value to be used as target synchronization sequences.

Optionally, the preset requirement may be that the synchronization performance metric value is the largest in all candidate synchronization sequences, and when the preset requirement is that the synchronization performance metric value is the largest in all candidate synchronization sequences, the candidate synchronization sequence with the largest synchronization performance metric value in each candidate synchronization sequence is determined as the target synchronization sequence.

In the signal detection method, a plurality of candidate synchronous sequences are determined based on the received baseband signal and the preset synchronous sequence length, then the synchronous performance metric value of each candidate synchronous sequence is determined based on the phase and the amplitude of each candidate synchronous sequence, and the target synchronous sequence is determined according to the synchronous performance metric value of each candidate synchronous sequence; the synchronization performance of the target synchronization sequence meets the preset requirement. According to the method, a plurality of candidate synchronous sequences are obtained in a baseband signal, then the synchronous performance metric value of each candidate synchronous sequence is determined according to the phase and the amplitude of each candidate synchronous sequence, the synchronous performance metric value of the candidate synchronous sequence is determined according to two different dimensions of the phase and the amplitude, the accuracy of the synchronous performance metric value of the candidate synchronous sequence is improved, the candidate synchronous sequence with the synchronous performance meeting the preset requirement is determined as a target synchronous sequence, and under the condition that the accuracy of the synchronous performance metric value of the candidate synchronous sequence is high, the accuracy of the target synchronous sequence is also high, so that the synchronous performance of signals in the signal detection process is improved.

The above embodiment determines the target synchronization sequence according to a plurality of candidate synchronization sequences, and a specific process of how to acquire the plurality of candidate synchronization sequences is described below by way of one embodiment, in which, as shown in fig. 3, the plurality of candidate synchronization sequences are determined based on the received baseband signal and a preset synchronization sequence length, including the following steps:

S301, signal interception is carried out on the baseband signal, and a signal to be detected is obtained.

Because the baseband signal comprises signals of a plurality of parts such as a head part, a synchronous sequence, a tail part and the like, the baseband signal can be subjected to signal interception, and the part comprising the synchronous sequence is intercepted to obtain a signal to be detected, wherein the signal to be detected comprises the part of the synchronous sequence in the baseband signal and is not limited to the part of the synchronous sequence.

The length of the signal to be detected is greater than the length of the synchronisation sequence.

S302, determining a plurality of candidate synchronous sequences according to the signal to be detected and the synchronous sequence length.

And carrying out sliding window interception on the signal to be detected by adopting the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences.

For example, as shown in fig. 4, the signal to be detected in fig. 4 includes 15 symbols (S1-S15), and if the synchronization sequence length is 11, 5 candidate synchronization sequences are obtained: S1-S11, S2-S12, S3-S13, S4-S14 and S5-S15.

Fig. 4 shows an example in which the receiver oversampling condition is not considered, that is, the receiver oversampling multiple is 1, where the ratio of the sampling rate of the receiver to the transmission rate of the transmitter is represented by the receiver oversampling multiple, however, in practical application, in order to improve the accuracy of the synchronization signal of the receiver, the receiver oversampling, that is, the receiver oversampling multiple is greater than 1.

Thus, when dividing the plurality of candidate synchronization sequences, the receiver first obtains an oversampling multiple of the baseband signal, and then determines the plurality of candidate synchronization sequences based on the oversampling multiple and the synchronization sequence length, and in one embodiment, as shown in fig. 5, the plurality of candidate synchronization sequences are determined according to the signal to be detected and the synchronization sequence length, including the steps of:

s501, obtaining the oversampling multiple of the baseband signal.

S502, based on the oversampling multiple, sliding window interception is carried out on the signal to be detected by adopting the length of the synchronous sequence, and a plurality of candidate synchronous sequences are obtained.

And according to the oversampling multiple of the baseband signal, carrying out sliding window interception on the signal to be detected according to the oversampling multiple and the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences.

For example, taking an oversampling multiple of 4 as an example, each symbol in the signal to be detected includes 4 sampling points, taking the first sampling point in each symbol as a signal to be detected, and carrying out sliding window interception on the signal to be detected with the length of the synchronization sequence to obtain a plurality of candidate synchronization sequences; taking a second sampling point in each symbol as a second signal to be detected, and carrying out sliding window interception on the second signal to be detected according to the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences; taking a third sampling point in each symbol as a third signal to be detected, and carrying out sliding window interception on the third signal to be detected according to the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences; taking a third sampling point in each symbol as a fourth signal to be detected, and carrying out sliding window interception on the fourth signal to be detected according to the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences; and taking the candidate synchronous sequences obtained by the signals to be detected as candidate synchronous sequences.

Taking the oversampling multiple of 2 as an example, as shown in fig. 6, the signal to be detected in fig. 6 includes 8 symbols (S1-S8), each symbol includes two sampling points, and the synchronization sequence length is 5, so as to obtain 8 candidate synchronization sequences ：(S11、S21、S31、S41、S51)、(S21、S31、S41、S51、S61)、(S31、S41、S51、S61、S71)、(S41、S51、S61、S71、S81)、(S12、S22、S32、S42、S52)、(S22、S32、S42、S52、S62)、(S32、S42、S52、S62、S72) and (S42, S52, S62, S72, S82).

In the signal detection method, the baseband signal is subjected to signal interception to obtain the signal to be detected, and a plurality of candidate synchronous sequences are determined according to the signal to be detected and the length of the synchronous sequences. According to the method, the signal interception is carried out on the baseband signal to obtain the signal to be detected, and the sliding window interception is carried out on the signal to be detected according to the preset synchronization sequence length to obtain a plurality of candidate synchronization sequences.

In one embodiment, as shown in fig. 7, signal interception is performed on the baseband signal to obtain a signal to be detected, which includes the following steps:

s701, acquiring the interception position and the interception length of the baseband signal.

Since the baseband signal includes signals of a plurality of parts such as a header, a synchronization sequence, and a tail, when the signal to be detected is intercepted from the baseband signal, in order to ensure that the synchronization sequence is included in the signal to be detected, an interception position and an interception length of the baseband signal need to be determined in advance. Wherein the truncated length is greater than the sync sequence length.

And determining the interception position of the baseband signal according to the structure of the baseband signal, and determining the interception length based on the interception position and the synchronization sequence length.

Taking the receiver as an EDR 2M/EDR 3M system as an example, the baseband signal is in an EDR frame structure, as shown in fig. 8, the EDR frame includes a GFSK modulation portion, a guard interval (4.75 μs-5.25 μs), and an EDR modulation portion, the GFSK modulation portion includes an access code and a header, and the EDR modulation portion includes a synchronization sequence, an EDR load, and a tail.

In fig. 8, since the synchronization sequence follows the guard intervals, the interception position of the baseband signal may be set between the guard intervals, and the interception length is greater than the synchronization sequence length, and ensures that the intercepted signal to be detected includes the signal in the partial guard intervals, the synchronization sequence, and the signal in the partial EDR load.

S702, intercepting the baseband signal with the same intercepting length from the intercepting position in the baseband signal to obtain a signal to be detected.

Continuing to take fig. 8 as an example, if the interception position is at the point a of the guard interval, after the point a of the baseband signal, the baseband signal with the same interception length is intercepted, and the point a to the point b are the interception lengths, the signal between the point a and the point b is the signal to be detected.

In the signal detection method, the interception position and the interception length of the baseband signal are obtained, and the baseband signal with the same interception length is intercepted from the interception position in the baseband signal to obtain the signal to be detected. In the method, a signal to be detected is obtained based on the interception position and the interception length of the baseband signal, and the signal to be detected is ensured to comprise a synchronous sequence.

The foregoing embodiments describe how to acquire a plurality of candidate synchronization sequences, and how to determine the synchronization performance metric of each candidate synchronization sequence according to the phase and the amplitude of each candidate synchronization sequence according to one embodiment, in one embodiment, the synchronization performance metric of each candidate synchronization sequence is determined based on the phase and the amplitude of each candidate synchronization sequence as shown in fig. 9, which includes the following steps:

s901, for any candidate synchronous sequence, determining the phase correlation value of the candidate synchronous sequence according to the phase of the candidate synchronous sequence.

First, a demodulation process needs to be performed on the candidate synchronization sequence, and in an example of phase differential demodulation, as shown in fig. 10, in one embodiment, determining a phase correlation value of the candidate synchronization sequence according to a phase of the candidate synchronization sequence includes the following steps:

s1001, obtaining the phase difference value of every two adjacent symbols in the candidate synchronous sequence.

In the candidate synchronous sequence, the phase difference of any two adjacent symbols is obtained to obtain a plurality of phase difference values, for example, if the candidate synchronous sequence comprises 11 symbols, the phase difference value of every two adjacent symbols in the candidate synchronous sequence is obtained to obtain 10 phase difference values.

S1002, determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of every two adjacent symbols in the candidate synchronous sequence.

The method for determining the phase correlation value of the candidate synchronous sequence may be to perform weighting processing on the phase difference value of every two adjacent symbols in the candidate synchronous sequence to obtain the phase correlation value of the candidate synchronous sequence.

S902, determining the amplitude correlation value of the candidate synchronous sequence according to the amplitude of the candidate synchronous sequence.

The candidate synchronous sequence comprises a plurality of symbols, and the amplitude of the candidate synchronous sequence is the amplitude of each symbol in the candidate synchronous sequence, so that the amplitude correlation value of the candidate synchronous sequence is determined according to the amplitude of each symbol in the candidate synchronous sequence.

In one embodiment, the method for determining the amplitude correlation value of the candidate synchronization sequence may be directly determined according to a preset amplitude correlation algorithm, specifically, the amplitude of each symbol in the candidate synchronization sequence is taken as an input of the amplitude correlation algorithm, and the amplitude correlation value of the candidate synchronization sequence is finally output through the operation of the amplitude correlation algorithm.

In another embodiment, the method of determining the amplitude correlation value of the candidate synchronization sequence may also be to accumulate the amplitudes of the symbols in the candidate synchronization sequence to obtain the amplitude correlation value of the candidate synchronization sequence.

S903, determining the synchronization performance metric of the candidate synchronization sequence according to the phase correlation value and the amplitude correlation value.

The synchronization performance metric of the candidate synchronization sequence characterizes the synchronization performance of the candidate synchronization sequence, e.g., the larger the synchronization performance metric, the better the synchronization performance of its corresponding candidate synchronization sequence.

Thus, the synchronization performance metric value of the candidate synchronization sequence may be determined by taking the sum of the phase correlation value and the amplitude correlation value of the candidate synchronization sequence as the synchronization sequence performance quantization value of the candidate synchronization sequence.

In the signal detection method, for any candidate synchronous sequence, the phase correlation value of the candidate synchronous sequence is determined according to the phase of the candidate synchronous sequence, the amplitude correlation value of the candidate synchronous sequence is determined according to the amplitude of the candidate synchronous sequence, and then the synchronization performance metric value of the candidate synchronous sequence is determined according to the phase correlation value and the amplitude correlation value. According to the method, the synchronization performance metric value of each candidate synchronization sequence is determined according to the phase correlation value and the amplitude correlation value of each candidate synchronization sequence, and the synchronization performance metric value of the candidate synchronization sequence is determined from the two dimensions of the phase and the amplitude, so that the signal synchronization performance in the signal detection process is improved.

In one embodiment, as shown in fig. 11, determining the phase correlation value of the candidate sync sequence according to the phase difference value of every two adjacent symbols in the candidate sync sequence includes the following steps:

S1101, performing frequency offset removal processing on each phase difference value to obtain a frequency offset removal phase difference value of each phase difference value.

When the signal is frequency modulated or phase modulated, the deviation of the instantaneous phase angle of the frequency modulated wave or phase modulated wave to the carrier phase angle changes along with the instantaneous value of the modulated signal, and the phase deviation occurs. At the receiver side, the center value of the phase offset is shifted due to the influence of the frequency offset.

Therefore, the frequency offset removal processing needs to be performed on the phase difference value of every two adjacent symbols in the candidate synchronous sequence, and the calculation mode of the frequency offset removal processing is shown as a formula (1).

f_off,k＝f_k-f_off (1)

Where f _off,k denotes the phase difference value of the frequency offset, f _k denotes the phase difference value, and f _off denotes the phase dc offset corresponding to each adjacent symbol interval obtained in advance by the receiver.

Alternatively, the method for obtaining the phase dc offset may be to obtain the phase value of each symbol in the Preamble portion according to the Preamble (Preamble) portion in the access code signal of the baseband signal, and determine the average phase value of the Preamble according to the phase value of each symbol in the Preamble portion, where the average phase value is the phase dc offset corresponding to each adjacent symbol interval in the receiver.

In view of the periodicity in the phase operation, after the phase difference and the dephasing dc offset, the quantization range of the dephasing phase difference f _off,k is-2 ^N-1～2^N-1 -1 as in f _k, and corresponds to-pi to pi radians, and N represents the number of quantization bits.

S1102, determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of each frequency deviation removal and the phase difference polarity of the preset synchronous sequence.

The phase difference polarity of the preset synchronization sequence is defined by the Bluetooth specification, and FIG. 12 is a synchronization sequence defined by the Bluetooth specification, including 11 symbols, and the phase difference between the 11 symbolsThe set is: {3 pi/4, -3 pi/4, 3 pi/4, -3 pi/4, the phase difference polarity set corresponding to the synchronization sequence defined by the bluetooth specification is {1, -1, -1, 1}, the phase difference polarity set corresponding to the synchronization sequence defined by the bluetooth specification is the phase difference polarity of the preset synchronization sequence, which is also called the phase difference polarity of the local sequence.

And taking the sum of products of the phase difference values of the frequency deviation and the phase difference polarities of the preset synchronous sequences in the candidate synchronous sequences as a phase correlation value of the candidate synchronous sequences, wherein the phase correlation value is shown in a formula (2).

Wherein c _1,k represents the phase correlation value of the kth candidate synchronous sequence, c _local,i,k represents the ith phase difference polarity in the preset synchronous sequence, f _i,k represents the ith frequency deviation phase difference value in the kth candidate synchronous sequence, and m is the number of the frequency deviation phase difference values in the kth candidate synchronous sequence minus 1.

In the signal detection method, the frequency deviation removing processing is carried out on each phase difference value to obtain the frequency deviation removing phase difference value of each phase difference value, and the phase correlation value of the candidate synchronous sequence is determined according to the frequency deviation removing phase difference value and the phase difference polarity of the preset synchronous sequence. In the method, the frequency deviation removing process is carried out on each phase difference value to obtain the frequency deviation removing phase difference value after the frequency deviation removing, the phase correlation value is calculated on each frequency deviation removing phase difference value of the candidate synchronous sequence according to the phase difference polarity of the preset synchronous sequence, and the accuracy of the candidate synchronous sequence is quantized more accurately, so that the finally obtained synchronous sequence is more accurate.

When determining the synchronization performance metric value of the candidate synchronization sequence according to the phase correlation value and the amplitude correlation value, a weight may be given to the phase correlation value and the amplitude correlation value, and the synchronization performance metric value of the candidate synchronization sequence is determined according to the weight of the phase correlation value and the amplitude correlation value, which will be described in detail below by an embodiment, in which, as shown in fig. 13, the synchronization performance metric value of the candidate synchronization sequence is determined according to the phase correlation value and the amplitude correlation value, including the steps of:

S1301, acquiring preset phase weight and amplitude weight.

The phase weight and the amplitude weight can respectively represent the importance degrees of the phase and the amplitude, for example, if the importance degree of the phase is determined to be greater than the amplitude, the phase weight can be set to be greater than the amplitude weight, otherwise, the phase weight is smaller than the amplitude weight; the phase weight and the amplitude weight are both greater than 0.

The method for acquiring the preset phase weight and amplitude weight may be directly acquiring the values of the phase weight and the amplitude weight in a preset database, or may be specifically set according to actual situations, which is not described herein in detail.

And S1302, carrying out weighted addition processing on the phase correlation value and the amplitude correlation value according to the phase weight and the amplitude weight to obtain a synchronization performance metric value of the candidate synchronization sequence.

And carrying out weighted addition processing on the phase correlation value and the amplitude correlation value according to the phase weight and the amplitude weight, and calculating the synchronization performance metric value of the candidate synchronization sequence by using a formula (3).

b_k＝w₁c_1,k+w₂c_2,k (3)

Wherein b _k represents a synchronization performance metric value of the kth candidate sync sequence, c _1,k represents a phase correlation value of the kth candidate sync sequence, c _2,k represents an amplitude correlation value of the kth candidate sync sequence, w ₁ represents a phase weight, and w ₂ represents an amplitude weight.

Alternatively, to facilitate weighted addition of the phase correlation value and the amplitude correlation value, the phase weight and the amplitude weight may be assigned to an integer power of 2, for example, w ₁＝1、w₂ =4.

In the signal detection method, the preset phase weight and amplitude weight are obtained, and then the phase correlation value and the amplitude correlation value are subjected to weighted addition processing according to the phase weight and the amplitude weight, so that the synchronization performance metric value of the candidate synchronization sequence is obtained. In the method, the phase correlation value and the amplitude correlation value are weighted and added through the phase weight and the amplitude weight, so that the obtained synchronization performance measurement value of the candidate synchronization sequence is more accurate, and the signal synchronization performance in the signal detection process is improved.

In the above embodiments, the calculation is performed based on the phase and the amplitude of each candidate synchronization sequence, before determining a plurality of candidate synchronization sequences according to the signal to be detected and the synchronization sequence length, the phase and the amplitude of each sample point in the signal to be detected need to be obtained, and then the phase and the amplitude of each candidate synchronization sequence are determined according to the phase and the amplitude of each sample point in the signal to be detected, and in the following, how to obtain the phase and the amplitude of the signal to be detected is described in detail by an embodiment, as shown in fig. 14, the embodiment includes the following steps:

S1401, for any point in the signal to be detected, an initial phase, an initial amplitude, and an initial quadrature component of the point are acquired.

The initial phase, initial amplitude and initial quadrature component of the sample point may be obtained by:

Firstly, judging the quadrant of the complex value z ₀ =i+jq corresponding to the sample point, and if the quadrant is in the second quadrant, converting the quadrant into z ₁＝Q-jI,θ₀ =pi/2*A; if in the third quadrant, it is converted to z ₁＝-Q+jI,θ₀ = -pi/2*A; otherwise, z ₁＝z₀,θ₀ =0. Wherein, A is a quantized coefficient, and the value can be 2 ^N-1/π,θ₀, namely the initial phase.

In addition, the initial amplitude is: i ₀＝real(z₁), i.e., the real part of the initial amplitude z ₁; the initial orthogonal components are: q ₀＝imag(z₁), i.e., the initial quadrature component is the imaginary part of z ₁.

And obtaining the initial phase, the initial amplitude and the initial quadrature component of each sample point in the signal to be detected based on the mode.

S1402, determining the phase and amplitude of the sample point according to the initial phase, initial amplitude and initial quadrature component of the sample point.

The phase, amplitude and quadrature components of the sample may be iteratively updated to obtain the phase and amplitude of the sample, and in one embodiment, as shown in fig. 15, the phase and amplitude of the sample are determined from the initial phase, initial amplitude and initial quadrature components of the sample, including the steps of:

s1501, a twiddle factor is determined from the initial quadrature component.

S1502, according to the twiddle factors, the phase, the amplitude and the orthogonal components of the sample point are iteratively updated until a preset convergence condition is reached, and the phase and the amplitude of the sample point are obtained.

Firstly, determining the direction of a twiddle factor according to the positive and negative of an initial orthogonal component, for example, the initial orthogonal component is larger than or equal to 0, and the twiddle factor is-1; the initial orthogonal component is less than 0, the twiddle factor is 1, and can be expressed by formula (4).

Where d _i denotes a twiddle factor, Q _i denotes a quadrature component, and i denotes the number of iterations.

Then, based on the twiddle factor, the phase, amplitude and quadrature components of the sample point are iteratively updated, and the iterative updating process can comprise the following steps:

Where I _i+1 represents the magnitude at the i+1st iteration, Q _i+1 represents the quadrature component at the i+1st iteration, θ _i+1 represents the phase at the i+1st iteration, d _i represents the twiddle factor at the I-th iteration, and a is the quantization coefficient.

Alternatively, the convergence condition of the above iterative process may be that the orthogonal component is 0 or a preset number of iterations is reached, for example, the iteration is stopped when 10 iterations are performed.

The value of I after the iteration is the amplitude, θ is the phase, and it should be noted that the obtained phase value θ is the fixed-point data, and its value range is-2 ^N-1～2^N-1 -1, where N is the number of quantization bits, for example, N takes a value of 12.

And obtaining the phase and the amplitude of each sample point according to the iterative mode, and then obtaining the phase and the amplitude of the signal to be detected.

In the signal detection method, for any same point in the signal to be detected, the initial phase, the initial amplitude and the initial quadrature component of the sample point are obtained, and the phase and the amplitude of the sample point are determined according to the initial phase, the initial amplitude and the initial quadrature component of the sample point. In the method, when the phase and the amplitude of each sample point in the signal to be detected are acquired, the required phase and amplitude can be obtained simultaneously only by data shifting and addition and subtraction operations without complex multiplication and division operation, and the cost of the system is reduced.

To further illustrate the synchronization performance of the signal detection method of the present application, the signal detection method of the present application is compared with the synchronization performance obtained by using only the phase information in the related art, as shown in fig. 16, the abscissa is the signal-to-noise ratio, and the ordinate is the root mean square error of the synchronization point, and as can be seen from fig. 16, the synchronization performance (phase+amplitude synchronization) of the EDR portion obtained by the signal detection method of the present application is improved by about 2dB compared with the synchronization performance (phase synchronization) obtained by using only the phase information in the case of the receiver 16MHz sampling rate.

In the embodiment of the application, the phase value and the amplitude information output by the coordinate rotation digital computing method (Coordinate Rotation Digital Computer, CORDIC) are simultaneously utilized, so that the synchronous operation quantity is reduced, the synchronous performance of the system is improved, and a good compromise is provided between the operation quantity and the computation complexity: the characteristics that the differential phase and the amplitude reach the maximum simultaneously when pi/4-DQPSK or 8DPSK signals are at the optimal sample point are utilized, so that a better synchronization effect is obtained compared with the synchronization of phase information only, and the synchronization performance of a receiver is improved; and the phase and amplitude information output by the CORDIC algorithm are used simultaneously, namely, the required input parameters can be obtained simultaneously only by data shifting and addition and subtraction operation and complex multiplication and division operation, so that the cost of the system is reduced.

In one embodiment, illustrated in FIG. 17, for example, the synchronization of EDR parts in a Bluetooth EDR 2M/EDR 3M system is achieved, the embodiment includes the steps of:

S1701, obtaining a signal to be detected in the baseband signal according to a preset EDR synchronous sequence detection window.

S1702, acquiring a phase value and an amplitude value of a signal to be detected according to a CORDIC algorithm.

S1703, performing code element phase difference processing on the phase value of the signal to be detected to obtain a phase difference value of the signal to be detected;

f_k＝θ_k+OS-θ_k (6)

Wherein f _k represents the phase difference value of the kth sampling point in the signal to be detected, OS is the ratio of the sampling rate of the receiver to the symbol rate, i.e. the oversampling multiple, θ _k+OS represents the phase value of the kth+os sampling point in the signal to be detected, and θ _k represents the phase value of the kth sampling point in the signal to be detected.

S1704, performing frequency deviation removal processing on the phase difference score of the signal to be detected to obtain a frequency deviation removed phase difference score;

f_off,k＝f_k-f_off (7)

wherein f _off,k represents a reference phase difference value of a kth sampling point in the signal to be detected, and f _off represents a phase direct current offset corresponding to each symbol interval obtained in advance by the receiver.

S1705, determining a phase correlation value sequence according to the phase difference polarity of the preset synchronous sequence, the phase difference value of the frequency offset removal and the length of the synchronous sequence;

Wherein c _1,k is a phase correlation value sequence, c _local,i is a phase difference polarity of a preset synchronization sequence, and m is a length of the synchronization sequence minus 2.

S1706, performing amplitude accumulation operation according to the length of the synchronous sequence and the amplitude of the signal to be detected to obtain an amplitude accumulated value sequence;

Where c _2,k is the amplitude accumulated value sequence and n is the length of the sync sequence minus 1.

S1707, carrying out weighted addition on the phase correlation value sequence and the amplitude accumulated value sequence according to the preset phase weight and the amplitude weight to obtain a synchronous performance measurement value sequence;

b_k＝w₁c_1,k+w₂c_2,k (10)

S1708, judging the synchronization performance measurement value sequence, and taking the point corresponding to the maximum synchronization performance measurement value as a synchronization point;

Where p is the synchronization point.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides a signal detection device for realizing the above related signal detection method. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation of the embodiment of the signal detection device or devices provided below may be referred to the limitation of the signal detection method hereinabove, and will not be repeated here.

In one embodiment, as shown in fig. 18, there is provided a signal detection apparatus 1800 comprising: a first determination module 1801, a second determination module 1802, and a third determination module 1803, wherein:

A first determining module 1801, configured to determine a plurality of candidate synchronization sequences based on the received baseband signal and a preset synchronization sequence length;

A second determining module 1802, configured to determine a synchronization performance metric value of each candidate synchronization sequence based on a phase and an amplitude of each candidate synchronization sequence;

a third determining module 1803, configured to determine a target synchronization sequence according to the synchronization performance metric value of each candidate synchronization sequence; the synchronization performance of the target synchronization sequence meets the preset requirement.

In one embodiment, the first determination module 1801 includes:

The intercepting unit is used for intercepting the baseband signal to obtain a signal to be detected;

and the first determining unit is used for determining a plurality of candidate synchronous sequences according to the signal to be detected and the synchronous sequence length.

In one embodiment, the intercept unit includes:

the first acquisition subunit is used for acquiring the interception position and the interception length of the baseband signal;

The first interception subunit is used for intercepting the baseband signal with the same interception length from the interception position in the baseband signal to obtain a signal to be detected.

In one embodiment, the first determining unit comprises:

A second obtaining subunit, configured to obtain an oversampling multiple of the baseband signal;

and the second interception subunit is used for intercepting the signal to be detected by adopting the length of the synchronous sequence through a sliding window based on the oversampling multiple to obtain a plurality of candidate synchronous sequences.

In one embodiment, the second determining module 1802 includes:

the second determining unit is used for determining the phase correlation value of the candidate synchronous sequence according to the phase of the candidate synchronous sequence aiming at any candidate synchronous sequence;

a third determining unit, configured to determine an amplitude correlation value of the candidate synchronization sequence according to the amplitude of the candidate synchronization sequence;

And a fourth determining unit, configured to determine a synchronization performance metric value of the candidate synchronization sequence according to the phase correlation value and the amplitude correlation value.

In one embodiment, the second determining unit comprises:

A third obtaining subunit, configured to obtain a phase difference value of each two adjacent symbols in the candidate synchronization sequence;

and the first determination subunit is used for determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of every two adjacent symbols in the candidate synchronous sequence.

In one embodiment, the first determination subunit comprises:

The first obtaining subunit is used for carrying out frequency deviation removal processing on each phase difference value to obtain a frequency deviation removal phase difference value of each phase difference value;

And the second determining subunit is used for determining the phase correlation value of the candidate synchronous sequence according to the phase difference value of each frequency deviation removal and the phase difference polarity of the preset synchronous sequence.

In one embodiment, the third determining unit comprises:

And the second obtaining subunit is used for accumulating the amplitude of each symbol in the candidate synchronous sequence to obtain the amplitude correlation value of the candidate synchronous sequence.

In one embodiment, the fourth determining unit comprises:

a fourth obtaining subunit, configured to obtain a preset phase weight and amplitude weight;

And the third obtaining subunit is used for carrying out weighted addition processing on the phase correlation value and the amplitude correlation value according to the phase weight and the amplitude weight to obtain the synchronization performance metric value of the candidate synchronization sequence.

In one embodiment, the third determination module 1803 includes:

And a fifth determining unit, configured to determine, as the target synchronization sequence, a candidate synchronization sequence with the largest synchronization performance metric value among the candidate synchronization sequences.

In one embodiment, the apparatus 1800 further comprises:

The acquisition module is used for acquiring the initial phase, the initial amplitude and the initial orthogonal component of the sample point aiming at any sample point in the signal to be detected;

and the fourth determining module is used for determining the phase and the amplitude of the sample point according to the initial phase, the initial amplitude and the initial quadrature component of the sample point.

In one embodiment, the fourth determination module includes:

A sixth determining unit configured to determine a twiddle factor based on the initial orthogonal component;

and the iteration unit is used for carrying out iterative updating on the phase, the amplitude and the orthogonal component of the sample point according to the rotation factor until a preset convergence condition is reached, so as to obtain the phase and the amplitude of the sample point.

The respective modules in the above-described signal detection apparatus may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a server, and the internal structure of which may be as shown in fig. 19. The computer device includes a processor, a memory, an Input/Output interface (I/O) and a communication interface. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface is connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer device is for storing signal detection data. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a signal detection method.

It will be appreciated by those skilled in the art that the structure shown in FIG. 19 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

In an embodiment, there is also provided a computer device comprising a memory and a processor, the memory having stored therein a computer program, the processor implementing the steps of the method embodiments described above when the computer program is executed.

The implementation principle and technical effects of each step implemented by the processor in the embodiment of the present application are similar to those of the signal detection method, and are not described herein.

In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, carries out the steps of the method embodiments described above.

The steps implemented when the computer program is executed by the processor in the embodiment of the present application, the implementation principle and the technical effect are similar to those of the signal detection method described above, and are not repeated here.

In an embodiment, a computer program product is provided, comprising a computer program which, when executed by a processor, implements the steps of the method embodiments described above.

It should be noted that, the data (including, but not limited to, data for analysis, stored data, displayed data, etc.) related to the present application are all information and data authorized by the user or fully authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magneto-resistive random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (PHASE CHANGE Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in various forms such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The databases referred to in the embodiments provided herein may include at least one of a relational database and a non-relational database. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processor referred to in the embodiments provided in the present application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, or the like, but is not limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims

1. A method of signal detection, the method comprising:

determining a synchronization performance metric value for each of the candidate synchronization sequences based on the phase and amplitude of each of the candidate synchronization sequences;

2. The method of claim 1, wherein the determining a plurality of candidate synchronization sequences based on the received baseband signal and a preset synchronization sequence length comprises:

intercepting the baseband signal to obtain a signal to be detected;

and determining the plurality of candidate synchronous sequences according to the signal to be detected and the synchronous sequence length.

3. The method according to claim 2, wherein the signal interception of the baseband signal to obtain a signal to be detected comprises:

Acquiring the interception position and the interception length of the baseband signal;

and intercepting the baseband signal with the same intercepting length from the intercepting position in the baseband signal to obtain the signal to be detected.

4. The method of claim 2, wherein said determining the plurality of candidate synchronization sequences based on the signal to be detected and the synchronization sequence length comprises:

acquiring an oversampling multiple of the baseband signal;

And based on the oversampling multiple, carrying out sliding window interception on the signal to be detected by adopting the length of the synchronous sequence to obtain a plurality of candidate synchronous sequences.

5. The method of any of claims 1 to 4, wherein said determining a synchronization performance metric value for each of said candidate synchronization sequences based on a phase and an amplitude of each of said candidate synchronization sequences comprises:

for any candidate synchronous sequence, determining a phase correlation value of the candidate synchronous sequence according to the phase of the candidate synchronous sequence;

Determining an amplitude correlation value of the candidate synchronous sequence according to the amplitude of the candidate synchronous sequence;

6. The method of claim 5, wherein determining the phase correlation value of the candidate sync sequence based on the phase of the candidate sync sequence comprises:

7. The method of claim 6, wherein determining the phase correlation value of the candidate sync sequence based on the phase difference value of each two adjacent symbols in the candidate sync sequence comprises:

8. The method of claim 5, wherein determining the amplitude correlation value for the candidate sync sequence based on the amplitude of the candidate sync sequence comprises:

9. The method of claim 5, wherein said determining a synchronization performance metric value for said candidate synchronization sequence based on said phase correlation value and said amplitude correlation value comprises:

Acquiring preset phase weights and amplitude weights;

And carrying out weighted addition processing on the phase correlation value and the amplitude correlation value according to the phase weight and the amplitude weight to obtain the synchronization performance metric value of the candidate synchronization sequence.

10. The method according to any one of claims 1 to 4, wherein determining a target synchronization sequence from the synchronization performance metric values of each of the candidate synchronization sequences comprises:

And determining the candidate synchronous sequence with the largest synchronous performance metric value in the candidate synchronous sequences as the target synchronous sequence.

11. The method according to any one of claims 1 to 4, wherein prior to said determining said plurality of candidate synchronization sequences from said signal to be detected and said synchronization sequence length, said method further comprises:

for any same point in the signal to be detected, acquiring an initial phase, an initial amplitude and an initial quadrature component of the sample point;

12. The method of claim 11, wherein determining the phase and amplitude of the sample from the initial phase, initial amplitude, and initial quadrature component of the sample comprises:

determining a twiddle factor from the initial orthogonal component;

13. A signal detection apparatus, the apparatus comprising:

A second determining module, configured to determine a synchronization performance metric value of each candidate synchronization sequence based on a phase and an amplitude of each candidate synchronization sequence;

A third determining module, configured to determine a target synchronization sequence according to the synchronization performance metric value of each candidate synchronization sequence; the synchronization performance of the target synchronization sequence meets the preset requirement.

14. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any one of claims 1 to 12 when the computer program is executed.

15. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 12.

16. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any one of claims 1 to 12.