CN118330431A

CN118330431A - Method, device, equipment and storage medium for determining fault components

Info

Publication number: CN118330431A
Application number: CN202410469971.4A
Authority: CN
Inventors: 罗慧; 王翔宇; 孟子文; 徐国彬; 戴瑞东; 蒋嵩; 王柏志; 高奇峰; 张鹏; 霍学华
Original assignee: State Nuclear Power Automation System Engineering Co Ltd; Shandong Nuclear Power Co Ltd
Current assignee: State Nuclear Power Automation System Engineering Co Ltd; Shandong Nuclear Power Co Ltd
Priority date: 2024-04-18
Filing date: 2024-04-18
Publication date: 2024-07-12

Abstract

The invention discloses a method, a device, equipment and a storage medium for determining fault components, belonging to the technical field of fault excitation, wherein the method comprises the following steps: adopting test temperature information in a temperature test environment to perform high-low temperature alternating stress test on the target circuit board to obtain the working limit temperature of the target circuit board and a first fault element; under the condition that the voltage test environment meets the voltage test condition, carrying out a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions include a voltage test temperature and a voltage test humidity; according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component; and determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

Description

Method, device, equipment and storage medium for determining fault components

Technical Field

The present invention relates to the field of fault excitation technologies, and in particular, to a method, an apparatus, a device, and a storage medium for determining a fault component.

Background

The failure-triggered test technique is a necessary technique to assist circuit board design engineers in discovering potential failures in a circuit board. When the environmental stress borne by the electronic components on the circuit board exceeds the sustainable range, the electronic components fail, thereby affecting the reliability of the circuit board.

However, the fault determining method of the circuit board based on the HALT test (high accelerated life test, HIGHLY ACCELERATED LIFE TEST) does not consider the actual working environment of the circuit board, and has many test projects and high test cost, which affects the accuracy of determining the fault components in the circuit board, so that the reliability of the circuit board cannot be ensured.

Disclosure of Invention

The invention provides a method, a device, equipment and a storage medium for determining a fault component, which are used for reducing test cost, improving the accuracy of determining the fault component in a circuit board and ensuring the reliability of the circuit board.

According to an aspect of the present invention, there is provided a method of determining a faulty component, the method including:

adopting test temperature information in a temperature test environment to perform high-low temperature alternating stress test on the target circuit board to obtain the working limit temperature of the target circuit board and a first fault element;

Under the condition that the voltage test environment meets the voltage test condition, carrying out a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions comprise voltage test temperature and voltage test humidity;

according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component;

And determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

According to another aspect of the present invention, there is provided a malfunction component determination apparatus including:

the first test data determining module is used for carrying out high-low temperature alternating stress test on the target circuit board by adopting test temperature information in a temperature test environment to obtain the working limit temperature of the target circuit board and a first fault element;

The second test data determining module is used for performing a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board under the condition that the voltage test environment meets the voltage test condition, so as to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions comprise voltage test temperature and voltage test humidity;

The third fault component determining module is used for carrying out comprehensive stress test on the target circuit board according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity to obtain a third fault component;

and the target fault component determining module is used for determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

According to another aspect of the present invention, there is provided an electronic apparatus including:

At least one processor; and

A memory communicatively coupled to the at least one processor; wherein,

The memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of determining a faulty component according to any one of the embodiments of the present invention.

According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the method for determining a faulty component according to any embodiment of the present invention when executed.

According to the technical scheme, the high-low temperature alternating stress test is carried out on the target circuit board by adopting test temperature information in a temperature test environment, so that the working limit temperature of the target circuit board and the first fault element are obtained; under the condition that the voltage test environment meets the voltage test condition, carrying out a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions comprise voltage test temperature and voltage test humidity; according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component; and determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component. According to the technical scheme, the temperature stress test in the existing circuit board fault determination method is improved, the low-temperature working limit temperature and the high-temperature working limit temperature of the target circuit board are obtained at one time in a high-low temperature alternating mode, the low-temperature stress test and the high-temperature stress test are not carried out on the target circuit board separately, the vibration test is not needed, test items are reduced, and the test cost is reduced to a certain extent; meanwhile, the influence of the actual working environment (namely temperature, voltage and humidity) of the target circuit board on the reliability of the target circuit board is fully considered, so that the determined target fault components are more accurate, the accuracy of determining the fault components in the target circuit board is improved, the follow-up more accurate transformation of the fault components in the target circuit board is facilitated, and the reliability of the target circuit board is ensured.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1A is a flowchart of a method for determining a faulty component according to a first embodiment of the present invention;

FIG. 1B is a schematic illustration of a first test temperature alternation provided in accordance with a first embodiment of the present invention;

Fig. 2A is a flowchart of a method for determining a faulty component according to a second embodiment of the present invention;

FIG. 2B is a graph showing voltage variation in a voltage testing environment according to a second embodiment of the present invention;

FIG. 2C is a schematic diagram of a variation of test conditions in a single test cycle according to a second embodiment of the present invention;

Fig. 3 is a schematic structural diagram of a fault component determining apparatus according to a third embodiment of the present invention;

fig. 4 is a schematic structural diagram of an electronic device implementing a method for determining a fault component according to an embodiment of the present invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "object," "first," and "second," and the like in the description and claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In addition, it should be noted that, in the technical scheme of the invention, the related processes of collection, storage, use, processing, transmission, provision, disclosure and the like of the test temperature information, the test humidity, the normal performance parameter value of each electronic component in the target circuit board and the like all conform to the regulations of the related laws and regulations, and do not violate the public welcome.

In order to make the technical personnel better understand the scheme of the invention, firstly, the prior circuit board fault determining method related to the invention is briefly introduced, and the prior circuit board fault determining method performs the following test on the circuit board:

1) Step test at low temperature;

2) High-temperature step test;

3) A rapid temperature cycle test;

4) Vibration step test;

5) Comprehensive experiment of temperature and vibration combination.

Example 1

Fig. 1A is a flowchart of a method for determining a fault component according to an embodiment of the present invention, where the method may be implemented by a fault component determining device, and the device may be implemented in hardware and/or software and may be configured in an electronic device. As shown in fig. 1A, the method includes:

S101, performing high-low temperature alternating stress test on a target circuit board by using test temperature information in a temperature test environment to obtain the working limit temperature of the target circuit board and a first fault element.

The temperature test environment is used for carrying out high-low temperature alternating stress test on the target circuit board; optionally, the temperature test environment includes, but is not limited to, normal operating voltage, normal operating pressure, and normal operating humidity. The normal working voltage is the voltage of the target circuit board in the normal working state, and is the rated voltage of the target circuit board under the general condition; the normal working pressure is the pressure of the target circuit board in the normal working state, and is generally between 86 kilopascals and 106 kilopascals; the normal working humidity refers to the relative humidity of the target circuit board in the normal working state, and is generally between 25% RH and 75% RH. The target circuit board is a circuit board for determining a fault component; alternatively, the target circuit board is composed of at least three types of electronic components, for example, the target circuit board may be composed of a resistive type electronic component, a capacitive type electronic component, and an inductive type electronic component. It should be noted that the target circuit board is also called a printed circuit board (Printed Circuit Board, PCB).

The test temperature information refers to information generated in a temperature test environment; optionally, the test temperature information includes a temperature change interval; the temperature change interval refers to the temperature change amount between two adjacent temperatures in the same temperature change direction. Alternatively, the temperature change interval may be determined according to the temperature range in the same temperature change direction, for example, in the negative temperature change direction, the temperature change interval within the temperature range (0 ℃, -30 ℃) is determined to be 10 ℃, and the temperature change interval within the temperature range [ -30 ℃, -80] is determined to be 5 ℃.

Optionally, the test temperature information may further include a temperature change rate; wherein, the temperature change rate refers to the rate of alternating high and low temperatures; alternatively, the temperature change rate may be preset according to actual service requirements or experience of those skilled in the art, for example, the temperature change rate may be 20 degrees celsius per minute (i.e., 20 ℃/min), which is not specifically limited in the embodiment of the present invention.

The working limit temperature refers to the temperature at which the target circuit board does not fail; optionally, the operating limit temperature includes a low temperature operating limit temperature and a high temperature operating limit temperature. The first fault element refers to a fault electronic component determined by the target circuit board after high-low temperature alternating stress test.

Specifically, under the condition that the normal working voltage, the normal working pressure and the normal working humidity are all constant, determining at least two first test temperatures according to the temperature change interval; and adopting different first test temperatures to perform high-low temperature alternating stress tests on the target circuit board to obtain the working limit temperature of the target circuit board and the first fault element.

The first test temperature is the temperature required for completing the high-low temperature alternating stress test on the target circuit board. In the process of carrying out high-low temperature alternating stress test on the target circuit board, staying for a period of time at each first test temperature, and recording the staying time as first staying time; optionally, the first residence time may be determined according to a temperature stabilizing time when the component temperature of the electronic component in the target circuit board reaches a stability at the first test temperature, a starting time when the target circuit board is powered on and started at the first test temperature, and a parameter value acquiring time when the performance parameter value of each electronic component in the target circuit board is acquired at the first test temperature, for example, the first residence time may be equal to a sum of the temperature stabilizing time, the starting time, and the parameter value acquiring time. The temperature stabilization time means that the temperature variation between the component temperatures of any two electronic components in the target circuit board is smaller than the preset temperature variation. The preset temperature change amount may be preset according to actual service requirements or experience of a person skilled in the art, for example, the preset temperature change amount may be 1 degree celsius (i.e., 1 ℃/h) per hour.

Alternatively, before determining at least two first test temperatures according to the temperature variation interval, it is possible to: in the same temperature change direction, a temperature change interval is determined based on the first temperature range and the second temperature range in the temperature change direction. The first temperature range and the second temperature range may be preset according to actual service requirements or experience of a person skilled in the art, and the embodiment of the present invention is not specifically limited.

For example, referring to fig. 1B, in a negative direction of temperature change, the first temperature range is (0 ℃, -30 ℃ ], the second temperature range is (-30 ℃, -80 ℃ ], the temperature change interval within the first temperature range is determined to be 10 ℃, the temperature change interval within the second temperature range is determined to be 5 ℃, in a positive direction of temperature change, the first temperature range is (25 ℃,60 ℃), the second temperature range is [60 ℃,80 ℃), the temperature change interval within the first temperature range is determined to be 10 ℃, and the temperature change interval within the second temperature range is determined to be 5 ℃.

Optionally, determining at least two first test temperatures according to the temperature change interval may be: determining a reference temperature in the same temperature change direction; and determining at least one first test temperature in the same temperature change direction according to the reference temperature and the temperature change interval.

For example, referring to fig. 1B, in the negative direction of temperature change, with zero degrees celsius as a reference temperature, a first test temperature in the negative direction of temperature change is determined from the reference temperature and the temperature change interval by the following formula:

c₁＝c₀-Δc＝0℃-10℃＝-10℃

Where c ₁ is the first test temperature in the negative direction of temperature change, c ₀ is the reference temperature, and Δc is the temperature change interval. In fig. 1B, the temperature change interval in the negative direction of the temperature change (0 ℃, -30 ℃ ] is 10 ℃, (-30 ℃, -80 ℃) and the temperature change interval in the negative direction of the temperature change is 5 ℃.

Then, according to the first test temperature in the negative temperature change direction and the temperature change interval, determining a new first test temperature in the negative temperature change direction, thereby obtaining a first test temperature in the negative temperature change direction as follows: -10 ℃, -20 ℃, -30 ℃, -35 ℃ and-40 ℃.

Similarly, referring to fig. 1B, in the positive direction of temperature change, with the normal temperature as the reference temperature, according to the reference temperature and the temperature change interval, the first test temperature in the positive direction of temperature change is determined by the following formula:

C₁＝C₀+Δc＝25℃+10℃＝35℃

Wherein C ₁ is the first test temperature in the positive direction of temperature change, C ₀ is the reference temperature, and Δc is the temperature change interval. The normal temperature is also referred to as a normal temperature or room temperature, and is generally 25 ℃. In fig. 1B, the temperature change interval in the positive direction of the temperature change (25 ℃,60 ℃) was 10 ℃, and the temperature change interval in the range of [60 ℃,80 ℃) was 5 ℃.

Then, according to the first test temperature in the positive direction of temperature change and the temperature change interval, determining a new first test temperature in the positive direction of temperature change, thereby obtaining the following first test temperature in the positive direction of temperature change: 35 ℃, 45 ℃, 55 ℃, 60 ℃ and 65 ℃.

Optionally, the high-low temperature alternating stress test is performed on the target circuit board by adopting different first test temperatures to obtain the working limit temperature and the first fault element of the target circuit board, which may be: dividing the determined at least two first test temperatures into two different temperature groups (namely a low temperature group and a high Wen Zu) according to the temperature values, and arranging the first test temperatures in each temperature group from small to large according to the temperature values; controlling the temperature in the temperature test environment to be converted into a first test temperature which is Wen Zu higher according to the temperature change rate from the first test temperature of the low-temperature group; then, the temperature is converted into a second first test temperature of the low-temperature group according to the temperature variable rate, and the temperature is alternately reciprocated, so that high-temperature and low-temperature alternation under the temperature test environment is realized. For example, referring to FIG. 1B, the rate of temperature change in FIG. 1B is 20 ℃/min; dividing the obtained first test temperature (namely-10 ℃, -20 ℃, -30 ℃, -35 ℃, -40 ℃, 35 ℃,45 ℃,55 ℃,60 ℃ and 65 ℃) into two different temperature groups according to the temperature values to obtain a low temperature group of-10 ℃, -20 ℃, -30 ℃, -35 ℃, -40 ℃, high temperature group of 35 ℃,45 ℃,55 ℃,60 ℃ and 65 ℃; controlling the temperature in the temperature test environment to be converted to 35 ℃ according to the temperature change rate from-10 ℃; then, the temperature is converted to-20 ℃ according to the temperature variable rate; then, the temperature is converted to 45 ℃ according to the temperature variable rate, and the alternating reciprocating is realized, so that the high-temperature and low-temperature alternation of the temperature in the temperature test environment is realized.

Meanwhile, in the process of carrying out high-low temperature alternating stress test on the target circuit board, calculating a first parameter value variation between a first test performance parameter value and a normal performance parameter value of each electronic component in the target circuit board at each first test temperature; if the first parameter value variation is larger than the first parameter deviation threshold, determining the electronic component as a first fault component, and determining the working limit temperature of the target circuit board according to the first test temperature.

The first test performance parameter value refers to a performance parameter value of an electronic component in the target circuit board at a first test temperature. The normal performance parameter value refers to a performance parameter value of the electronic component in a normal working state of the target circuit board. The first parameter value variation amount refers to a parameter value variation amount between the first test performance parameter value and the normal performance parameter value. The first parameter deviation amount threshold may be preset according to actual service requirements or experience of those skilled in the art, and the embodiment of the present invention is not limited specifically.

Optionally, determining the working limit temperature of the target circuit board according to the first test temperature may be: the two first test temperatures nearest to the first test temperature are determined as the operation limit temperature of the target circuit board, for example, if the first parameter value variation between the first test performance parameter value and the normal performance parameter value of one electronic component in the target circuit board is greater than the first parameter deviation threshold value at the first test temperature-35 ℃ in fig. 1B, the electronic component is determined as the first fault component, and the two first test temperatures nearest to the first test temperature (i.e., 55 ℃ and-30 ℃) before the-35 ℃ are determined as the operation limit temperature of the target circuit board. And then determining the larger working limit temperature of the two working limit temperatures as the high-temperature working limit temperature of the target circuit board, and determining the smaller working limit temperature of the two working limit temperatures as the low-temperature working limit temperature of the target circuit board.

In addition, the first test temperature may be determined as a destruction temperature of the target circuit board, and then a low-temperature destruction temperature and a high-temperature destruction temperature may be determined from the two destruction temperatures, for example, a larger destruction temperature of the two destruction temperatures may be determined as a high-temperature destruction temperature; the lower of the two obtained failure temperatures was determined as the low-temperature failure temperature. After the low-temperature failure temperature of the target circuit board is determined, the high-low temperature alternating stress test on the target circuit board is stopped. If the low-temperature damage temperature of the target circuit board is lower than-80 ℃, determining the-80 ℃ as the low-temperature damage temperature of the target circuit board, and stopping performing the high-low temperature alternating stress test on the target circuit board.

S102, under the condition that the voltage test environment meets the voltage test condition, performing a voltage stress test on the target circuit board according to the circuit rated voltage of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; wherein the voltage test conditions include a voltage test temperature and a voltage test humidity.

The voltage test environment is a test environment for performing a voltage stress test on the target circuit board. The voltage test conditions are test conditions that are required to be satisfied when a voltage stress test is performed on a target circuit board. Correspondingly, the voltage test temperature refers to the temperature required to be met when the voltage stress test is carried out on the target circuit board; the voltage test humidity is the humidity that needs to be satisfied when the voltage stress test is performed on the target circuit board. The circuit rated voltage refers to the rated voltage of the target circuit board. The operation limit voltage refers to a voltage at which the target circuit board does not malfunction; optionally, the operating limit voltage includes a low voltage operating limit voltage and a high voltage operating limit voltage. The second fault component is the fault electronic component determined by the voltage stress test of the target circuit board. The voltage stress test includes a low voltage stress test and a high voltage stress test.

Specifically, under the condition that the voltage test environment meets the voltage test condition, taking the rated voltage of the circuit of the target circuit board as the reference voltage, and taking a certain proportion of the reference voltage as a voltage change interval; determining at least two first test voltages according to the reference voltage and the voltage change interval in the same voltage change direction; and carrying out voltage stress test on the target circuit board by adopting different first test voltages to obtain the working limit voltage of the target circuit board and the second fault component. The certain proportion may be preset according to actual service requirements or experience of those skilled in the art, for example, the certain proportion may be 5%, which is not particularly limited by the present invention.

And S103, performing comprehensive stress test on the target circuit board according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity to obtain a third fault component.

The third fault component is a fault electronic component determined by the target circuit board after the comprehensive stress test.

Specifically, based on a comprehensive test condition determining method, determining a comprehensive test condition according to a working limit temperature, a working limit voltage, a circuit rated voltage and a voltage test humidity; and under the condition that the comprehensive stress test environment meets the comprehensive test condition, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component. The method for determining the comprehensive test condition can be preset according to actual service requirements or experience of a person skilled in the art, and the embodiment of the invention is not particularly limited.

S104, determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

The target fault component is a fault electronic component finally determined after the target circuit board is subjected to a high-low temperature alternating stress test, a voltage stress test and a comprehensive stress test.

Specifically, the repeated electronic components in the first fault component, the second fault component and the third fault component are removed, and the target fault component in the target circuit board is obtained. That is, the target failure component includes a first failure component, a second failure component, and a third failure component.

According to the technical scheme, the high-low temperature alternating stress test is carried out on the target circuit board by adopting test temperature information in a temperature test environment, so that the working limit temperature of the target circuit board and the first fault element are obtained; under the condition that the voltage test environment meets the voltage test condition, carrying out a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions comprise voltage test temperature and voltage test humidity; according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component; and determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component. According to the technical scheme, the temperature stress test in the existing circuit board fault determination method is improved, the low-temperature working limit temperature and the high-temperature working limit stability of the target circuit board are obtained at one time in a high-low temperature alternating mode, the low-temperature stress test and the high-temperature stress test are not carried out on the target circuit board separately, the vibration test is not needed, test items are reduced, and the test cost is reduced to a certain extent; meanwhile, the influence of the actual working environment (namely temperature, voltage and humidity) of the target circuit board on the reliability of the target circuit board is fully considered, so that the determined target fault components are more accurate, the accuracy of determining the fault components in the target circuit board is improved, the follow-up more accurate transformation of the fault components in the target circuit board is facilitated, and the reliability of the target circuit board is ensured.

On the basis of the above embodiment, as an alternative manner of the embodiment of the present invention, it is also possible to: and before the test temperature information in the temperature test environment is adopted to perform high-low temperature alternating stress test on the target circuit board to obtain the working limit temperature and the first fault element of the target circuit board, performing a pretreatment test on the target circuit board, removing the package of the target circuit board, relieving the over-temperature protection function of the target circuit board, performing stress isolation on electronic components sensitive to test stress in the target circuit board to obtain the normal performance parameter value of each electronic component in the target circuit board, and determining the reliability of test equipment required by the whole test process to ensure the smooth performance of the subsequent high-low temperature alternating stress test, the voltage stress test and the comprehensive stress test.

Example two

Fig. 2A is a flowchart of a method for determining a fault component according to a second embodiment of the present invention, where on the basis of the foregoing embodiment, the present embodiment further performs a voltage stress test on a target circuit board according to a circuit rated voltage of the target circuit board under the condition that a voltage test environment is determined to satisfy a voltage stress test condition, so as to obtain a working limit voltage of the target circuit board and a second fault component, and an alternative embodiment is provided. In the embodiments of the present invention, parts not described in detail may be referred to for related expressions of other embodiments. As shown in fig. 2A, the method includes:

S201, performing high-low temperature alternating stress test on the target circuit board by using test temperature information in a temperature test environment to obtain the working limit temperature of the target circuit board and the first fault element.

And S202, determining the rated voltage of the circuit of the target circuit board with the second preset proportion as a voltage change interval under the condition that the voltage test environment meets the voltage stress test condition.

The voltage stress test conditions comprise voltage test temperature and voltage test humidity; alternatively, the voltage test temperature and the voltage test humidity may be determined by: determining a normal working temperature interval and a normal working humidity interval of a target circuit board; extracting the highest temperature from the normal temperature interval, and determining the highest temperature as a voltage test temperature; and extracting the highest humidity from the working humidity interval, and determining the highest humidity with the first preset proportion as the voltage test humidity. The normal operation temperature interval refers to a temperature interval in which the target circuit board normally operates. Accordingly, the normal operation humidity interval refers to a humidity interval in which the target circuit board is normally operated. The first preset proportion may be preset according to actual service requirements or experience of those skilled in the art, for example, the first preset proportion may be 90%, which is not limited in the embodiment of the present invention. The second preset proportion may be preset according to actual service requirements or experience of those skilled in the art, for example, the second preset proportion may be 5%, which is not limited in the embodiment of the present invention. It should be noted that the first preset ratio is different from the second preset ratio.

Optionally, determining the normal operating temperature interval and the normal operating humidity interval of the target circuit board may be: according to the type of the target circuit board, determining a normal working temperature interval and a normal working humidity interval of the target circuit board, for example, if the target circuit board is a fire-fighting circuit board, the normal working temperature interval of the target circuit board is [ -10 ℃, +55℃ ] and the normal working humidity interval is [30% RH,60% RH ]; for another example, if the target circuit board is an aluminum substrate, the normal operating temperature interval of the target circuit board is [ -40 ℃, +80℃], and the normal operating humidity interval is [45% RH,70% RH ].

The voltage change interval refers to the voltage change amount between two adjacent voltages in the same voltage change direction.

Specifically, when the temperature in the voltage test environment is determined to meet the voltage test temperature and the humidity is determined to meet the voltage test humidity, the rated circuit voltage of the target circuit board with the second preset proportion is determined to be the voltage change interval.

S203, determining at least two first test voltages according to the voltage change intervals.

Specifically, at least one first test voltage in the same voltage change direction is determined according to the rated voltage of the circuit and the voltage change interval in the same voltage change direction.

For example, referring to fig. 2B, if the circuit rated voltage is V ₀, the voltage change interval is 5% V ₀; in the negative direction of the voltage variation, according to the rated voltage of the circuit and the voltage variation interval, determining a first test voltage in the negative direction of the voltage variation by the following formula:

v₁＝V₀-ΔV＝V₀-5％V₀＝95％V₀

Wherein V ₁ is the first test voltage in the negative direction of the voltage change, V ₀ is the rated voltage of the circuit, and Δv is the voltage change interval. Then, according to the first test voltage in the negative voltage change direction and the temperature change interval, determining a new first test voltage in the negative voltage change direction, thereby obtaining the following first test voltage in the negative voltage change direction: 95% v ₀、90％V₀、85％V₀ and 80% v ₀.

Similarly, referring to fig. 2B, in the positive direction of the voltage variation, according to the circuit rated voltage and the voltage variation interval, the first test voltage in the positive direction of the voltage variation is determined by the following formula:

V₁＝V₀-ΔV＝V₀+5％V₀＝105％V₀

Wherein V ₁ is the first test voltage in the positive direction of the voltage change, V ₀ is the rated voltage of the circuit, and Δv is the voltage change interval. Then, according to the first test voltage in the positive direction of the voltage change and the temperature change interval, determining a new first test voltage in the positive direction of the voltage change, thereby obtaining the first test voltage in the positive direction of the voltage change as follows: 105% v ₀、110％V₀、115％V₀ and 120% v ₀.

It should be noted that, in the process of performing the voltage stress test on the target circuit board, the target circuit board stays for a period of time on each first test voltage, and the stay time is recorded as a second stay time; alternatively, the second residence time may be determined according to the waiting time of the target circuit board under the first test voltage and the parameter value obtaining time for obtaining the performance parameter value of each electronic component in the target circuit board under the first test voltage, for example, the second residence time may be equal to the sum of the waiting time and the parameter value obtaining time. The waiting time may be preset according to actual service requirements or experience of those skilled in the art, for example, the waiting time may be 10 minutes.

S204, performing voltage stress test on the target circuit board by adopting different first test voltages to obtain the working limit voltage of the target circuit board and the second fault component.

Specifically, dividing a first test voltage smaller than the rated voltage of the circuit into a low-voltage test voltage group, and dividing a first test voltage larger than the rated voltage of the circuit into a high-voltage test voltage group; adopting different first test voltages in the low-voltage test voltage group to perform a low-voltage stress test on the target circuit board; adopting different first test voltages in the high-voltage test voltage group to perform a high-voltage stress test on the target circuit board; in the process of a low-voltage stress test or a high-voltage stress test, calculating a second parameter value variation between a second test performance parameter value and a normal performance parameter value of each electronic component in the target circuit board under each first test voltage; and if the second parameter value variation is greater than the second parameter deviation threshold, determining the electronic component as a second fault component, and determining the working limit voltage of the target circuit board according to the first test voltage.

The second test performance parameter value refers to a performance parameter value of an electronic component in the target circuit board under the first test voltage. The second parameter value variation amount refers to a parameter value variation amount between the second test performance parameter value and the normal performance parameter value. The second parameter deviation amount threshold may be preset according to actual service requirements or experience of those skilled in the art, and the embodiment of the present invention is not limited specifically. The second parameter deviation amount threshold is different from the first parameter deviation amount threshold.

Optionally, determining the working limit voltage of the target circuit board according to the first test voltage may be: in the process of a low-voltage stress test, determining a first test voltage nearest to the first test voltage as a low-voltage working limit voltage of a target circuit board; in the process of high-voltage stress test, the first test voltage nearest to the first test voltage is determined as the high-voltage working limit voltage of the target circuit board. In addition, in the process of the low-voltage stress test, the first test temperature can be determined as the low-voltage breaking voltage of the target circuit board; the first test temperature may also be determined as a high voltage break voltage of the target circuit board during the high voltage stress test.

For example, referring to fig. 2B, during the low voltage stress test, if there is a second parameter value variation between a second test performance parameter value and a normal performance parameter value of one electronic component of the target circuit board at the first test voltage of 80% v ₀, which is greater than a second parameter deviation threshold value, the electronic component is determined as a second faulty component, the first test voltage nearest before 80% v ₀ is determined as a low voltage operation limit voltage of the target circuit board, and 80% v ₀ is determined as a low voltage breakdown voltage of the target circuit board. In the high voltage stress test process, if the second parameter value variation amount between the second test performance parameter value and the normal performance parameter value of one electronic component exists in the target circuit board at the first test voltage of 120% V ₀ is larger than the second parameter deviation amount threshold value, the electronic component is determined to be a second fault component, the first test voltage of 115% V ₀ nearest before 120% V ₀ is determined to be the high voltage operation limit voltage of the target circuit board, and 120% V ₀ is determined to be the high voltage breaking voltage of the target circuit board.

After determining the low voltage breakdown voltage of the target circuit board, stopping the low voltage stress test on the target circuit board; and similarly, stopping performing the high-voltage stress test on the target circuit board after determining the high-voltage breaking voltage of the target circuit board. If the high voltage breakdown voltage of the target circuit board is greater than 2 times the rated voltage of the circuit (2V ₀), 2V ₀ is determined as the high voltage breakdown voltage of the target circuit board, and the high voltage stress test on the target circuit board is stopped.

S205, performing comprehensive stress test on the target circuit board according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity to obtain a third fault component.

Specifically, the comprehensive test condition can be determined according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity; wherein the integrated test conditions include at least two test conditions, and each test condition includes a second test temperature, a second test humidity, and a second test voltage; and under the condition that the comprehensive stress test environment meets the comprehensive test condition, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component.

The second test temperature is the temperature required to be met when the target circuit board is subjected to the comprehensive stress test; the second test humidity is the humidity which needs to be met when the comprehensive stress test is carried out on the target circuit board; the second test voltage is a voltage required to be satisfied when the target circuit board is subjected to the integrated stress test.

Optionally, if the comprehensive test conditions include two test conditions, the first test condition and the second test condition are respectively; correspondingly, according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, the comprehensive test conditions are determined, and can be: taking the sum of the low-temperature working limit temperature and the preset temperature as a second test temperature in the first test condition; the preset temperature may be preset according to actual service requirements or experience of a person skilled in the art, for example, the preset temperature may be 5 ℃, which is not specifically limited in the embodiment of the present invention; taking the voltage test humidity with the third preset proportion as the second test humidity in the first test condition; the third preset proportion can be preset according to actual service requirements or experience of a person skilled in the art, and the embodiment of the invention is not particularly limited; a second preset proportion (for example, 5%) of rated voltage of the circuit is used as a voltage variation; taking the voltage difference between the high-voltage working limit voltage and the voltage variation as a second test voltage in the first test condition; taking the temperature difference between the high-temperature working limit temperature and the preset temperature as a second test temperature in a second test condition; taking the voltage test humidity as a second test humidity in a second test condition; and taking the sum of the low-voltage operation limit voltage and the voltage variation as a second test voltage in the second test condition.

Optionally, under the condition that the comprehensive stress test environment meets the comprehensive test condition, performing a comprehensive stress test on the target circuit board to obtain a third fault component, which may be: under the condition that the comprehensive stress test environment meets the first test condition, carrying out a comprehensive stress test on the target current board; then, under the condition that the comprehensive test environment meets the second test condition, carrying out a comprehensive stress test on the target circuit board; in the process of carrying out the comprehensive stress test on the target circuit board, calculating a third parameter value variation between a third test performance parameter value and a normal performance parameter value of each electronic component under each test condition; if the third parameter value variation is greater than the third parameter deviation threshold, determining the electronic component as a third fault component; and (3) performing the two comprehensive stress tests to complete one test cycle (see fig. 2C) until the test cycle times reach a preset time threshold value, and stopping performing the comprehensive stress test on the target circuit board.

The third test performance parameter value refers to a performance parameter value of an electronic component in the target circuit board under the comprehensive test condition. The third parameter value variation amount refers to a parameter value variation amount between the third test performance parameter value and the normal performance parameter value. The third parameter deviation amount threshold may be preset according to actual service requirements or experience of those skilled in the art, and the embodiment of the present invention is not limited specifically. The first parameter deviation amount threshold value, the second parameter deviation amount threshold value, and the third parameter deviation amount threshold value are different from each other. The preset frequency threshold may be preset according to actual service requirements or experience of a person skilled in the art, for example, the preset frequency threshold may be 5 times, which is not specifically limited in the embodiment of the present invention.

In the process of carrying out the comprehensive stress test on the target circuit board, the target circuit board stays for a period of time under each test condition, and the stay time is recorded as a third stay time; optionally, the third residence time may be determined according to a temperature stabilization time for stabilizing the component temperature of the electronic component in the target circuit board under the test condition (i.e., the first test condition or the second test condition) and a parameter value acquisition time for acquiring a performance parameter value of each electronic component in the target circuit board under the test condition, for example, the third residence time may be equal to a sum of the temperature stabilization time and the parameter value acquisition time. The temperature stabilization time means that the temperature variation between the component temperatures of any two electronic components in the target circuit board is smaller than the preset temperature variation. The preset temperature change amount may be preset according to actual service requirements or experience of a person skilled in the art, for example, the preset temperature change amount may be 1 degree celsius (i.e., 1 ℃/h) per hour.

S206, determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

According to the technical scheme, the high-low temperature alternating stress test is carried out on the target circuit board by adopting test temperature information in a temperature test environment, so that the working limit temperature of the target circuit board and the first fault element are obtained; under the condition that the voltage test environment meets the voltage stress test condition, determining the rated voltage of the circuit of the target circuit board with the second preset proportion as a voltage change interval; determining at least two first test voltages according to the voltage change interval; performing voltage stress tests on the target circuit board by adopting different first test voltages to obtain the working limit voltage of the target circuit board and a second fault component; according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component; and determining the target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component. According to the technical scheme, the temperature stress test in the existing circuit board fault determination method is improved, the low-temperature working limit temperature and the high-temperature working limit stability of the target circuit board are obtained at one time in a high-low temperature alternating mode, the low-temperature stress test and the high-temperature stress test are not carried out on the target circuit board separately, the vibration test is not needed, test items are reduced, and the test cost is reduced to a certain extent; meanwhile, the influence of the actual working environment (namely temperature, voltage and humidity) of the target circuit board on the reliability of the target circuit board is fully considered, so that the determined target fault components are more accurate, the accuracy of determining the fault components in the target circuit board is improved, the follow-up more accurate transformation of the fault components in the target circuit board is facilitated, and the reliability of the target circuit board is ensured.

Example III

Fig. 3 is a schematic structural diagram of a fault component determining apparatus according to a third embodiment of the present invention, where the present embodiment is applicable to a case of performing fault excitation on a circuit board, and the apparatus may be implemented in a form of hardware and/or software and may be configured in an electronic device. As shown in fig. 3, the apparatus includes:

The first test data determining module 301 is configured to perform a high-low temperature alternating stress test on the target circuit board by using test temperature information in a temperature test environment, so as to obtain a working limit temperature and a first fault element of the target circuit board;

The second test data determining module 302 is configured to perform a voltage stress test on the target circuit board according to the circuit rated voltage of the target circuit board under the condition that the voltage test environment is determined to meet the voltage test condition, so as to obtain the working limit voltage of the target circuit board and a second fault component; the voltage test conditions comprise voltage test temperature and voltage test humidity;

The third fault component determining module 303 is configured to perform a comprehensive stress test on the target circuit board according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity to obtain a third fault component;

the target fault component determining module 304 is configured to determine a target fault component in the target circuit board according to the first fault component, the second fault component, and the third fault component.

Optionally, the test temperature information includes a temperature change interval; accordingly, the first test data determining module 301 includes:

A first test temperature determining unit for determining at least two first test temperatures according to the temperature change interval;

And the first test data determining unit is used for carrying out high-low temperature alternating stress tests on the target circuit board by adopting different first test temperatures to obtain the working limit temperature of the target circuit board and the first fault element.

Optionally, the first test data determining unit is specifically configured to:

for each electronic component in the target circuit board at each first test temperature, calculating a first parameter value variation between a first test performance parameter value and a normal performance parameter value of the electronic component;

If the first parameter value variation is larger than the first parameter deviation threshold, determining the electronic component as a first fault component, and determining the working limit temperature of the target circuit board according to the first test temperature.

Optionally, the device further comprises a voltage test condition determining module, and the voltage test condition determining module is specifically configured to:

Determining a normal working temperature interval and a normal working humidity interval of a target circuit board;

extracting the highest temperature from the normal temperature interval, and determining the highest temperature as a voltage test temperature;

and extracting the highest humidity from the working humidity interval, and determining the highest humidity with the first preset proportion as the voltage test humidity.

Optionally, the second test data determining module 302 includes:

a voltage change interval determining unit, configured to determine, as a voltage change interval, a circuit rated voltage of the target circuit board in a second preset proportion when it is determined that the voltage test environment meets a voltage stress test condition;

The first test voltage determining unit is used for determining at least two first test voltages according to the voltage change interval;

and the second test data determining unit is used for carrying out voltage stress tests on the target circuit board by adopting different first test voltages to obtain the working limit voltage of the target circuit board and the second fault components.

Optionally, the second test data determining unit is specifically configured to:

For each electronic component in the target circuit board under each first test voltage, calculating a second parameter value variation between a second test performance parameter value and a normal performance parameter value of the electronic component;

And if the second parameter value variation is greater than the second parameter deviation threshold, determining the electronic component as a second fault component, and determining the working limit voltage of the target circuit board according to the first test voltage.

Optionally, the third fault component determination module 303 includes:

The comprehensive test condition determining unit is used for determining a comprehensive test condition according to the working limit temperature, the working limit voltage, the rated voltage of the circuit and the voltage test humidity; wherein the integrated test conditions include at least two test conditions, and each test condition includes a second test temperature, a second test humidity, and a second test voltage;

and the third fault component determining unit is used for carrying out the comprehensive stress test on the target circuit board under the condition that the comprehensive stress test environment meets the comprehensive test condition to obtain the third fault component.

Optionally, the third fault component determining unit is specifically configured to:

for each electronic component under each test condition, calculating a third parameter value variation between a third test performance parameter value and a normal performance parameter value of the electronic component;

And if the third parameter value variation is greater than the third parameter deviation threshold, determining the electronic component as a third fault component.

The fault component determining device provided by the embodiment of the invention can execute the fault component determining method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of executing the fault component determining methods.

Example IV

Fig. 4 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.

As shown in fig. 4, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM12 and the RAM13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.

Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.

The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the respective methods and processes described above, such as the faulty component determining method.

In some embodiments, the fault component determination method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM12 and/or the communication unit 19. When the computer program is loaded into RAM13 and executed by processor 11, one or more steps of the above-described fault component determination method may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the method of fault component determination in any other suitable manner (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.

The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.

The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims

1. A method of determining a faulty component, comprising:

Carrying out high-low temperature alternating stress test on a target circuit board by adopting test temperature information in a temperature test environment to obtain the working limit temperature and a first fault element of the target circuit board;

Under the condition that the voltage test environment meets the voltage test condition, carrying out a voltage stress test on the target circuit board according to the rated voltage of the circuit of the target circuit board to obtain the working limit voltage of the target circuit board and a second fault component; wherein the voltage test conditions include a voltage test temperature and a voltage test humidity;

According to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity, performing a comprehensive stress test on the target circuit board to obtain a third fault component;

And determining a target fault component in the target circuit board according to the first fault component, the second fault component and the third fault component.

2. The method of claim 1, wherein the test temperature information comprises a temperature change interval;

Correspondingly, the test temperature information under the temperature test environment is adopted to perform a high-low temperature alternating stress test on the target circuit board to obtain the working limit temperature and the first fault element of the target circuit board, and the method comprises the following steps:

determining at least two first test temperatures according to the temperature change interval;

And carrying out high-low temperature alternating stress tests on the target circuit board by adopting different first test temperatures to obtain the working limit temperature of the target circuit board and the first fault element.

3. The method of claim 2, wherein the performing the alternating high and low temperature stress test on the target circuit board using the different first test temperatures to obtain the operating limit temperature and the first failure component of the target circuit board comprises:

And if the first parameter value variation is larger than a first parameter deviation threshold, determining the electronic component as a first fault component, and determining the working limit temperature of the target circuit board according to the first test temperature.

4. The method according to claim 1, wherein the method further comprises:

determining a normal working temperature interval and a normal working humidity interval of the target circuit board;

extracting a highest temperature from the normal temperature interval, and determining the highest temperature as the voltage test temperature;

And extracting the highest humidity from the working humidity interval, and determining the highest humidity with a first preset proportion as the voltage test humidity.

5. The method according to claim 1, wherein the step of performing a voltage stress test on the target circuit board according to a circuit rated voltage of the target circuit board to obtain an operation limit voltage and a second fault component of the target circuit board in a case where it is determined that the voltage test environment satisfies a voltage stress test condition includes:

Under the condition that the voltage test environment meets the voltage stress test condition, determining the rated voltage of the circuit of the target circuit board with a second preset proportion as a voltage change interval;

determining at least two first test voltages according to the voltage change interval;

And carrying out voltage stress test on the target circuit board by adopting different first test voltages to obtain the working limit voltage of the target circuit board and the second fault component.

6. The method of claim 5, wherein performing a voltage stress test on the target circuit board using different first test voltages to obtain an operating limit voltage and a second faulty component of the target circuit board comprises:

and if the second parameter value variation is larger than a second parameter deviation threshold, determining the electronic component as a second fault component, and determining the working limit voltage of the target circuit board according to the first test voltage.

7. The method of claim 1, wherein the performing a comprehensive stress test on the target circuit board according to the operating limit temperature, the operating limit voltage, the circuit rated voltage, and the voltage test humidity to obtain a third fault component comprises:

Determining comprehensive test conditions according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity; wherein the integrated test conditions comprise at least two test conditions, and each test condition comprises a second test temperature, a second test humidity, and a second test voltage;

And under the condition that the comprehensive stress test environment meets the comprehensive test condition, carrying out a comprehensive stress test on the target circuit board to obtain a third fault component.

8. The method according to claim 7, wherein performing the integrated stress test on the target circuit board to obtain the third faulty component in the case where it is determined that the integrated stress test environment satisfies the integrated test condition includes:

and if the third parameter value variation is larger than a third parameter deviation threshold, determining the electronic component as a third fault component.

9. A malfunction component determination apparatus, comprising:

The second test data determining module is used for performing a voltage stress test on the target circuit board according to the circuit rated voltage of the target circuit board under the condition that the voltage test environment meets the voltage test condition, so as to obtain the working limit voltage of the target circuit board and a second fault component; wherein the voltage test conditions include a voltage test temperature and a voltage test humidity;

The third fault component determining module is used for carrying out a comprehensive stress test on the target circuit board according to the working limit temperature, the working limit voltage, the circuit rated voltage and the voltage test humidity to obtain a third fault component;

10. An electronic device, the electronic device comprising:

At least one processor; and

A memory communicatively coupled to the at least one processor; wherein,

The memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of determining a faulty component according to any one of claims 1 to 8.

11. A computer readable storage medium storing computer instructions for causing a processor to perform the method of determining a faulty component according to any one of claims 1 to 8.