CN118314842B

CN118314842B - Light driving circuit, backlight module, dimming method, display and electronic equipment

Info

Publication number: CN118314842B
Application number: CN202410742670.4A
Authority: CN
Inventors: 黄炯
Original assignee: Hefei Weiguo Semiconductor Co ltd
Current assignee: Hefei Weiguo Semiconductor Co ltd
Priority date: 2024-06-11
Filing date: 2024-06-11
Publication date: 2024-08-20
Anticipated expiration: 2044-06-11
Also published as: CN118314842A

Abstract

The application provides a light driving circuit, a backlight module, a dimming method, a display and electronic equipment, and relates to the field of display. The optical drive circuit includes: a controller; a plurality of light source control chip sets; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports; the first data end of the ith light source control chip of the same light source control chip set is connected with the second data end of the (i-1) th light source control chip; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; each light source control chip is configured to control data transmission between the connected first data terminal and second data terminal based on a clock signal output from the clock port. The light driving circuit can improve the data transmission efficiency between the controller and the light source control chip.

Description

Light driving circuit, backlight module, dimming method, display and electronic equipment

Technical Field

The present application relates to the field of display, and in particular, to an optical driving circuit, a backlight module, a dimming method, a display, and an electronic device.

Background

In the backlight module, each light source control chip can control one or more light sources, the driving controller can control the light source control chips of a plurality of subareas, and each subarea comprises a plurality of light source control chips.

At present, the light source control chips of each partition are connected in series, and dimming data and control instructions for the light source are transmitted between the light source control chips of each partition and the drive controller and between the light source control chips through a single-wire protocol.

However, in order to ensure normal transmission of data, the single-wire protocol controls the output frequency of the data in a manner of using duty cycle identification, one frame of data of the single-wire protocol includes a synchronization signal, a data signal, and an end signal, and in order to enable normal transmission of the data, the duty cycle of the synchronization signal needs to be greater than the sum of the duty cycles of a fixed low level and a high level, and the duty cycle of the high level is required to exceed the duty cycle of the low level by a certain value, which makes the upper limit of the transmission efficiency of the single-wire protocol to the data lower in unit time, such as the maximum data transmission speed of 1MHz. With the increase of the requirements of high resolution, high refresh rate and high partition number of the backlight module, the requirement of the backlight module on the data transmission rate is also increased, and the data transmission mode of the single-wire protocol does not meet the requirements.

Disclosure of Invention

In view of the above, the present application is directed to a light driving circuit, a backlight module, a dimming method, a display and an electronic device, so as to improve the data transmission efficiency of the backlight module.

In a first aspect, an embodiment of the present application provides an optical drive circuit, including: a controller including a clock port and a plurality of data ports; a plurality of light source control chip sets, each of the light source control chip sets including a plurality of light source control chips; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than or equal to M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; wherein each light source control chip is configured to control data transmission between the connected first data terminal and second data terminal based on a clock signal output by the clock port; the controller is configured to control data transmission between the data port and a first data terminal of the light source control chip based on the clock signal.

In the embodiment of the application, the clock port, the first clock end and the second clock end are arranged to transmit clock signals, so that the light source control chip and the controller perform data transmission based on the synchronization of the clock signals. On the one hand, the data transmission can be synchronized based on the clock signal, and the synchronization signal is not required to be set in the data, so that the data port, the first data terminal and the second data terminal can be specially used for data or instruction transmission, and the data transmission efficiency is improved. On the other hand, compared with the mode that the single-wire protocol needs more time corresponding to the duty ratio when controlling single transmission, when the clock signal is used for controlling data transmission, the clock edge (rising edge and/or falling edge) of the clock signal is used for controlling the synchronization and transmission of the data, the time of the clock edge is usually shorter, so that the time required for the synchronization when the clock signal is used for controlling the single data transmission is shorter, meanwhile, the number of the clock edges in unit time can be increased by changing the frequency of the clock signal, the frequency of the data transmission can be increased by changing the frequency of the clock signal, the transmission quantity of the data in unit time can be increased, and the purpose of improving the data transmission efficiency can be achieved.

In one embodiment, each of the light source control chips is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data.

In the embodiment of the application, the first data end and the second data end of the light source control chip can both receive and transmit data, namely, the light source control chip can bidirectionally transmit data. Compared with the unidirectional transmission of the single-wire protocol, the bidirectional transmission light source control chip can directly return the read data after receiving the instruction, and the read data is sequentially fed back and outputted to the controller by the last light source control chip after waiting for the instruction to be transmitted to the last light source control chip of the group. Thus, the data transmission efficiency and the response speed to the command can be improved. In addition, the bidirectional transmission does not need to additionally arrange a return loop, so that the use of pins can be reduced.

In an embodiment, each of the light source control chips is configured to allow the first clock terminal to receive and transmit the clock signal, and allow the second clock terminal to receive and transmit the clock signal.

The synchronization signal of the single-wire protocol is sent by the controller and is transmitted back to the controller by the last light source control chip of the light source control chip group after passing through each light source control chip, namely, different pins of the controller are needed to be used for input and output respectively.

In an embodiment, each light source control chip is configured to output the clock signal through the second clock terminal, and the controller transmits the clock signal to the light source control chip through each light source control chip connected in front of the light source control chip.

In some cases, the clock signal may not be transmitted back to the controller, so in the embodiment of the present application, the light source control chip is configured to output the clock signal through the second clock end, and the controller transmits the clock signal to the light source control chip through each light source control chip connected to the front of the light source control chip, that is, only unidirectional transmission of the clock signal is set, and compared with the case that each light source control chip is separately connected to one clock port of the controller, the mode can not additionally increase pins of the controller under the condition that each light source control chip can normally work according to the clock signal, and reduce pin overhead of the controller.

In an embodiment, each of the light source control chips is configured to: and under the condition that an acquisition instruction of acquiring the demand information of the light source control chip by the controller is received, transmitting readback data comprising the demand information to the light source control chip through each light source control chip connected to the front of the light source control chip.

In the embodiment of the application, the light source control chip can directly return the read-back data after receiving the instruction, and compared with a single-wire protocol, the light source control chip does not need to wait for acquiring the instruction to be transmitted to the last light source control chip of the group, and the last light source control chip of the group does not need to transmit the read-back data to the controller, so that the waiting time and the complexity of the data transmission process are reduced, and the data transmission efficiency is further improved.

In one embodiment, the controller includes a plurality of the clock ports; the first clock ends of the first light source control chips of part of the light source control chip sets are connected with the same clock port of the controller, and the first clock ends of the rest light source control chip sets are respectively connected with different clock ports.

In the embodiment of the application, part of the light source control chip sets share the pins of one clock port, so that the number of the pins of the clock port required by the controller can be effectively reduced, and the pins are further provided for other functions, such as more light source control chip sets, thereby being beneficial to realizing high partition and high resolution of the backlight module. And for the light source control chip set which does not share the clock port, the clock signal can be sent through the corresponding clock port to carry out independent control, so that the control accuracy is improved.

In one embodiment, the number of clock ports of the controller is 1; the first clock end of the first light source control chip of all the light source control chip sets is connected with the clock port of the controller.

In the embodiment of the application, all the light source control chip sets share one clock end, so that the number of clock ports required by the controller can be effectively reduced, and further the required pins are reduced, so that the light source control chip can reserve more pin positions to be provided for more light source control chip sets, and the realization of high partition and high resolution of the backlight module is facilitated.

In an embodiment, all of the light source control chips and the controller are configured to trigger a data encoding and decoding operation based on rising and falling edges of the clock signal.

In the embodiment of the application, the rising edge and the falling edge can trigger the encoding and decoding operation of the data, namely double-edge triggering, compared with single-edge triggering, the frequency of triggering the encoding and decoding operation of the data can be effectively improved, the frequency of data transmission is further improved, and the aim of improving the data transmission efficiency is fulfilled.

In one embodiment, the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; the light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally; the light source control chip is configured to output a status signal including a second level to the controller in the event of detecting a self-failure.

In the existing backlight module using single-wire protocol, the controller is required to send out instructions for fault detection, after each light source control chip detects own faults, fault information and dimming data are sent to the next light source control chip together, the last light source control chip of the light source control chip group sends back to the controller, and even fault detection and fault information output cannot be carried out when the data are too much. In the embodiment of the application, the status port, the first status port and the second status port are independently arranged to record whether the light source control chip set fails, the first level is output when each light source control chip in the light source control chip set is normal, and the second level is output when any light source control chip fails. Therefore, the fault information is transmitted by the state signal alone, the normal transmission of the data is not affected, and the data transmission efficiency can be improved to a certain extent. Meanwhile, the fault detection or the return of fault information cannot be performed due to excessive data, so that the controller can timely receive the fault information and perform corresponding processing by the aid of the independent state signals and the transmission path, and timeliness of fault processing is improved.

In an embodiment, the number of status ports is the same as the number of data ports; the first state ends of the first light source control chips of different light source control chip sets are respectively connected with different state ports of different controllers.

In the embodiment of the application, the number of the status ports is the same as the number of the data ports, namely, the number of the status ports is the same as the number of the connected light source control chip sets, and in this case, each group of light source control chip sets is connected with one status port, so that fault location can be performed according to status signals transmitted back by different status ports, and the fault location efficiency is improved.

In one embodiment, the number of status ports is greater than 1 and less than the number of data ports; the first state end of the first light source control chip of part of the light source control chip sets is connected with the same state port of the controller; the first state ends of the rest light source control chips are connected with different state ports of the controller.

In the embodiment of the application, the sharing of part of status ports can reduce pin sharing, and the status ports which are not shared can facilitate the positioning of faults, thereby simultaneously considering the number of pins and the fault positioning efficiency.

In one embodiment, the number of status ports is 1; the first status end of the first light source control chip of all the light source control chip sets is connected with the status port of the controller.

In the embodiment of the application, all the light source control chip sets share one state port, so that pins required by the state port can be effectively reduced, pin expenditure is reduced, more pins are reserved for more light source control chip sets, and the high partition number and the high resolution of the backlight module are improved.

In an embodiment, each of the light source control chips is configured to output the status signal through the first status terminal, and transmit the status signal to the controller through each light source control chip connected before the light source control chip.

In the embodiment of the application, the status signal characterizes whether each light source control chip fails or not and is used for providing the controller, and the controller can send instructions to each light source control chip without through the status port, so that only a path between the light source control chip and the controller is configured, the use of pins is reduced, namely, the controller is only configured with the receiving port, and the additional power consumption can be reduced.

In one embodiment, each light source control chip further includes a register and a plurality of light source connection channels, each of the light source connection channels being configured to connect with one or more of the light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register; each of the record bits in the register is configured to record whether the matched light source connection channel is faulty.

In the embodiment of the application, a single light source control chip can be connected with one or more light sources through a plurality of light source connecting channels of the single light source control chip, and different faults can exist in different paths of light sources, and whether the different light source connecting channels have faults or not is recorded by using the record bits of the register, so that the fault position can be determined conveniently and quickly according to the record bits, and the fault positioning and processing efficiency is improved.

In one embodiment, each of the record bits is a bit of the register.

In the embodiment of the application, one record bit is one bit of the register, so that more faults of the light source connecting channels can be recorded with the minimum data quantity, and the data quantity required for recording the faults is reduced.

In an embodiment, the light source control chip is further configured to perform a logic operation on the record value of each record bit in the register to obtain a logic operation result; the data size of the single logical operation result is smaller than the bit width of the register, and the logical operation result represents whether the light source control chip is faulty or not.

In the embodiment of the application, the recorded value of each recorded bit of the register representing whether the fault exists is required to be transmitted to the controller, and the recorded value of all the recorded bits is larger data, so that the transmitted data volume is larger, the recorded value is logically calculated, a logic operation result with smaller data volume can be obtained to represent whether the light source control chip exists fault, and the data volume during transmission can be reduced by transmitting the logic operation result, thereby improving the output transmission efficiency and further improving the timeliness of fault processing.

In an embodiment, the register records a value of 1 for the failed light source connection channel, and the light source control chip is configured to perform an or operation on the recorded value of each record bit in the register, so as to obtain the logic operation result.

In the embodiment of the application, the or operation is performed on the recorded value of the fault being 1, that is, the recorded value of any one of the light source connecting channels is 1, and the or operation result is also 1. Therefore, the logical operation result represents whether the light source control chip is faulty or not, and through OR operation, only 1bit is used for representing whether the light source control chip is faulty or not, so that the data quantity required for representing the fault is effectively reduced.

In an embodiment, the register is configured to perform an and operation on the record value of each record bit in the register to obtain the logical operation result, where the record value of the register on the failed light source connection channel is 0.

In the embodiment of the application, the AND operation is performed on the recorded value of the fault being 0, that is, the recorded value of any one of the light source connecting channels is 0, and the OR operation result is also 0. Therefore, the logical operation result represents whether the light source control chip is faulty or not, and only 1bit is used for representing whether the light source control chip is faulty or not through AND operation, so that the data quantity required for representing the fault is effectively reduced.

In one embodiment, the fault types of the light source control chip include a plurality of types; the light source control chip is configured to sequentially detect different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller.

In the embodiment of the application, the light source control chip can detect different types of faults and output the fault detection result to the controller, so that the controller can timely process the corresponding faults according to the fault detection result, the timeliness of fault positioning and processing is improved, and the working safety of the backlight module is further improved.

In an embodiment, the register is further configured to record, based on each record bit, whether a fault of the fault type exists in each light source connection channel when fault detection is performed for each fault type, and output a record value of each record bit in the register after the fault detection of the fault type is completed; the light source control chip is also used for determining the fault type existing in the light source control chip according to the record value of each fault type output by the register and outputting the fault code of the fault type existing in the light source control chip to the controller.

In the embodiment of the application, different fault types are represented by different fault codes, and after the light source control chip has faults, the fault codes are transmitted to the controller, so that the controller can quickly determine the fault type, the timeliness of fault processing is improved, and the working safety of the backlight module is further improved.

In an embodiment, the light source control chip is further configured to output a preset fault-free code to the controller when it is determined that there is no fault in the light source control chip according to the record value of each fault type output by the register.

In the embodiment of the application, when the light source control chips have no faults, the fault-free codes are sent to the controller, so that the controller is helped to determine the states of the light source control chips in time, thereby controlling the light source control chips to effectively execute different works in a safe state and improving the response efficiency of the backlight module.

In a second aspect, the present application further provides a backlight module, including: a plurality of light sources and the light driving circuit according to any one of the first aspects; each light source is respectively connected with each light source control chip in the light driving circuit.

In a third aspect, an embodiment of the present application further provides a backlight module, including: comprising the following steps: a controller, a plurality of light source control chipsets and a plurality of light sources; the controller comprises a clock port, a status port and a plurality of data ports; each light source control chip group comprises a plurality of light source control chips; the light source control chip comprises a first data end, a second data end, a first clock end, a second clock end, a first state end and a second state end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than or equal to M, and M is the total number of the light source control chips in the light source control chip set; The first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; each light source control chip is configured to control data transmission between the first data terminal and the second data terminal which are connected based on a clock signal output by the clock port; the controller is configured to control data transmission between the data port and a first data terminal of the light source control chip based on the clock signal; each light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; Each of the light source control chips is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal; each of the light source control chips is configured to: transmitting readback data comprising the requirement information to the light source control chips through each light source control chip connected to the front of the light source control chip under the condition that an acquisition instruction of the controller for acquiring the requirement information of the light source control chip is received; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; The light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally; the light source control chip is configured to output a state signal including a second level to the controller in the event of detecting a self-failure; wherein each light source control chip is configured to output the status signal through the first status terminal and transmit the status signal to the controller through each light source control chip connected to the front of the light source control chip; each light source control chip further comprises a register and a plurality of light source connecting channels, and each light source connecting channel is used for being connected with one or a plurality of light sources; the register comprises a plurality of record bits, each light source connection channel of the light source control chip is matched with one record bit of the register, and each record bit is one bit of the register; each of the record bits in the register is configured to record whether the matched light source connection channel is faulty; the fault types of the light source control chip comprise a plurality of types; the light source control chip is configured to sequentially detect different types of faults; the register is also used for recording the detection result of each type of faults based on the record value, and outputting the record value of the type of fault detection by the register after the detection of each type of faults is finished; The register is used for carrying out OR operation on the recorded value of each recorded bit in the register to obtain a logic operation result, wherein the recorded value of the register on the failed light source connecting channel is 1; the data size of the single logical operation result is smaller than the sum of the data sizes of all recorded values of the register, and the logical operation result represents whether the light source control chip is faulty or not.

In the embodiment of the application, the clock signal is used for synchronizing the transmitted data, compared with a duty cycle synchronizing mode, the clock signal is synchronized by utilizing the clock edge, the needed synchronizing time is shorter, and the clock edge data in unit time can be improved by adjusting the frequency of the clock signal, so that the time of data transmission in unit time is improved. Therefore, the mode of double-line transmission of clock signals and data can effectively improve the efficiency of data transmission, and the backlight module is provided with a two-way communication mode, so that the use of pins can be reduced, and compared with the mode of single-line protocol, the data transmission efficiency is effectively improved under the condition that pins are not additionally increased or even reduced. The state port, the first state end and the second state end are utilized to record and transmit fault states, so that the controller can timely acquire whether each light source control chip has faults or not and timely process the faults. And the light source control chip can perform fault detection of different types, is favorable for positioning and processing timeliness of faults, and performs OR operation to effectively reduce data representing whether faults exist or not, so that the purposes of improving data transmission efficiency and improving fault processing timeliness are achieved.

In a fourth aspect, an embodiment of the present application further provides a dimming method, which is applied to a controller of a backlight module, where the controller includes a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets and a plurality of light sources, each light source control chip set comprises a plurality of light source control chips, and each light source control chip is connected with one or a plurality of light sources; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources; the dimming method comprises the following steps: and sending clock signals and data to the light source control chips of the light source control chip groups so that the light source control chips in each light source control chip group control the data to be transmitted among the light source control chips in the light source control chip group based on the clock signals.

In the embodiment of the application, the clock signal is set, so that the light source control chip and the controller perform data transmission after being synchronized based on the clock signal. On the one hand, the data transmission can be synchronized based on the clock signal, and the synchronization signal is not required to be set in the data, so that the data port, the first data terminal and the second data terminal can be specially used for data or instruction transmission, and the data transmission efficiency is improved. On the other hand, compared with the mode that the single-wire protocol needs more time corresponding to the duty ratio when controlling single transmission, when the clock signal is used for controlling data transmission, the clock edge (rising edge and/or falling edge) of the clock signal is used for controlling the synchronization and transmission of the data, the time of the clock edge is usually shorter, so that the time required for the synchronization when the clock signal is used for controlling the single data transmission is shorter, meanwhile, the number of the clock edges in unit time can be increased by changing the frequency of the clock signal, the frequency of the data transmission can be increased by changing the frequency of the clock signal, the transmission quantity of the data in unit time can be increased, and the purpose of improving the data transmission efficiency can be achieved.

In one embodiment, the light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal; the method further comprises the steps of: when an acquisition instruction for the demand information is sent to any one target light source control chip, transmitting the acquisition instruction to the target light source control chip through each light source control chip in front of the target light source control chip; and receiving readback data transmission comprising the requirement information, wherein the readback data transmission comprises the requirement information and is transmitted back by each light source control chip before the target light source control chip passes through the target light source control chip.

In the embodiment of the application, the first data end and the second data end of the light source control chip can both receive and transmit data, namely, the light source control chip can bidirectionally transmit data. Compared with the single-wire protocol which only allows unidirectional transmission of the synchronous signals, bidirectional transmission can be performed without the need of transmitting back clock signals by the last light source control chip in the group, so that only one pin of the controller is occupied for the group of light source control chips, and the pin usage of the controller is reduced. Meanwhile, after the instruction is not required to be transmitted to the last light source control chip of the group, the read data is fed back sequentially and backwardly, and the last light source control chip outputs the read data to the controller. Thus, the data transmission efficiency and the response speed to the command can be improved.

In one embodiment, the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; the light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally; the light source control chip is configured to output a state signal including a second level to the controller in the event of detecting a self-failure; the method further comprises the steps of: and under the condition that the status signal including the second level output by any one of the light source control chip sets is received, stopping transmitting light source dimming data to the light source control chip set, and acquiring readback data including fault information of the light source control chip set based on the data port.

In the existing backlight module using single-wire protocol, the controller is required to send out instructions for fault detection, after each light source control chip detects own faults, fault information and dimming data are sent to the next light source control chip together, the last light source control chip of the light source control chip group sends back to the controller, and even fault detection and fault information output cannot be carried out when the data are too much. In the embodiment of the application, each light source control chip in the light source control chip set outputs a first level if the light source control chip is normal, outputs a second level if any one light source control chip fails, and receives the state signals of each light source control chip by using an independent state port. Therefore, the fault information is transmitted by the state signal alone, the normal transmission of the data is not affected, and the data transmission efficiency can be improved to a certain extent. Meanwhile, the fault detection or the return of fault information cannot be performed due to excessive data, and the controller can timely receive the fault information and process the fault information correspondingly by the aid of the independent state signals and the transmission channels, so that timeliness of fault processing is improved.

In one embodiment, each light source control chip further includes a register and a plurality of light source connection channels, each of the light source connection channels being configured to connect with one or more of the light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register; the method further comprises the steps of: and receiving an output result of any one of the light source control chips based on a register of the light source control chip, wherein each record bit of the register is used for recording whether the matched light source connecting channel fails or not, and the output result represents whether the light source control chip fails or not.

In the embodiment of the application, the record bits of the register are used for respectively recording whether the different light source connecting channels fail, so that the failure can be quickly determined according to the record bits, and the failure positioning and processing efficiency is improved.

In one embodiment, the output result is a logical operation result of the record value of each record bit.

In the embodiment of the application, the output result is required to be transmitted back to the controller so that the controller can acquire the fault condition of each light source control chip, and the output result is subjected to logic operation to obtain a logic operation result, and compared with the output result, the logic operation result is smaller, so that the data quantity required to be transmitted back to the controller is reduced, the data transmission efficiency is improved, and the timeliness of the controller for fault treatment is improved.

In one embodiment, the register records a value of 1 for the failed light source connection channel, and the output result is an or operation result; or, the register records a value of 0 for the failed light source connection channel, and the output result is an AND operation result.

In the embodiment of the application, the AND operation and OR operation can convert the output result into the data with the size of 1bit, so that the size of the output result can be minimized, the data transmission efficiency for the fault condition can be maximized, and the fault processing efficiency is further improved.

In one embodiment, the fault types of the light source control chip include a plurality of types; the light source control chip is configured to allow detection of different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller; the method further comprises the steps of: transmitting a fault detection instruction for fault detection to any light source control chip set, wherein the fault detection instruction comprises a detected fault type; and receiving a fault detection result returned by the light source control chip set and judging the fault type according to the fault detection result.

In the embodiment of the application, the controller can send the detection instruction of fault detection to the light source control chips, and the light source control chips execute corresponding fault detection and feed back the fault detection result, so that the controller can timely acquire the state of each light source control chip, timely process the faults and improve the working reliability of the backlight module.

In one embodiment, the fault types of the light source control chip include a plurality of types; the light source control chip is configured to sequentially detect different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller; the controller is configured with a preset sequence in which the light source control chip detects different types of faults, and the method further comprises: and determining the fault type of the light source control chip based on the preset sequence and the output result.

In the embodiment of the application, the light source control chip can perform fault detection according to the preset sequence, and the controller is configured with the preset sequence, so that the controller can determine the fault type according to the preset sequence and the fault detection result fed back by the light source control chip, thereby improving the positioning efficiency and the processing efficiency of the fault.

In an embodiment, the register is further configured to record, based on each record bit, whether a fault of the fault type exists in each light source connection channel when fault detection is performed for each fault type, and output a record value of each record bit in the register after the fault detection of the fault type is completed; the light source control chip is also used for determining the fault type existing in the light source control chip according to the record value of each fault type output by the register and outputting the fault code of the fault type existing in the light source control chip to the controller; the method further comprises the steps of: receiving the fault code; and judging the fault type of the light source control chip outputting the fault code based on the fault code and the corresponding relation between the preset fault code and the fault type.

In the embodiment of the application, different fault types are represented by different fault codes, and after the light source control chip fails, the controller can receive the fault codes, so that the fault type can be rapidly determined according to the fault codes, the timeliness of processing the faults is improved, and the working safety of the backlight module is further improved.

In a fifth aspect, the present application further provides another dimming method, which is applied to any one of the light source control chips in the backlight module; the backlight module comprises a controller, wherein the controller comprises a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets, and each light source control chip set comprises a plurality of light source control chips; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an (i-1) th light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an (i-1) th light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources; the dimming method comprises the following steps: receiving clock signals and data input by the controller or other light source control chips; and controlling the data to be transmitted to the controller or other light source control chips based on the clock signal.

In the embodiment of the application, the data and the clock signal are transmitted in a double-line mode, on one hand, the data transmission can be synchronized based on the clock signal, and no synchronizing signal is required to be arranged in the data, so that the data port, the first data end and the second data end can be specially used for transmitting the data or instructions, and the data transmission efficiency is improved. On the other hand, compared with the mode that the single-wire protocol needs more time corresponding to the duty ratio when controlling single transmission, when controlling data transmission by using the clock signal, the clock edge (rising edge and/or falling edge) of the clock signal is generally used for controlling the synchronization and transmission of the data, and the time of the clock edge is generally shorter, so that the time required for controlling the single-time data transmission synchronization by the clock signal is shorter, therefore, simultaneously, the number of clock edges in unit time can be increased by changing the frequency of the clock signal, the frequency of the data transmission can be increased by changing the frequency of the clock signal, and the transmission quantity of the data in unit time can be increased, thereby achieving the purpose of improving the data transmission efficiency.

In one embodiment, the light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal; the method further comprises the steps of: in response to the received acquisition instruction of the demand information: when the light source control chip indicated by the acquisition instruction is not self, the acquisition instruction is controlled to be transmitted to the connected next light source control chip based on the clock signal; when the light source control chip indicated by the acquisition instruction is self, the readback data comprising the requirement information is transmitted to the light source control chip through each light source control chip connected to the light source control chip before the self.

Compared with the single-wire protocol which only allows unidirectional transmission of the synchronous signals, the bidirectional transmission is arranged in the embodiment of the application, and the clock signal can be not required to be transmitted back by the last light source control chip in the group, so that on one hand, only one pin of the controller is required to be occupied for the group of light source control chips, and the pin use is reduced. On the other hand, after the instruction is not required to be transmitted to the last light source control chip of the group, the read-back data is fed back in sequence and is output to the controller by the last light source control chip, and the read-back data can be directly and reversely transmitted back to the controller, so that the data transmission efficiency and the response speed to the instruction can be improved.

In one embodiment, the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; the method further comprises the steps of: under the condition of normal operation of the controller, outputting a state signal comprising a first level to the controller; in case of detecting a self-failure, a status signal including a second level is output to the controller.

In the embodiment of the application, each light source control chip in the light source control chip set outputs a first level if the light source control chip is normal, outputs a second level if any one light source control chip fails, and receives a state signal of each light source control chip by using an independent state port. Therefore, the fault information is transmitted by the state signal alone, the normal transmission of the data is not affected, and the data transmission efficiency can be improved to a certain extent. Meanwhile, the fault detection or the return of fault information cannot be performed due to excessive data, and the controller can timely receive the fault information and process the fault information correspondingly by the aid of the independent state signals and the transmission channels, so that timeliness of fault processing is improved.

In one embodiment, after the outputting the status signal including the second level to the controller, the method further includes: stopping the transmission of the dimming data of the light source by the first data end and the second data end; and transmitting readback data comprising fault information to the controller based on the light source control chip before the controller.

In this embodiment, after the arbitrary light source control chip sends out the status signal of the second level, the transmission of the dimming data is stopped and the readback data including the fault information is transmitted, which is helpful for the controller to timely acquire and process the fault information of the light source control chip, and improves the safety and reliability of the backlight module.

In one embodiment, outputting a status signal to the controller comprises: the status signal is transmitted to the status port of the controller through a first status terminal and a second status terminal connected to each light source control chip before the controller.

In the embodiment of the application, the use of pins can be reduced by unidirectional transmission of the status signal from the light source control chip to the controller, thereby being beneficial to the realization of the high-partition and high-resolution backlight module.

In one embodiment, each light source control chip further includes a register and a plurality of light source connection channels, each of the light source connection channels being configured to connect with one or more of the light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register; each of the record bits is a bit of the register; the method further comprises the steps of: recording whether the matched light source connection channel fails based on each of the record bits in the register.

In the embodiment of the application, whether the light source connecting channel fails or not is recorded based on the record bit of the register, and different light source connecting channels can be respectively recorded, so that the failure can be rapidly determined based on the record of different record bits, and further the failure positioning efficiency and the timeliness of failure processing are improved. And, since the recording bit is one bit of the register, more failures of the light source connection channels can be recorded with a minimum data amount, and the data amount required for recording the failures can be reduced.

In an embodiment, after the recording of whether the matched light source connection channel fails based on each of the record bits in the register, the method further comprises: performing logic operation on the record value of each record bit in the register to obtain a logic operation result; the data size of the single logical operation result is smaller than the bit width of the register, and the logical operation result represents whether the light source control chip is faulty or not.

In an embodiment, the register performs a logic operation on a record value of each record bit in the register, where the record value of the register on the failed light source connection channel is 1, and the logic operation includes: and performing OR operation on the record value of each record bit in the register to obtain the logical operation result.

In the embodiment of the application, the OR operation can convert the output result into the data with the size of 1bit, so that the size of the output result can be minimized, the data transmission efficiency for the fault condition can be maximized, and the fault processing efficiency is further improved.

In one embodiment, the register performs a logic operation on the recorded value of each recorded bit in the register, where the recorded value of the failed light source connection channel is 0, and the logic operation includes: and performing AND operation on the record values of all record bits in the register to obtain the logical operation result.

In the embodiment of the application, the AND operation can convert the output result into the data with the size of 1bit, so that the size of the output result can be minimized, the data transmission efficiency for the fault condition can be maximized, and the fault processing efficiency is further improved.

In one embodiment, the fault types of the light source control chip include a plurality of types; the method further comprises the steps of: sequentially detecting different types of faults; and outputting different types of fault detection results to the controller.

In an embodiment, the sequentially detecting different types of faults includes: when fault detection is carried out for each fault type, based on each record bit of the register, whether the fault of the fault type exists in each light source connection channel or not is recorded, and after the fault detection of the fault type is finished, a record value of each record bit in the register is output; and determining the fault type existing in the light source control chip according to the record value of each fault type output by the register, and outputting the fault code of the fault type existing in the light source control chip to the controller.

In the embodiment of the application, different fault types are represented by different fault codes, and after the light source control chip breaks down, the fault codes are transmitted to the controller, so that the controller can quickly determine the fault type according to the fault codes, thereby improving the timeliness of fault processing and further improving the working safety of the backlight module.

In one embodiment, the dimming method further comprises: and outputting a preset fault-free code to the controller when determining that no fault exists in the light source control chip according to the record value of each fault type output by the register.

In the embodiment of the application, the fault-free code is transmitted to the controller, so that the controller can timely acquire the state of the light source control chip, the controller can control the light source control chip to effectively execute different works in a safe state, and the response efficiency of the backlight module is improved.

In a sixth aspect, an embodiment of the present application further provides a display, where the light driving circuit according to any one of the first aspect, or the backlight module according to any one of the second aspect and the third aspect.

In a seventh aspect, an embodiment of the present application further provides an electronic device, including a display according to the sixth aspect.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of an optical driving circuit according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a light source control chip according to an embodiment of the present application;

FIG. 3 is a schematic diagram illustrating a clock port sharing scheme according to an embodiment of the application;

FIG. 4 is a schematic diagram of a data trigger timing comparison according to an embodiment of the present application;

FIG. 5 is an expanded schematic diagram of an optical drive circuit according to an embodiment of the present application;

FIG. 6 is an expanded schematic diagram of a light source control chip according to an embodiment of the present application;

FIG. 7 is a schematic diagram illustrating a status port sharing according to an embodiment of the present application;

FIG. 8 is a schematic diagram of a backlight module according to an embodiment of the application;

fig. 9 is a schematic diagram of another backlight module according to an embodiment of the application.

Icon: a controller 110; a light source control chip 120; a light source 130.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. The embodiments of the application described later and the implementation of the embodiments can be combined with each other to obtain new embodiments without conflict.

Embodiment one:

In order to improve the data transmission efficiency of the backlight module, the embodiment of the application provides an optical drive circuit which can be configured in the backlight module to control the light source in the backlight module. Referring to fig. 1, fig. 1 is a schematic diagram of an optical drive circuit according to an embodiment of the application. The optical drive circuit includes: a controller 110 and a light source control chip 120.

The controller 110 is configured to output a control command and dimming data for the light source.

In this embodiment, the controller 110 may include a plurality of Data ports, that is, a Data port on the controller 110 shown in fig. 1, each Data port is used to connect to a light source control chipset, where a light source control chipset includes a plurality of light source control chips 120, and a group of light source control chips 120 and light sources connected thereto may also be referred to as a partition of the backlight module.

In this embodiment, the controller 110 may send a control command and dimming data for the light source to each light source control chip 120 of each light source control chip set through the data port.

In this embodiment, the controller 110 may be a device with a processing function, such as an FPGA (Field Programmable GATE ARRAY ), an MCU (Microcontroller Unit, microcontroller), or the like. The functions, structures, transmitted data, etc. of the controller 110 may refer to the controller 110 of the existing backlight module, and are not expanded herein.

In an embodiment of the present application, the controller 110 includes a clock port, i.e., the CLK port in the controller shown in FIG. 1.

The clock port is used for outputting a clock signal, and the controller 110 and the light source control chip 120 perform transmission of data such as dimming data and control instructions according to synchronization of the clock signal.

In some embodiments, the controller 110 clock port may include a clock circuit by which a clock signal is generated and output to each light source control chipset. In other embodiments, the clock signal may be obtained by the controller 110 from other circuits or structures, which are not limited herein.

The light source control chip 120 may be connected to the controller 110 and one or more light sources, and the light source control chip 120 may receive dimming data and control instructions of the controller 110 to perform dimming, brightness adjustment, etc. on the light sources. Illustratively, the light source control chip 120 may implement the function of an existing AMIC (Active Matrix LED DRIVER IC, active Matrix light emitting diode driving chip), and the light source may be an LED (light emitting diode).

Referring to fig. 2, fig. 2 is a schematic diagram of a light source control chip 120 according to an embodiment of the application.

The light source control chip 120 has one or more light source connection channels, each for connecting one or more light sources. The light source connection path refers to a circuit for connecting and controlling the light source on the light source control chip 120.

The light source control chip 120 further includes a first data end and a second data end, where the first data end has at least a data receiving function, and can be used to connect to a data port of the controller 110 or a second data end of another light source control chip 120, and the second data end has at least a data output function, and is used to connect to the first data end of another light source control chip 120 or to connect to a data port of the controller 110. Thus, the light source control chip 120 may receive the dimming data and the control command through the first data terminal, and output the dimming data or the control command to the other light source control chips 120 or feedback data to the controller 110 through the second data terminal. The first Data terminal and the second Data terminal may be identical in structure, and differ only in the use of configuration, and thus, the first Data terminal and the second Data terminal are denoted by Data in fig. 1. Similarly, the first clock terminal and the second clock terminal are different only in the use of configuration, and thus can be represented by CLK.

In an embodiment of the present application, the light source control chip 120 further has a first clock terminal and a second clock terminal, and the first clock terminal may be connected to the clock port of the controller 110 or to the second clock terminal of other light source control chips 120. The first clock terminal has at least a function of receiving a clock signal, and the second clock terminal has at least a function of outputting a clock signal.

In an embodiment of the present application, the light source control chip 120 is at least configured to control data or control instructions and the like according to the clock signal received by the first clock terminal, and/or output data or control instructions through the second data terminal.

Referring to fig. 1, in the embodiment of the application, the number of the light source control chips 120 is plural, and the light source control chips respectively form plural light source control chip sets. The number of light source control chips 120 of a single light source control chip set in different backlight modules is different, for example, 20, 30, 60, 75, 120, etc. light source control chips 120 in each group, in some embodiments, the number of light source control chips 120 connected to different groups may also be different, and the actual number may be configured according to the transmission efficiency between the controller 110 and the light source control chips 120 or according to the use requirement, and will not be expanded herein.

In each light source control chip set, the first data end of the first light source control chip 120 of each different light source control chip set is connected with different data ports of the controller 110; in the same light source control chip set, the first data terminal of the ith light source control chip 120 is connected with the second data terminal of the (i-1) th light source control chip 120. And, a first clock terminal of a first light source control chip 120 of each light source control chip group is connected with a clock port of the controller 110; in the same light source control chip set, the first clock terminal of the ith light source control chip 120 is connected with the second clock terminal of the i-1 th light source control chip 120.

In this embodiment, i is an integer greater than or equal to 2 and less than or equal to M, which is the total number of light source control chips 120 in the light source control chip set.

That is, in the same light source control chip set, each light source control chip 120 is sequentially connected in series, and is connected with the second data end of the previous light source control chip 120 through the first data end thereof, the second clock end thereof is connected with the first clock end of the next light source control chip 120, and the first clock end and the first data end of the first light source control chip 120 are respectively connected with the clock port and the data port of the controller 110.

By this connection, the controller 110 may transmit control data, dimming data, or the like to the different light source control chips 120 through different data ports, and output a clock signal through a clock port. Meanwhile, each light source control chip 120 is configured to control data transmission between the connected first data terminal and second data terminal based on the clock signal output from the clock port; the controller 110 is configured to control data transmission between the data port and the first data terminal of the light source control chip 120 based on the clock signal.

For example, in a certain light source control chipset, a first clock end of a first light source control chip 120 is connected to a clock port of a controller 110, a first data end is connected to a data port of the controller 110, the controller 110 sends clock signals and data to the first light source control chip 120 in the group according to clock signals, after the first light source control chip 120 receives the clock signals and the data, the first light source control chip 120 outputs corresponding data from a second data end according to the clock signals, and outputs the clock signals from the second clock end to the first data end and the second clock end of the second light source control chip 120, respectively, after the second light source control chip 120 receives the clock signals and the data, the data and the clock signal transmission process executed by the first light source control chip 120 are repeated, and the following steps are performed.

It can be appreciated that existing single-wire transmission requires that a synchronization signal is configured in the transmitted data at the same time, and the synchronization signal needs to satisfy a certain duty ratio condition, which requires that a longer time is required to satisfy the duty ratio condition for performing the synchronization process, and that the data signal also needs to satisfy the certain condition for the duty ratio, which also occupies more time.

In the embodiment of the present application, the clock port, the first clock port, and the second clock port are set to perform clock signal transmission, so that the light source control chip 120 and the controller 110 perform data transmission after synchronization based on the clock signals. On the one hand, the data transmission can be synchronized based on the clock signal, and the synchronization signal is not required to be set in the data, so that the data port, the first data terminal and the second data terminal can be specially used for data or instruction transmission, and the data transmission efficiency is improved. On the other hand, the clock signal can reduce the influence of the duty ratio (or time) required for synchronization, when the clock signal is used for controlling data transmission, the clock edge (rising edge and/or falling edge) of the clock signal is used for controlling the synchronization and transmission of the data, the time of the clock edge is usually shorter, so that the time required for synchronizing when the clock signal controls single data to be transmitted is shorter, and meanwhile, the number of clock edges in unit time can be increased by changing the frequency of the clock signal, so that the frequency of data transmission can be increased by changing the frequency of the clock signal, the transmission quantity of the data in unit time can be increased, and the purpose of improving the data transmission efficiency can be achieved. Through improving transmission efficiency, more data can be transmitted in unit time, and further realization of high resolution and high frame frequency of the backlight module is facilitated.

In some embodiments of the present application, each light source control chip 120 may also be configured to allow a first data terminal to receive and transmit data, and allow a second data terminal to receive and transmit data. The first data terminal and the second data terminal are configured to both receive data and transmit data, i.e. configured for bi-directional transmission.

In an embodiment of the present application, when the first data terminal and the second data terminal are configured to be transmitted in two directions, each light source control chip 120 may be configured to: upon receiving an acquisition instruction of the controller 110 to acquire the demand information of the light source control chip 120, the read-back data including the demand information is transmitted to the light source control chip 120 through each light source control chip 120 connected before the light source control chip 120.

The unidirectional transmission needs to enable the last light source control chip 120 of the same light source control chip set to be connected with the data port of the controller 110, so that the light source control chip 120 can transmit data back to the controller 110, and a receiving end needs to be arranged on the controller in a loop for returning the data, and the receiving end needs to use pins additionally. In contrast to unidirectional transmission, when in bidirectional transmission, data can be directly and reversely transmitted to the first light source control chip 120 and transmitted back to the controller 110 through the light source control chip 120, the last light source control chip 120 does not need to be connected with the controller 110 in the mode, so that the controller 110 does not need to additionally use pins to receive the data.

It can be appreciated that the pins of the controller 110 are limited, more data ports can be set to reserve more pins to connect more light source control chipsets, and the resolution and the partition number of the backlight module are positively related to the number of the light source control chipsets that can be connected to the controller 110, so that the reduction of the pins can be helpful for realizing high partition and high resolution of the backlight module.

In other embodiments, where the data transmission efficiency is prioritized and the pin count requirement is low, the second output of the last light source control chip 120 in the light source control chipset may be simultaneously connected to the data port of the controller 110 in the case of bi-directional transmission. In this connection manner, the light source control chip 120 may also be configured to: if the light source control chip 120 is the last k bits of the light source control chip set, the light source control chip 120 transmits data to the following light source control chip 120 to transmit the data back to the controller 110 through the last light source control chip 120. Where k may be an integer greater than or equal to M/2 and less than M.

It will be appreciated that the kth following light source control chip 120 in each light source control chip set has a shorter path for transmitting data back to the controller 110 through the last light source control chip 120. For example, there may be 30, 60, 120 or even more light source control chips 120 in one light source control chip set. The last third or second light source control chip 120 transmits data from the last light source control chip 120 back to the controller 110 far shorter than the first light source control chip 120 back to the controller 110, and reduces the delay caused by the processing of each light source control chip 120. By the mode, the data transmission efficiency can be further improved, but pins are additionally used in the mode, and the mode can be selected according to the requirements on the pins and the transmission efficiency.

As described above, the number of pins may affect the partition number and resolution of the backlight module, so in some embodiments of the present application, the pins may be reduced in other manners.

Based on the same principle as the data transmission, pin usage may also be reduced for the transmission of clock signals by bi-directional transmission, i.e. each of the light source control chips 120 is configured to allow a first clock terminal to receive and transmit clock signals and a second clock terminal to receive and transmit the clock signals. Allowing the clock signal to be transmitted bi-directionally and also eliminating the need for the last light source control chip 120 of each group to be connected to the controller 110.

For example, for any one of the light source control chip sets, the clock signal may be output from the controller 110, and sequentially transmitted to the mth light source control chip 120 via the 1 st, 2 nd and … nd light source control chip 120, and then transmitted to the M-1 st, M-2 nd and … nd, 1 st light source control chip 120 by the mth light source control chip 120, and finally transmitted back to the controller 110 by the first light source control chip 120.

In some cases, the clock signal is only transmitted in one direction, that is, only from the controller 110 to each light source control chip 120, without the need for the light source control chips 120 to transmit the clock signal back to the controller 110, and in this embodiment, each light source control chip 120 may be configured to output the clock signal through the second clock terminal, and the controller 110 transmits the clock signal to the light source control chip 120 through each light source control chip 120 connected before the light source control chip 120.

For example, for the ith light source control chip 120 in any one of the light source control chip sets, the clock signal may be output from the controller 110 and transmitted to the ith light source control chip 120 via the 1 st, 2 nd … th i-1 st light source control chip 120 in sequence.

In some embodiments of the present application, the number of clock ports may be 1 or more, and at most is the same as the number of data ports or light source control chip sets. For example, if the chipset is controlled by N light sources, the number of clock ports is 1 at the minimum and N at the maximum.

The number of clock ports of the controller 110 matches the number of data ports, i.e. each light source control chipset is connected to one clock port and one data port. Although the clock signal can be used for accurately controlling different light source control chip sets in the mode, the clock port can use more pins, which is not beneficial to the improvement of resolution and partition number.

Thus, in some embodiments of the application, the clock pins may be shared.

In an alternative embodiment, the controller 110 includes a plurality of clock ports, but the number of clock ports is less than the number of data ports. In this embodiment, the first clock terminal of the first light source control chip 120 of a part of the light source control chip sets is connected to the same clock port of the controller 110, and the first clock terminals of the remaining light source control chip sets are respectively connected to different clock ports.

In this embodiment, a part of the light source control chip sets share one clock port, that is, share one pin, for example, every two, every three or more light source control chip sets are connected with the same clock port, which can effectively reduce the pin number of the clock port. Meanwhile, as the two light source control chip sets are not all shared, different clock signals can be output by different clock ports, and different light source control chip sets can be controlled respectively, so that the control precision is improved.

In the same way, referring to fig. 3, fig. 3 is a schematic diagram illustrating a clock port sharing method according to an embodiment of the application. In other embodiments, the number of clock ports of the controller 110 is 1; the first clock terminal of the first light source control chip 120 of all light source control chip sets is connected to the clock port of the controller 110.

Because all the light source control chip sets share one clock port, that is, only one pin is used, pin data required by clock signal transmission can be reduced to the greatest extent, and further the controller 110 is facilitated to provide more pins for more light source control chip sets, so that the partition number and resolution of the backlight module are improved.

In a conventional communication protocol using clock signals, one-edge triggered data 0/1 codec is typically used, for example, referring to fig. 4, fig. 4 is a schematic diagram of mid-data triggered timing comparison according to an embodiment of the present application. When the clock signal is a rising edge, the data 0/1 encoding and decoding memory operation is triggered once during single-edge triggering.

In an embodiment of the present application, all of the light source control chips 120 and the controller 110 may be configured to trigger a data codec operation based on the rising and falling edges of the clock signal. That is, the dual edge trigger, whether rising or falling, can trigger the data encoding and decoding operations. As shown in fig. 4, under the condition that the clock signal is unchanged, the frequency of the data trigger coding and decoding operation can be effectively increased by double-edge triggering, and further, the data transmission efficiency can be effectively improved.

In the single-wire protocol, if the fault detection needs to be performed on each light source control chip 120, the controller 110 sends an instruction for obtaining the fault state of each light source control chip 120 to one partitioned light source control chip 120 (or one light source control chip group), the controller 110 sends the instruction to the first light source control chip 120 of the group, and after each light source control chip 120 receives the instruction, the controller sequentially sends the control instruction to the next light source control chip 120 until the last light source control chip 120 receives the control instruction. Then, each light source control chip 120 obtains the readback information representing the fault state, and sequentially transmits the readback information to the next light source control chip 120 until the last light source control chip 120 transmits all the readback information to the driving controller 110, and the driving controller 110 determines and processes the fault after receiving the readback information.

The timeliness of the method is low, two rounds of data transmission controllers 110 are needed to acquire the read-back data, and each round of data transmission needs to output corresponding data by the last light source control chip 120, so that the efficiency is low. In the single-wire protocol mode, the failed readback data is sent together with the dimming data of the light source, so that for one light source control chip 120, the single-wire protocol only can enable the light source control chip 120 to wait for the dimming data to be sent after the completion of the transmission of the dimming data, and then the readback data is sent out, the subsequent light source control chips 120 also repeat the operation, the last light source control chip 120 returns the readback data, and if the dimming data is too large, each light source control chip 120 needs to wait for a long time, particularly, when the dimming data is written in the initial stage, the readback data needs to be fed back for a long time. Whereas the readback data of the fault information has a certain size and the fault types are too many, for example, the existing fault data includes open circuit, over temperature and CRC (Cyclic Redundancy Check ) data, each type is represented with 8bit data, which may cause the readback data of the fault information to reach 1/4 of the dimming data. At high frame rates or high partition numbers, time is not allowed for transmission of faulty readback data. This results in untimely fault monitoring, handling and even failure to monitor and handle the fault.

In the embodiment of the application, the data transmission is synchronized by the clock signal in a double-wire transmission mode, so that the bandwidth is greatly improved, the practical application bandwidth of 16M can be even higher through testing, the data bandwidth (maximum 1 MHz) of the existing single-wire protocol is improved by more than 10 times, and because the data transmission speed is high, more time can be needed for carrying out some instruction operations, such as fault detection, the flexibility of practical application can be effectively improved, if an IC fault needs to be processed, the problem can be solved more quickly, and the damage risk of the light source control chip 120 is greatly reduced. At the same time, the realization of high partition number and high refresh rate (frame frequency) is facilitated, for example, the original maximum transmission speed of the single-wire protocol is 1MHz, the number of the carried loads (or called partition number) supported by the single-wire protocol is 868 if the refresh rate is 60Hz, the number of the carried loads supported by the single-wire protocol is 434 if the refresh rate is 120Hz, and the number of the carried loads supported by the single-wire protocol is 217 if the refresh rate is 240 Hz. The load number required by the conventional resolution is 360 or 480, and the like, and the transmission efficiency reaches 16MHz by using the double-line transmission mode, so that the requirements of the conventional resolution on the partition number, the refresh rate and the resolution can be effectively met.

Meanwhile, by means of bidirectional transmission, data can be sent and read back directly, and the last light source control chip 120 of each group is not required to pull the data line to the controller 110 again, and each link can only have 2 communication signals (data and clock signals).

Meanwhile, the transmission efficiency of the two-wire communication is improved, the data can be transmitted in a longer link in unit time, the limitation of the frame frequency of the system can be reduced, and more light sources can be cascaded in one light source control chip set. For example, in the same light source control chipset, a plurality of light source control chips 120 need to be connected in series, the data transmission path is long, and the transmission amount and transmission efficiency of single data of a single wire protocol are limited, so that the time for single data transmission is long, for example, the maximum data bandwidth of the single wire protocol is 1Mbps, in the case of cascading 30 light source control chips 120 with a frame frequency of 60Hz, the clock required for data transmission is 15.4ms if the transmission speed of 300KHz is clock, and the time required for data transmission is 4.6ms if the transmission speed of 1Mbps is used, and after the cascading light source control chips 120 are doubled, the time is doubled after 30 to 60. The improvement of the transmission efficiency, for example, up to 16MHz, can effectively reduce the transmission time between the same number of light source control chips 120, and accordingly, the transmission time can be increased to more light source control chips 120.

Therefore, the backlight module can be promoted in a high-partition, high-frame frequency and high-resolution mode by a bidirectional and/or double-line transmission mode.

In the embodiment of the application, the transmission efficiency can be further improved in other manners.

In one embodiment, the controller 110 further includes a status port; the light source control chip 120 includes a first status terminal and a second status terminal; in the same light source control chip set, a first state end of an ith light source control chip 120 is connected with a second state end of an ith-1 light source control chip 120; the first status terminal of the first light source control chip 120 of each light source control chip set is connected to the status port of the controller 110.

For example, referring to fig. 5 and 6, fig. 5 is an expanded schematic diagram of an optical driving circuit according to an embodiment of the application, and fig. 6 and 5 are expanded schematic diagrams of a light source control chip 120 according to an embodiment of the application. Status characterizes a Status signal, and the ports on the controller 110 and the light source control 120 that receive the Status signal are Status ports. Similar to the clock port, the data port, in this embodiment, between the controller 110 and the light source control chip 120, between the light source control chip 120 and the light source control chip 120, are also connected in series through the status port, the first status terminal, and the second status terminal.

In this embodiment, the second status terminal of each light source control chip 120 is configured to receive the status signal output by the following light source control chip 120, and the first status terminal is configured to output the status signal of itself and the status signal of the following light source control chip 120. The status port of the controller 110 is used for status signals of the connected light source control chipset.

In this embodiment, the light source control chip 120 is configured to output a status signal including a first level to the controller 110 in case that the light source control chip 120 is normally operated; the light source control chip 120 is configured to output a status signal including a second level to the controller 110 in case of detecting a self-failure. The first level and the second level may be opposite levels, e.g., 0 and 1, the first level being 0 and the second level being 1.

Through the status port, the status port of the controller 110 can determine that the light source control chip 120 has a fault when receiving the second level signal, and then can perform fault detection and processing in time. Compared with a single-wire protocol, the transmission of the fault information is independent, so that the efficiency of fault determination can be effectively improved, the readback data of the fault information is not required to be sent after the light source control chips 120 send the dimming data, the situation that the light source control chips 120 do not send the fault information when the data are excessive is effectively avoided, and the working safety of the backlight module is improved.

In addition, the data port, the first data end and the second data end can be dedicated for transmitting data and control instructions, and no fault information is required to be fed back to the controller 110 under the fault-free condition, so that unnecessary data transmission is reduced, the effectiveness of data transmission is improved, and the efficiency of data transmission is improved.

In an embodiment of the present application, the number of status ports and the number of data ports may be the same; the first status terminals of the first light source control chip 120 of the different light source control chip sets are respectively connected with the different status ports of the different controllers 110.

In this embodiment, each light source control chipset may be connected to a status port, and in this manner, the controller 110 may determine the light source control chipset where the fault is located according to the status port that receives the status signal including the second level, which facilitates quick location and processing of the fault.

While clock ports are similar, status ports may also consider reducing pin usage by sharing pins. Referring to fig. 7, fig. 7 is a schematic diagram showing status ports in common according to an embodiment of the application, in which the number of status ports is 1; the first status terminal of the first light source control chip 120 of all light source control chip sets is connected to the status port of the controller 110. This approach can minimize the number of pins required for the status port.

In yet other embodiments, the number of status ports is greater than 1 and less than the number of data ports; the first status end of the first light source control chip 120 of the partial light source control chip set is connected with the same status port of the controller 110; the first status terminal of the first light source control chip 120 of the remaining light source control chip sets is connected to a different status port of the controller 110. Through the mode of partial sharing, the number of pins can be considered, and the fault can be positioned, but the single efficiency is not as good as the two modes, and the single efficiency can be selected according to the actual requirements.

In some embodiments, the status signal is generally only required to be transmitted from the light source control chip 120 to the controller 110, and thus, in an embodiment of the present application, each light source control chip 120 may be configured to output the status signal through the first status terminal and transmit the status signal to the controller 110 through each light source control chip 120 connected before the light source control chip 120. I.e., configured for unidirectional transmission from the light source control chip 120 to the controller 110, whereby only one state pin is required for one light source control chip set, reducing pin usage.

In other embodiments, the status signals may be bi-directionally transmitted, i.e., each light source control chip 120 is configured to allow the first status terminal to receive and transmit status signals and the second data terminal to receive and transmit status signals. In this embodiment, since the frequency of use of the status signal is low, bidirectional transmission may be configured to transmit some instructions through the status port, so as to reduce the amount of data required to be transmitted by the data port and improve the data transmission efficiency. But this approach may affect the transmission of the status signal and may therefore be selected for use as desired.

In the embodiment of the present application, after receiving the status signal including the second level, the controller 110 may control the light source control chipset corresponding to the status port to stop transmitting the dimming data, and make the data port, the first data terminal, and the second data terminal transmit only the data related to the fault information. Therefore, the data port, the first data end and the second data can be dedicated for transmitting fault information under the fault condition, so that the controller 110 can timely receive and process the fault information, the fault positioning and processing efficiency is improved, and the working safety of the backlight module is improved.

The light source control chip 120 includes a plurality of light source connection channels, and the light source control chip 120 can perform fault detection on each light source connection channel, and if any light source connection channel has a fault, information representing the fault of the channel is output. In an embodiment of the present application, a register may be configured in the light source control chip 120 to record fault information of each channel through the register.

In this embodiment, the register includes a plurality of record bits, and each light source connection channel of the light source control chip 120 is matched with one record bit of the register; each record bit in the register is configured to record whether the matched light source connection channel is faulty.

The register may register data of a plurality of bits, for example, an 8-bit register may store data of 8 bits, and in an embodiment of the present application, the 8 bits may be divided according to the number of light source connection channels to obtain a plurality of record bits, each record bit corresponds to one light source connection channel, and whether the channel fails is recorded by a record value. For example, one light source control chip 120 is provided with 8 or 4 light source connection channels, and if 8, the 8 bits are divided into 8 recording bits, one recording as corresponding to 1bit, in which case a fault or a non-fault can be characterized using 0 or 1, respectively. If there are 4 channels, the 8bit is divided into 4 record bits, each record is corresponding to 2bit, in which case, besides the fault and the non-fault, the cause of the fault can be further distinguished, for example, each light source connection channel is connected with 3k light sources, 00 indicates no fault, 01 indicates 1 st to k light source faults, 10 indicates k to 2k light source faults, 11 indicates 2k to 3k light source faults, and k is a positive integer. As another example, 00 indicates no fault, 01 indicates a short circuit fault, 10 indicates an open circuit fault, and 11 indicates other faults. The foregoing is by way of example only and should not be construed as limiting the application.

Faults of different light source connection channels can be recorded respectively through recording bits of the register, and the fault light source connection channels can be determined quickly through data of the register.

In an embodiment of the present application, each record bit is a bit of a register. One bit corresponds to one record bit, and this way, the fault information of more channels can be recorded by using the bit of the register to the greatest extent, so that the light source control chip 120 can be connected with more light sources.

In some other embodiments, one record bit may correspond to multiple bits of the register, for example, one record bit corresponds to 2 bits, 3 bits, etc., and even the number of bits recorded as corresponding by different records in the same register may be different, which is not limited herein.

The data recorded by each register is data representing whether each light source connection channel is in need of being sent to the controller 110, so that the controller 110 determines the fault and processes the fault in time. The complete data output by the register is larger, for example, the data size of the 8-bit register data is 2 ⁸ bytes, which makes the data volume of fault information transmission larger and influences the data transmission efficiency.

In an embodiment of the present application, the light source control chip 120 is further configured to perform a logic operation on the record value of each record bit in the register, so as to obtain a logic operation result; the data size of the single logical operation result is smaller than the bit width of the register, and the logical operation result represents whether the light source control chip 120 is faulty or not.

In this embodiment, the logic circuit provided at the output end of the register may perform logic operation, or the processing core of the light source control chip 120 may perform calculation, which is not limited herein.

In this embodiment, the recorded values of different recorded bits are subjected to logical operations, such as or operation, and operation, exclusive or operation, etc., or a combination of multiple logical operations, where the logical operation result is smaller than the bit width of the register, for example, the bit width of the register is 8 bits, the logical operation result after the logical operation is 1bit, 2bit, 3bit, etc., and the logical operation result is output to the controller 110, so that the data amount output to the controller 110 can be reduced.

Since the size of the data is not matched with the number of channels after the logic operation, the size of the data cannot be used to characterize the failed light source connection channel, but is used to characterize whether the light source control chip 120 fails. For example, a normal value is represented by 0 and a fault value is represented by 1, and the values of the register record bits are 01000000, that is, there are 1 light source connection channel faults, and after a logic operation is performed, the logic operation result is 1, and the logic operation result can only indicate that there are light source connection channel connections, which is equivalent to that the light source control chip 120 has faults. Therefore, only 1 needs to be output to the controller 110, and compared with the output 01000000, the data quantity required to be transmitted is effectively reduced.

There are a variety of types of logical operations, examples of which are provided herein for illustration.

In one embodiment, the register-to-fault light source connection channel has a record value of 1, and the light source control chip 120 is configured to perform an or operation on the record value of each record bit in the register, so as to obtain a logic operation result.

In another embodiment, the register value of the failed light source connection channel is 0, and the light source control chip 120 is configured to perform an and operation on the record value of each record bit in the register, so as to obtain a logical operation result.

The and operation or the or operation can minimize the data amount of the logic calculation result, and in some other embodiments, other logic operation manners can be configured, which are only examples and should not be limiting to the present application.

The fault type of the light source control chip 120 includes various types including, but not limited to, a short circuit fault, an open circuit fault, an over-temperature fault, a CRC fault, a boost fault, a buck fault, etc. The light source control chip 120 may detect different types of faults.

In one embodiment, the light source control chip 120 may be configured to detect different types of faults in turn; the light source control chip 120 is also used for outputting different types of fault detection results to the controller 110. Wherein the fault detection result may only include whether there is a fault of the detected type, e.g. a fault is indicated by 1 and no fault is indicated by 0. The controller 110 is configured with a sequence of the types of the faults detected by the light source control chip 120, so as to determine the type of the faults of the light source control chip 120 according to the sequence and the fault detection result fed back by the light source control chip 120. In this way, the controller 110 can be enabled to quickly locate the fault type for timely processing.

In another embodiment of the present application, the light source control chip 120 may be configured to sequentially detect different types of faults; the light source control chip 120 is configured to output different types of fault detection results to the controller 110, and the fault detection results may include identification information of the type of fault, for example, 000 indicates no fault, 001 indicates an over temperature, 010 indicates a short circuit, 011 indicates a CRC anomaly, 100 indicates a power failure, 101 indicates an over voltage, 110 indicates an under voltage, and different fault types are identified with different identification information.

In this embodiment, the register is further configured to record, based on each of the record bits, whether a fault of the fault type exists in each of the light source connection channels when the fault detection is performed for each of the fault types, and output a record value of each of the record bits in the register after the fault detection of the fault type is completed; the light source control chip 120 is further configured to determine a fault type existing in the light source control chip 120 according to the recorded value of each fault type output by the register, and output a fault code of the fault type existing in the light source control chip 120 to the controller 110. And the light source control chip 120 is further configured to output a preset fault-free code to the controller 110 when it is determined that there is no fault in the light source control chip 120 according to the record value of each fault type output by the register.

Wherein the fault code and the fault-free code are one type of identification information. When multiple types of faults exist at the same time, the fault types can be reported one by one according to the pre-configured priority. Through fault coding, the controller 110 can quickly determine the fault type to process accordingly, and timeliness of fault processing is improved. Meanwhile, the type of fault is usually smaller than the data size of the register, for example, an 8-bit register is taken as an example, the data size of single data is 256 bytes, and the type of fault is usually smaller than 256 types, for example, in some detection schemes with finer settings, the types of possible faults are 8 types, 16 types and the like, and the register stores different faults respectively, for example, 8 faults need to output 8 256 bytes of data, so compared with the direct output of the data by the register, the conversion into fault codes can effectively reduce the data size required to be transmitted.

Embodiment two:

based on the same inventive concept, the present application also provides a backlight module, please refer to fig. 8, fig. 8 is a schematic diagram of the backlight module of the present application. The backlight module comprises: a plurality of light sources 130 and the light driving circuit of any one of the embodiments.

In the backlight module, each light source 130 is connected to each light source control chip 120 in the light driving circuit, and each light source connection channel of each light source control chip 120 can be connected to one or more light sources. The optical driving circuit can refer to the first embodiment, and will not be described herein. The light source 130 may be an LED or other light emitting device.

Embodiment III:

Based on the same inventive concept, the present application also provides a backlight module, referring to fig. 9, and fig. 9 is a schematic diagram of another backlight module according to an embodiment of the present application. The backlight module comprises: a controller 110, a plurality of light source control chipsets and a plurality of light sources 130.

The controller 110 includes a clock port, a status port, and a plurality of data ports.

Each light source control chip set includes a plurality of light source control chips 120; the light source control chip 120 includes a first data terminal and a second data terminal, a first clock terminal and a second clock terminal, and a first status terminal and a second status terminal.

The plurality of light sources 130 are connected to the respective light source control chips 120.

In this embodiment, the first data terminals of the respective first light source control chips 120 of the different light source control chip sets are respectively connected to different data ports of the controller 110; in the same light source control chip set, a first data end of an ith light source control chip 120 is connected with a second data end of an ith-1 light source control chip 120, i is an integer greater than or equal to 2 and less than or equal to M, and M is the total number of the light source control chips 120 in the light source control chip set.

The first clock end of the first light source control chip 120 of each light source control chip group is connected with the clock port of the controller 110; in the same light source control chip set, the first clock terminal of the ith light source control chip 120 is connected with the second clock terminal of the i-1 th light source control chip 120.

Each light source control chip 120 is configured to control data transmission between the connected first data terminal and the second data terminal based on a clock signal output from the clock port; the controller 110 is configured to control data transmission between the data port and the first data terminal of the light source control chip 120 based on the clock signal.

That is, two-wire communication is performed between the controller 110 and the light source control chip 120, and between the light source control chip 120 and the light source control chip 120 based on clock and data.

Each light source control chip 120 is configured to allow the first data side to receive and transmit data, and allow the second data side to receive and transmit data; each light source control chip 120 is further configured to allow the first clock terminal to receive and transmit clock signals and to allow the second clock terminal to receive and transmit clock signals.

Each of the light source control chips 120 is configured to: upon receiving an acquisition instruction for the controller 110 to acquire the demand information of the light source control chip 120, the read-back data including the demand information is transmitted to the light source control chip 120 through each of the light source control chips 120 connected before the light source control chip 120.

That is, in this embodiment, both data and clock signals can be bi-directionally communicated, the controller 110 can send an instruction to obtain information of any one of the light source control chips 120, and the light source control chips 120 can send the required information to the controller 110 through each of the light source control chips 120 connected between the chips.

In addition, a link for transmitting status signals is further provided, and a first status end of the first light source control chip 120 of each light source control chip group is connected with a status port of the controller 110; in the same light source control chip set, a first state end of an ith light source control chip 120 is connected with a second state end of an ith-1 light source control chip 120; the light source control chip 120 is configured to output a status signal including a first level to the controller 110 in case the light source control chip 120 is operating normally; the light source control chip 120 is configured to output a status signal including a second level to the controller 110 in case of detecting a self-failure; each light source control chip 120 is configured to output a status signal through the first status terminal, and transmit the status signal to the controller 110 through each light source control chip 120 connected before the light source control chip 120. The status link may be dedicated to the transmission of status signals, outputting a second level upon failure, so that the controller 110 is informed of the failed light source control chip 120 in time, thereby processing the failed chip in time.

Each light source control chip 120 further includes a register and a plurality of light source connection channels, each light source connection channel for connection with one or more light sources; the register includes a plurality of record bits, each light source connection channel of the light source control chip 120 is matched with one of the record bits of the register, and each record bit is one bit of the register; each record bit in the register is configured to record whether the matched light source connection channel is faulty. Each light source control chip 120 is provided with a register, each bit of the register is used for recording whether one light source connection channel fails, therefore, the light source connection channel where the failure is located can be determined according to the record bits of different registers, and the record value recorded by the register can be sent to the data port of the controller 110 through the first data end and the light source control chip 120 connected in advance, so that the controller 110 performs failure positioning according to the record value of the fed back register.

The fault type of the light source control chip 120 includes various types; the light source control chip 120 is configured to sequentially detect different types of faults; the register is also used for recording the detection result of each type of faults based on the recorded values, and outputting the recorded values of the type of fault detection by the register after the detection of each type of faults is finished. The light source control chip 120 may perform detection of different types of fault detection, and different types of fault detection results may be output, respectively, so that the controller 110 may determine the fault type according to the different fault detection results.

The register-to-fault light source connection channel has a record value of 1, and the light source control chip 120 is further configured to perform an or operation on the record value of each record bit in the register, so as to obtain a logic operation result; the data size of the single logical operation result is smaller than the sum of the data sizes of all the recorded values of the registers, and the logical operation result characterizes whether the light source control chip 120 is faulty or not. For the detection result of each type of faults, the logical operation result can be output after OR operation, so that the data can be changed into 1byte, and the size of the data is reduced.

In the backlight module, the two wires, the two directions and the use of a single status link to send status signals and perform logic operation on the failure detection result can effectively improve the data transmission efficiency, so that the backlight module can be connected with more light source control chip sets and/or each light source control chip set is connected with more light source control chips 120. And the independent state link is used for sending a state signal, a register is used for recording faults, and the timeliness of fault positioning and processing can be improved by carrying out logic operation on the fault detection result, so that the backlight module has higher working safety while the resolution, the partition number and/or the refresh rate are improved.

Embodiment four:

based on the same inventive concept, the embodiment of the application also provides a dimming method which can be applied to the controller in the backlight module in any embodiment.

Wherein the controller includes a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets and a plurality of light sources, each light source control chip set comprises a plurality of light source control chips, and each light source control chip is connected with one or a plurality of light sources; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources. The backlight module may have other structures, and reference may be made to embodiments 1 to 3, which are not developed here.

The dimming method applied to the controller comprises the following steps: and sending clock signals and data to the light source control chips of the light source control chip groups so that the light source control chips in each light source control chip group transmit among the light source control chips in the light source control chip group based on the clock signals.

In one embodiment, the light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal and to allow the second clock terminal to receive and transmit the clock signal. The dimming method further comprises the following steps: when an acquisition instruction for the demand information is sent to any one of the target light source control chips, the acquisition instruction is transmitted to the target light source control chip through each light source control chip in front of the target light source control chip; and receiving readback data transmission comprising the requirement information, wherein the readback data transmission comprises the requirement information and is transmitted back by each light source control chip before the target light source control chip passes through the target light source control chip.

In one embodiment, the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, a first state end of an ith light source control chip is connected with a second state end of an ith-1 light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; the light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip is operating normally; the light source control chip is configured to output a status signal including a second level to the controller in the event of detecting a self-failure. The dimming method further comprises the following steps: and under the condition that a status signal which is output by any one light source control chip group and comprises a second level is received, stopping transmitting light source dimming data to the light source control chip group, and acquiring readback data which comprises fault information and is output by the light source control chip group based on a data port.

In one embodiment, each light source control chip further comprises a register and a plurality of light source connection channels, each light source connection channel being used for connecting with one or more light sources; the register includes a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register. The dimming method further comprises the following steps: and receiving an output result of any light source control chip based on a register of the light source control chip, wherein each record bit of the register is used for recording whether the matched light source connecting channel fails or not, and the output result represents whether the light source control chip fails or not.

In one embodiment, the register records 1 as a value of the failed light source connection channel, and outputs an OR operation result; or the register records the value of 0 to the failed light source connecting channel, and the output result is the AND operation result.

In one embodiment, the fault types of the light source control chip include a plurality of types; the light source control chip is configured to allow detection of different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller; the dimming method further comprises the following steps: transmitting a fault detection instruction for fault detection to any light source control chip set, wherein the fault detection instruction comprises a detected fault type; and receiving a fault detection result transmitted back by the light source control chip set and judging the fault type of the light source control chip in the light source control chip set according to the fault detection result.

In one embodiment, the fault types of the light source control chip include a plurality of types; the light source control chip is configured to sequentially detect different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller; the controller is configured with a preset sequence of the light source control chip detecting different types of faults, and the dimming method further comprises: and determining the fault type of the light source control chip based on a preset sequence and the output result.

In an embodiment, the register is further configured to record, based on each record bit, whether a fault of the fault type exists in each light source connection channel when fault detection is performed for each fault type, and output a record value of each record bit in the register after the fault detection of the fault type is completed; the light source control chip is also used for determining the fault type existing in the light source control chip according to the record value of each fault type output by the register and outputting the fault code of the fault type existing in the light source control chip to the controller; the dimming method further comprises the following steps: receiving a fault code; based on the fault code and the corresponding relation between the preset fault code and the fault type, judging the fault type of the light source control chip outputting the fault code.

The specific content of the dimming method applied to the controller is similar to the functions implemented by the controller in the light driving circuit or the backlight module, and the specific content can be referred to herein and will not be expanded.

Fifth embodiment:

The embodiment of the application also provides a dimming method which is applied to any one light source control chip in the backlight module. The backlight module comprises a controller, wherein the controller comprises a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets, and each light source control chip set comprises a plurality of light source control chips; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of the different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an (i-1) th light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an (i-1) th light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources. The backlight module may further include other structures, and reference may be made to embodiment 2 or 3, which will not be further developed herein.

The dimming method applied to the light source control chip comprises the following steps:

and step1, receiving clock signals and data input by a controller or other light source control chips.

And 2, controlling data transmission to a controller or other light source control chips based on the clock signal.

In one embodiment, the light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal and to allow the second clock terminal to receive and transmit the clock signal. The method of dimming further comprises: in response to the received acquisition instruction of the demand information: when the light source control chip indicated by the acquisition instruction is not self, transmitting the acquisition instruction to the next connected light source control chip based on clock signal control; when the light source control chip indicated by the acquisition instruction is self, the readback data comprising the requirement information is transmitted to the light source control chip through each light source control chip connected to the light source control chip before the acquisition instruction.

In one embodiment, the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, a first state end of an ith light source control chip is connected with a second state end of an ith-1 light source control chip; the first status end of the first light source control chip of each light source control chip group is connected with the status port of the controller. The dimming method further comprises the following steps: under the condition of normal operation of the controller, outputting a state signal comprising a first level to the controller; in the event of a self-failure being detected, a status signal including a second level is output to the controller.

In one embodiment, outputting the status signal to the controller includes: the status signal is transmitted to the status port of the controller through the first status terminal and the second status terminal of each light source control chip connected in front of the controller.

In one embodiment, each light source control chip further comprises a register and a plurality of light source connection channels, each light source connection channel being used for connecting with one or more of the light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register; each of the record bits is a bit of the register. The dimming method further comprises the following steps: whether the matched light source connection channel fails is recorded based on each record bit in the register.

In one embodiment, the register performs a logic operation on a record value of a failed light source connection channel as 1 and a record value of each record bit in the register, including: and performing OR operation on the record value of each record bit in the register to obtain a logic operation result.

In one embodiment, the register performs a logic operation on a record value of a failed light source connection channel as 0 and a record value of each record bit in the register, including: and performing AND operation on the record values of all record bits in the register to obtain a logical operation result.

In one embodiment, the fault types of the light source control chip include a plurality of types. The dimming method further comprises the following steps: sequentially detecting different types of faults; and outputting different types of fault detection results to the controller.

In one embodiment, sequentially detecting different types of faults includes: when fault detection is carried out for each fault type, based on each record bit of a register, whether the fault of the fault type exists in each light source connecting channel or not is recorded respectively, and after the fault detection of the fault type is finished, the record value of each record bit in the register is output; and determining the fault type existing in the light source control chip according to the record value of each fault type output by the register, and outputting the fault code of the fault type existing in the light source control chip to the controller.

The dimming method applied to the light source control chip may refer to the functions implemented by the light source control chip in embodiments 1 to 3, and will not be described herein.

Example six:

Based on the same inventive concept, the embodiment of the application also provides a display, which may include a display panel and the backlight module provided by the above embodiment. Other structures of the display are possible, and reference is made in particular to the prior art, which is not further developed here.

Embodiment seven:

based on the same inventive concept, the embodiment of the present application also provides an electronic device including the display provided in the above embodiment.

In an embodiment of the application, the electronic device may be a discrete device, for example, the electronic device may be a computer including a host and a display. The electronic device may also be an integrated device, for example, the electronic device may be an electronic device in which a processor and a display of a mobile phone, a tablet computer, a television, etc. are integrated in the same housing. There is no limitation in this regard.

The technical features of the above embodiments can be freely combined without conflict, and the combined embodiments are covered in the protection scope of the application.

The above detailed description of embodiments of the application provided in the accompanying drawings is not intended to limit the scope of the application as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.

In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the term "connected" should be construed broadly, and may be a fixed connection, a removable connection, or an integral connection, for example; may be an electrical connection; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. An optical drive circuit, comprising:

a controller including a clock port and a plurality of data ports;

A plurality of light source control chip sets, each of the light source control chip sets including a plurality of light source control chips; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end;

The first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than or equal to M, and M is the total number of the light source control chips in the light source control chip set;

The first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip;

wherein each light source control chip is configured to control data transmission between the connected first data terminal and second data terminal based on a clock signal output by the clock port; the controller is configured to control data transmission between the data port and a first data terminal of the light source control chip based on the clock signal;

the controller also includes a status port;

the light source control chip comprises a first state end and a second state end;

in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip;

the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller;

The light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally;

the light source control chip is configured to output a state signal including a second level to the controller in the event of detecting a self-failure;

Each light source control chip further comprises a register and a plurality of light source connecting channels, and each light source connecting channel is used for being connected with one or a plurality of light sources;

The register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register;

each of the record bits in the register is configured to record whether the matched light source connection channel is faulty.

2. The light-driven circuit according to claim 1, wherein,

Each light source control chip is configured to allow the first data terminal to receive and transmit data, and to allow the second data terminal to receive and transmit data.

3. The light driving circuit of claim 2, wherein each of the light source control chips is configured to allow the first clock terminal to receive and transmit the clock signal and to allow the second clock terminal to receive and transmit the clock signal.

4. The light driving circuit of claim 2, wherein each light source control chip is configured to output the clock signal through the second clock terminal, and the controller transmits the clock signal to the light source control chip through each light source control chip connected before the light source control chip.

5. The light driving circuit of claim 2, wherein each of the light source control chips is configured to: and under the condition that an acquisition instruction of acquiring the demand information of the light source control chip by the controller is received, transmitting readback data comprising the demand information to the light source control chip through each light source control chip connected to the front of the light source control chip.

6. The optical drive circuit of any one of claims 1-5, wherein the controller comprises a plurality of the clock ports; the first clock ends of the first light source control chips of part of the light source control chip sets are connected with the same clock port of the controller, and the first clock ends of the rest light source control chip sets are respectively connected with different clock ports.

7. The optical drive circuit according to any one of claims 1 to 5, wherein the number of clock ports of the controller is 1; the first clock end of the first light source control chip of all the light source control chip sets is connected with the clock port of the controller.

8. The light-driven circuit of any one of claims 1-5, wherein all of the light source control chips and the controller are configured to trigger a data-only codec operation based on rising and falling edges of the clock signal.

9. The optical drive circuit of claim 1, wherein the number of status ports is the same as the number of data ports; the first state ends of the first light source control chips of different light source control chip sets are respectively connected with different state ports of different controllers.

10. The optical drive circuit of claim 1, wherein the number of status ports is greater than 1 and less than the number of data ports; the first state end of the first light source control chip of part of the light source control chip sets is connected with the same state port of the controller;

The first state ends of the rest light source control chips are connected with different state ports of the controller.

11. The optical drive circuit of claim 1, wherein the number of status ports is 1;

The first status end of the first light source control chip of all the light source control chip sets is connected with the status port of the controller.

12. The light-driven circuit according to claim 1, wherein,

Each light source control chip is configured to output the status signal through the first status terminal and transmit the status signal to the controller through each light source control chip connected in front of the light source control chip.

13. The optical drive circuit of claim 1, wherein each of the record bits is one bit of the register.

14. The light driving circuit according to claim 1, wherein the light source control chip is further configured to perform a logic operation on the recorded value of each recorded bit in the register to obtain a logic operation result;

the data size of the single logical operation result is smaller than the bit width of the register, and the logical operation result represents whether the light source control chip is faulty or not.

15. The light driving circuit according to claim 14, wherein the register has a recorded value of 1 for a failed light source connection channel, and the light source control chip is configured to perform an or operation on the recorded value of each recorded bit in the register to obtain the logical operation result.

16. The light driving circuit according to claim 14, wherein the register has a recorded value of 0 for a failed light source connection channel, and the light source control chip is configured to perform an and operation on the recorded value of each recorded bit in the register to obtain the logical operation result.

17. The light driving circuit according to claim 1, wherein the failure type of the light source control chip includes a plurality of types; the light source control chip is configured to sequentially detect different types of faults;

The light source control chip is also used for outputting different types of fault detection results to the controller.

18. The optical drive circuit of claim 17, wherein,

The register is further configured to record, based on each record bit, whether each light source connection channel has a fault of the fault type when performing fault detection for each fault type, and output a record value of each record bit in the register after the fault detection of the fault type is completed;

The light source control chip is also used for determining the fault type existing in the light source control chip according to the record value of each fault type output by the register and outputting the fault code of the fault type existing in the light source control chip to the controller.

19. The light driving circuit as recited in claim 18 wherein the light source control chip is further configured to output a predetermined fault-free code to the controller when it is determined that there is no fault in the light source control chip based on the recorded value of each fault type output by the register.

20. A backlight module, comprising: a plurality of light sources and a light driving circuit as claimed in any one of claims 1 to 19;

Each light source is respectively connected with each light source control chip in the light driving circuit.

21. A backlight module, comprising: a controller, a plurality of light source control chipsets and a plurality of light sources;

The controller comprises a clock port, a status port and a plurality of data ports;

each light source control chip group comprises a plurality of light source control chips; the light source control chip comprises a first data end, a second data end, a first clock end, a second clock end, a first state end and a second state end;

Each light source control chip is configured to control data transmission between the first data terminal and the second data terminal which are connected based on a clock signal output by the clock port; the controller is configured to control data transmission between the data port and a first data terminal of the light source control chip based on the clock signal;

Each light source control chip is configured to allow the first data terminal to receive and transmit data, and allow the second data terminal to receive and transmit data; each of the light source control chips is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal;

Each of the light source control chips is configured to: transmitting readback data comprising the requirement information to the light source control chips through each light source control chip connected to the front of the light source control chip under the condition that an acquisition instruction of the controller for acquiring the requirement information of the light source control chip is received;

the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip;

The light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally; the light source control chip is configured to output a state signal including a second level to the controller in the event of detecting a self-failure; wherein each light source control chip is configured to output the status signal through the first status terminal and transmit the status signal to the controller through each light source control chip connected to the front of the light source control chip;

Each light source control chip further comprises a register and a plurality of light source connecting channels, and each light source connecting channel is used for being connected with one or a plurality of light sources; the register comprises a plurality of record bits, each light source connection channel of the light source control chip is matched with one record bit of the register, and each record bit is one bit of the register; each of the record bits in the register is configured to record whether the matched light source connection channel is faulty;

The fault types of the light source control chip comprise a plurality of types; the light source control chip is configured to sequentially detect different types of faults; the register is also used for recording the detection result of each type of faults based on the record value, and outputting the record value of the type of fault detection by the register after the detection of each type of faults is finished;

The register is used for carrying out OR operation on the recorded value of each recorded bit in the register to obtain a logic operation result, wherein the recorded value of the register on the failed light source connecting channel is 1; the data size of the single logical operation result is smaller than the sum of the data sizes of all recorded values of the register, and the logical operation result represents whether the light source control chip is faulty or not.

22. The dimming method is characterized by being applied to a controller of a backlight module, wherein the controller comprises a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets and a plurality of light sources, each light source control chip set comprises a plurality of light source control chips, and each light source control chip is connected with one or a plurality of light sources; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an ith-1 light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an ith-1 light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources;

the dimming method comprises the following steps:

transmitting a clock signal and data to the light source control chips of each light source control chip group so that each light source control chip in each light source control chip group controls the data to be transmitted among the light source control chips in the light source control chip group based on the clock signal;

The controller also includes a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller; the light source control chip is configured to output a state signal including a first level to the controller under the condition that the light source control chip works normally; the light source control chip is configured to output a state signal including a second level to the controller in the event of detecting a self-failure;

The method further comprises the steps of:

and under the condition that the status signal including the second level output by any one of the light source control chip sets is received, stopping transmitting light source dimming data to the light source control chip set, and acquiring readback data including fault information of the light source control chip set based on the data port.

23. The dimming method of claim 22, wherein the light source control chip is configured to allow the first data terminal to receive and transmit data and to allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal;

The method further comprises the steps of:

When an acquisition instruction for the demand information is sent to any one target light source control chip, transmitting the acquisition instruction to the target light source control chip through each light source control chip in front of the target light source control chip;

And receiving readback data transmission comprising the requirement information, wherein the readback data transmission comprises the requirement information and is transmitted back by each light source control chip before the target light source control chip passes through the target light source control chip.

24. A dimming method as claimed in claim 22, wherein each of the light source control chips further comprises a register and a plurality of light source connection channels, each of the light source connection channels for connection with one or more of the light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register;

The method further comprises the steps of:

and receiving an output result of any one of the light source control chips based on a register of the light source control chip, wherein each record bit of the register is used for recording whether the matched light source connecting channel fails or not, and the output result represents whether the light source control chip fails or not.

25. The dimming method as claimed in claim 24, wherein the output result is a logical operation result of the record value of each record bit.

26. The dimming method as claimed in claim 25, wherein the register records a value of 1 for the failed light source connection channel, and the output result is an or operation result;

or, the register records a value of 0 for the failed light source connection channel, and the output result is an AND operation result.

27. The dimming method of claim 24, wherein the fault types of the light source control chip include a plurality of; the light source control chip is configured to allow detection of different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller;

The method further comprises the steps of:

transmitting a fault detection instruction for fault detection to any light source control chip set, wherein the fault detection instruction comprises a detected fault type;

And receiving a fault detection result returned by the light source control chip set and judging the fault type according to the fault detection result.

28. The dimming method of claim 24, wherein the fault types of the light source control chip include a plurality of; the light source control chip is configured to sequentially detect different types of faults; the light source control chip is also used for outputting different types of fault detection results to the controller;

The controller is configured with a preset sequence in which the light source control chip detects different types of faults, and the method further comprises: and determining the fault type of the light source control chip based on the preset sequence and the output result.

29. The dimming method as claimed in claim 24, wherein the register is further configured to record whether or not there is a fault of each light source connection channel based on each of the record bits, respectively, at the time of fault detection for each fault type, and output a record value of each of the record bits in the register after the fault detection of the fault type is completed; the light source control chip is also used for determining the fault type existing in the light source control chip according to the record value of each fault type output by the register and outputting the fault code of the fault type existing in the light source control chip to the controller;

The method further comprises the steps of:

receiving the fault code;

And judging the fault type of the light source control chip outputting the fault code based on the fault code and the corresponding relation between the preset fault code and the fault type.

30. The dimming method is characterized by being applied to any one light source control chip in the backlight module; the backlight module comprises a controller, wherein the controller comprises a clock port and a plurality of data ports; the backlight module further comprises a plurality of light source control chip sets, and each light source control chip set comprises a plurality of light source control chips; the light source control chip comprises a first data end and a second data end, and a first clock end and a second clock end; the first data ends of the first light source control chips of different light source control chip sets are respectively connected with different data ports of the controller; in the same light source control chip set, a first data end of an ith light source control chip is connected with a second data end of an (i-1) th light source control chip, i is an integer which is more than or equal to 2 and less than M, and M is the total number of the light source control chips in the light source control chip set; the first clock end of the first light source control chip of each light source control chip group is connected with the clock port of the controller; in the same light source control chip set, a first clock end of an ith light source control chip is connected with a second clock end of an (i-1) th light source control chip; the backlight module further comprises a plurality of light sources, and different light source control chips are connected with different light sources;

the dimming method comprises the following steps:

receiving clock signals and data input by the controller or other light source control chips;

Controlling the data to be transmitted to the controller or other light source control chips based on the clock signal;

Each light source control chip further comprises a register and a plurality of light source connecting channels, and each light source connecting channel is used for being connected with one or a plurality of light sources; the register comprises a plurality of record bits, and each light source connection channel of the light source control chip is matched with one record bit of the register; each of the record bits is a bit of the register; the method further comprises the steps of: recording whether the matched light source connection channel fails based on each of the record bits in the register.

31. The method of claim 30, wherein the light source control chip is configured to allow the first data terminal to receive and transmit data and to allow the second data terminal to receive and transmit data; the light source control chip is further configured to allow the first clock terminal to receive and transmit the clock signal, and to allow the second clock terminal to receive and transmit the clock signal;

The method further comprises the steps of:

In response to the received acquisition instruction of the demand information: when the light source control chip indicated by the acquisition instruction is not self, the acquisition instruction is controlled to be transmitted to the connected next light source control chip based on the clock signal; when the light source control chip indicated by the acquisition instruction is self, the readback data comprising the requirement information is transmitted to the light source control chip through each light source control chip connected to the light source control chip before the self.

32. The method of claim 30, wherein the controller further comprises a status port; the light source control chip comprises a first state end and a second state end; in the same light source control chip set, the first state end of the ith light source control chip is connected with the second state end of the (i-1) th light source control chip; the first state end of the first light source control chip of each light source control chip group is connected with the state port of the controller;

The method further comprises the steps of:

Under the condition of normal operation of the controller, outputting a state signal comprising a first level to the controller;

In case of detecting a self-failure, a status signal including a second level is output to the controller.

33. The method of claim 32, wherein after outputting the status signal including the second level to the controller, the method further comprises:

stopping the transmission of the dimming data of the light source by the first data end and the second data end;

And transmitting readback data comprising fault information to the controller based on the light source control chip before the controller.

34. The method of claim 32, wherein outputting a status signal to the controller comprises:

The status signal is transmitted to the status port of the controller through a first status terminal and a second status terminal connected to each light source control chip before the controller.

35. The method of claim 30, wherein after said recording whether said matched light source connection channel fails based on each said record bit in said register, said method further comprises:

performing logic operation on the record value of each record bit in the register to obtain a logic operation result;

36. The method of claim 35, wherein the register has a record value of 1 for the failed light source connection channel, and wherein the performing a logical operation on the record value of each record bit in the register comprises:

And performing OR operation on the record value of each record bit in the register to obtain the logical operation result.

37. The method of claim 35, wherein the register has a record value of 0 for the failed light source connection channel, and wherein the performing a logical operation on the record value of each record bit in the register comprises:

and performing AND operation on the record values of all record bits in the register to obtain the logical operation result.

38. The method of claim 30, wherein the fault types of the light source control chip include a plurality of; the method further comprises the steps of:

Sequentially detecting different types of faults;

And outputting different types of fault detection results to the controller.

39. The method of claim 38, wherein sequentially detecting different types of faults comprises:

When fault detection is carried out for each fault type, based on each record bit of the register, whether the fault of the fault type exists in each light source connection channel or not is recorded, and after the fault detection of the fault type is finished, a record value of each record bit in the register is output;

and determining the fault type existing in the light source control chip according to the record value of each fault type output by the register, and outputting the fault code of the fault type existing in the light source control chip to the controller.

40. The method of claim 39, wherein the dimming method further comprises: and outputting a preset fault-free code to the controller when determining that no fault exists in the light source control chip according to the record value of each fault type output by the register.

41. A display device, which is used for a display, characterized by comprising the following steps: a light driving circuit according to any one of claims 1 to 19, or a backlight module according to any one of claims 20 to 21.

42. An electronic device comprising a display according to claim 41.