CN118311638A

CN118311638A - Flash pulse digitizing method, device, equipment and storage medium

Info

Publication number: CN118311638A
Application number: CN202211717972.3A
Authority: CN
Inventors: 刘苇; 奚道明; 张陈香; 肖鹏; 谢庆国
Original assignee: Institute of Artificial Intelligence of Hefei Comprehensive National Science Center
Current assignee: Institute of Artificial Intelligence of Hefei Comprehensive National Science Center
Priority date: 2022-12-29
Filing date: 2022-12-29
Publication date: 2024-07-09

Abstract

The application discloses a method, a device, equipment and a storage medium for digitizing scintillation pulses. The digitizing method comprises the following steps: presetting at least two thresholds and at least two multiplexing digitizing modules arranged in parallel, wherein the multiplexing digitizing modules correspond to the at least two thresholds one by one; synchronously and parallelly comparing a pulse signal to be processed with the at least two thresholds, and determining state change signals corresponding to the at least two thresholds respectively when the scintillation pulse to be processed passes through the thresholds; and each multiplexing and digitizing module of the sampling module is used for carrying out time sampling on the state change signal determined based on the threshold value corresponding to the multiplexing and digitizing module, so as to obtain the corresponding threshold value-time pair when the pulse signal to be processed passes through each threshold value. The embodiment of the application realizes the multiplexing of the time sampling module while ensuring the sampling precision, greatly saves logic resources and effectively reduces energy consumption.

Description

Flash pulse digitizing method, device, equipment and storage medium

Technical Field

The present application relates to the field of signal sampling, and in particular, to a method, apparatus, device, and storage medium for digitizing scintillation pulses.

Background

In a series of applications of high-energy rays, such as Positron Emission Tomography (PET), high-energy rays, such as gamma rays, are converted by a scintillation crystal into a visible light signal, which is further converted by a photoelectric conversion device into a scintillation pulse signal, and then a series of application images can be obtained by sampling and processing the scintillation pulse signal. In this process, the digitized quality of the scintillation pulse has a significant impact on the final imaging quality.

In recent years, with the development of digital signal processing technology and method, the direct digitizing of scintillation pulses, and the use of software algorithms to replace traditional analog circuits to extract information, such as particle energy deposition information, has great potential. Compared with the traditional equal time interval sampling method, the Multi-voltage threshold sampling (MVT) method is a digital processing method of scintillation pulse with better application prospect.

As shown in fig. 1-2, in the MVT sampling method, time information of an input scintillation pulse waveform crossing a set threshold is generally obtained through a TDC (time to digital converter) technique, so that waveform information of the scintillation pulse is inverted according to corresponding voltage-time pair information. In most cases, a plurality of Voltage thresholds, such as four Voltage thresholds, are set, each Voltage threshold corresponds to a channel for performing subsequent time measurement, wherein a scintillation pulse signal is input into an LVDS (Low-Voltage DIFFERENTIAL SIGNALING) comparator through one pin of each LVDS comparator, a preset Voltage threshold is input into the LVDS comparator through a DAC (digital-to-analog converter), each channel corresponds to two TDCs, the TDCs are used for capturing accurate time information of an edge (rising edge, falling edge) of a scintillation pulse crossing the threshold to generate a digital level inversion signal, and the time of the rising edge and the falling edge is captured by using a channel of TDC circuit; the rising edge and the falling edge of the flash pulse are respectively sent to two paths of TDCs to capture accurate time information, one TDC is used for converting the time when the rising edge of the flash pulse passes through the corresponding threshold value, and the other TDC is used for converting the time when the falling edge of the flash pulse is lower than the threshold value, so that a series of voltage-time pair information is obtained.

In the above structure, the TDC circuit is usually implemented in the FPGA by using logic resources such as an adder carry chain, a flip-flop, and a lookup table, and specifically referring to fig. 3, in the prior art, two paths of TDCs are used to capture accurate time information of a rising edge and a falling edge of a digital level flip signal, respectively, so that higher logic resource utilization rate cannot be implemented, the channel integration is limited, and a certain logic resource in the FPGA needs to be consumed. For example, a single channel scintillation pulse waveform input corresponds to a 4-channel comparator, 8 input pins and an 8-channel TDC measurement module in an FPGA chip are required to be consumed, and an FPGA is generally required to process scintillation pulse signals of several tens of hundreds of channels, for example, for the most common 12×6 detector array, a total of 72 scintillation pulse signal inputs are required, the number of the required input pins is 576, and the logic resource consumption of the single TDC module is about 2-3K. Currently, a chip (such as an FPGA chip of EP4CE115 type) is generally selected, which can provide 115K of logic resources and about 500 available LVDS pins, and neither the pins nor the logic resources can process 72 channels of data, and generally, a single FPGA chip cannot meet the requirements of the pins or the logic resources. One solution is to select multiple FPGA chips, e.g., 2 FPGA chips. On the one hand, the resource utilization rate of the double FPGA chips reaches more than 80%, and the measurement accuracy of the TDC module is also limited due to the limitation of resources; on the other hand, the excessively high resource utilization rate enables the heat productivity of the board card to be large, the working temperature to be excessively high, the measurement accuracy of the TDC to be influenced, and meanwhile, the design difficulty of heat dissipation of the system is increased. In addition, the use of more FPGA chips increases cost.

In view of the foregoing, it is desirable to provide a digital sampling structure of scintillation pulse, which can save the amount of logic resources, and is helpful for improving the system integration level and reducing the system power consumption and cost.

The description of the background art is only for the purpose of facilitating an understanding of the relevant art and is not to be taken as an admission of the prior art.

Disclosure of Invention

The technical problem to be solved by the embodiment of the application is how to reduce the resource consumption of the time digital sampling of the scintillation pulse and improve the sampling performance.

In order to solve the problems, the application discloses a method, a device, equipment and a storage medium for digitizing scintillation pulses.

According to a first aspect of the present application, there is provided a method of digitizing a scintillation pulse, the method comprising: presetting at least two thresholds and at least two multiplexing digitizing modules arranged in parallel, wherein the multiplexing digitizing modules correspond to the at least two thresholds one by one; synchronously and parallelly comparing a pulse signal to be processed with the at least two thresholds, and determining state change signals corresponding to the at least two thresholds respectively when the scintillation pulse to be processed passes through the thresholds; each multiplexing and digitizing module of the sampling module is used for carrying out time sampling on the state change signal determined based on the threshold value corresponding to the multiplexing and digitizing module, and corresponding threshold value-time pairs when the pulse signal to be processed passes through each threshold value are obtained, and the method specifically comprises the following steps: acquiring an addition value output at equal time intervals based on the state change signal; decoding the addition value, and counting to obtain the type and the number of the addition value; based on preset conditions, judging whether the current addition value type and the current addition value quantity correspond to time information of the state change signal according to the addition value type and the current addition value quantity; if yes, prompting to store time information data of the current state change signal; if not, continuing to judge the summation value output at the equal time interval.

According to some embodiments of the present application, the obtaining of the sum value output at the equal time interval is implemented by using a carry chain multiplexing module of the multiplexing digitizing module, where the carry chain multiplexing module includes a plurality of cascaded delay units, and the sum value output by the multiplexing digitizing module includes the sum value output by each delay unit.

According to some embodiments of the application, the sum is 0 or 1.

According to some embodiments of the application, the equal time interval is a period of coarse time.

According to some embodiments of the application, the multiplexing digitizing module comprises a trigger module and a decoding module which are in one-to-one correspondence; decoding the sum, including: and storing the addition value by adopting a trigger module, and transmitting the stored addition value to a decoding module for decoding.

According to some embodiments of the application, the multiplexing and digitizing module includes a trigger multiplexing module and at least one decoding module, and decodes the summation value output by the multiplexing and digitizing module, including: and storing the addition value by adopting a trigger multiplexing module, and transmitting the stored addition value to a decoding module for decoding.

According to some embodiments of the present application, based on a preset condition, according to the type and the number of the addend, whether the current type and the number of the addend correspond to the time information of the state change signal is determined by the determining module of the multiplexing digitizing module, where the preset condition is the type and the number of the addend corresponding to the state change signal under the set arrangement condition.

According to some embodiments of the application, prompting for storing time information data of a current state change signal includes: an indication module adopting a multiplexing and digitizing module generates an indication signal for prompting the storage of time information data.

According to some embodiments of the present application, the time information data includes a period number for representing a coarse time, a kind of an addition value and a number thereof, which meet a preset condition, and are output by a multiplexing digitizing module for representing a fine time, and the preset condition is set by a judging module of the multiplexing digitizing module; the storing of the time information data of the state change signal includes: and storing the number of periods used for representing coarse time, the types and the number of summation values which are output by each delay unit of the carry chain multiplexing module used for representing fine time and meet preset conditions.

According to some embodiments of the application, the digitizing method further comprises: based on the acquired threshold-time pairs, the scintillation pulses are discriminated to filter the noise signal.

According to some embodiments of the application, the digitizing method further comprises: discriminating the scintillation pulse to filter the noise signal includes setting a noise filtering condition: the pulse width corresponding to the lowest threshold value crossed by the flicker pulse to be processed is not smaller than a first preset value.

According to some embodiments of the application, the digitizing method further comprises: based on the acquired threshold-time pairs, the scintillation pulse to be processed is discriminated to filter unwanted pulse signals.

According to some embodiments of the application, the digitizing method further comprises: based on the acquired threshold-time pair, discriminating the scintillation pulse to be processed, and setting filtering conditions to filter unnecessary pulse signals, wherein the set filtering conditions are as follows: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is not smaller than a first preset value and not larger than a second preset value, and the time difference between the rising edge of the scintillation pulse to be processed crossing the maximum threshold value and the time crossing the minimum threshold value is not larger than a third preset value.

According to a second aspect of the present application, there is provided a digitizing apparatus for scintillation pulses, the digitizing apparatus comprising: the threshold setting module is configured to preset at least two preset thresholds; the comparison module is in one-to-one correspondence with the at least two thresholds and is configured to synchronously and parallelly compare the pulse signals to be processed with the at least two thresholds, and determine state change signals corresponding to the at least two thresholds respectively when the scintillation pulse to be processed passes through the thresholds; the sampling module comprises at least two multiplexing and digitizing modules, the multiplexing and digitizing modules are in one-to-one correspondence with the comparison modules, the multiplexing and digitizing modules are configured to sample time of state change signals determined based on thresholds corresponding to the multiplexing and digitizing modules, and corresponding threshold-time pairs when the pulse signals to be processed cross the thresholds are obtained.

According to some embodiments of the application, the threshold setting module comprises a digital-to-analog converter for presetting at least two of the thresholds.

According to some embodiments of the application, the comparing module comprises at least two comparators arranged in parallel, each of the comparators independently comparing the scintillation pulse to be processed with one of the thresholds.

According to some embodiments of the application, the comparator is LVDS of an FPGA chip.

According to some embodiments of the application, the state change signal comprises a rising edge indicating that the scintillation pulse to be processed first crosses the threshold value and a falling edge that secondarily crosses the threshold value.

According to some embodiments of the application, the multiplexing digitizing module is configured to time sample a state change signal determined based on a threshold corresponding thereto, comprising: acquiring an addition value output at equal time intervals based on the state change signal; decoding the addition value, and counting to obtain the type and the number of the addition value; based on preset conditions, judging whether the current addition value type and the current addition value quantity correspond to time information of the state change signal according to the addition value type and the current addition value quantity; if yes, prompting to store time information data of the current state change signal; if not, continuing to judge the summation value output at the equal time interval.

According to some embodiments of the application, the sum is 0 or 1.

According to some embodiments of the application, the sampling module further comprises a control storage module, which stores time information data of the current state change signal, based on which the sampling module is implemented.

According to some embodiments of the application, the time information data includes a period number for representing the coarse time, a kind of sum value and a number thereof, which meet a preset condition, and are output by the multiplexing digitizing module for representing the fine time, and the preset condition is set by the judging module.

According to some embodiments of the application, the multiplexing digitization module comprises a TDC multiplexing module for time sampling a state change signal determined based on the threshold.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, at least one flip-flop module, at least one decoding module, a judging module, and an indicating module; the carry chain multiplexing module comprises a plurality of cascaded delay units, wherein the delay units are used for outputting addition values; the at least one trigger module is in communication connection with the carry chain multiplexing module, the decoding modules are in one-to-one correspondence and in communication connection with the trigger modules, the trigger modules are used for storing the addition values output by the carry chain multiplexing module and transmitting the addition values to the at least one decoding module, and the decoding module is used for obtaining the types of the addition values output by each delay unit and the number of the addition values; the judging module is in communication connection with the at least one decoding module, and is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, two trigger modules, two decoding modules, a judging module and an indicating module, where the two trigger modules are in communication connection with the carry chain multiplexing module, the two decoding modules are in one-to-one correspondence and in communication connection with the two trigger modules, the trigger modules are used for storing and transmitting the added value output by the carry chain multiplexing module to the two decoding modules, and the decoding modules are used for obtaining the added value types and the number of the added values output by each delay unit; the judging module is in communication connection with the two decoding modules, the judging module is used for presetting conditions and judging time information data of state change signals based on the types and the quantity of the addition values obtained by the decoding modules, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, a flip-flop multiplexing module, at least one decoding module, a judging module, and an indicating module; the carry chain multiplexing module comprises a plurality of cascaded delay units, wherein the delay units are used for outputting addition values; the trigger multiplexing module is in communication connection with the carry chain multiplexing module, the decoding module is in communication connection with the trigger multiplexing module, the trigger multiplexing module is used for storing the addition value output by the carry chain multiplexing module and transmitting the addition value to the corresponding decoding module, the decoding module is used for obtaining the addition value type and the number of each addition value output by each delay unit, the judging module is in communication connection with at least one decoding module, the judging module is used for presetting conditions and judging time information data of state change signals based on the addition value type and the number obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts storing of the time information data based on the judging result of the judging module.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, a flip-flop multiplexing module, two decoding modules, a judging module, and an indicating module; the trigger multiplexing module is in communication connection with the carry chain multiplexing module, the two decoding modules are in communication connection with the trigger multiplexing module, the trigger multiplexing module is used for storing the added value output by the carry chain multiplexing module and respectively transmitting the added value to the two decoding modules, and the decoding modules are used for obtaining the added value types and the quantity of the added values output by the delay units; the judging module is in communication connection with the two decoding modules, the judging module is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding modules, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, two flip-flop modules, a rising edge decoding module, a falling edge decoding module, a judging module, and an indicating module; the carry chain multiplexing module comprises a plurality of cascaded delay units, wherein the delay units are used for outputting addition values; the two trigger modules are in communication connection with the carry chain multiplexing module, the added value output by the carry chain multiplexing module is transmitted to the two trigger modules in two paths, the two trigger modules are respectively in communication connection with the rising edge decoding module and the falling edge decoding module, and are used for storing the added value output by the carry chain multiplexing module and transmitting the stored value to the rising edge decoding module and the falling edge decoding module, and the rising edge decoding module and the falling edge decoding module are used for obtaining the added value types and the quantity of the added values output by each delay unit; the judging module is in communication connection with the rising edge decoding module and the falling edge decoding module and is used for presetting conditions and judging time information data of the rising edge and the falling edge based on the type and the quantity of the added values obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

According to some embodiments of the present application, the TDC multiplexing module includes a carry chain multiplexing module, a flip-flop multiplexing module, a rising edge decoding module, a falling edge decoding module, a judging module, and an indicating module; the carry chain multiplexing module comprises a plurality of cascaded delay units, wherein the delay units are used for outputting addition values; the trigger multiplexing module is in communication connection with the carry chain multiplexing module, the added value output by the carry chain multiplexing module is transmitted to the trigger multiplexing module, the trigger multiplexing module is in communication connection with the rising edge decoding module and the falling edge decoding module respectively, and is used for storing the added value output by the carry chain multiplexing module and transmitting the stored value to the rising edge decoding module and the falling edge decoding module respectively, and the rising edge decoding module and the falling edge decoding module are used for obtaining the added value types and the quantity of the added values of the delay units; the judging module is in communication connection with the rising edge decoding module and the falling edge decoding module and is used for presetting conditions and judging time information data of the rising edge and the falling edge based on the types and the quantity of the addition values obtained by the rising edge decoding module and the falling edge decoding module, and the indicating module is in communication connection with the judging module and is used for prompting to store the time information data of the rising edge and the falling edge based on the judging result of the judging module.

According to some embodiments of the application, the sampling module further comprises a screening module configured to set screening conditions to screen the scintillation pulse to be processed based on the acquired threshold-time pairs.

According to some embodiments of the application, the discrimination conditions are: the pulse width corresponding to the lowest threshold value crossed by the flicker pulse to be processed is not smaller than a first preset value so as to filter noise.

According to some embodiments of the application, the discrimination conditions are: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is not smaller than a first preset value and not larger than a second preset value, and the time difference between the rising edge of the scintillation pulse to be processed crossing the maximum threshold value and the time difference crossing the minimum threshold value is smaller than or not larger than a third preset value so as to filter unnecessary pulse signals.

According to a third aspect of the present application, there is provided a digitizing apparatus comprising a scintillation pulse digitizing apparatus according to any one of the aspects of the present application.

According to a fourth aspect of the present application, there is provided a digitizing apparatus comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, which when executed by the processor implements the steps of the digitizing method according to any of the claims of the application.

According to a fifth aspect of the present application there is provided a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of the method according to any of the above claims.

The method, the device, the equipment and the storage medium for digitizing the scintillation pulse can realize multiplexing of the time sampling module while ensuring the sampling precision, greatly save logic resources and effectively reduce energy consumption.

Drawings

The application will be further described by way of exemplary embodiments, which will be described in detail with reference to the accompanying drawings. The embodiments are not limiting, in which like numerals represent like structures, wherein:

FIG. 1 is an exemplary processing circuit diagram of multi-voltage threshold sampling according to the prior art;

fig. 2 is an exemplary processing circuit diagram of a classical MVT sampling method according to the prior art;

FIG. 3 is an exemplary processing circuit diagram of a TDC that time samples rising and falling edges based on a carry chain according to the prior art;

FIG. 4 is an exemplary block diagram of a method of digitizing scintillation pulses shown in accordance with some embodiments of the application;

FIG. 5 is a schematic diagram illustrating an exemplary relationship of threshold voltage to scintillation pulse to be processed in accordance with some embodiments of the present application;

FIG. 6 is an exemplary schematic diagram of a state change signal shown according to some embodiments of the application;

7-8 are exemplary schematic diagrams of a TDC multiplexing module multiplexing carry chains shown according to some embodiments of the application;

FIG. 9 is an exemplary schematic diagram of a TDC multiplexing module multiplexing carry chains, trigger modules, shown in accordance with some embodiments of the application;

fig. 10 is an exemplary block diagram of a scintillation pulse digitizing apparatus according to some embodiments of the application.

Detailed Description

In order that the above objects, features and advantages of the application will be readily understood, a more particular description of the application will be rendered by reference to the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. The present application may be embodied in many other forms than described herein and similarly modified by those skilled in the art without departing from the spirit of the application, whereby the application is not limited to the specific embodiments disclosed below.

It will be understood that when an element is referred to as being "mounted" to another element, it can be directly mounted to the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" and/or "as used herein includes any and all combinations of one or more of the associated listed items.

Some preferred embodiments of the present application are described below with reference to the accompanying drawings. It should be noted that the following description is for illustrative purposes and is not intended to limit the scope of the present application.

Fig. 4 is an exemplary flow chart of scintillation pulse sampling shown in accordance with some embodiments of the application. As shown in fig. 4, the method 100 of digitizing scintillation pulses may include the following steps.

Step S110, presetting at least two thresholds and at least two multiplexing digitizing modules arranged in parallel, wherein the multiplexing digitizing modules correspond to the at least two thresholds one by one.

In some embodiments, the at least two thresholds may be used to compare with the amplitude of the scintillation pulse to be processed. The comparison result may be used for time sampling to determine the point in time when the amplitude of the scintillation pulse to be processed crosses the threshold value. These time points, when matched with corresponding thresholds, can be used for waveform recovery during subsequent processing (e.g., image reconstruction), such as recovering the area of the waveform, and thus obtaining waveform energy values. In some embodiments, the magnitude of the threshold is within the magnitude of the scintillation pulse to be processed. Referring to fig. 5, fig. 5 is a schematic diagram illustrating exemplary relationships between threshold voltages and scintillation pulses according to some embodiments of the present application, wherein 510 represents the scintillation pulse, which may be the scintillation pulse to be processed as referred to in the present application. The waveform of the scintillation pulse in the figure shows the characteristic that the rise period is very short, usually only a few nanoseconds, to rise to the peak. The fall time period is long, and is generally about 200 nanoseconds. 510-1, 510-2, 510-3, 510-4 represent four different threshold voltages. It can be seen that the magnitudes of the four threshold voltages are all within the magnitude of the scintillation pulse. For example, assuming the amplitude of the scintillation pulse to be processed is in the range of 3mV-220mV, the four threshold voltages may be 20mV, 40mV, 60mV, and 80mV, respectively.

In some embodiments, the scintillation pulses to be processed may be acquired by detectors, such as PET detectors, which typically include a scintillation crystal for converting detected high-energy rays (e.g., gamma rays, neutron rays, etc.) into visible light signals, and a photoelectric conversion device (e.g., photomultiplier tube PMT, silicon photomultiplier tube SiPM, etc.) for converting the visible light signals into electrical signals that are output as scintillation pulse signals through electronics coupled to the photoelectric conversion device, e.g., in communication with the detector via an acquisition module, to acquire the scintillation pulses to be processed.

In some embodiments, the scintillation pulse generally has a rising edge and a falling edge, and the rising edge and the falling edge may be represented by a functional model, e.g., a scintillation pulse corresponding to a gamma photon generally appears to have a relatively fast rising edge and a relatively slow falling edge, the rising edge may be characterized by a straight line function, and the falling edge may be characterized by an exponential function.

It should be appreciated by those skilled in the art that the pulse signal may be represented by an electrical pulse signal, an acoustic pulse signal, a thermal pulse signal, or a pressure wave signal, etc., and the corresponding characteristic may be a voltage or a current of the electrical pulse signal when the pulse signal is an electrical pulse signal; when the pulse signal is an acoustic pulse signal, the corresponding characteristic may be the sound intensity of the acoustic pulse signal, and so on, which will not be described herein.

It should be understood by those skilled in the art that the scintillation pulse signal in the present application can be extended to a continuous signal, and it is generally only necessary to consider the continuous signal as a pulse signal arranged according to a certain period, and the pulse signal in the present application is not limited to a sampling signal.

It will be appreciated by those skilled in the art that the threshold may take many forms, such as when the pulse signal is an electrical pulse signal, the corresponding threshold may be a voltage threshold, a current threshold, or an energy threshold; when the pulse signal is an acoustic pulse signal, the corresponding threshold value may be a sound intensity threshold value, and so on, which will not be described herein.

In some embodiments, the threshold may be set by a Digital-to-time Converter (DAC). After the setting is finished, the acquisition module can transmit the threshold value to the comparator through the DAC so as to compare the amplitude values.

In some embodiments of the present application, at least two multiplexing digitizing modules are provided, and the multiplexing digitizing modules are in one-to-one correspondence with the at least two thresholds. The multiplexing digitizing module is used for time sampling the state change signal determined based on the threshold value corresponding to the multiplexing digitizing module. The detailed description of the multiplexing and digitizing module in the embodiment of the application is specifically referred to the following partial step S130.

Step S120, comparing the scintillation pulse to be processed with the at least two thresholds in parallel, and determining a plurality of state change signals corresponding to the at least two thresholds when the scintillation pulse to be processed crosses the thresholds.

In some embodiments, synchronous parallel comparison means that the scintillation pulses to be processed are respectively and synchronously input into comparison modules, the number of the comparison modules corresponds to the threshold number, the comparison modules are arranged in parallel, each comparison module can compare with the amplitude of the scintillation pulse to be processed according to a preset threshold, and the comparison modules work independently of each other and do not interfere with each other; the comparison module includes a comparator. The comparison module is used for respectively comparing the magnitude of the scintillation pulse to be processed with the magnitude of the threshold value through a plurality of comparators which are arranged in parallel, and each comparator works mutually. For example, the four comparators respectively correspond to four thresholds and are set into a parallel structure, the scintillation pulse to be processed is respectively input into the corresponding comparators through the parallel structure, the corresponding threshold of each comparator is different, the comparison can be carried out according to the corresponding threshold and the amplitude of the received scintillation pulse, and the different comparison modules respectively and synchronously work independently after receiving the scintillation pulse, so that the comparison modules do not interfere with each other.

In some embodiments, the sampling module is implemented with a multi-voltage threshold (MVT) sampling board including an FPGA chip. The comparison module may be implemented by a circuit of the FPGA chip including a Low-Voltage differential signal (Low-Voltage DIFFERENTIAL SIGNALING, LVDS) comparator. As an example, the scintillation pulse generated by the detector may be input to the p-terminal (also referred to as the positive terminal) of the LVDS comparator pin and the threshold may be input to the n-terminal (also referred to as the negative terminal) of the LVDS comparator pin, thereby completing the comparison of the pulse waveform with the threshold.

In some embodiments, the comparison module may include a plurality of LVDS comparators. Each LVDS comparator may be used to compare the pending flash pulse to a threshold. In this way, a simultaneous parallel comparison of the scintillation pulse to be processed with the plurality of thresholds can be achieved.

It will be appreciated that for setting the threshold, the scintillation pulse may typically cross the same threshold twice. Once during the rising phase of the scintillation pulse, the amplitude of the scintillation pulse from low to high may cross the threshold value and be above the threshold value. Once in the falling phase of the scintillation pulse, the amplitude of the scintillation pulse may cross the threshold value from high to low and below the threshold value. Either way, the comparison module may generate a jump and record the time when the amplitude crosses the threshold. For example, fig. 5 illustrates a schematic diagram of multi-voltage threshold sampling, in which the scintillation pulse 510 first passes over and above the threshold voltage 510-1 and then continues upward, passing over and above the threshold voltage 510-2 during the rising phase. And then crosses and is higher than threshold voltage 510-3 and threshold voltage 510-4. During the falling phase, the scintillation pulse 510 will first pass and fall below the threshold voltage 510-4. And then continues downward past and below threshold voltage 510-3. Then, threshold voltage 510-2 and threshold voltage 510-1 are crossed and lowered. The entire process pulse voltage 510 may undergo 8 state changes relative to the four threshold voltages above.

In the embodiment of the present application, the threshold value is set so as not to exceed the maximum amplitude of the scintillation pulse to be processed. It should be understood by those skilled in the art that when the threshold is set to be large, for example, higher than the maximum amplitude of the signal, the amplitude of the scintillation pulse cannot always exceed the preset threshold, so that the comparison module does not change state; the comparison module only makes one state change when the threshold is set exactly equal to the maximum amplitude of the signal. Therefore, in general, according to limited experiments, the person skilled in the art can reasonably set the size and the number of the thresholds, so that the size interval of the thresholds is more reasonable, and in general, 2-4 evenly-spaced thresholds are selected, the acquired information is closer to the real state, the number of channels can be reduced while the pulse shape is accurately restored, the data processing efficiency is improved, and the details are omitted.

It will be further appreciated by those skilled in the art that in actual sampling, the pulse waveform is not smooth as shown in fig. 5, but rather has more fluctuation, actually appears as fluctuation rising or falling within the range of the waveform shown in fig. 5, and the actual waveform is fitted as shown in fig. 5, so that in the actual sampling process, the rising edge or falling edge may cross the same threshold multiple times in an extremely short time, and the average time of crossing the threshold multiple times in a certain time window or time period may be taken as the time of crossing the threshold in actual sampling, which is easily implemented by those skilled in the art according to the teachings of the present application and will not be repeated herein.

In some embodiments, the comparison module may compare the scintillation pulse to be processed with the threshold value and output a state change signal. The state change signal may be indicative of a state change of the pulse to be processed relative to the threshold (e.g. from below the threshold to crossing and above the threshold or from above the threshold to crossing and below the threshold), in particular indicative of a rising edge of the pulse to be processed first crossing the threshold and a falling edge of the pulse to be processed second crossing the threshold. The time sampling related to the subsequent part of the application can refer to the time measurement of the moment corresponding to the state jump. Referring to fig. 6, fig. 6 is an exemplary schematic diagram of a state change signal shown in accordance with some embodiments of the present application. The state change signals 610-1, 610-2, 610-3, and 610-4 correspond to the threshold voltages 510-1, 510-2, 510-3, and 510-4, respectively. Each state change signal includes a rising edge and a falling edge. For example, rising edges ①、②、③ and ④ correspond to the instants at which the scintillation pulses to be processed cross threshold voltages 510-1, 510-2, 510-3, and 510-4, respectively, at the rising edges of the pulses, and falling edges ⑤、⑥、⑦ and ⑧ correspond to the instants at which the scintillation pulses to be processed cross threshold voltages 510-1, 510-2, 510-3, and 510-4, respectively, at the falling edges of the pulses. Rising edges ①、②、③ and ④ represent the to-be-processed scintillation pulse going from bottom to top and above the threshold voltage, and falling edges ⑤、⑥、⑦ and ⑧ represent the to-be-processed scintillation pulse going from top to bottom and below the threshold voltage. The time corresponding to the position of the rising edge and the falling edge may be the time when the scintillation pulse crosses the threshold voltage. It should be understood by those skilled in the art that the above embodiments only take the voltage threshold and the voltage state change signal as examples, and the above embodiments may be general in principle for other threshold and state changes, and will not be described herein.

And 130, performing time sampling on the state change signal determined based on the threshold value corresponding to the multiplexing digitization module of the sampling module, and acquiring a corresponding threshold value-time pair when the pulse signal to be processed passes through each threshold value.

In some embodiments, the time sampling may be time-digitally sampling for a time corresponding to a position of a rising edge and a falling edge of the state change signal. In the present application, the terms "time sampling", "time-digital sampling" and "time measurement" are used interchangeably to refer to the operation of determining the moment at which the rising edge and the falling edge of each state change signal are located.

The time sampling according to the present application may refer to time measurement of the time corresponding to the state transition. Referring to fig. 6, time sampling refers to the time at which the rising edge ①-④ and the falling edge ⑤-⑧ of the state change signals 610-1-610-4 are acquired.

In some embodiments, the sampling module includes at least two multiplexing digitizing modules, the number of multiplexing digitizing modules corresponding to a preset number one to one. In the embodiment of the application, each multiplexing and digitizing module can be used for time sampling the state change signal determined based on the threshold corresponding to the multiplexing and digitizing module, specifically, the time corresponding to the rising edge and the falling edge of the state change signal is sampled respectively, and the corresponding threshold-time pair when the pulse signal to be processed passes over each threshold is obtained.

In one embodiment of the present application, the multiplexing digitizing module includes a TDC (Time-to-Digital Converter, TDC) multiplexing module for Time-sampling the state change signal determined based on the threshold value (corresponding to the threshold value).

Referring to fig. 7 to 8, in an embodiment of the present application, the TDC multiplexing module includes a carry chain multiplexing module a, at least one flip-flop module, at least one decoding module, a judging module (not shown in the drawings), and an indicating module (not shown in the drawings).

The carry chain multiplexing module A comprises a plurality of cascaded delay units, and the delay units are used for outputting addition values. In an example, the delay unit may be implemented by using an adder (Adder), where the carry chain is formed by cascading a plurality of adders, and the delay of each adder is the same set value, and is represented by Δt. Referring to fig. 7, the "cascade" of the embodiment of the present application means that the carry output "cout" of the upper-stage adder is connected to the carry input "cin" of the lower-stage adder. In the embodiment of the application, the sum value of the adder output is 0 or 1. Specifically, referring to fig. 7, the adder Adder includes two addend presets a, b, a carry input Cin, a carry output Cout, and an output Sum, the numerical relationships of which are:

Sum＝a+b+Cin；

Cout＝a*b+(a+b)*Cin。

In the embodiment of the present application, when the plurality of state change signals corresponding to the at least two thresholds obtained in step S120 are respectively input into the carry chain multiplexing module of the TDC multiplexing module corresponding to each threshold, as an explanation but not a limitation, the digital level inversion signal (sig) output by each comparator may be connected to the "a" end of the first-stage adder of each carry chain multiplexing module a, the "b" end of the first-stage adder is "1" and the "cin" end is "1", and the remaining adders "a" end is "1" and "b" end is "1", so that when the sig input by the "a" end is 0, sum=0 and cout=cin=1; when sig input at the "a" terminal is 1, sum=1, cout=1+cin=0. The sum is subsequently transmitted to a trigger module for storage, the trigger module is used for storing the sum output by each delay unit, the stored value is represented as q, then the q value is transmitted to a decoding module through the trigger module, and the decoding module counts the quantity of 0 and 1 in the received q value.

In the embodiment of the application, the time data obtained by the sampling module for time sampling the state change signal comprises coarse time and fine time. Each TDC multiplexing module works under the unified external clock condition, the period of a clock signal is T, the period T of the clock signal can be used for representing coarse time, and the counting of the period of the clock signal is realized by adopting a counter; when the clock signal period is T, the value of the delay time Deltat of each delay unit is the ratio of T to the number of the delay units, and when each delay unit outputs an addition value of 0 or 1, the delay time Deltat of one delay unit is passed; every other clock signal period T, each delay unit of the carry chain multiplexing module a updates and outputs a summation value 0 or 1 (for example, the width of the scintillation pulse signal is 200ns, the clock signal period T is 5ns, and then 200/5=40, at this time, each delay unit of the carry chain multiplexing module outputs a summation value 0 or 1 for 40 times, each delay unit outputs a summation value 0 or 1 in each clock signal period T), and based on the ordering condition and the number of 0 and 1 acquired by the carry chain multiplexing module a of the TDC multiplexing module in each clock signal period T, the ordering condition and the number of 0 and 1 acquired by the carry chain multiplexing module a of the TDC multiplexing module can be used for representing a fine time (outputting one 0 or 1 indicates that the delay Δt of one delay unit has passed). The relationship of time data with coarse time and fine time satisfies the following formula:

T1＝m*T-n*△t；

Wherein, T is a clock signal period, m is a count value (coarse time count) of the clock signal period T, Δt is a delay time of each delay unit, and n is a number (fine time count) of addition values 0 or 1 outputted by the carry chain multiplexing module a counted at the mth clock.

In a specific example, for example, the clock period T adopted by the TDC multiplexing module is 5ns, that is, the working frequency of the TDC multiplexing module is 200MHz, if the delay time Δt of each delay unit is 60ps, the number of delay units of the carry chain multiplexing module a is 5000/60=84, in order to ensure accurate fine time acquisition, the number of delay units set by the carry chain multiplexing module is usually not less than the ratio, and further, in the case of decoding based on a multiple group of 8 by using a 3-8 decoder, 88 delay units may be set for convenience of subsequent decoding. Based on the above formula, when a rising edge is acquired based on the clock period T of 5ns and the delay time Δt of each delay unit of 60ps, if the clock signal period T counts to 36, the 88 delay units of the carry chain multiplexing module a output 300 s and 58 1 s, then m is 36, and n is 30, then the sampling time T1 can be obtained.

In the embodiment of the application, at least one trigger module is in communication connection with the carry chain multiplexing module A, the decoding modules are in one-to-one correspondence and in communication connection with the trigger modules, the trigger modules are used for storing the addition values output by the carry chain multiplexing module and transmitting the addition values to the at least one decoding module, and the decoding module is used for obtaining the types of the addition values output by each delay unit and the number of the addition values; the judging module is in communication connection with the at least one decoding module, and is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

The specific design of the trigger module and the decoding module in the embodiment of the present application refers to the prior art, and is not the core content of the present application, and will not be described in detail herein.

In the embodiment of the application, the trigger module receives sum addition value 0 or 1 output by each delay unit of the carry chain multiplexing module and stores the sum addition value as q. The q value is then transmitted to a corresponding at least one decoding module.

In one example, the decoding module receives the q value (0 or 1) output by its corresponding triggering module, and counts the ordering and quantity of 0 or 1, for example, all 0 s, all 1 s, or all 1 s. In general, 3-8 decoding modules are adopted, namely, each decoding module is divided into a plurality of groups, 8 summation values are divided into 1 group, in the above example, when the carry chain multiplexing module A adopts 88 delay units, each decoding module is divided into 11 groups, the ordering condition and the number of summation values 0 and 1 in each group are counted synchronously and in parallel, and the counted result is output to the judging module.

In an example, the judging module is configured to set a preset condition, and judge whether the current type of the added value and the number thereof correspond to the time information of the state change signal according to the type of the added value and the number thereof. The preset conditions are the types and the numbers of the addition values corresponding to the state change signals under the set arrangement conditions. The "set arrangement condition" in the embodiment of the present application may refer to the arrangement order and the number of sum addition values 0 and 1 corresponding to the rising edge state change signal and the falling edge state change signal. For example, as shown in fig. 7, when the sig signal input to the carry chain multiplexing module is 0, the output sum value is 0, the q value received by the decoding module is also 0, the sig signal input to the carry chain multiplexing module is 0, the output sum value is 0, and the q value received by the decoding module is also 0; the sig signal input into the carry chain multiplexing module is 1, the output sum value is 1, and the q value received by the decoding module is also 1; the rising edge state change signal is that the sig signal jumps from 0 to 1, the output of the 1 st-stage adder is 1, and at least 1 output of the rest adders is 0; returning to the foregoing example for the case where 88 delay units are provided, if there are rising edges, the output values from the first-stage adder to the last-stage adder are arranged in this order, the output of the 1 st-stage adder is 1, and from the 2 nd-stage adder, at least 1 adder has an output of 0, i.e., the number of addition values of 1 output ranges from [1, 87]; the falling edge state change signal is that the sig signal jumps from 1 to 0, the output of the 1 st-stage adder is 0, and at least 1 output of the rest adders is 1; returning to the foregoing example illustrating the case where 88 delay units are provided, if it is a falling edge, the outputs of the 1 st-stage adders are 0 in order of the output values from the first-stage adders to the last-stage adders, and from the 2 nd-stage adders, at least 1 adder has an output of 1, i.e., the number of output added values of 0 ranges from [1, 87].

By way of explanation and not limitation, based on the above example, the arrangement condition set by the judgment module may be:

The summation value 1 is arranged at the 1 st position from left to right according to the arrangement sequence of the output values from the first-stage adder to the last-stage adder, and the number of 1 is smaller than the maximum value of the number of delay units of the carry chain multiplexing module A (such as 88 in the previous example), so that the rising edge time data is acquired;

The addition value 0 is arranged at the 1 st position from left to right according to the arrangement sequence of the output values from the first-stage adder to the last-stage adder, and the number of 0 is smaller than the maximum value of the number of delay units of the carry chain multiplexing module A (such as 88 in the previous example), so that the falling edge time data is acquired;

the sum is 0 or 1 from left to right in the order of the output values from the first adder to the last adder, and is neither a rising edge nor a falling edge.

In an alternative embodiment, the determining module may determine whether the state change signal is a rising edge or a falling edge based on the arrangement and the number of the addition values 0 and 1 in the order of the output values from the first-stage adder to the last-stage adder from right to left.

In one example, the indication module generates an indication signal, such as, but not limited to, a pulse signal lasting 5ns, for prompting the storage of time information data. The time information data is stored by a control storage module of the sampling module mentioned in the following section of the application.

In a specific example, referring to fig. 7 to 8, the tdc multiplexing module includes a carry chain multiplexing module a, two flip-flop modules B and C, two decoding modules D and E, a judging module (not shown in the figure) and an indicating module (not shown in the figure), where the two flip-flop modules B, C are communicatively connected to the carry chain multiplexing module a, the two decoding modules D, E are in one-to-one correspondence and are communicatively connected to the two flip-flop modules B, C, the flip-flop module B, C is configured to store and transmit the sum value output by the carry chain multiplexing module a to the two decoding modules D, E, and the decoding module D, E is configured to obtain the kind of the sum value output by each delay unit and the number of the sum values; the judging module is in communication connection with the two decoding modules, the judging module is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding module D, E, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module. Specifically, the two decoding modules D, E may be a rising edge decoding module and a falling edge decoding module, respectively, which are configured to obtain the type of the sum value and the number of the sum values output by each delay unit based on the state change signal.

Referring to fig. 9, in an alternative embodiment, the TDC multiplexing module includes a carry chain multiplexing module a, a flip-flop multiplexing module B/C, at least one decoding module, a judging module, and an indicating module. The difference between this embodiment and the embodiment using at least one flip-flop module is that this embodiment uses only one flip-flop multiplexing module B or C, i.e. the decoding module multiplexes one flip-flop module. In this embodiment, the trigger multiplexing module B/C is in communication connection with the carry chain multiplexing module a, the decoding module is in communication connection with the trigger multiplexing module B/C, the trigger multiplexing module B/C is configured to store and transmit the sum value output by the carry chain multiplexing module a to a corresponding decoding module, the decoding module is configured to obtain the sum value type and the number of each sum value output by each delay unit, the judging module is in communication connection with at least one decoding module, the judging module is configured to preset conditions and judge time information data of the state change signal based on the sum value type and the number thereof obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judgment result of the judging module.

In a specific example, referring to fig. 9, the tdc multiplexing module includes a carry chain multiplexing module a, a flip-flop multiplexing module B/C, two decoding modules D, E, a judging module, and an indicating module. The trigger multiplexing module B/C is in communication connection with the carry chain multiplexing module a, the two decoding modules D, E are in communication connection with the trigger multiplexing module B/C, the trigger multiplexing module B/C is used for storing the added value output by the carry chain multiplexing module a and respectively transmitting the stored added value to the two decoding modules D, E, and the decoding module D, E is used for obtaining the added value types and the quantity of the added values output by each delay unit; the judging module is in communication connection with the two decoding modules D, E, and is used for presetting conditions and judging time information data of the state change signals based on the sum value and the quantity thereof obtained by the decoding module D, E, and the indicating module is in communication connection with the judging module and prompts storage of the time information data based on the judging result of the judging module. Specifically, the two decoding modules D, E may be a rising edge decoding module and a falling edge decoding module, respectively, which are configured to obtain the type of the sum value and the number of the sum values output by each delay unit based on the state change signal.

In some alternative embodiments of the present application, the judging module and/or the indicating module may be further disposed in the decoding module, that is, the decoding module may include the judging module and/or the indicating module.

In some embodiments, the sampling module further includes a control storage module, where the control storage module is configured to store time information data corresponding to the state change signal. The control storage module is integrated on the FPGA chip. Specifically, when the indication module sends a signal for prompting to store the time information data, the storage module is controlled to store the time information data. In the embodiment of the application, only one control storage module can be arranged for storing the time information data corresponding to the state change signal acquired by each TDC multiplexing module, a plurality of control storage modules can also be arranged for respectively storing the time information data corresponding to the state change signal acquired by each TDC multiplexing module, and specifically, the control storage modules can be arranged to be in one-to-one correspondence with the TDC multiplexing modules, and the control storage modules can also be arranged to be in one-to-one correspondence with the decoding modules of the TDC modules. The specific design of the control memory module is referred to in the art and is not central to the present application and will not be described in detail herein. In some embodiments, the sampling module further includes a screening module for screening the scintillation pulses based on the acquired threshold-time pairs to filter the noise signal. The screening module is integrated on the FPGA chip. Typically, the scintillation pulse and the noise signal have a threshold difference value, which may be set to a first preset value as the noise filtering condition, i.e. the screening module sets the filtering condition: the pulse width (Duration over threshold, DOT) corresponding to the lowest threshold value crossed by the flicker pulse to be processed is not smaller than a first preset value so as to filter noise. For example, the width of the noise signal is generally less than 10ns, the width of the scintillation pulse is generally not less than 10ns, the signal with the DOT corresponding to the lowest threshold value not less than 10ns is the scintillation pulse, and the signal with the DOT corresponding to the lowest threshold value less than 10ns is the noise signal and is dropped.

Further, the screening module may be configured to screen the scintillation pulse based on the acquired threshold-time pair to filter the unwanted pulse signals and screen the scintillation pulse. The width of the scintillation pulse is typically less than a threshold value, which may be set to a second preset value as a filtering condition; the rising edge of the scintillation pulse is typically between a few nanoseconds and a tens of nanoseconds, and a third preset value can be set as the filtering condition. Based on this, the screening module sets the filtering conditions: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is not smaller than a first preset value and not larger than a second preset value, and the time difference between the rising edge of the scintillation pulse to be processed crossing the maximum threshold value and the time difference crossing the minimum threshold value is not larger than a third preset value, so that the needed pulse signals are screened out, and the unnecessary signals are discarded. The required pulse signal in embodiments of the present application may refer to a scintillation pulse signal output from a PET detector based on a scintillation crystal (e.g., lutetium silicate) coupled to a photoelectric conversion element (e.g., siPM or PMT). For example, the width of the scintillation pulse is typically within 200ns, and the rising edge of the scintillation pulse is typically between several nanoseconds and tens of nanoseconds, and the time difference between the rising edge crossing the maximum threshold and the time crossing the minimum threshold is typically not greater than 2ns, so in this example, 200ns may be taken as the second preset value, and 2ns may be taken as the third preset value, where the filtering condition set by the screening module may be set as follows: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is less than or equal to 10ns and less than or equal to 200ns, and the time difference between the rising edge of the scintillation pulse to be processed and crossing the maximum threshold value and crossing the minimum threshold value is less than or equal to 2ns.

In one embodiment of the application, the sampling module is implemented using a multi-voltage threshold (MVT) sampling board comprising an FPGA chip. The plurality of LVDS comparators of the comparison module may be low-voltage differential signaling (LVDS) comparators based on an FPGA chip, and the time-to-digital converter (Time to Digital Convertor, hereinafter referred to as TDC) multiplexing module is also integrated in the FPGA chip.

In the embodiment of the application, each multiplexing digitizing module of the sampling module is used for time sampling the state change signal determined based on the threshold corresponding to the multiplexing digitizing module, and the method comprises the following steps:

step S131, based on the received state change signal, obtaining an addition value output at equal time intervals.

In the embodiment of the present application, after the state change signal is acquired in step S120, the sum may be acquired at equal time intervals based on the state change signal. In a specific example, the obtaining of the sum value output by the multiplexing digitizing module at the equal time interval is realized by a carry chain multiplexing module of the multiplexing digitizing module, the carry chain multiplexing module comprises a plurality of cascaded delay units, and the sum value output by the multiplexing digitizing module comprises the sum value output by each delay unit.

As can be seen from the foregoing description, the multiplexing digitizing module includes a TDC multiplexing module, the TDC multiplexing module includes a carry chain multiplexing module, the carry chain multiplexing module a includes a plurality of cascaded delay units, the delay units are implemented by an adder Adder, and the adder Adder outputs a sum value of 0 or 1. Each TDC multiplexing module works under the unified external clock condition, the period of a clock signal is T, the period T of the clock signal can be used for representing coarse time, and the coarse time can be obtained by counting the period T through a counter. The "isochronous interval" in the embodiments of the present application refers to the clock signal period T, i.e., the period T of coarse time. And in each coarse time period T, each delay unit of the carry chain multiplexing module updates and outputs a sum value of 0 or 1. The output of the sum value at equal time intervals in the embodiment of the application refers to that each delay unit of the carry chain multiplexing module outputs the sum value at equal time intervals of a coarse time period T.

Referring to fig. 7-8, a digital level flip signal sig output by the comparator LVDS is connected to the "a" end of the first-stage adder Adder of each carry chain multiplexing module a, when sig is 0, under the condition that the "b" end of the first-stage adder is set to "1" and the "cin" end is set to "1", the Sum value output by the Sum output end Sum of the first-stage adder is 0, the value output by the carry output end Cout is 1, and the value 1 output by the carry output end Cout is used as the input of the second-stage adder, namely, the "cin" end of the second-stage adder is set to "1", and so on; when sig is 1, under the condition that the first-stage adder 'b' is end-set to '1' and the 'cin' is end-set to '1', the Sum value output by the Sum output end Sum of the first-stage adder is 1, the value output by the carry output end Cout is 0, the value 0 output by the carry output end Cout is taken as the input of the second-stage adder, namely, the 'cin' end-set to '0' of the second-stage adder, and so on. When the delay units output the sum value at the time interval of the coarse time period T, if at a certain output moment, for example, the outputs of the 88 adders Adder of the carry chain multiplexing module a are all 0, or the outputs of the 88 adders Adder are all 1, the rising edge or the falling edge of the state change signal is not corresponding; if the sum value output by 88 adders Adder is 1-n (1 is not less than n is not more than 87) level adder output is 1 at a certain output moment, and the output of the (n+1) -88 level adder is 0, the moment corresponds to the time of the rising edge; on the contrary, if the sum value of the 88 adders Adder at a certain output time is 0 at the output of the 1 st-n (1 n 87) th-stage adder, and the outputs of the (n+1) -88 th-stage adders are all 1, the time corresponds to the time of the falling edge at the moment.

And S132, decoding the addition value, and counting to obtain the types and the quantity of the addition value.

In the embodiment of the present application, after the step S131 obtains the addition value output at the equal time interval, the addition value may be decoded, and the kind and the number of the addition values are obtained statistically.

In a specific example, the multiplexing digitizing module comprises a trigger module and a decoding module which are in one-to-one correspondence; decoding the sum, including: and storing the addition value by adopting a trigger module, and transmitting the stored addition value to a decoding module for decoding.

As can be seen from the foregoing description, the multiplexing digitizing module includes a TDC multiplexing module, where the TDC module includes a trigger module and a decoding module that are in one-to-one correspondence, for example, two trigger modules are provided, and two decoding modules, for example, a rising edge decoding module and a falling edge decoding module, are provided, and then the two trigger modules are in one-to-one correspondence with the rising edge decoding module and the falling edge decoding module. And decoding the addition value, wherein all the addition values output by the carry chain multiplexing module can be stored by adopting two trigger modules of the TDC module, and the stored addition values are transmitted to the corresponding rising edge decoding module and the corresponding falling edge decoding module by the two trigger modules for decoding. Specifically, as can be seen from the foregoing embodiments, the carry chain multiplexing module outputs 88 summation values, and the 88 summation values are transmitted to the two flip-flop modules for storage; the two trigger modules are used for storing 88 summation values in sequence from left to right according to the output values from the first-stage adder to the last-stage adder, or storing the 88 summation values in sequence from right to left according to the output values from the first-stage adder to the last-stage adder, wherein the stored values are represented as q, then the two trigger modules are used for transmitting the q values to the rising edge decoding module and the falling edge decoding module, and the rising edge decoding module and the falling edge decoding module respectively count the arrangement sequence and the quantity of 0 and 1 in the received q values.

The rising edge decoding module and the falling edge decoding module are respectively provided with 11 decoding groups, the 1 st to 11 th decoding groups synchronously decode 8 addition values in the received q values, for example, the 1 st decoding group can decode the addition values output by the 1 st to 8 th adder, the 2 nd decoding group can decode the addition values output by the 9 th to 16 th adder, and so on, 88 addition values are 0, 88 addition values are 1, and the 88 addition values comprise three statistical results of 0 and 1 according to the decoding result of each decoding group. The first two results do not correspond to the time of the rising edge or the falling edge, the third result corresponds to the time of the rising edge or the falling edge, and whether the time corresponding to the rising edge or the time corresponding to the falling edge is judged according to the statistical results of the rising edge decoding module and the falling edge decoding module.

In another specific example, the multiplexing and digitizing module includes a trigger multiplexing module and at least one decoding module, and decoding the summation value output by the multiplexing and digitizing module includes: and storing the addition value by adopting a trigger multiplexing module, and transmitting the stored addition value to a decoding module for decoding.

As can be seen from the foregoing description, the multiplexing digitizing module includes a TDC multiplexing module, where the TDC multiplexing module includes a trigger multiplexing module and at least one decoding module, specifically, a trigger multiplexing module is provided, two decoding modules, for example, a rising edge decoding module and a falling edge decoding module are provided, and the trigger multiplexing module is communicatively connected with the rising edge decoding module and the falling edge decoding module. And decoding the addition values, wherein all the addition values output by the carry chain multiplexing module can be stored by adopting a trigger multiplexing module of the TDC module, and the stored addition values are respectively transmitted to the rising edge decoding module and the falling edge decoding module by the trigger multiplexing module for decoding. Specifically, as can be seen from the foregoing embodiments, the carry chain multiplexing module outputs 88 summation values, and the 88 summation values are transmitted to the flip-flop multiplexing module for storage; the trigger multiplexing module is used for arranging and storing 88 summation values from left to right according to the sequence from the first-stage adder to the last-stage adder, or arranging and storing the 88 summation values from right to left according to the sequence from the first-stage adder to the last-stage adder, wherein the storage values are represented as q, then the trigger multiplexing module is used for respectively transmitting the q values to the rising edge decoding module and the falling edge decoding module, and the rising edge decoding module and the falling edge decoding module are used for respectively counting the arrangement sequence and the quantity of 0 and 1 in the received q values. The rising edge decoding module and the falling edge decoding module are respectively provided with 11 decoding groups, the 1 st to 11 th decoding groups synchronously decode 8 addition values in the received q values, for example, the 1 st decoding group can decode the addition values output by the 1 st to 8 th adder, the 2 nd decoding group can decode the addition values output by the 9 th to 16 th adder, and the like, and 88 addition values are 0, 88 addition values are 1, and 88 addition values comprise three statistical results of 0 and 1 according to the decoding results of each decoding group. The first two results do not correspond to the time of the rising edge or the falling edge, the third result corresponds to the time of the rising edge or the falling edge, and whether the time corresponding to the rising edge or the time corresponding to the falling edge is judged according to the statistical results of the rising edge decoding module and the falling edge decoding module.

Step S133, based on preset conditions, judging whether the current added value type and the current added value quantity correspond to the time information of the state change signal according to the added value type and the current added value quantity.

In some embodiments, after the step S132 counts the types and the amounts of the obtained addition values, it may be determined whether the current types and the amounts of the addition values correspond to the time information of the state change signal based on the preset conditions according to the types and the amounts of the addition values.

In a specific example, based on a preset condition, according to the type and the number of the added values, whether the current type and the number of the added values correspond to the time information of the state change signal is judged by the judging module of the multiplexing digitizing module, where the preset condition is the type and the number of the added values corresponding to the state change signal under the set arrangement condition.

As can be seen from the foregoing description, the multiplexing digitizing module includes a TDC multiplexing module, where the TDC module includes a judging module, and the judging module sets a preset condition, and judges whether the current type of the added value and the number thereof correspond to time information of the state change signal according to the type of the added value and the number thereof.

As can be seen from the foregoing description, the preset conditions set by the judging module may be:

In an example, for example, the statistical result received by the judging module of the rising edge decoding module is that, according to the arrangement sequence of the output values from the first-stage adder to the last-stage adder from left to right, the 1 st to 40 th summation values are all 0, the 41 st to 88 th summation values are 1, if the 88 summation values include 0 and 1 at the same time, the time of the corresponding rising edge or falling edge is judged; and according to the addition value 0, the row is arranged at 1-40 bits, the row 1 is arranged at 41-88 bits, and the time of the falling edge is judged. For another example, the statistical result of the rising edge decoding module received by the judging module is that the 1 st to 6 th summation values are all 1 and the 7 th to 88 th summation values are 0 according to the arrangement sequence of the output values from the first-stage adder to the last-stage adder from left to right, then the 88 summation values simultaneously comprise 0 and 1, then the time of the corresponding rising edge or the falling edge is judged, and the number of the summation values 0 can represent fine time; the number 6 of the addition values 1 can represent fine time according to the time of judging rising edges when the addition values 1 are arranged in 1-6 bits and 0 is arranged in 7-88 bits.

Step S134, if yes, prompting to store time information data of the current state change signal; if not, continuing to judge the summation value output at the equal time interval.

In some embodiments, step S133 may determine whether to store the time information data according to the determination condition after determining whether the current sum type and the current sum number correspond to the time information of the state change signal according to the sum type and the sum number based on the preset condition, and specifically, if so, prompt to store the time information data of the current state change signal; if not, continuing to judge the summation value output at the equal time interval.

In a specific example, the time information data includes a period number for representing coarse time, a kind and a number of summation values which are output by a multiplexing digitizing module for representing fine time and meet preset conditions, wherein the preset conditions are set by a judging module of the multiplexing digitizing module; the storing of the time information data of the state change signal includes: and storing the number of periods used for representing coarse time, the types and the number of summation values which are output by each delay unit of the carry chain multiplexing module used for representing fine time and meet preset conditions. For example, continuing to step S133, for the time information data of the rising edge, the adder of the carry chain multiplexing module needs to store the number of periods of the coarse time corresponding to when the 88 added values are output, for example, the 88 added values output in the 50 th period store the number of periods 50 of the coarse time, the added value 0 is arranged in bits 1-40, then 40 is used to represent the fine time, and the data 40 needs to be stored; similarly, for example 2, if the 88 summations were output at the 80 th coarse time period, then the number of cycles 80 would need to be stored, representing the number 6 of fine time summations 1.

In some embodiments, prompting for storing time information data for a current state change signal includes: an indication module adopting a multiplexing and digitizing module generates an indication signal for prompting the storage of time information data. As can be seen from the foregoing description, the multiplexing digitizing module includes a TDC multiplexing module, and the TDC module includes an indicating module. The indication module is used for generating an indication signal after receiving the time information of the state change signals corresponding to the current addition value type and the current addition value quantity indicated by the judgment result of the judgment module, and indicating and controlling the storage module to store the time information data. In one example, the indication signal generated by the indication module may be a pulse signal lasting 5 ns.

The digitizing method for scintillation pulses is exemplified as follows:

Referring to fig. 8, each TDC multiplexing module adopted by the sampling module includes a carry chain multiplexing module a,2 flip-flop modules B, C,2 decoding modules D, E, B and D, and examples corresponding to C and E are illustrated, where a scintillation pulse signal crosses 4 thresholds V1, V2, V3, V4 to generate 4 digital level flip signals sig1, sig2, sig3, sig4, sig1, sig2, sig3, sig4 through an LVDS comparator, and the signals are sent to the 4 paths TDC multiplexing module according to the embodiment of the present application to be sampled, and finally 8 sampling points (V1, t 1), (V2, t 2), (V3, t 3), (V4, t 4), (V4, t 5), (V3, t 6), (V2, t 7), (V1, t 8) are obtained. The 1 st, 2 nd, 3 rd and 4 th rising edge time t1, t2 nd, t3 rd and t4 th rising edge time are sampled by utilizing 4 paths of TDC circuits consisting of a carry chain multiplexing module A, a trigger module B and a decoding module D of the 4 TDC multiplexing modules in the embodiment of the application respectively; the 1 st, 2 nd, 3 rd and 4 th falling edge times t5, t6 th, t7 th and t8 th are respectively sampled by using 4 paths of TDC circuits consisting of a carry chain multiplexing module A, a trigger module C and a decoding module E of the 4 TDC multiplexing modules in the embodiment. The acquired 8 sampling points are sent into a screening module to be screened, noise signals and unnecessary pulse signals are filtered, expected scintillation pulse signals are screened out, then sampling data corresponding to the screened scintillation pulse signals are sent to an upper computer to be subjected to pulse reduction in a wired or wireless communication mode, time, energy and position information are extracted, and a PET equipment-related image processing component is adopted to carry out subsequent PET image reconstruction.

It should be noted that the above description of the steps in fig. 4 is only for illustration and description, and does not limit the application scope of the present specification. Various modifications and changes to the individual steps of fig. 4 may be made by those skilled in the art under the guidance of this specification. However, such modifications and variations are still within the scope of the present description.

It should be noted that the embodiment shown in fig. 8 is only illustrated by taking four thresholds as an example, however, it should be understood by those skilled in the art that the number of the thresholds, the number of the comparators, and the number of the comparators and the number of the TDC multiplexing modules may be increased or decreased according to the actual situation, which is not limited herein.

According to the scintillation pulse digitizing method disclosed by the application, the state change signals determined based on the thresholds corresponding to the scintillation pulse digitizing modules are subjected to time sampling, so that the corresponding threshold-time pairs when the pulse signals to be processed cross the thresholds are obtained, the multiplexing of the time sampling modules can be realized while the sampling precision is ensured, the logic resources are greatly saved, and the energy consumption is effectively reduced.

Fig. 10 is an exemplary block diagram of a scintillation pulse digitizing apparatus, according to some embodiments of the present description. The flash pulse digitizing device can realize the sampling of flash pulses. As shown in fig. 10, the flash pulse digitizing apparatus 200 may include a threshold setting module 210, a comparison module 220, and a sampling module 230.

The threshold setting module 210 is configured to preset at least two preset thresholds.

The comparing module 220 is configured to compare the pulse signal to be processed with the at least two thresholds in parallel and synchronously, and determine state change signals corresponding to the at least two thresholds when the scintillation pulse to be processed passes the thresholds.

The sampling module 230 includes at least two multiplexing and digitizing modules, where the multiplexing and digitizing modules are in one-to-one correspondence with the comparing modules, and the multiplexing and digitizing modules are configured to time sample the state change signal determined based on the threshold corresponding to the multiplexing and digitizing modules, and obtain the corresponding threshold-time pair when the pulse signal to be processed crosses each threshold.

In some embodiments, the multiplexing digitizing module comprises a TDC multiplexing module configured to time sample the state change signal determined based on the threshold value (and its corresponding threshold value). The specific design of the TDC multiplexing module may refer to the embodiment of the scintillation pulse digitizing apparatus shown in fig. 10, and is specifically illustrated with reference to fig. 7-9, which are not described herein.

In some embodiments, the sampling module 230 further includes a control storage module for storing time information data corresponding to the state change signal.

In some embodiments, the sampling module 230 further includes a discrimination module configured to set a discrimination condition to discriminate between scintillation pulses to be processed based on the acquired threshold-time pairs.

Threshold setting module in the embodiment of the present application, the specific designs and effects of the threshold setting module 210, the comparing module 220, the multiplexing digitizing module of the sampling module 230, the control storage module, and the screening module, and the threshold setting module presets at least two preset thresholds, and based on the state change signals corresponding to the at least two thresholds when the comparing module determines that the scintillation pulse to be processed crosses the threshold, the sampling module obtains the specific designs of the threshold-time pairs by using the at least two multiplexing digitizing modules, which will not be described herein.

The scintillation pulse digitizing apparatus described in the embodiments of the present application may incorporate the features of the scintillation pulse digitizing method described in the embodiments of the present application, and vice versa.

According to the scintillation pulse digitizing device disclosed by the application, the sampling module comprising the multiplexing digitizing modules is used for sampling, the multiplexing digitizing modules are used for sampling the state change signals determined based on the thresholds corresponding to the multiplexing digitizing modules in time, so that the threshold-time pairs corresponding to the pulse signals to be processed when the pulse signals to be processed cross the thresholds can be obtained, the multiplexing of the time sampling module can be realized while the sampling precision is ensured, the logic resources are greatly saved, and the energy consumption is effectively reduced.

Some embodiments of the present application provide a TDC multiplexing assembly. The TDC multiplexing assembly includes a TDC multiplexing module. The specific design of the TDC multiplexing module may refer to the embodiment of the scintillation pulse digitizing apparatus shown in fig. 10, and the specific reference is made to the examples of fig. 7-9, which are not described herein.

According to the TDC component disclosed by the application, the TDC multiplexing module multiplexes the carry chain and further multiplexes the trigger module, so that logic resources are greatly saved, and the energy consumption is effectively reduced. The TDC multiplexing component is used for carrying out time sampling on the state change signals determined based on the threshold values corresponding to the TDC multiplexing component, so that the threshold value-time pairs corresponding to the pulse signals to be processed when the pulse signals to be processed cross the threshold values can be obtained, and multiplexing of the time sampling module can be realized while the sampling precision is ensured.

It should be noted that the above description of the modules is for convenience of description only and is not intended to limit the present description to the scope of the illustrated embodiments. It will be appreciated by those skilled in the art that, given the principles of the system, various modules may be combined arbitrarily or a subsystem may be constructed in connection with other modules without departing from such principles. For example, each module may share one memory module, or each module may have a respective memory module. Such variations are within the scope of the present description.

An embodiment of the present application provides a digitizing apparatus, including a scintillation pulse digitizing device according to any of the embodiments of the present application.

An embodiment of the present application provides a digitizing apparatus, including a TDC multiplexing assembly according to any of the embodiments of the present application.

An embodiment of the present application provides a digitizing apparatus, including: a memory, a processor and a computer program stored on the memory and executable on the processor, which when executed by the processor, performs the steps of the method of any of the embodiments of the application.

The apparatus, devices described in the embodiments of the present application may incorporate the method features described in the embodiments of the present application and vice versa.

Although not shown, some embodiments of the present application also provide a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method of any of the embodiments of the present application.

The computer program comprises program modules/units constituting the apparatus according to the embodiments of the present application, which, when executed, enable the implementation of functions corresponding to the steps of the methods described in the above embodiments. The computer program may also be run on a computer device according to an embodiment of the application.

Storage media in embodiments of the application include non-volatile and/or volatile articles of manufacture that can implement information storage by any method or technology. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

Those skilled in the art will appreciate that the embodiments of the present description may be implemented in a variety of forms, such as a method, system, or computer program product. Thus, it will be apparent to those skilled in the art that the functional modules/units or controllers and associated method steps set forth in the above embodiments may be implemented in software, hardware, and a combination of software/hardware.

The acts of the methods, procedures, or steps described in accordance with the embodiments of the present application do not have to be performed in a specific order and still achieve desirable results unless explicitly stated. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

Various embodiments are described herein, but the description of the various embodiments is not exhaustive and the same or similar features or portions between the various embodiments may be omitted for the sake of brevity. Herein, "one embodiment," "some embodiments," "example," "specific example," or "some examples" means that it is applicable to at least one embodiment or example, but not all embodiments, according to the present application. The above terms are not necessarily meant to refer to the same embodiment or example. Those skilled in the art may combine and combine the features of the different embodiments or examples described in this specification and of the different embodiments or examples without contradiction.

The exemplary systems and methods of the present application have been particularly shown and described with reference to the foregoing embodiments, which are merely examples of the best modes for carrying out the systems and methods. It will be appreciated by those skilled in the art that various changes may be made to the embodiments of the systems and methods described herein in practicing the systems and/or methods without departing from the spirit and scope of the application as defined in the following claims.

Claims

1. A method of digitizing a scintillation pulse, the method comprising:

Presetting at least two thresholds and at least two multiplexing digitizing modules arranged in parallel, wherein the multiplexing digitizing modules correspond to the at least two thresholds one by one;

Synchronously and parallelly comparing a pulse signal to be processed with the at least two thresholds, and determining state change signals corresponding to the at least two thresholds respectively when the scintillation pulse to be processed passes through the thresholds;

each multiplexing and digitizing module of the sampling module is used for carrying out time sampling on the state change signal determined based on the threshold value corresponding to the multiplexing and digitizing module, and corresponding threshold value-time pairs when the pulse signal to be processed passes through each threshold value are obtained, and the method specifically comprises the following steps:

Acquiring an addition value output at equal time intervals based on the state change signal;

Decoding the addition value, and counting to obtain the type and the number of the addition value;

Based on preset conditions, judging whether the current addition value type and the current addition value quantity correspond to time information of the state change signal according to the addition value type and the current addition value quantity;

If yes, prompting to store time information data of the current state change signal; if not, continuing to judge the summation value output at the equal time interval.

2. The scintillation pulse digitizing method of claim 1, wherein obtaining the output sum value at equal time intervals is implemented using a carry chain multiplexing module of the multiplexing digitizing module, the carry chain multiplexing module comprising a plurality of cascaded delay units, the output sum value of the multiplexing digitizing module comprising the output sum value of each delay unit.

3. The method of digitizing a scintillation pulse of claim 1, wherein the sum is 0 or 1.

4. The method of digitizing scintillation pulses of claim 1, wherein the equal time interval is a period of coarse time.

5. The method of claim 1, wherein the multiplexing digitization module comprises a trigger module and a decoding module in one-to-one correspondence; decoding the sum, including:

and storing the addition value by adopting a trigger module, and transmitting the stored addition value to a decoding module for decoding.

6. The method of claim 1, wherein the multiplexing digitization module comprises a flip-flop multiplexing module and at least one decoding module for decoding the summed value output by the multiplexing digitization module, comprising:

and storing the addition value by adopting a trigger multiplexing module, and transmitting the stored addition value to a decoding module for decoding.

7. The method according to claim 1, wherein the step of determining whether the current sum type and the current sum number correspond to the time information of the state change signal is implemented by the determination module of the multiplexing digitizing module based on a preset condition, wherein the preset condition is the sum type and the current sum number corresponding to the state change signal under a set arrangement condition.

8. The method of digitizing a scintillation pulse of claim 1, wherein prompting for time information data storing the current state change signal comprises: an indication module adopting a multiplexing and digitizing module generates an indication signal for prompting the storage of time information data.

9. The method according to claim 1, wherein the time information data includes a period number for representing a coarse time, a kind of a sum value output by a multiplexing digitizing module for representing a fine time, which meets a preset condition set by a judging module of the multiplexing digitizing module, and a number thereof; the storing of the time information data of the state change signal includes:

and storing the number of periods used for representing coarse time, the types and the number of summation values which are output by each delay unit of the carry chain multiplexing module used for representing fine time and meet preset conditions.

10. The method according to any one of claims 1 to 9, wherein the time information data includes a number of periods for characterizing the coarse time, a kind of sum values and a number thereof for characterizing the fine time, which are output by the multiplexing digitizing module and meet preset conditions, the preset conditions being set by the judging module.

11. The method of digitizing scintillation pulses of claim 1, further comprising:

based on the acquired threshold-time pairs, the scintillation pulses are discriminated to filter the noise signal.

12. The method of digitizing scintillation pulses of claim 11, further comprising:

Discriminating the scintillation pulse to filter the noise signal includes setting a noise filtering condition: the pulse width corresponding to the lowest threshold value crossed by the flicker pulse to be processed is not smaller than a first preset value.

13. The method of digitizing scintillation pulses of claim 1, further comprising:

Based on the acquired threshold-time pairs, the scintillation pulse to be processed is discriminated to filter unwanted pulse signals.

14. The method of digitizing scintillation pulses of claim 1, further comprising:

Based on the acquired threshold-time pair, discriminating the scintillation pulse to be processed, and setting filtering conditions to filter unnecessary pulse signals, wherein the set filtering conditions are as follows: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is not smaller than a first preset value and not larger than a second preset value, and the time difference between the rising edge of the scintillation pulse to be processed crossing the maximum threshold value and the time crossing the minimum threshold value is not larger than a third preset value.

15. A scintillation pulse digitizing apparatus, the digitizing apparatus comprising:

The threshold setting module is configured to preset at least two preset thresholds;

The comparison module is in one-to-one correspondence with the at least two thresholds and is configured to synchronously and parallelly compare the pulse signals to be processed with the at least two thresholds, and determine state change signals corresponding to the at least two thresholds respectively when the scintillation pulse to be processed passes through the thresholds;

The sampling module comprises at least two multiplexing and digitizing modules, the multiplexing and digitizing modules are in one-to-one correspondence with the comparison modules, the multiplexing and digitizing modules are configured to sample time of state change signals determined based on thresholds corresponding to the multiplexing and digitizing modules, and corresponding threshold-time pairs when the pulse signals to be processed cross the thresholds are obtained.

16. The scintillation device of claim 15, wherein the threshold setting module includes a digital-to-analog converter for presetting at least two of the thresholds.

17. The scintillation device of claim 15, wherein the comparison module includes at least two comparators disposed in parallel, each comparator independently comparing the scintillation pulse to be processed with one of the thresholds.

18. The scintillation device of claim 17, wherein the comparator is an LVDS of an FPGA chip.

19. The scintillation pulse digitizing apparatus of claim 15, wherein the state change signal comprises a rising edge indicating that the scintillation pulse to be processed first crosses the threshold value and a falling edge that crosses the threshold value a second time.

20. The scintillation pulse digitizing apparatus of claim 15, wherein the multiplexed digitizing module is configured to time sample the state change signal determined based on the threshold corresponding thereto, comprising:

21. The scintillation device of claim 20, wherein the obtaining of the equal time interval output summation value is implemented by a carry chain multiplexing module of the multiplexing digitizing module, the carry chain multiplexing module comprising a plurality of cascaded delay units, the summation value output by the multiplexing digitizing module comprising the summation value output by each delay unit.

22. The scintillation device of claim 20 wherein the sum is 0 or 1.

23. The scintillation device of claim 20 wherein the equal time interval is a period of coarse time.

24. The scintillation pulse digitizing apparatus of claim 20, wherein the time information data comprises a number of periods characterizing coarse time, a type of sum value satisfying a preset condition set by a judgment module of the multiplexing digitizing module, and a number thereof, which are output by the multiplexing digitizing module characterizing fine time; the storing of the time information data of the state change signal includes:

25. The scintillation device of claim 20, wherein the sampling module further comprises a control storage module for storing time information data of the current state change signal based on the control storage module implementation.

26. The apparatus according to any one of claims 20 to 25, wherein the time information data includes a number of periods for characterizing the coarse time, a kind of sum value and a number thereof for characterizing the fine time, which are output by the multiplexing digitizing module and meet a preset condition, the preset condition being set by the judging module.

27. The scintillation pulse digitizing apparatus of claim 15, wherein the multiplexed digitizing module comprises a TDC multiplexing module for time sampling a state change signal determined based on the threshold.

28. The scintillation device of claim 27 wherein the TDC multiplexing module comprises a carry chain multiplexing module, at least one flip-flop module, at least one decode module, a judgment module, and an indication module;

The carry chain multiplexing module comprises a plurality of cascaded delay units, wherein the delay units are used for outputting addition values;

The at least one trigger module is in communication connection with the carry chain multiplexing module, the decoding modules are in one-to-one correspondence and in communication connection with the trigger modules, the trigger modules are used for storing the addition values output by the carry chain multiplexing module and transmitting the addition values to the at least one decoding module, and the decoding module is used for obtaining the types of the addition values output by each delay unit and the number of the addition values; the judging module is in communication connection with the at least one decoding module, and is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

29. The apparatus of claim 28, wherein the TDC multiplexing module includes a carry chain multiplexing module, two flip-flop modules, two decode modules, a judgment module, and an indication module,

The two trigger modules are in communication connection with the carry chain multiplexing module, the two decoding modules are in one-to-one correspondence and are in communication connection with the two trigger modules, the trigger modules are used for storing the addition value output by the carry chain multiplexing module and transmitting the addition value to the two decoding modules, and the decoding modules are used for obtaining the addition value types output by each delay unit and the number of the addition values; the judging module is in communication connection with the two decoding modules, the judging module is used for presetting conditions and judging time information data of state change signals based on the types and the quantity of the addition values obtained by the decoding modules, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

30. The scintillation device of claim 27, wherein the TDC multiplexing module comprises a carry chain multiplexing module, a flip-flop multiplexing module, at least one decoding module, a determination module, and an indication module;

The trigger multiplexing module is in communication connection with the carry chain multiplexing module, the decoding module is in communication connection with the trigger multiplexing module, the trigger multiplexing module is used for storing the addition value output by the carry chain multiplexing module and transmitting the addition value to the corresponding decoding module, the decoding module is used for obtaining the addition value type and the number of each addition value output by each delay unit, the judging module is in communication connection with at least one decoding module, the judging module is used for presetting conditions and judging time information data of state change signals based on the addition value type and the number obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts storing of the time information data based on the judging result of the judging module.

31. The scintillation device of claim 30, wherein the TDC multiplexing module comprises a carry chain multiplexing module, a flip-flop multiplexing module, two decoding modules, a judgment module, and an indication module;

The trigger multiplexing module is in communication connection with the carry chain multiplexing module, the two decoding modules are in communication connection with the trigger multiplexing module, the trigger multiplexing module is used for storing the added value output by the carry chain multiplexing module and respectively transmitting the added value to the two decoding modules, and the decoding modules are used for obtaining the added value types and the quantity of the added values output by the delay units; the judging module is in communication connection with the two decoding modules, the judging module is used for presetting conditions and judging time information data of the state change signals based on the types and the quantity of the addition values obtained by the decoding modules, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

32. The scintillation device of claim 19, wherein the TDC multiplexing module comprises a carry chain multiplexing module, two flip-flop modules, a rising edge decoding module, a falling edge decoding module, a judgment module, and an indication module;

The two trigger modules are in communication connection with the carry chain multiplexing module, the added value output by the carry chain multiplexing module is transmitted to the two trigger modules in two paths, the two trigger modules are respectively in communication connection with the rising edge decoding module and the falling edge decoding module, and are used for storing the added value output by the carry chain multiplexing module and transmitting the stored value to the rising edge decoding module and the falling edge decoding module, and the rising edge decoding module and the falling edge decoding module are used for obtaining the added value types and the quantity of the added values output by each delay unit; the judging module is in communication connection with the rising edge decoding module and the falling edge decoding module and is used for presetting conditions and judging time information data of the rising edge and the falling edge based on the type and the quantity of the added values obtained by the decoding module, the indicating module is in communication connection with the judging module, and the indicating module prompts to store the time information data based on the judging result of the judging module.

33. The scintillation device of claim 19, wherein the TDC multiplexing module comprises a carry chain multiplexing module, a flip-flop multiplexing module, a rising edge decoding module, a falling edge decoding module, a determination module, and an indication module;

The trigger multiplexing module is in communication connection with the carry chain multiplexing module, the added value output by the carry chain multiplexing module is transmitted to the trigger multiplexing module, the trigger multiplexing module is in communication connection with the rising edge decoding module and the falling edge decoding module respectively, and is used for storing the added value output by the carry chain multiplexing module and transmitting the stored value to the rising edge decoding module and the falling edge decoding module respectively, and the rising edge decoding module and the falling edge decoding module are used for obtaining the added value types and the quantity of the added values of the delay units; the judging module is in communication connection with the rising edge decoding module and the falling edge decoding module and is used for presetting conditions and judging time information data of the rising edge and the falling edge based on the types and the quantity of the addition values obtained by the rising edge decoding module and the falling edge decoding module, and the indicating module is in communication connection with the judging module and is used for prompting to store the time information data of the rising edge and the falling edge based on the judging result of the judging module.

34. The scintillation pulse digitizing apparatus of claim 15, wherein the sampling module further comprises a screening module configured to set screening conditions to screen the scintillation pulse to be processed based on the acquired threshold-time pairs.

35. The scintillation device of claim 34, wherein the discrimination condition is: the pulse width corresponding to the lowest threshold value crossed by the flicker pulse to be processed is not smaller than a first preset value so as to filter noise.

36. The scintillation device of claim 34, wherein the discrimination condition is: the pulse width corresponding to the lowest threshold value crossed by the scintillation pulse to be processed is not smaller than a first preset value and not larger than a second preset value, and the time difference between the rising edge of the scintillation pulse to be processed crossing the maximum threshold value and the time difference crossing the minimum threshold value is smaller than or not larger than a third preset value so as to filter unnecessary pulse signals.

37. A digitizing apparatus, comprising: the scintillation device of any one of claims 15 to 36.

38. A digitizing apparatus, comprising: memory, a processor and a computer program stored on the memory and executable on the processor, which when executed by the processor, implements the steps of the digitizing method according to any of claims 1 to 14.

39. A computer-readable storage medium, on which a computer program is stored which, when executed by a processor, implements the steps of the digitizing method according to any of claims 1 to 14.