CN118248577A - Oxide channel transistor defect state density testing method and system - Google Patents
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- 239000000463 material Substances 0.000 claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 22
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- 238000000151 deposition Methods 0.000 claims description 18
- 238000000059 patterning Methods 0.000 claims description 14
- 238000002161 passivation Methods 0.000 claims description 11
- 229910052719 titanium Inorganic materials 0.000 claims description 11
- 238000001039 wet etching Methods 0.000 claims description 10
- 238000005259 measurement Methods 0.000 claims description 7
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
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- 238000000231 atomic layer deposition Methods 0.000 description 8
- 238000001755 magnetron sputter deposition Methods 0.000 description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
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- 239000011733 molybdenum Substances 0.000 description 6
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Abstract
The invention relates to the technical field of semiconductor characterization and testing, in particular to a method and a system for testing the defect state density of an oxide channel transistor, which are used for preparing the oxide channel transistor, measuring the capacitance-voltage characteristic curve of the transistor under the condition of dark light and blue light irradiation respectively, and further calculating the deep energy level defect state density value of the oxide channel transistor. Therefore, the light-assisted capacitance-voltage test method provides a detection basis for rapidly evaluating the quality of the novel oxide channel transistor and related defect sources.
Description
Technical Field
The invention relates to the technical field of semiconductor characterization and testing, in particular to a method and a system for testing defect state density of an oxide channel transistor.
Background
Oxide semiconductors are a class of electronic materials that can be used to fabricate semiconductor devices, including transistors, and corresponding integrated circuits. Oxide semiconductor materials, such as IGZO, inO, znO, etc., have a larger band gap, higher carrier mobility, and are easier to prepare large-area high-quality films, and are widely used in the fields of display panels, DRAMs, etc.
Oxide materials are typically present in amorphous form and have relatively complex densities of sub-bandgap defect states, which can have a relatively large impact on device performance and reliability. Currently, for a narrow bandgap semiconductor material, such as Si (eg= -1.1 eV), the defect state density of the narrow bandgap semiconductor material can be estimated directly by measuring and extracting subthreshold swing.
However, for oxide materials with a large forbidden bandwidth such as IGZO (eg= -3.2 eV), the subthreshold swing extracted in the experiment cannot fully reflect the defect state density due to the limitation of the test range and the precision of the ammeter.
Therefore, in order to evaluate the characteristics of the oxide material more accurately, it is necessary to develop a new test characterization method with high usability and high reliability, so as to evaluate the forbidden band internal state density of the oxide material.
Based on the core effect of defect state density in the oxide material transistor, the invention combines the illumination experimental phenomenon and potential process-defect correlation, develops a test method which is simple in calculation and reliable in result and is used for characterizing the main defect state density in an oxide channel, and provides a physical method with high usability and high reliability for rapidly evaluating the quality of a novel oxide channel transistor and related defect sources.
Disclosure of Invention
The invention aims to provide a method and a system for testing the defect state density of an oxide channel transistor, wherein the method can be used for testing the state density in the forbidden band of an oxide material, and has high usability and high reliability.
In a first aspect, the present invention provides a method for testing the defect state density of an oxide channel transistor, comprising the steps of:
An oxide channel transistor was prepared, capacitance-voltage characteristic curves of the transistor were measured under dark and blue light irradiation conditions, respectively, and defect state densities were calculated by the following formula:
Wherein n defect is defect state density, and the unit is/cm 3; e is the base charge, 1.6X10 -19 coulombs; t channel is the channel thickness in cm; w is the length of the channel, and the unit is cm; l is the width of the channel in cm; v1 to V2 are voltage measurement range values; c L (V) is the capacitance measured under blue light irradiation, and F/cm 2;CD (V) is the capacitance measured under dark light, and F/cm 2.
The research shows that when the visible light with different wavelengths is used for irradiation, the transistor taking the oxide as the channel material can show different electrical characteristics, and the invention discovers that the light modulation effect is mainly derived from a Gaussian defect state formed by oxygen vacancies through a process comparison experiment and first sexual principle simulation, the energy level of the central defect is about 2.2eV from the conduction band edge, and the density of the light modulation effect is strongly related to the illumination and bias temperature stability of the transistor. Therefore, the testing method of the invention is mainly based on the core effect of the defect state density in the oxide material transistor, combines the illumination experimental phenomenon and the potential process-defect correlation, realizes the test of the state density in the forbidden band of the oxide material, has strong pertinence, high usability and high reliability, and provides a detection basis for rapidly evaluating the quality of the novel oxide channel transistor and related defect sources.
As the technical scheme, the testing method is preferably suitable for the oxide channel transistor with the channel thickness of any value between 5 and 100x10 -7 cm, the channel length of any value between 0.5 and 200x10 -7 cm and the channel width of any value between 0.5 and 100x10 -7 cm.
In the technical scheme, preferably, when the capacitance-voltage characteristic curve of the transistor is measured, the H end of the LCR meter is connected with a probe led out from the gate electrode, and the L end of the LCR meter is connected with probes led out from the source electrode and the drain electrode.
In order to ensure the accuracy and reliability of measurement calculation, when using dim light, the test should be performed in a dark environment, when using blue light, the blue light should keep the light source type consistent, and meanwhile, the light intensity consistency of the blue light is maintained, specifically, the light intensity of the blue light is any value between 1-10mW/cm 2, and the photon energy is about 2.6eV.
Preferably, the oxide channel transistor comprises a substrate insulating layer, a gate electrode, a bottom gate dielectric layer, an oxide channel layer, a passivation layer, a source electrode and a drain electrode; the material of the oxide channel layer comprises any one of IGZO, IGO and In 2O3, namely the test method of the invention is mainly suitable for the oxide channel transistors with larger forbidden band width, such as IGZO, IGO and In 2O3, which are used as the material of the oxide channel layer.
As the technical scheme, the materials of the source electrode, the drain electrode, the gate electrode, the passivation layer and the bottom gate dielectric layer in the oxide channel transistor are not strictly limited, conventional materials can be selected, and specifically, the source electrode metal and the drain electrode metal comprise any one of Ti, au, ni and TiN, and the thickness is 5-50nm; the gate electrode metal comprises any one of TiN and Mo, and the thickness is 5-200nm; the passivation layer is made of any one of Al 2O3 and SiO 2 and has a thickness of 20-500nm; the bottom gate dielectric layer is made of any one of HfO 2、Al2O3 and SiO 2 and has a thickness of 10-150nm.
As a preferred embodiment of the present invention, the method for preparing an oxide channel transistor specifically includes the following steps:
s1, depositing metal on the surface of silicon oxide, and performing patterning through dry etching to obtain a gate electrode;
S2, depositing HfO 2、Al2O3 or SiO 2 bottom gate dielectric by using atomic layer deposition and other technologies to obtain a bottom gate dielectric layer;
S3, depositing an oxide film by using technologies such as magnetron sputtering and the like, and performing wet etching through dilute nitric acid to pattern the oxide film to obtain an oxide channel layer;
s4, sequentially depositing source electrode metal layers and drain electrode metal layers, enabling the source electrode metal layers and the drain electrode metal layers to be in direct contact with the oxide channel layer, and performing patterning through photoresist stripping to obtain source electrode and drain electrode;
S5, using atomic layer deposition and other technologies to deposit Al 2O3 or SiO 2 as passivation layers in a whole piece.
Preferably, in the technical scheme, before testing the defect state density of the oxide channel transistor, the gate electrode and the source and drain electrode regions are subjected to hole digging treatment by wet etching, and the source and drain electrodes and the gate electrode are exposed for connection and testing with an LCR meter.
In a second aspect, the invention also discloses a system for testing the defect state density of the oxide channel transistor, which belongs to the protection scope of the invention, specifically, the system comprises an oxide channel transistor, a probe station, an LCR (liquid crystal display) meter and a light-focusing blue light source, wherein the oxide channel transistor is fixed on the probe station, the probe is used for contacting a gate electrode, a source electrode and a drain electrode of the oxide channel transistor, an H end of the LCR meter is connected with the gate electrode probe, an L end of the LCR meter is connected with the source electrode and the drain electrode probe, and the light-focusing blue light source is used for providing blue light with specific light intensity.
The oxide channel transistor defect state density test has at least the following beneficial effects: and the energy of electrons captured in the deep level defects in the channel material is provided by using the larger photon energy (about 2.6 eV) of the blue light source under the condition of no thermal excitation (such as high temperature), so that the excitation and characterization of the captured electrons and the corresponding defects are realized. The measurement mode of light auxiliary excitation can provide higher energy than the thermal excitation mode, and can realize low damage and even no damage to the tested device, and the characteristics of oxide materials are easily changed due to the excessively high temperature, so that the test result is greatly influenced.
The testing method is mainly based on the core effect of the defect state density in the oxide material transistor, combines the illumination experimental phenomenon and the potential process-defect correlation, and is used for testing the state density in the forbidden band of the oxide material. Therefore, the light-assisted capacitance-voltage test method provides a detection basis for rapidly evaluating the quality of the novel oxide channel transistor and related defect sources.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of an oxide channel transistor of the present invention;
FIG. 2 is a schematic diagram of the connection of the measurement system of the present invention under blue light (or no light) conditions;
Fig. 3 is a graph showing the capacitance-voltage characteristic of the measuring transistor according to the present invention.
Reference numerals:
1: a substrate insulating layer; 2: a gate electrode; 3: a bottom gate dielectric layer; 4: an oxide channel layer; 5: source and drain electrodes; 6: and a passivation layer.
Detailed Description
It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. As used herein, the singular forms also include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
The technical solutions of the present invention will be clearly and completely described in connection with the embodiments, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
S1, depositing a 20nm thick metal molybdenum film on a 300nm thick silicon oxide wafer by using a magnetron sputtering technology, and patterning by using a dry etching method to serve as a bottom gate metal electrode;
S2, using an atomic layer deposition technology to monolithically deposit aluminum oxide with the thickness of 50nm as a bottom gate dielectric layer;
S3, depositing an IGZO oxide of 50nm by using a magnetron sputtering technology single target sputtering method, and adopting dilute nitric acid to carry out wet etching patterning, wherein the patterned IGZO film layer is used as a channel layer of an oxide channel transistor;
S4, depositing titanium and gold by using an electron beam to prepare a source-drain electrode layer, wherein the titanium is in direct contact with the IGZO, and patterning the source-drain layer by adopting a photoresist stripping technology to obtain a source electrode and a drain electrode;
s5, using an atomic layer deposition technology to deposit aluminum oxide with the thickness of 70nm in a whole sheet to serve as a passivation layer;
S6, carrying out hole digging treatment on the contact pattern area by using a concentrated phosphoric acid wet etching method, and exposing the contact patterns of the titanium source, the drain end and the metal molybdenum gate end.
After the preparation of the oxide channel transistor device is completed, the oxide channel transistor is placed on a probe station, the H end of an LCR meter is connected with a gate electrode probe, the L end is connected with a source electrode probe and a drain electrode probe, and then capacitance-voltage test is carried out under the conditions of light irradiation and no light irradiation, wherein the light intensity of blue light irradiation is about 3mW/cm 2.
According to parameters of the oxide channel transistor, namely the length of 200um, the width of 50um and the thickness of 50nm, the deep energy level defect state density of the oxide channel transistor device is calculated to be 1.25x10 17/cm3.
Example 2
S1, depositing a 20nm thick metal molybdenum film on a 300nm thick silicon oxide wafer by using a magnetron sputtering technology, and patterning by using a dry etching method to serve as a bottom gate metal electrode;
S2, using an atomic layer deposition technology to monolithically deposit aluminum oxide with the thickness of 50nm as a bottom gate dielectric layer;
s3, depositing an IGZO oxide of 20nm by using a magnetron sputtering technology single target sputtering method, and adopting dilute nitric acid to carry out wet etching patterning, wherein the patterned IGZO film layer is used as a channel layer of an oxide channel transistor;
S4, depositing titanium and gold by using an electron beam to prepare a source-drain electrode layer, wherein the titanium is in direct contact with the IGZO, and patterning the source-drain layer by adopting a photoresist stripping technology to obtain a source electrode and a drain electrode;
s5, using an atomic layer deposition technology to deposit aluminum oxide with the thickness of 70nm in a whole sheet to serve as a passivation layer;
S6, carrying out hole digging treatment on the contact pattern area by using a concentrated phosphoric acid wet etching method, and exposing the contact patterns of the titanium source, the drain end and the metal molybdenum gate end.
After the preparation of the oxide channel transistor device is completed, the oxide channel transistor is placed on a probe station, the H end of an LCR meter is connected with a gate electrode probe, the L end is connected with a source electrode probe and a drain electrode probe, and then capacitance-voltage test is carried out under the conditions of light irradiation and no light irradiation, wherein the light intensity of blue light irradiation is about 3mW/cm 2.
According to parameters of the oxide channel transistor, namely the length of 200um, the width of 50um and the thickness of 20nm, the deep energy level defect state density of the oxide channel transistor device is calculated to be 3.2x10 17/cm3.
Example 3
S1, depositing a 20nm thick metal molybdenum film on a 300nm thick silicon oxide wafer by using a magnetron sputtering technology, and patterning by using a dry etching method to serve as a bottom gate metal electrode;
S2, using an atomic layer deposition technology to monolithically deposit aluminum oxide with the thickness of 50nm as a bottom gate dielectric layer;
S3, depositing 10nm of IGO oxide by using a magnetron sputtering technology single target sputtering method, and adopting dilute nitric acid to carry out wet etching patterning, wherein the patterned IGO film layer is used as a channel layer of the oxide channel transistor;
s4, depositing titanium and gold by using an electron beam to prepare a source-drain electrode layer, wherein the titanium is in direct contact with IGO, and patterning the source-drain layer by adopting a photoresist stripping technology to obtain a source electrode and a drain electrode;
s5, using an atomic layer deposition technology to deposit aluminum oxide with the thickness of 70nm in a whole sheet to serve as a passivation layer;
S6, carrying out hole digging treatment on the contact pattern area by using a concentrated phosphoric acid wet etching method, and exposing the contact patterns of the titanium source, the drain end and the metal molybdenum gate end.
After the preparation of the oxide channel transistor device is completed, the oxide channel transistor is placed on a probe station, the H end of an LCR meter is connected with a gate electrode probe, the L end is connected with a source electrode probe and a drain electrode probe, and then capacitance-voltage test is carried out under the conditions of light irradiation and no light irradiation, wherein the light intensity of blue light irradiation is about 3mW/cm 2.
According to parameters of the oxide channel transistor, namely the length of 200um, the width of 50um and the thickness of 10nm, the deep energy level defect state density of the oxide channel transistor device is calculated to be 5.8x10 17/cm3.
In conclusion, the testing method is mainly influenced by parameters such as the measurement resolution of the LCR meter, the area of the device to be tested, the thickness of the oxide layer and the like, and has the characteristics of simple measurement, reliable calculation and the like. Research shows that the defect state density which can be measured by the method ranges from about 1x10 15 to 5x10 19/cm 3.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (10)
1. The oxide channel transistor defect state density testing method is characterized by comprising the following steps of:
An oxide channel transistor was prepared, capacitance-voltage characteristic curves of the transistor were measured under dark and blue light irradiation conditions, respectively, and defect state densities were calculated by the following formula:
Wherein n defect is defect state density, and the unit is/cm 3; e is the base charge, 1.6X10 -19 coulombs; t channel is the channel thickness in cm; w is the length of the channel, and the unit is cm; l is the width of the channel in cm; v1 to V2 are voltage measurement range values; c L (V) is the capacitance measured under blue light irradiation, and F/cm 2;CD (V) is the capacitance measured under dark light, and F/cm 2.
2. The method of claim 1, wherein the channel thickness is 5-100x10 -7 cm, the channel length is 0.5-200x10 -4 cm, and the channel width is 0.5-100x10 -4 cm.
3. The method of claim 1, wherein the H-terminal of the LCR meter is connected to the gate electrode probe and the L-terminal is connected to the source and drain electrode probes when measuring the capacitance-voltage characteristic of the transistor.
4. The method of claim 1, wherein the testing under dark conditions is performed in a dark environment;
When the light is tested under the condition of blue light irradiation, the light source and the light intensity of the blue light are kept unchanged, wherein the light intensity of the blue light is 1-10mW/cm 2.
5. The method of claim 1, wherein the oxide channel transistor comprises a substrate insulating layer, a gate electrode, a bottom gate dielectric layer, an oxide channel layer, a passivation layer, and source and drain electrodes;
The material of the oxide channel layer comprises any one of IGZO, IGO and In 2O3.
6. The method according to claim 1, wherein the oxide channel transistor has a thickness of 5-50nm, and the source and drain electrode metals include any one of Ti, au, ni and TiN;
The gate electrode metal comprises any one of TiN and Mo, and has a thickness of 5-200nm.
7. The method for testing the defect state density of the oxide channel transistor according to claim 1, wherein the material of the passivation layer in the oxide channel transistor comprises any one of Al 2O3 and SiO 2, and the thickness is 10-500nm;
The bottom gate dielectric layer is made of any one of HfO 2、Al2O3 and SiO 2, and has a thickness of 5-150nm.
8. The method for testing the defect state density of the oxide channel transistor according to claim 1, wherein the method for manufacturing the oxide channel transistor comprises the following steps:
s1, depositing metal on the surface of silicon oxide, and performing patterning through dry etching to obtain a gate electrode;
s2, depositing a bottom gate dielectric to obtain a bottom gate dielectric layer;
S3, depositing an oxide film, and performing patterning through wet etching to obtain an oxide channel layer;
S4, sequentially depositing source electrode metal and drain electrode metal, and performing patterning through photoresist stripping to obtain source electrode and drain electrode;
S5, depositing a passivation layer.
9. The method of claim 1, wherein prior to testing the oxide channel transistor for defect density, the gate electrode and the source and drain electrode regions are subjected to a hole-forming process by wet etching to expose the source and drain electrodes and the gate electrode for connection and testing with an LCR meter.
10. The defect state density testing system for the oxide channel transistor is characterized by comprising the oxide channel transistor, a probe station, an LCR (liquid crystal display) meter and a light-gathering blue light source, wherein the oxide channel transistor is fixed on the probe station and contacts a gate electrode, a source and a drain electrode of the oxide channel transistor by using a probe, an H end of the LCR meter is connected with the gate electrode probe, an L end of the LCR meter is connected with the source and the drain electrode probe, and the light-gathering blue light source is used for providing blue light with specific light intensity.
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