CN118235194A

CN118235194A - Electronic equipment

Info

Publication number: CN118235194A
Application number: CN202280074661.1A
Authority: CN
Inventors: 上妻宗广; 冈本佑树; 大贯达也; 小林英智
Original assignee: Semiconductor Energy Laboratory Co Ltd
Current assignee: Semiconductor Energy Laboratory Co Ltd
Priority date: 2021-11-12
Filing date: 2022-10-31
Publication date: 2024-06-21

Abstract

An electronic device of a novel structure is provided. The electronic device includes a display device, an arithmetic unit, and a line-of-sight detection unit. The display device includes a display section divided into a plurality of sub-display sections, a plurality of gate driving circuits, and a plurality of source driving circuits. One of the gate driving circuits and one of the source driving circuits are electrically connected to one of the sub display sections. Each of the plurality of sub-display sections includes a plurality of pixel circuits and a plurality of light emitting elements. The sight line detection unit has a function of detecting a sight line of a user. The operation unit has a function of assigning each of the plurality of sub-display units as a first area or a second area using the detection result of the line-of-sight detection unit. The gate driving circuit included in the second region outputs a selection signal for setting the lighting period of the light emitting element in the 1-frame period to a first period, and the gate driving circuit included in the first region outputs a selection signal for setting the lighting period of the light emitting element in the 1-frame period to a second period, the first period being shorter than the second period.

Description

Electronic equipment

Technical Field

One aspect of the present invention relates to an electronic device. One embodiment of the present invention relates to a wearable electronic device provided with a display device.

Note that one embodiment of the present invention is not limited to the above-described technical field. As an example of the technical field of one embodiment of the present invention disclosed in the present specification and the like, a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input/output device, a driving method thereof, or a manufacturing method thereof can be given.

Background

The display device is used for various devices such as HMD (HeadMountedDisplay) type electronic devices suitable for applications such as virtual reality (VR: virtualReality) and augmented reality (AR: augmented Reality) in addition to portable information terminals such as smart phones and television sets. Therefore, in addition to the reduction of the frame and the power consumption, the display device needs to be capable of displaying at a high refresh frequency of 120Hz or more, for example. For example, patent document 1 discloses an HMD having fine pixels due to the use of transistors capable of high-speed driving.

[ Prior Art literature ]

[ Patent literature ]

[ Patent document 1] Japanese patent application laid-open No. 2000-2856

Disclosure of Invention

Technical problem to be solved by the invention

HMD type electronic devices are required to have higher graphics processing capability according to the head motion of a user, the line of sight of the user, or operation. When a display device realizing high definition and miniaturization is driven with an arithmetic circuit having a high drawing processing capability, there is a possibility that power consumption increases. Also, an arithmetic circuit having a high graphics processing capability requires a heat dissipation mechanism for cooling the arithmetic circuit, which may lead to an increase in size of the electronic apparatus.

Or in a structure in which a functional circuit such as an application processor for driving the display device is provided in a region overlapping with the display portion, if a display device realizing high definition and miniaturization is employed, the drawing processing capability may be insufficient.

An object of one embodiment of the present invention is to provide an electronic device that realizes low power consumption. Further, an object of one embodiment of the present invention is to provide an electronic device that realizes miniaturization and weight reduction. Another object of one embodiment of the present invention is to provide an electronic device having excellent graphics processing capability. Furthermore, it is an object of one embodiment of the present invention to provide a novel electronic device.

The description of the plurality of purposes does not hinder the existence of the purpose of each other. One embodiment of the present invention need not achieve all of the objects illustrated. Further, other objects than those listed above are naturally known from the description of the present specification and the like, and such objects may be one embodiment of the present invention.

Means for solving the technical problems

One embodiment of the present invention is an electronic device including: a display device; an arithmetic unit; and a line of sight detection unit, wherein the display device includes a display unit divided into a plurality of sub-display units, a plurality of gate drive circuits, and a plurality of source drive circuits, one of the gate drive circuits and one of the source drive circuits are electrically connected to one of the sub-display units, each of the plurality of sub-display units includes a plurality of pixel circuits and a plurality of light emitting elements, the line of sight detection unit has a function of detecting a line of sight of a user, the operation unit has a function of assigning each of the plurality of sub-display units as a first region or a second region using a detection result of the line of sight detection unit, the operation unit includes a selection signal for setting a lighting period of the light emitting element in a1 frame period to a first period in the second region, and the gate drive circuit in the first region outputs a selection signal for setting the lighting period of the light emitting element in the 1 frame period to a second period in the first region, and the first period is shorter than the second period.

In the electronic device according to one embodiment of the present invention, the first region preferably includes a region overlapping with a gaze point of the user.

In the electronic device according to one embodiment of the present invention, it is preferable that the plurality of gate driver circuits and the plurality of source driver circuits are provided in a first layer, the plurality of pixel circuits are provided in a second layer on the first layer, and the plurality of light-emitting elements are provided in a third layer on the second layer.

In the electronic device according to one embodiment of the present invention, it is preferable that the plurality of gate driver circuits and the plurality of source driver circuits have transistors including a first semiconductor, and each of the plurality of pixel circuits have transistors including a second semiconductor.

In the electronic device according to one embodiment of the present invention, the first semiconductor preferably includes silicon.

In the electronic device according to one embodiment of the present invention, the second semiconductor preferably includes an oxide semiconductor.

One embodiment of the present invention is an electronic device including: a display device; an arithmetic unit; and a line-of-sight detection section, wherein the display device includes a display section divided into a plurality of sub-display sections, a plurality of first gate drive circuits, a plurality of light emission control drive circuits, and a plurality of source drive circuits, one of the first gate drive circuits, one of the light emission control drive circuits, and one of the source drive circuits are electrically connected to one of the sub-display sections, each of the plurality of sub-display sections includes a plurality of pixel circuits and a plurality of light emitting elements, the line-of-sight detection section has a function of detecting a line of sight of a user, the operation section has a function of assigning each of the plurality of sub-display sections as a first region or a second region using a detection result of the line-of-sight detection section, the first gate drive circuit included in the second region outputs a selection signal that updates image data of the pixel circuits in the first period, the first gate drive circuit included in the first region outputs a selection signal that updates image data of the pixel circuits in the second period, the second period is shorter than the first period, and the light emission control drive circuit included in the first region and the light emission control circuit included in the second region outputs a light emission control signal that causes the light emitting elements in the second period according to the second period.

In the electronic device according to one embodiment of the present invention, it is preferable that the plurality of first gate driver circuits, the plurality of light emission control driver circuits, and the plurality of source driver circuits are all provided in a first layer, the plurality of pixel circuits are provided in a second layer on the first layer, and the plurality of light emitting elements are provided in a third layer on the second layer.

In the electronic device according to one embodiment of the present invention, it is preferable that the plurality of first gate driver circuits, the plurality of light emission control driver circuits, and the plurality of source driver circuits have transistors including a first semiconductor, and each of the plurality of pixel circuits have transistors including a second semiconductor.

Note that other aspects of the present invention are described in the following embodiments and drawings.

Effects of the invention

One embodiment of the present invention can provide an electronic device that realizes low power consumption. In addition, one embodiment of the present invention can provide an electronic device that realizes miniaturization and weight reduction. In addition, one embodiment of the present invention can provide an electronic device having excellent graphics processing capability. Furthermore, one aspect of the present invention may provide a novel electronic device.

The description of the plurality of effects does not prevent the existence of other effects. Furthermore, one embodiment of the present invention need not have all of the above effects. In one embodiment of the present invention, objects, effects and novel features other than those described above will be naturally apparent from the description and drawings in the present specification.

Brief description of the drawings

Fig. 1A and 1B are diagrams illustrating a configuration example of an electronic device.

Fig. 2A and 2B are diagrams illustrating a configuration example of an electronic device.

Fig. 3A and 3B are diagrams illustrating structural examples of the display device.

Fig. 4 is a diagram illustrating a structural example of the display device.

Fig. 5A and 5B are schematic diagrams illustrating structural examples of the electronic apparatus.

Fig. 6A and 6B are schematic diagrams illustrating structural examples of the electronic apparatus.

Fig. 7A and 7B are schematic diagrams illustrating structural examples of the electronic apparatus.

Fig. 8A and 8B are diagrams illustrating a structural example of the display device.

Fig. 9A to 9D are diagrams illustrating structural examples of the display device.

Fig. 10A to 10C are diagrams illustrating structural examples of the display device.

Fig. 11 is a diagram showing a structural example of the display device.

Fig. 12A and 12B are diagrams illustrating a structural example of the display device.

Fig. 13A to 13F are diagrams illustrating structural examples of the display device.

Fig. 14A to 14F are diagrams illustrating structural examples of the display device.

Fig. 15A to 15C are diagrams illustrating structural examples of the display device.

Fig. 16 is a diagram illustrating a structural example of the display device.

Fig. 17A and 17B are diagrams showing examples of the structure of the display device.

Fig. 18A and 18B are diagrams showing examples of the structure of the display device.

Fig. 19A and 19B are diagrams showing examples of the structure of the display device.

Fig. 20A and 20B are diagrams showing examples of the structure of the display device.

Fig. 21A and 21B are diagrams showing examples of the structure of the display device.

Fig. 22A and 22B are diagrams showing examples of the structure of the display device.

Fig. 23 is a diagram showing a configuration example of the display device.

Fig. 24A is a diagram illustrating the sub display section. Fig. 24B1 to 24B7 are diagrams illustrating a structural example of a pixel.

Fig. 25A to 25G are diagrams illustrating a structural example of a pixel.

Fig. 26 is a diagram illustrating a display portion.

Fig. 27A and 27B are diagrams illustrating a structural example of the display device.

Fig. 28A to 28D are diagrams illustrating structural examples of the light-emitting element.

Fig. 29A to 29D are diagrams illustrating structural examples of the light-emitting element.

Fig. 30A to 30D are diagrams showing structural examples of the light emitting element.

Fig. 31A to 31C are diagrams illustrating structural examples of the light-emitting element.

Fig. 32 is a diagram illustrating a structural example of the display device.

Fig. 33 is a diagram illustrating a structural example of the display device.

Fig. 34A and 34B are diagrams illustrating a structural example of the display device.

Fig. 35A and 35B are diagrams illustrating a structural example of the display device.

Fig. 36A and 36B are diagrams illustrating a structural example of the display device.

Fig. 37 is a diagram illustrating a structural example of the display device.

Fig. 38 is a diagram illustrating a structural example of the display device.

Fig. 39 is a diagram illustrating a structural example of the display device.

Fig. 40 is a diagram illustrating a structural example of the display device.

Fig. 41A to 41C are diagrams illustrating structural examples of transistors.

Fig. 42A to 42E are diagrams illustrating structural examples of the electronic apparatus.

Fig. 43A to 43G are diagrams illustrating a structural example of the electronic apparatus.

Fig. 44A to 44D are diagrams illustrating structural examples of the electronic apparatus.

Fig. 45 is a diagram illustrating a structural example of the display device.

Fig. 46 is a diagram illustrating transistor characteristics.

Fig. 47 is a diagram illustrating a structural example of the display device.

Fig. 48 is a diagram illustrating a structural example of the display device.

Fig. 49 is a diagram illustrating a structural example of the display device.

Fig. 50 is a diagram illustrating a structural example of the display device.

Fig. 51 is a diagram illustrating a structural example of the display device.

Fig. 52 is a diagram illustrating a structural example of the display device.

Fig. 53A and 53B are diagrams illustrating a structural example of the display device.

Fig. 54 is a diagram illustrating a structural example of the display device.

Modes for carrying out the invention

Embodiments of the present invention are described below. It is noted that an embodiment of the present invention is not limited to the following description, and one of ordinary skill in the art can easily understand the fact that the manner and details thereof can be changed into various forms without departing from the spirit and scope of the present invention. Therefore, one embodiment of the present invention should not be construed as being limited to the description of the embodiments described below.

Note that, in this specification and the like, ordinal numbers such as "first", "second", "third", and the like are added to avoid confusion of constituent elements. Therefore, the ordinal words do not limit the number of constituent elements. The ordinal words do not limit the order of the constituent elements. For example, in the present specification and the like, a constituent element referred to as "first" in one embodiment may be set as a constituent element referred to as "second" in other embodiments or claims. For example, in the present specification and the like, the constituent element referred to as "first" in one embodiment may be omitted in other embodiments or claims.

In the drawings, the same reference numerals are used to denote the same components, components having the same functions, components made of the same materials, components formed simultaneously, or the like, and overlapping descriptions may be omitted.

In this specification, the power supply potential VDD may be simply referred to as potential VDD, or the like. Other components (e.g., signals, voltages, circuits, elements, electrodes, wiring, etc.) are also similar.

When the same symbol is used for a plurality of elements and it is necessary to distinguish them, a symbol for identification such as "_1", "_2", "[ n ]", and "[ m, n ]" may be added to the symbol. For example, the second wiring GL is represented as a wiring GL [2].

(Embodiment 1)

In this embodiment, an electronic device according to an embodiment of the present invention is described. An electronic device according to one aspect of the invention is suitable for wearable electronic devices for VR or AR applications.

< Structural example of electronic device >

As one example of a wearable electronic device, fig. 1A shows a perspective view of an eyeglass-type (goggle-type) electronic device 100. In the electronic apparatus 100 shown in fig. 1A, a pair of display devices 10 (display devices 10_l and 10_r), an operation detecting unit 101, a line-of-sight detecting unit 102, a computing unit 103, and a communication unit 104 are included in a housing 105.

Fig. 1B is a block diagram of the electronic device 100 of fig. 1A. As in fig. 1A, the electronic device 100 includes a display device 10_l, a display device 10_r, an operation detection unit 101, a line-of-sight detection unit 102, a calculation unit 103, and a communication unit 104, and transmits and receives various signals to and from each other via a bus BW. The display device 10_l and the display device 10_r each include a plurality of pixels 230, a driving circuit 30, and a functional circuit 40. One pixel 230 includes one light emitting element 61 and one pixel circuit 51. Accordingly, the display device 10_l and the display device 10_r each include a plurality of light emitting elements 61 and a plurality of pixel circuits 51.

The operation detection unit 101 has the following functions: the movement of the housing 105, that is, the head movement of the user wearing the electronic device 100 is detected. As the motion detection unit 101, for example, a motion sensor using MEMS technology can be used. As the motion sensor, a three-axis motion sensor, a six-axis motion sensor, or the like may be used. The information on the operation of the housing 105 detected by the operation detection unit 101 may be referred to as first information, first data, operation data, or the like.

The sight line detection unit 102 has a function of acquiring information on the sight line of the user. Specifically, the device has a function of detecting the line of sight of the user. For example, the user's line of sight may be detected by a line of sight measurement (eye tracking) method such as a pupil cornea reflection (Pupil Center CornealReflection) method or a Bright/dark pupil effect (Bright/DarkPupil Effect) method. Alternatively, the line of sight of the user may be obtained by a line of sight measurement method using laser, ultrasonic, or the like.

The computing unit 103 has a function of calculating the gaze point of the user using the gaze detection result of the gaze detection unit 102. That is, it is possible to know which object among the images displayed on the display device 10_l and the display device 10_r the user looks at. In addition, it is possible to know whether the user looks at a portion other than the screen. Note that the information (line of sight detection result) on the line of sight of the user obtained by the line of sight detection section 102 is sometimes referred to as second information, line of sight information, or the like.

The arithmetic unit 103 has a function of performing drawing processing according to the operation of the housing 105. The computing unit 103 performs drawing processing according to the operation of the housing 105 by using the first information and the image data inputted from the outside through the communication unit 104. As the image data, for example, 360-degree omnidirectional image data can be used. 360-degree omnidirectional image data is data generated by an omnidirectional camera (omnidirectional camera, 360 ° camera), computer graphics, or the like. Specifically, the arithmetic unit 103 has a function of converting 360-degree omnidirectional image data into image data that can be displayed on the display device 10_l and the display device 10_r based on the first information.

The computing unit 103 has a function of determining the size and shape of a plurality of areas set for the display units of the display device 10_l and the display device 10_r, respectively, using the second information. Specifically, the computing unit 103 calculates the gaze point on the display unit from the second information, and sets the first to third regions S1 to S3 described below for the display unit based on the gaze point.

As the arithmetic unit 103, a microprocessor such as a central processing unit (CPU: central Processing Unit), a DSP (DIGITAL SIGNAL Processor: digital signal Processor), or a GPU (Graphics Processing Unit: graphics Processor) may be used alone or in combination. These microprocessors may be constituted by PLDs (ProgrammableLogicDevice: programmable logic devices) such as FPGAs (FieldProgrammable GateArray: field programmable gate arrays) and FPAA (FieldProgrammableAnalogArray: field programmable analog arrays).

The arithmetic unit 103 performs various data processing and program control by executing instructions from various programs by the processor. The program executable by the processor may be stored in a memory area in the processor or may be stored in a storage section provided separately. As the memory portion, for example, a memory device using a nonvolatile memory element such as a flash memory, MRAM (Magnetoresistive RandomAccess Memory: magnetoresistive random access memory), PRAM (PHASE CHANGE RAM: phase change random access memory), reRAM (RESISTIVERAM: resistive random access memory), feRAM (FerroelectricRAM: ferroelectric random access memory), or the like, or a memory device using a volatile memory element such as DRAM (DYNAMICRAM: dynamic random access memory), SRAM (STATICRAM: static random access memory), or the like can also be used.

The communication unit 104 has a function of communicating with an external device wirelessly or by wire in order to acquire various data such as image data. For example, a high-frequency circuit (RF circuit) may be provided in the communication unit 104 to transmit and receive RF signals. The high-frequency circuit is a circuit for converting an electromagnetic signal and an electric signal in a frequency band prescribed by the law of each country into each other and wirelessly communicating with other communication devices using the electromagnetic signal. When wireless communication is performed, as a communication protocol or a communication technology, there may be used: communication standards such as LTE (longtermevalonate: long term evolution), GSM (Global SystemforMobile Communication: registered trademark: global system for mobile communications), EDGE (ENHANCEDDATARATES FORGSMEVOLUTION: GSM enhanced data rate evolution), CDMA2000 (Code Division MultipleAccess: code division multiple access 2000), WCDMA (Wideband Code Division Multiple Access: registered trademark: wideband code division multiple access); or specifications standardized by IEEE (institute of electrical and electronics engineers) communication such as Wi-Fi (WIRELESS FIDELITY: registered trademark: wireless fidelity), bluetooth (registered trademark: bluetooth), zigBee (registered trademark), and the like. Further, a third generation mobile communication system (3G), a fourth generation mobile communication system (4G), a fifth generation mobile communication system (5G), or the like, which is decided by the International Telecommunications Union (ITU), can be used.

The communication unit 104 may include external ports such as LAN (LocalAreaNetwork: local area network) connection terminals, digital broadcast reception terminals, and terminals for connecting to AC adapters.

The display device 10_l and the display device 10_r each include a plurality of light emitting elements 61, a plurality of pixel circuits 51, a driving circuit 30, and a functional circuit 40. The pixel circuit 51 has a function of controlling light emission of the light emitting element 61. The driving circuit 30 has a function of controlling the pixel circuit 51.

The information of the plurality of regions in the display unit of the display device determined by the computing unit 103 is used for driving or the like to set the brightness or the like differently between the regions. Note that the luminance of each region may be controlled according to the length of the lighting period of the light emitting element. The functional circuit 40 has the following functions: a drive circuit 30 is controlled so as to perform high-luminance display in a region near the gaze point; the driving circuit 30 is controlled so as to perform low-luminance display in a region away from the gaze point. Note that the information of the plurality of areas in the display unit of the display device determined by the operation unit 103 may be combined with driving in which the update frequency, resolution, and the like of the image data are different for each area.

For example, by adopting a configuration in which selection signals used for controlling the lighting period of the light emitting elements in the 1-frame period are different for each region, display in which luminance is different for each region can be realized. For example, the gate driver circuit of the region near the gaze point outputs a selection signal for setting the lighting period of the light emitting element in the 1-frame period to the second period, and the gate driver circuit of the region far from the gaze point outputs a selection signal for setting the lighting period of the light emitting element in the 1-frame period to the first period, and the first period is shorter than the second period, whereby the luminance of the region near the gaze point is increased and the luminance of the region far from the gaze point is decreased. By reducing the area of the pixel for performing high-luminance display, power consumption of the display device can be reduced.

As an embodiment of the present invention, the functional circuit 40 and the arithmetic unit 103 may be provided separately. When the computing unit 103 is included, the computing unit 103 may be configured to perform drawing processing according to the operation of the housing 105 and computation processing with a large load such as determining a plurality of regions (first region S1 to third region S3) described below according to the gaze point. On the other hand, by causing the functional circuit 40 to perform the process of controlling the driving circuit 30, miniaturization of the circuit and reduction of power consumption can be achieved. In particular, in a wearable electronic device, it is necessary to detect the head motion, the eye motion, and the like of a user in a short period of time, and thus high-speed arithmetic processing is required, and the power consumption of arithmetic operation is increased. On the other hand, in one embodiment of the present invention, the function of the control signal of the output driving circuit 30 may be separated from the operation unit 103, and the output may be performed by the functional circuit 40. Therefore, the load of the arithmetic unit can be suppressed without concentrating the load on one arithmetic unit. This can reduce the power consumption as a whole.

In addition, a sensor 125 may be provided in the electronic device 100. The sensor 125 may have a function of acquiring information about any one or more of the sense of sight, sense of hearing, sense of touch, sense of taste, and sense of smell of the user. More specifically, the sensor 125 may have a function of detecting or measuring any one or more of force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, electric power, radiation, humidity, inclination, vibration, smell, and infrared ray information. The electronic device 100 may also include one or more sensors 125.

The sensor 125 may be used to measure ambient temperature, humidity, illuminance, odor, or the like. The sensor 125 may be used to acquire information for personal identification using, for example, a fingerprint, a palm print, an iris, a retina, a pulse shape (including a vein shape and an artery shape), a face, or the like. In addition, the sensor 125 may be used to measure the number of blinks, eyelid movements, pupil size, body temperature, pulse, or oxygen saturation in blood of the user, etc., to detect the fatigue, health status, etc. of the user. The electronic device 100 may detect fatigue, health, and the like of the user and display a warning or the like on the display device 10.

Further, the operation of the electronic device 100 may be controlled by detecting the line of sight and the eyelid movement of the user. The user does not need to use both hands to operate the electronic device 100, and thus input operation or the like in a hands-free state (a state in which both hands are free) can be achieved.

In addition, fig. 2A is a perspective view showing the electronic apparatus 100. In fig. 2A, the housing 105 of the electronic device 100 includes, for example, a mounting portion 106, a buffer member 107, a pair of lenses 108, and the like, in addition to the pair of display devices 10_l, 10_r, and the operation portion 103. The pair of display devices 10_l and 10_r are each disposed in a position inside the housing 105 visible through the lens 108.

The housing 105 shown in fig. 2A is provided with an input terminal 109 and an output terminal 110. A cable supplying an image signal (image data) from a video output device or the like or electric power or the like for charging a battery provided in the housing 105 may be connected to the input terminal 109. The output terminal 110 is used as a sound output terminal, for example, and can be connected to headphones or earphones.

The housing 105 preferably has a mechanism in which the left and right positions of the lens 108 and the display device 10_l and the display device 10_r can be adjusted so that the lens 108 and the display device 10_l and the display device 10_r are positioned at the most appropriate positions according to the positions of eyes of the user. Further, it is preferable to have a mechanism in which the focus is adjusted by changing the distance between the lens 108 and the display device 10_l and the display device 10_r.

The cushioning member 107 is a portion that contacts the face (forehead, cheek, or the like) of the user. By bringing the buffer member 107 into close contact with the face of the user, light leakage can be prevented, and thus the feeling of immersion can be further improved. The cushioning member 107 preferably uses a soft material to seal against the face of the user when the electronic device 100 is mounted on the user. When such a material is used, it is preferable not only to make the user feel skin friendly but also to make the user feel less cold when it is put on in a colder season or the like. When the buffer member 107, the mounting portion 106, or other members that contact the skin of the user are configured to be detachable, cleaning and exchange are easy, which is preferable.

The electronic device of one embodiment of the present invention may also include an earphone 106A. The earphone 106A includes a communication section (not shown), and has a wireless communication function. The earphone 106A may output sound data by using a wireless communication function. The headset 106A may also include a vibration mechanism to be used as a bone conduction headset.

In addition, as with the earphone 106B shown in fig. 2B, the earphone 106A may be directly connected to the mounting portion 106 or connected in a wired manner. The earphone 106B and the mounting portion 106 may include a magnet. This is preferable because the earphone 106B can be fixed to the mounting portion 106 by magnetic force, and easy storage is possible.

< Structural example of display device >

The structure of the display device 10A which is applicable to the display device 10_l and the display device 10_r shown in fig. 1A and 1B will be described with reference to fig. 3A, 3B, and 4.

Fig. 3A is a perspective view of the display device 10A applicable to the display device 10_l and the display device 10_r shown in fig. 1A and 1B.

The display device 10A includes a substrate 11 and a substrate 12. The display device 10A includes a display portion 13 formed of elements provided between the substrate 11 and the substrate 12. The display unit 13 is a region in the display device 10A in which an image is displayed. The display section 13 includes a plurality of pixels 230. The pixel 230 includes a pixel circuit 51 and a light emitting element 61.

When the pixels 230 are arranged in a matrix of 1920×1080 pixels, the display unit 13 that can display at a resolution of so-called full-high definition (also referred to as "2K resolution", "2K1K", or "2K" or the like) can be realized. Further, for example, when the pixels 230 are arranged in a matrix of 3840×2160 pixels, the display portion 13 capable of displaying at a resolution called ultra-high definition (also referred to as "4K resolution", "4K2K", or "4K", or the like) can be realized. Further, for example, when the pixels 230 are arranged in a matrix of 7680x4320 pixels, the display unit 13 capable of displaying at a resolution called ultra-high definition (also referred to as "8K resolution", "8K4K", or "8K") can be realized. By adding the pixels 230, the display portion 13 that displays at a resolution of 16K or even 32K can be realized.

The pixel density (sharpness) of the display portion 13 is preferably 1000ppi or more and 10000ppi or less. For example, the content may be 2000 to 6000ppi, or 3000 to 5000 ppi.

Note that the screen ratio (aspect ratio) of the display portion 13 is not particularly limited. The display section 13 may correspond to, for example, 1:1 (square), 4: 3. 16: 9. 16:10, etc.

In this specification and the like, the "element" may be sometimes referred to as a "device". For example, the display element, the light-emitting element, and the liquid crystal element may be referred to as a display device, a light-emitting device, and a liquid crystal device, respectively.

The display device 10A can display an image by using a display element provided in the display unit 13, by inputting various signals and power supply potentials from the outside through the terminal unit 14. As the display element, various elements can be used. Typically, a light-emitting element, a liquid crystal element, a MEMS (Micro Electro MECHANICAL SYSTEMS) element, or the like having a function of emitting light, such as an organic EL element or an LED element, can be used.

Between the substrate 11 and the substrate 12, a plurality of layers are provided, and transistors for performing circuit operation or display elements for emitting light are provided in each layer. The plurality of layers are provided with a pixel circuit having a function of controlling an operation of the display element, a driving circuit having a function of controlling the pixel circuit, a functional circuit having a function of controlling the driving circuit, and the like.

Fig. 3B is a perspective view schematically showing the structure of each layer provided between the substrate 11 and the substrate 12.

A layer 20 is provided on the substrate 11. The layer 20 includes a driving circuit 30, a functional circuit 40, and an input-output circuit 80. Layer 20 includes a transistor 21 (also referred to as a Si transistor) that includes silicon in a channel formation region 22. The substrate 11 is, for example, a silicon substrate. The silicon substrate is preferable because it has higher thermal conductivity than the glass substrate. By providing the driver circuit 30, the functional circuit 40, and the input-output circuit 80 in the same layer, wiring electrically connecting the driver circuit 30, the functional circuit 40, and the input-output circuit 80 can be shortened. This shortens the charge/discharge time of the control signal for controlling the driving circuit 30 by the functional circuit 40, thereby reducing power consumption. In addition, the charge/discharge time required for the input/output circuit 80 to supply signals to the functional circuit 40 and the driving circuit 30 is shortened, and power consumption can be reduced.

The transistor 21 may be, for example, a transistor including single crystal silicon in a channel formation region (also referred to as a "c-Si transistor"). In particular, when a transistor including single crystal silicon in a channel formation region is used as a transistor provided in the layer 20, on-state current of the transistor can be increased. This is preferable because the circuit included in the layer 20 can be driven at high speed. Further, since the Si transistor can be formed by micromachining with a channel length of 3nm or more and 10nm or less, the display device 10A in which the display portion is integrated with an accelerator such as a CPU or GPU, an application processor, or the like can be realized.

In addition, the layer 20 may also be provided with a transistor including polysilicon in a channel formation region (also referred to as a "Poly-Si transistor"). As the polysilicon, low temperature polysilicon (LTPS: lowTemperaturePoly Silicon) can also be used. A transistor including LTPS in a channel formation region is also referred to as an "LTPS transistor". In addition, the layer 20 may also be provided with an OS transistor.

Various circuits such as a shift register, a level shifter, an inverter, a latch, an analog switch, and a logic circuit can be used as the driving circuit 30. The driving circuit 30 includes, for example, a gate driving circuit, a source driving circuit, and the like. Further, an arithmetic circuit, a memory circuit, a power supply circuit, and the like may be included. Since the gate driver circuit, the source driver circuit, and other circuits can be arranged so as to overlap the display portion 13, the width of a non-display region (also referred to as a frame) on the periphery of the display portion 13 of the display device 10A can be made extremely small, compared with the case where the circuits and the display portion 13 are arranged in an aligned manner, and the display device 10A can be miniaturized.

The functional circuit 40 has, for example, a function as an application processor for controlling each circuit in the display device 10A and generating a signal for control of each circuit. The functional circuit 40 may include a circuit for correcting image data, such as an accelerator, such as a GPU, and a CPU. The functional circuit 40 may include an LVDS (LowVoltageDifferential Signaling: low voltage differential signaling) circuit, an MIPI (Mobile Industry Processor Interface: mobile industry processor interface) circuit, a D/a (Digital to Analog: analog-to-digital) conversion circuit, or the like having a function as an interface for receiving data such as image data from outside the display device 10A. The functional circuit 40 may include a circuit for compressing and stretching image data, a power supply circuit, and the like.

Layer 20 has layer 50 disposed thereon. The layer 50 includes a pixel circuit group 55 having a plurality of pixel circuits 51. Layer 50 may also be provided with an OS transistor. The pixel circuit 51 may be configured to include an OS transistor. Layer 50 may be provided in a stacked manner on layer 20.

Layer 50 may also be provided with Si transistors. For example, the pixel circuit 51 may be configured to include a transistor including single crystal silicon or polycrystalline silicon in a channel formation region. LTPS may also be used as polysilicon. For example, layer 50 may be formed on another substrate to adhere layer 20.

For example, the pixel circuit 51 may be formed of a plurality of transistors using different semiconductor materials. In the case where the pixel circuit 51 is configured by a plurality of transistors using different semiconductor materials, the transistors may be provided in different layers for each type of transistor. For example, in the case where the pixel circuit 51 is configured by a Si transistor and an OS transistor, the Si transistor and the OS transistor may be provided so as to overlap each other. By disposing the transistors in an overlapping manner, the occupied area of the pixel circuit 51 is reduced. Accordingly, the sharpness of the display device 10A can be improved. Note that the structure of the combination LTPS transistor and OS transistor is sometimes referred to as LTPO.

As the transistor 52 of the OS transistor, a transistor including an oxide including at least one of indium, an element M (element M is aluminum, gallium, yttrium, or tin), and zinc in a channel formation region is preferably used. Such an OS transistor has a characteristic that an off-state current is extremely low. Therefore, particularly when an OS transistor is used as a transistor provided in a pixel circuit, analog data written in the pixel circuit can be held for a long period of time, which is preferable.

Layer 50 has layer 60 disposed thereon. Layer 60 has substrate 12 disposed thereon. The substrate 12 is preferably a layer made of a light-transmitting substrate or a light-transmitting material. The layer 60 is provided with a plurality of light emitting elements 61. In addition, the layer 60 may be provided in a manner of being laminated on the layer 50. As the light-emitting element 61, for example, an organic electroluminescent element (also referred to as an "organic EL element") or the like can be used. However, the light-emitting element 61 is not limited to this, and for example, an inorganic EL element made of an inorganic material may be used. Note that "organic EL element" and "inorganic EL element" are sometimes collectively referred to as "EL element". The light-emitting element 61 may contain an inorganic compound such as quantum dots. For example, by using quantum dots for the light emitting layer, the quantum dots can be used as a light emitting material.

As shown in fig. 3B, the display device 10A according to one embodiment of the present invention can have a structure in which the light emitting element 61, the pixel circuit 51, the driving circuit 30, and the functional circuit 40 are stacked, and thus can greatly increase the aperture ratio (effective display area ratio) of the pixel. For example, the aperture ratio of the pixel may be 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Further, the pixel circuits 51 can be arranged at extremely high density, whereby the pixels can be made extremely high in definition. For example, the display portion 13 (region where the pixel circuit 51 and the light-emitting element 61 are stacked) of the display device 10A may be provided with pixels having a definition of 20000ppi or less or 30000ppi or less and 2000ppi or more, preferably 3000ppi or more, more preferably 5000ppi or more, and still more preferably 6000ppi or more.

The display device 10A is extremely high in definition, and is therefore suitable for VR devices such as head-mounted displays and glasses-type AR devices. For example, since the display device 10A has a display portion with extremely high definition, in a structure in which the display portion of the display device 10A is viewed through an optical member such as a lens, a user cannot see pixels even if the display portion is enlarged using the lens, whereby display with high immersion can be achieved.

When the display device 10A is used as a wearable VR display device or an AR display device, the diagonal size of the display unit 13 may be set to 0.1 inch or more and 5.0 inches or less, preferably 0.5 inch or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display unit 13 may be set to be 1.5 inches or around 1.5 inches. By setting the diagonal size of the display portion 13 to 2.0 inches or less, it is possible to perform processing by one exposure process of an exposure apparatus (typically, a scanner apparatus), so that productivity of the manufacturing process can be improved.

The display device 10A according to one embodiment of the present invention may be applied to devices other than wearable electronic devices. In this case, the diagonal dimension of the display portion 13 may be larger than 2.0 inches. In addition, the structure of the transistor used for the pixel circuit 51 may be appropriately selected according to the diagonal size of the display portion 13. For example, when a single crystal Si transistor is used for the pixel circuit 51, the diagonal size of the display portion 13 is preferably 0.1 inch or more and 3 inches or less. When an LTPS transistor is used for the pixel circuit 51, the diagonal dimension of the display portion 13 is preferably 0.1 inch or more and 30 inches or less, and more preferably 1 inch or more and 30 inches or less. In the case of LTPO (a structure in which LTPS transistors and OS transistors are combined) being used for the pixel circuit 51, the diagonal size of the display portion 13 is preferably 0.1 inch or more and 50 inches or less, and more preferably 1 inch or more and 50 inches or less. When an OS transistor is used for the pixel circuit 51, the diagonal dimension of the display portion 13 is preferably 0.1 inch or more and 200 inches or less, more preferably 50 inches or more and 100 inches or less.

It is difficult to enlarge the display panel using the single crystal Si transistor due to the size of the single crystal Si substrate. In addition, LTPS transistors are difficult to apply to large-scale (typically screen sizes exceeding 30 inches in diagonal size) using a laser crystallization device in the manufacturing process. On the other hand, the OS transistor does not need to use a laser crystallization device or the like in the manufacturing process, or can be manufactured at a relatively low process temperature (typically, 450 ℃ or lower), and thus can be used for a display panel having a large area (typically, a diagonal dimension of 50 inches or more and 100 inches or less). In addition, when LTPO is employed, it can be applied to a diagonal size (typically, a diagonal size is 1 inch or more and 50 inches or less) of a display portion of a region between a case where an LTPS transistor is used and a case where an OS transistor is used.

< Working example of electronic device >

An operation example of the electronic apparatus 100 is described with reference to the drawings. Fig. 4 is a flowchart for explaining an operation example of the electronic device 100.

The operation detecting unit 101 acquires first information (information on the operation of the housing 105) (step E11).

The second information (information on the line of sight of the user) is acquired in the line of sight detection section 102 (step E12).

The operation unit 103 performs a drawing process of 360-degree omnidirectional image data based on the first information (step E13).

Step E13 is described as a specific example. A user 112 is shown in the schematic diagram of fig. 5A in the center of 360 degrees of the omnidirectional image data 111. The user 112 may see an image 114A in a direction 113A displayed on the display device 10A of the electronic apparatus 100.

The schematic diagram of fig. 5B illustrates a situation in which the user 112 turns to see the image 114B in the direction 113B in the schematic diagram of fig. 5A. The user 112 can recognize the space represented by the 360-degree omnidirectional image data 111 by changing the motion image 114A of the housing of the electronic device 100 to the image 114B.

As shown in fig. 5A and 5B, the user 112 shakes the housing of the electronic apparatus 100 according to the head motion. The higher the graphics processing capability that is accepted by the image that can be derived from the 360 degree omnidirectional image data 111 in accordance with the motion of the electronic device 100, the more realistic the virtual space can be identified by the user 112.

The arithmetic unit 103 determines a plurality of regions corresponding to the gaze point G among the regions on the display unit of the display device based on the second information (step E14). For example, as shown in fig. 6A, a first region S1 including the gaze point G and a second region S2 adjacent to the first region S1 are determined. The outside of the second region is set as a third region S3.

Step E14 is described as a specific example.

Although there are individual differences, generally, the human visual field is roughly divided into the following five. The first is to distinguish the field of view, as the following: visual functions such as eyesight and color recognition are most excellent; and is a gaze point within about 5 ° including the center of the field of view. The second is the effective field of view, which is the following: the specified information can be identified instantaneously as long as there is eye movement; is within about 30 ° of parallel and within about 20 ° of perpendicular of the center of the field of view (gaze point); and is adjacent to the outside of the field of view. The third is a stable gaze field, the following: the prescribed information can be recognized without difficulty by the head movement; is within about 90 ° parallel and within about 70 ° perpendicular to the center of the field of view; and is adjacent to the outside of the effective field of view. Fourth, the pilot field of view is the following: although the presence of a prescribed object can be perceived, the recognition ability is low; is within about 100 ° parallel and within about 85 ° perpendicular to the center of the field of view; and is adjacent to the outside of the stable gaze field. Fifth, the auxiliary field of view is the following: specifying that the recognition capability of the subject is extremely low to the extent that the presence of stimulus can only be perceived; is within about 100 ° to 200 ° parallel and about 85 ° to 130 ° perpendicular to the center of the field of view; and is adjacent to the outside of the pilot field of view.

As described above, in the image 114, it is important to distinguish the image quality from the visual field to the effective visual field. It is particularly important to discern the image quality of the field of view.

Fig. 6A is a schematic diagram showing a case where the user 112 views the image 114 displayed on the display section of the display device 10A of the electronic apparatus 100 from the front (image display surface). The image 114 shown in fig. 6A also corresponds to a display section. In addition, a gaze point G to which the line of sight 113 of the user 112 is directed is shown on the image 114. In this specification and the like, a region including a discrimination field of view on the image 114 is set as "first region S1", and a region including an effective field of view is set as "second region S2". In addition, a region including the stable gaze field, the guide field, and/or the auxiliary field is set as "third region S3".

Note that in fig. 6A, the boundary (outline) between the first region S1 and the second region S2 is represented by a curve, but is not limited thereto. As shown in fig. 6B, the boundary (outline) between the first region S1 and the second region S2 may be rectangular or polygonal. In addition, the shape of a combination of straight lines and curved lines may be used. In addition, the display portion of the display device 10A may be divided into two regions, and a region including the discrimination field of view and the effective field of view may be defined as a first region S1 and the other region may be defined as a second region S2. At this time, the third region S3 is not formed.

Fig. 7A is a diagram of the image 114 displayed on the display portion of the display device 10A of the electronic apparatus 100 seen from above, and fig. 7B is a diagram of the image 114 displayed on the display portion of the display device 10A of the electronic apparatus 100 seen from the lateral direction. In the present specification and the like, the angle in the horizontal direction of the first region S1 is denoted as "angle θx1", and the angle in the horizontal direction of the second region S2 is denoted as "angle θx2" (refer to fig. 7A). In this specification and the like, the angle in the vertical direction of the first region S1 is denoted as "angle θy1", and the angle in the vertical direction of the second region S2 is denoted as "angle θy2" (see fig. 7B).

For example, by setting both the angle θx1 and the angle θy1 to 10 °, the area of the first region S1 can be increased. At this time, the first region S1 includes a part of the effective field of view. In addition, for example, by setting the angles θx2 and θy2 to 45 ° and 35 °, respectively, the area of the second region S2 can be increased. At this time, the second region S2 includes a portion of the steady gaze field.

Note that the position of the gaze point G somewhat fluctuates according to the line of sight fluctuation of the user 112. Therefore, the angle θx1 and the angle θy1 are each preferably 5 ° or more and less than 20 °. By setting the area of the first region S1 to be wider than the discrimination field, the operation of the display device 10A is stabilized, and the visibility of the image is improved.

The gaze point G also shifts when the line of sight 113 of the user 112 shifts. Thereby, the first region S1 and the second region S2 are also transferred. For example, when the amount of fluctuation of the line of sight 113 exceeds a certain amount, it is determined that the line of sight 113 is shifted. In other words, when the amount of fluctuation of the gaze point G exceeds a certain amount, it is determined that the gaze point G shifts. When the change in the line of sight 113 becomes equal to or smaller than a predetermined amount, it is determined that the transition of the line of sight 113 is stopped, and the first to third areas S1 to S3 are determined. In other words, when the change in the gaze point G becomes equal to or smaller than a predetermined amount, it is determined that the movement of the gaze point G is stopped, and the first to third areas S1 to S3 are determined.

The driving circuit 30 is controlled in the functional circuit 40 according to the plurality of sections (the first section S1 to the third section S3), respectively (step E15).

< Concrete example of display device >

Fig. 8A and 8B are perspective views of a display device 10B corresponding to a specific example of the display device 10A. Fig. 8B is a perspective view for explaining the structure of each layer included in the display device 10B. In order to avoid repetition of the description, the differences from the display device 10A are mainly described.

The display device 10B includes a plurality of pixel circuits 51, a pixel circuit group 55, and a driving circuit 30 stacked together. In the display device 10B, the pixel circuit group 55 is divided into a plurality of regions 59, and the driving circuit 30 is divided into a plurality of regions 39. The plurality of regions 39 each include the source driver circuit 31 and the gate driver circuit 33.

Fig. 9A shows an example of the structure of the pixel circuit group 55 included in the display device 10B. Fig. 9B shows a configuration example of the driving circuit 30 included in the display device 10B. The regions 59 and 39 are arranged in a matrix of m rows and n columns (m and n are integers of 1 or more). In this specification and the like, the 1 st row and 1 st column region 59 is denoted as a region 59[1,1], and the mth row and n column region 59 is denoted as a region 59[ m, n ]. Similarly, the 1 st row and 1 st column region 39 is denoted as region 39[1,1], and the m-th row and n-th column region 39 is denoted as region 39[ m, n ]. Fig. 9A and 9B show the case where m and n are 4 and 8, respectively. That is, the pixel circuit group 55 and the driving circuit 30 are each divided into 32.

The plurality of regions 59 each include a plurality of pixel circuits 51, a plurality of wirings SL, a plurality of wirings BL, and a plurality of wirings GL. In each of the plurality of regions 59, one of the plurality of pixel circuits 51 is electrically connected to at least one of the plurality of wirings SL, at least one of the plurality of wirings BL, and at least one of the plurality of wirings GL.

One of the regions 59 is provided so as to overlap with one of the regions 39 (refer to fig. 9C). For example, the region 59[ i, j ] (i is an integer of 1 to m, j is an integer of 1 to n) is provided so as to overlap with the region 39[ i, j ]. The source driver circuit 31[ i, j ] included in the region 39[ i, j ] is electrically connected to the wiring SL included in the region 59[ i, j ]. The gate driving circuit 33[ i, j ] included in the region 39[ i, j ] is electrically connected to the wiring GL and the wiring BL included in the region 59[ i, j ]. The source driver circuit 31[ i, j ] and the gate driver circuit 33[ i, j ] have the functions of the plurality of pixel circuits 51 included in the control region 59[ i, j ].

By providing the region 59[ i, j ] and the region 39[ i, j ] so as to overlap, the connection distance (wiring length) between the pixel circuit 51 included in the region 59[ i, j ] and the source driver circuit 31 and the gate driver circuit 33 included in the region 39[ i, j ] can be made extremely short. As a result, the wiring resistance and parasitic capacitance are reduced, and therefore the time required for charge and discharge is reduced, and high-speed driving can be realized. In addition, power consumption can be reduced. In addition, miniaturization and weight reduction can be realized.

In addition, the display device 10B has a structure including the source driver circuit 31 and the gate driver circuit 33 for each region 39. Therefore, the display unit 13 can be divided for each region 59 corresponding to the region 39 to rewrite the image data and control the lighting period of the light emitting element. For example, the display unit 13 may rewrite only the image data of the region where the image is changed, and may hold the image data of the region where the image is not changed, and may change the lighting period of the light emitting element for each region, thereby achieving a reduction in power consumption.

In the present embodiment and the like, one of the display sections 13 divided for each region 59 is referred to as a sub-display section 19. Therefore, the sub display section 19 can be said to be divided for each region 39. The display device 10B described with reference to fig. 8A, 8B, and 9A to 9D shows a case where the display unit 13 is divided into 32 sub-display units 19 (see fig. 8A). The sub display section 19 includes a plurality of pixels 230. Specifically, one sub display section 19 includes one of the regions 59 having the plurality of pixel circuits 51 and a plurality of light emitting elements 61. In addition, one region 39 has a function of controlling a plurality of pixels 230 included in one sub display section 19.

In the display device 10B, control of the lighting period of the light emitting element can be arbitrarily set for each sub-display section 19 by the timing controller included in the functional circuit 40. In the display device 10B, the driving frequency (frame frequency, refresh frequency, or the like) at the time of displaying an image can be arbitrarily set for each sub-display section 19 by the timing controller included in the functional circuit 40. The function circuit 40 has a function of controlling the operation of each of the plurality of areas 39 and the plurality of areas 59. That is, the functional circuit 40 has a function of controlling the lighting period and the driving frequency of the light emitting elements included in each of the plurality of sub-display sections 19 arranged in a matrix. The function circuit 40 has a function of performing synchronization adjustment between the sub-display sections.

In the display device 10B, by combining with line-of-sight measurement (eye tracking) or the like, driven annotation point rendering (FoveatedRendering) corresponding to the resolution of the line-of-sight improvement region of the user can be used. Therefore, an image with low load and excellent display quality can be output.

The timing controller 441 and the input/output circuit 442 may be provided for each region 39 (see fig. 9D). As the input/output circuit 442, an I2C (Inter-INTEGRATED CIRCUIT: integrated circuit bus) interface or the like can be used, for example. In fig. 9D, the timing controller 441 included in the region 39[ i, j ] is represented as the timing controller 441[ i, j ]. The input/output circuit 442 included in the region 39[ i, j ] is denoted as an input/output circuit 442[ i, j ].

For example, the function circuit 40 supplies the input/output circuits 442[ i, j ] with operation parameters such as a setting signal for the scanning direction and driving frequency of the gate driving circuits 33[ i, j ], a selection signal for controlling the lighting period of the light emitting elements in the 1-frame period, and the number of pixels in which image data is omitted when the resolution is reduced (the number of pixels which are not rewritten when the image data is rewritten). The source driver circuit 31 i, j and the gate driver circuit 33 i, j operate according to the operation parameters.

In addition, when the sub display section 19 includes a light receiving element, the input/output circuit 442 outputs information photoelectrically converted by the light receiving element to the functional circuit 40.

In the display device 10B of the electronic apparatus according to the embodiment of the present invention, the pixel circuit 51 and the driving circuit 30 are stacked, and the lighting period of the light emitting element of each sub-display section 19 is made different according to the line of sight operation of the user, so that the power consumption can be reduced. In addition, in the display device 10B of the electronic apparatus according to the embodiment of the present invention, the pixel circuit 51 and the driving circuit 30 are stacked, and the driving frequency of each sub-display section 19 is made different according to the line of sight operation of the user, whereby the power consumption can be reduced.

Fig. 10A shows the display section 13 including the sub display sections 19 of 4 rows and 8 columns. In addition, fig. 10A shows the first to third areas S1 to S3 centered on the gaze point G. The arithmetic unit 103 assigns each of the plurality of sub-displays 19 to one of the first region 29A overlapping the first region S1 or the second region S2 and the second region 29B overlapping the third region S3. That is, the arithmetic unit 103 assigns each of the plurality of regions 39 as the first region 29A or the second region 29B. At this time, the first region 29A overlapping the first region S1 and the second region S2 includes a region overlapping the gaze point G. The second region 29B includes the sub display section 19 (see fig. 10B) located outside the first region 29A.

The operation of the driving circuits (the source driving circuit 31 and the gate driving circuit 33) included in each of the plurality of regions 39 is controlled by the functional circuit 40. For example, the second region 29B is a region overlapping with the third region S3 including the stable gaze field, the guide field, and the auxiliary field, that is, a region where the recognition ability of the user is low. Therefore, even if the lighting period (the ratio of the lighting period of the light emitting element in the 1-frame period) of the light emitting element in the second region 29B is made shorter than that of the first region 29A at the time of displaying an image, the substantial display quality perceived by the user (hereinafter also referred to as "substantial display quality") is hardly degraded. That is, even if the ratio of the lighting periods (second lighting ratio) of the light emitting elements in the 1-frame period of the sub display section 19 included in the second region 29B is made lower than the ratio of the lighting periods (first lighting ratio) of the light emitting elements in the 1-frame period of the sub display section 19 included in the first region 29A, the substantial display quality is hardly degraded.

When the second lighting ratio is reduced, power consumption of the display device can be reduced. On the other hand, when the second lighting ratio is lowered, the display quality is also lowered. In particular, the brightness of the second region 29B including the light emitting element decreases. The second region 29B is far from the region centered on the gaze point G, so that the visibility of the user is low. Therefore, even if the brightness of the second region 29B is reduced, the substantial degradation of the display quality is small. According to one aspect of the present invention, by making the second lighting ratio lower than the first lighting ratio, it is possible to suppress substantial degradation of display quality while reducing power consumption of a region where visibility of a user is low. According to one embodiment of the present invention, both maintenance of display quality and reduction of power consumption can be achieved.

The second lighting ratio is 99% or less, preferably 90% or less of the first lighting ratio.

In the sub display section 19 overlapping the third region S3, a third region 29C may be set outside the second region 29B (see fig. 10C), and the ratio of the lighting periods (third lighting ratio) of the light emitting elements in the 1-frame period of the sub display section 19 included in the third region 29C may be set lower than the second region 29B. The third lighting ratio is preferably not more than the second lighting ratio, more preferably not more than 99% of the second lighting ratio, and still more preferably not more than 90% of the second lighting ratio. By making the ratio of the lighting periods of the light emitting elements in the 1-frame period short, power consumption can be reduced. The image data may be changed according to the setting of the region for each driving frequency, and the rewriting may be stopped as needed. By changing the driving frequency and stopping rewriting the image data, power consumption can be further reduced.

In the case of using such a driving method, a transistor having an extremely low off-state current is preferably used as the transistor constituting the pixel circuit 51. For example, an OS transistor having an extremely low off-state current is preferably used as a transistor constituting the pixel circuit 51. In particular, when an OS transistor is included in a path through which a current flows in a light-emitting element, off-state current between power supply lines can be significantly reduced, and thus it is preferable.

< Specific example of method for driving display device >

In the display device 10B, the driving is described in which the ratio of the lighting periods of the light emitting elements in the 1-frame period is made different for each sub-display section.

Fig. 11 shows the display section 13 including the sub display sections of 4 rows and 8 columns described in fig. 10C. Fig. 11 shows a pixel circuit 51A allocated as the first region 29A, a pixel circuit 51B allocated as the second region 29B, and a pixel circuit 51C allocated as the third region 29C.

In the pixel circuit 51A provided in the first region 29A in the first region S1 overlapping the gaze point G, the lighting period in the 1-frame period (1F) is set to the period T _EA and the non-lighting period of the light emitting element is set to the period T _BA. In the pixel circuit 51B of the second region 29B outside the first region 29A, the lighting period of the light emitting element in the 1-frame period (1F) is set to the period T _EB and the non-lighting period of the light emitting element is set to the period T _BB. In the pixel circuit 51C of the third region 29C outside the second region 29B, the lighting period of the light emitting element in the 1-frame period (1F) is set to the period T _EC and the non-lighting period of the light emitting element is set to the period T _BC.

As shown in fig. 11, in the display device according to the embodiment of the present invention, the ratio of the lighting periods (second lighting ratio) of the light emitting elements controlled by the pixel circuits 51B included in the second region 29B is made lower than the ratio of the lighting periods (first lighting ratio) of the light emitting elements controlled by the pixel circuits 51A included in the first region 29A. That is, the period T _EB is made shorter than the period T _EA. Further, the ratio of the lighting periods of the light emitting elements controlled by the pixel circuits 51C included in the third region 29C (third lighting ratio) is made lower than the ratio of the lighting periods of the light emitting elements controlled by the pixel circuits 51B included in the second region 29B (second lighting ratio). That is, the period T _EC is made shorter than the period T _EB.

By making the second lighting ratio lower than the first lighting ratio and making the third lighting ratio lower than the second lighting ratio, power consumption of the display device can be reduced. On the other hand, when the second lighting ratio is made lower than the first lighting ratio and the third lighting ratio is made lower than the second lighting ratio, the display quality is also lowered. In particular, the brightness of the second region 29B and the third region 29C including the light emitting element is reduced. The second region 29B and the third region 29C are far from the region centered on the gaze point G, so that the visibility of the user is low. Therefore, even if the brightness of the second region 29B and the third region 29C is reduced, the substantial degradation of the display quality is small. In one embodiment of the present invention, the second lighting ratio is set to be lower than the first lighting ratio and the third lighting ratio is set to be lower than the second lighting ratio, whereby it is possible to reduce power consumption in a region with low visibility for a user and to suppress substantial degradation of display quality. According to one embodiment of the present invention, both maintenance of display quality and reduction of power consumption can be achieved.

Note that the pixel circuits 51A, 51B, and 51C provided in the first region 29A, the second region 29B, and the third region 29C have the same circuit structure. The pixel circuits 51A, 51B, and 51C have a circuit configuration including a light emission control transistor for controlling a lighting period of the light emitting element in addition to a driving transistor for controlling a current flowing through the light emitting element between wirings for flowing a current.

The pixel circuit 51 shown in fig. 12A is an example of a circuit configuration that can be used for the pixel circuits 51A, 51B, and 51C. The gate driving circuit 33 is supplied with a gate clock signal GCLK and outputs signals to the wirings GL [ m ], BL [ m ] (m represents an arbitrary row). The wiring GL [ m ] is a wiring to which a selection signal for controlling a write row of image data is supplied. The wiring BL [ m ] is a wiring to be supplied with a selection signal for controlling the lighting period of the light emitting element 61. The wiring SL [ n ] (n represents an arbitrary row) is a wiring to which image data supplied to the pixel circuit 51 is supplied.

The transistor 52A is a selection transistor for selecting whether or not image data supplied to the wiring SL [ n ] according to a selection signal supplied to the wiring GL [ m ] connected to the gate is written to the pixel circuit 51. The transistor 52B is a driving transistor that controls a current flowing through the transistor 52B by a potential corresponding to the image data held in the capacitor 53. One electrode of the capacitor 53 is connected to the gate of the transistor 52B, and the other electrode is connected to a wiring that supplies a fixed potential (for example, potential Vc). The transistor 52C is a light emission control transistor for controlling whether or not a current flowing through the transistor 52B is caused to flow through the light emitting element 61 according to a selection signal supplied to the wiring BL [ m ] connected to the gate. The wirings ANO and VCOM are wirings to which a potential for causing a current to flow through the light-emitting element 61 is supplied. Note that the transistors 52A to 52C are described below on the assumption that they are n-channel transistors, but a p-channel transistor may be used for part or all of the transistors 52A to 52C.

Fig. 12B is a diagram for explaining selection signals supplied to the wiring GL [ m ], and the wiring BL [ m ]. The wiring GL [ m ] is supplied with a selection signal for writing image data to the pixel circuit 51 during 1 frame period 1F. The wiring BL [ m ] is supplied with a selection signal for controlling a period (lighting period) during which a current flows through the light emitting element 61 in 1 frame period 1F. The lighting period in which the current flows through the light emitting element 61 is controlled by the period T _E in which the transistor 52C is turned on and the light emitting element is lighted while the selection signal of the wiring BL [ m ] is at the H level. The non-lighting period in which current does not flow through the light emitting element 61 is controlled by a period T _B in which the transistor 52C is turned off and the light emitting element is turned off while the selection signal of the wiring BL [ m ] is at the L level.

In fig. 11, when the lighting ratio is made different for each region, the period T _E and the period T _B in fig. 12B are made different for each region. The pixel circuit 51A in the first region 29A shown in fig. 13A supplies selection signals for controlling the period T _EA in which the light emitting element is turned on and the period T _BA in which the light emitting element is turned off to the wiring BL _A [ m ] in such a manner that the first lighting ratio is larger than the second lighting ratio and the third lighting ratio while the wiring GL _A [ m ] is selected in the 1-frame period 1F shown in fig. 13B.

The pixel circuit 51B in the second region 29B shown in fig. 13C supplies selection signals for controlling the period T _EB in which the light emitting element is turned on and the period T _BB in which the light emitting element is turned off to the wiring BL _B [ m ] in such a manner that the second lighting ratio is larger than the third lighting ratio and the second lighting ratio is smaller than the first lighting ratio while the wiring GL _B [ m ] is selected in the 1-frame period 1F shown in fig. 13D.

The pixel circuit 51C in the third region 29C shown in fig. 13E supplies selection signals for controlling the period T _EC in which the light emitting element is turned on and the period T _BC in which the light emitting element is turned off to the wiring BL _C [ m ] in such a manner that the third lighting ratio is smaller than the first lighting ratio and the second lighting ratio while the wiring GL _C [ m ] is selected for the 1-frame period 1F shown in fig. 13F.

As described above, in the display device included in the electronic apparatus according to the embodiment of the present invention, the lighting period can be made different for each region of the display unit by the selection signal supplied to the transistor controlling the lighting period of the light emitting element. Therefore, it is possible to suppress substantial degradation of display quality while reducing power consumption of a region where visibility of a user is low. According to one embodiment of the present invention, both maintenance of display quality and reduction of power consumption can be achieved.

< Structural example of Pixel Circuit >

Fig. 14A to 14F show a configuration example of a pixel circuit which can be used for the pixel circuit 51, and a light-emitting element 61 connected to the pixel circuit 51. Note that in the following description, the light-emitting element 61 is a light-emitting device such as an organic EL element (OLED: organicLightEmittingDiode).

Note that the light-emitting device described in one embodiment of the present invention is not limited to the organic EL element, and may be a light-emitting device such as an LED (LIGHT EMITTING Diode), a Micro LED, a QLED (Quantum-dot LIGHT EMITTING Diode), or a semiconductor laser.

The pixel circuit 51A shown in fig. 14A includes a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53. Fig. 14A shows a light emitting element 61 connected to the pixel circuit 51A. Fig. 14A shows the wiring SL, the wiring GL, the wiring BL, the wiring ANO, and the wiring VCOM.

In the transistor 52A, the gate is electrically connected to the wiring GL, one of the source and the drain is electrically connected to the wiring SL, and the other of the source and the drain is electrically connected to the gate of the transistor 52B and one electrode of the capacitor 53. In the transistor 52B, one of a source and a drain is electrically connected to the wiring ANO, and the other of the source and the drain is electrically connected to one of a source and a drain of the transistor 52C. In the transistor 52C, the gate is electrically connected to the wiring BL, and the other of the source and the drain is electrically connected to the anode of the light-emitting element 61. The other electrode of the capacitor 53 is electrically connected to one of the source and the drain of the transistor 52C. The cathode of the light emitting element 61 is electrically connected to the wiring VCOM. Note that the anode and the cathode of the light-emitting element 61 can be appropriately replaced by changing the magnitude of the supplied potential.

The pixel circuit 51B shown in fig. 14B has a structure in which a transistor 52D is added to the pixel circuit 51A. In the transistor 52D, the gate is electrically connected to the wiring GL, one of the source and the drain is electrically connected to the anode of the light-emitting element 61, and the other of the source and the drain is electrically connected to the wiring V0. By simultaneously placing the transistor 52A and the transistor 52D in a conductive state, the source and the gate of the transistor 52B are at the same potential, and when the threshold voltage of the transistor 52B is greater than 0V, the transistor 52B can be placed in a non-conductive state. This can forcibly interrupt the current flowing through the light emitting element 61. Such a pixel circuit is suitable for a display method in which display periods and off periods are alternately set.

The pixel circuit 51C shown in fig. 14C is an example in the case where the transistors 52A to 52C of the pixel circuit 51A described above employ a transistor including a pair of gates. Thus, the current that can flow through the transistor can be increased. Note that it is shown here that all transistors employ a transistor including a pair of gates, but is not limited thereto. In addition, a transistor including a pair of gates, each of which is electrically connected to a different wiring may be used. For example, by using a transistor in which one gate is electrically connected to the source, reliability can be improved.

The pixel circuit 51D shown in fig. 14D is an example when the position of the transistor 52C in the pixel circuit 51A is moved between the transistor 52B and the wiring ANO. By adopting this structure, the current flowing between the wiring ANO and the wiring VCOM can be controlled by the transistor 52C.

The pixel circuit 51E shown in fig. 14E is an example in which the plurality of gate lines (the wiring GL1 and the wiring GL 2) are provided in the pixel circuit 51B, and the transistor 52A and the transistor 52D are controlled differently. Since the wiring V0 flows a current flowing in the light emitting element 61 through the transistor 52D, the image data can be corrected according to the current value.

Fig. 14A to 14E show a structural example of a circuit constituted by transistors of an OS transistor using only n-channel transistors, but one embodiment of the present invention is not limited thereto. For example, as shown in fig. 14F, a pixel circuit structure including an OS transistor and a Si transistor may be employed.

The pixel circuit 51F shown in fig. 14F includes a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53. The pixel circuit 51F shown in fig. 14F is an example in which the transistors 52B and 52C in the pixel circuit 51A are replaced with p-channel Si transistors. The pixel circuit 51F shown in fig. 14F can hold an analog potential corresponding to image data by bringing the transistor 52A as an OS transistor into a non-conductive state. Further, by including Si transistors as the transistors 52B and 52C in the pixel circuit 51F, the amount of current flowing through the light emitting element 61 can be increased.

As described above, in the electronic device according to the embodiment of the present invention, the pixel circuit 51 and the driving circuit 30 are stacked so that the lighting period of the light emitting element of each sub-display section 19 is different in accordance with the operation of the user's line of sight. It is possible to suppress substantial degradation of display quality while reducing power consumption of a region where visibility of a user is low. According to one embodiment of the present invention, both maintenance of display quality and reduction of power consumption can be achieved.

(Embodiment 2)

A modified example of the electronic device according to an embodiment of the present invention is described in this embodiment. Note that in this embodiment, repeated descriptions of constituent elements having the same reference numerals as in the above embodiment may be omitted.

< Structural example of display device >

The display device described in this embodiment corresponds to the structure of the driving circuit 30, which is different from the structure of the display device 10B described in embodiment 1. Fig. 15A shows an example of the structure of the pixel circuit group 55 included in the display device 10B. Fig. 15B shows a configuration example of a driving circuit 30A that can be used for the driving circuit 30 included in the display device 10B. The regions 59 and 39 are arranged in a matrix of m rows and n columns (m and n are integers of 1 or more).

The plurality of regions 59 each include a plurality of pixel circuits 51, a plurality of wirings SL, a plurality of wirings BL, and a plurality of wirings GL. In each of the plurality of regions 59, one of the plurality of pixel circuits 51 is electrically connected to at least one of the plurality of wirings SL and at least one of the plurality of wirings GL.

One of the regions 59 is disposed to overlap one of the regions 39 (refer to fig. 15C). For example, the region 59[ i, j ] (i is an integer of 1 to m, j is an integer of 1 to n) overlaps with the region 39[ i, j ]. The source driver circuit 31[ i, j ] included in the region 39[ i, j ] is electrically connected to the wiring SL included in the region 59[ i, j ]. The gate driving circuit 33[ i, j ] included in the region 39[ i, j ] is electrically connected to the wiring GL included in the region 59[ i, j ]. The light emission control driving circuit 34[ i, j ] included in the region 39[ i, j ] is electrically connected to the wiring BL included in the region 59[ i, j ]. The source driver circuit 31[ i, j ] and the gate driver circuit 33[ i, j ] have the functions of the plurality of pixel circuits 51 included in the control region 59[ i, j ].

By providing the region 59[ i, j ] and the region 39[ i, j ] in a superimposed manner, the connection distances (wiring lengths) between the pixel circuit 51 included in the region 59[ i, j ] and the source driver circuit 31, the light emission control driver circuit 34, and the gate driver circuit 33 included in the region 39[ i, j ] can be made extremely short. As a result, the wiring resistance and parasitic capacitance are reduced, and therefore the time required for charge and discharge is reduced, and high-speed driving can be realized. In addition, power consumption can be reduced. In addition, miniaturization and weight reduction can be realized.

The display device 10B has a structure including the source driver circuit 31, the light emission control driver circuit 34, and the gate driver circuit 33 for each region 39. Accordingly, the display unit 13 can be divided for each region 59 corresponding to the region 39 to control the driving frequency. For example, the image data of the region overlapping the region of the gaze point may be rewritten at a high driving frequency and the image data of the region distant from the region of the gaze point may be rewritten at a low driving frequency in the display section 13, or only the image data of the region where the image changes may be rewritten and the image data of the region where the image does not change may be held in the display section 13. In the case of adopting this configuration, when the drive frequencies of the drive gate drive circuit and the emission control drive circuit are made the same for each region, the lighting period of the light emitting element depends on the drive frequency.

In the structure of the present embodiment, the light emission control driving circuit 34 and the gate driving circuit 33 have different structures. Thus, the following control can be performed at different driving frequencies: controlling updating of image data for each region; and controlling the lighting period of the light emitting element for each region, whereby degradation of display quality can be suppressed.

Control of updating image data having different driving frequencies for each sub-display section in the display device 10B will be described.

Fig. 16 shows the display unit 13 including the sub display units 13A of 4 rows and 8 columns described in fig. 10C of embodiment 1. Fig. 16 shows a pixel circuit 51A provided in the sub-display section 13A allocated to the first region 29A, a pixel circuit 51B provided in the sub-display section 13B allocated to the second region 29B, and a pixel circuit 51C provided in the sub-display section 13C allocated to the third region 29C.

The driving frequency of 1 second (1S) is set to 120Hz (Hz is sometimes expressed in fps) in the pixel circuit 51A provided in the first region 29A in the first region S1 overlapping the above-described gaze point G. The driving frequency of 1 second (1 s) is set to 60Hz in the pixel circuit 51B of the second region 29B outside the first region 29A. The driving frequency of 1 second (1 s) is set to 30Hz in the pixel circuit 51C of the third region 29C outside the second region 29B. That is, the display unit 13 sets the drive frequency of the region overlapping the gaze point to a high drive frequency and sets the drive frequency of the region distant from the gaze point to a low drive frequency.

The operation of the gate line driving circuit included in each of the plurality of sub display sections 13A is controlled by the functional circuit 40. For example, the sub display section corresponding to the second region 29B is a region overlapping with the third region S3 including the steady viewing field, the guide field, and the auxiliary field, that is, a region where the recognition ability of the user is low. Therefore, even if the number of times of rewriting the image data per unit time (hereinafter also referred to as "the number of times of image rewriting") of the sub-display section corresponding to the second region 29B is made smaller than that of the sub-display section corresponding to the first region 29A when displaying the image, the substantial degradation of the display quality (hereinafter also referred to as "the substantial display quality") perceived by the user is made smaller. That is, even if the driving frequency of the sub display section corresponding to the second region 29B is lower than the driving frequency of the sub display section corresponding to the first region 29A, the substantial degradation of the display quality is small.

When the driving frequency is reduced, power consumption of the display device can be reduced. On the other hand, when the driving frequency is lowered, the display quality is also lowered. In particular, the display quality is degraded when displaying moving images. According to one embodiment of the present invention, by making the driving frequency of the sub display section corresponding to the second region 29B lower than the driving frequency of the sub display section corresponding to the first region 29A, it is possible to suppress substantial degradation of display quality while reducing power consumption in a region where visibility for a user is low. According to one embodiment of the present invention, both maintenance of display quality and reduction of power consumption can be achieved. Further, setting the third region 29C outside the second region 29B in the sub display part corresponding to the third region S3 can make the driving frequency of the sub display part corresponding to the third region 29C lower than that of the sub display part corresponding to the second region 29B.

The driving frequency of the sub display section corresponding to the first region 29A is 30Hz to 500Hz, preferably 60Hz to 500 Hz. The driving frequency of the sub display section corresponding to the second region 29B is preferably not more than the driving frequency of the sub display section corresponding to the first region 29A, more preferably not more than 1/2 of the driving frequency of the sub display section corresponding to the first region 29A, and still more preferably not more than 1/5 of the driving frequency of the sub display section corresponding to the first region 29A. The driving frequency of the sub display section corresponding to the third region 29C is preferably not more than 1/2 of the driving frequency of the sub display section corresponding to the second region 29B, more preferably not more than 1/5 of the driving frequency of the sub display section corresponding to the second region 29B, and still more preferably not more than 1/5 of the driving frequency of the sub display section corresponding to the second region 29B.

By making the number of image rewrites extremely small, power consumption can be further reduced. In addition, rewriting of the image data may be stopped as needed. By stopping rewriting the image data, power consumption can be further reduced.

The pixel circuit 51 shown in fig. 17A is an example of a circuit configuration that can be used for the pixel circuits 51A, 51B, and 51C. The gate driving circuit 33 is supplied with a gate clock signal GCLK and outputs a signal to the wiring GL [ m ] to control the pixel circuit 51. The light emission control driving circuit 34 has a function of being supplied with a light emission control clock signal BCLK and outputting a signal to the wiring BL to control the pixel circuit 51. The wiring GL [ m ] is a wiring to which a selection signal for controlling a row to which image data is written is supplied. The wiring BL [ m ] is a wiring to be supplied with a selection signal for controlling the lighting period of the light emitting element 61. The wiring SL [ n ] is a wiring to which image data supplied to the pixel circuit 51 is supplied. Note that the description of each constituent element in the pixel circuit 51 shown in fig. 17A is the same as that of fig. 12A.

Fig. 17B is a diagram for explaining selection signals supplied to the wiring GL [ m ], and the wiring BL [ m ]. The wiring GL [ m ] is supplied with a selection signal for writing image data to the pixel circuit 51 during 1 frame period 1F. The wiring BL [ m ] is supplied with a selection signal for controlling the lighting period during which the current flows through the light emitting element 61 in 1 frame period 1F. The gate clock signal GCLK supplied to the gate driving circuit 33 and the light emission control clock signal BCLK supplied to the light emission control driving circuit 34 are different signals. Therefore, the period of updating the image data of the pixel circuit 51 by the gate driving circuit 33 can be made different from the period of lighting the light emitting element by the light emission control driving circuit 34 in the sub display section of the different region.

By the period of the lighting period during which the current flows through the light emitting element 61 being different from the period of the selection signal supplied to the wiring GL [ m ] for updating the image data in the pixel circuit 51, the lighting period of the light emitting element 61 can be made constant regardless of the driving frequency when the driving frequencies of the sub display sections in different regions are made different from each other. For example, as shown in fig. 17B, a selection signal for controlling the lighting of the light emitting element and a selection signal for controlling the current not to flow through the light emitting element 61 in a period T _E and a period T _B may be output to the wiring BL [ m ] in a period different from the interval (1F) in which the selection signal supplied to the wiring GL [ m ] is at the H level.

In the display device according to one embodiment of the present invention, as shown in fig. 16, the driving frequency controlled by the pixel circuit 51B included in the second region 29B may be made lower than the driving frequency controlled by the pixel circuit 51A included in the first region 29A. Further, the driving frequency controlled by the pixel circuit 51C included in the third region 29C may be made lower than the driving frequency controlled by the pixel circuit 51B included in the second region 29B.

In the display device according to the embodiment of the present invention, as shown in fig. 17B, the light emission control driving circuit 34 may control the lighting ratio corresponding to the ratio of the period T _E in which the light emitting element is turned on and the period T _B in which the light emitting element is turned off, independently of the gate driving circuit 33.

When the gate clock signal GCLK supplied to the gate driver circuit 33 and the emission control clock signal BCLK supplied to the emission control driver circuit 34 are the same signal, that is, when the period of updating the image data of the pixel circuit 51 by the gate driver circuit 33 and the period of lighting the light emitting element by the emission control driver circuit 34 are the same, the selection signals supplied to the wirings GL [ m ] and BL [ m ] become the signals shown in fig. 18A. At this time, the period of updating the image data by the gate drive circuit 33 is the same as the period of lighting the light emitting element by the light emission control drive circuit 34. Therefore, when updating the image data at a low driving frequency, the user may easily see that the light emitting elements are alternately switched between the period T _E and the period T _B during the lighting period or the non-lighting period, and the display quality may be degraded.

On the other hand, in the configuration described in the present embodiment, the gate clock signal GCLK supplied to the gate driving circuit 33 and the light emission control clock signal BCLK supplied to the light emission control driving circuit 34 are different signals. That is, the period in which the image data of the pixel circuit 51 is updated by the gate driving circuit 33 is different from the period in which the light emitting element is turned on by the light emission control driving circuit 34. Therefore, the period in which the image data is updated by the gate drive circuit 33 and the period in which the light emitting element is turned on by the light emission control drive circuit 34 can be made different. For example, as shown in fig. 18B, the selection signals supplied to the wirings GL [ m ], BL [ m ] may operate at different periods during 1 frame (1F). That is, even when the update of the image data with the different driving frequency is controlled for each sub display section, the period in which the image data is updated by the gate driving circuit 33 and the period in which the light emitting element is turned on by the light emission control driving circuit 34 may be made different. Therefore, even if the driving frequency of the gate driving circuit 33 is reduced to realize low power consumption driving, the period T _E and the period T _B controlled by the light emission control driving circuit 34 can be repeated in a short period, and therefore, degradation of display quality can be suppressed.

Fig. 19A shows a diagram of the following period: when the period of updating the image data by the gate driving circuit 33 and the period of lighting the light emitting elements by the light emission control driving circuit 34 are the same, the display unit constituted by the plurality of sub display units 13A is divided into different areas, and the lighting ratio is fixed at 50% for the periods T _E and T _B when the driving frequencies are 120Hz, 60Hz, 30Hz, and 1 Hz. As shown in fig. 19A, the driving frequency of the gate driving circuit 33 decreases, and the cycle of the period T _E and the period T _B increases, so that the repetition frequency of the lighting and non-lighting of the light emitting element per unit time decreases, and the display quality may decrease.

Fig. 19B shows a diagram of the following period: when the period in which the image data is updated by the gate drive circuit 33 and the period in which the light emitting element is turned on by the light emission control drive circuit 34 are different, the period T _E and the period T _B are a period in which the display portion constituted by the plurality of sub-display portions 13A is divided into different regions and the driving frequency is set to 120Hz, 60Hz, 30Hz, and 1Hz, and the lighting ratio is set to 50%. At this time, as shown in fig. 19B, the period T _E and the period T _B controlled by the light emission control driving circuit 34 may be repeated in a short period. For example, as shown in fig. 19B, the operation of repeating the period T _E and the period T _B may be performed in a period in which the lighting ratio is fixed to 50% and the driving frequency is 120 Hz. As shown in fig. 19B, even if the driving frequency of the gate driving circuit 33 is reduced, the repetition period of the period T _E and the period T _B is not prolonged, so that degradation of the display quality can be suppressed.

Note that the gate drive circuit 33 and the light emission control drive circuit 34 included in each of the plurality of sub-display sections 13A are supplied with signals for controlling the respective circuits, for example, from the functional circuit 40. As shown in fig. 20A, signals for displaying at different driving frequencies in the plurality of sub-display sections 13A are supplied from the functional circuit 40 to the gate driving circuit 33 included in the driving circuit 30. This signal is controlled so as to be different in driving frequency for each region, and is therefore supplied with a gate clock signal having a driving frequency of the gate driving circuit 33 of F _GCLK. In fig. 20A, as an example, a maximum driving frequency is set to 120Hz, and driving frequencies (F _GCLK. Ltoreq.120 Hz) of 60Hz, 30Hz, or the like are shown for each region, and gate clock signals (for example, gate clock signals of frequencies of 100kHz, 50kHz, 25kHz, or the like) for becoming the driving frequencies are supplied to the gate driving circuits 33 of the respective regions.

As shown in fig. 20A, a signal for repeating the lighting and non-lighting for display in the plurality of sub-display sections 13A at the same period is supplied from the functional circuit 40 to the light emission control driving circuit 34 included in the driving circuit 30. As this signal, a light emission control clock signal having a driving frequency F _BCLK for repeating lighting and non-lighting for each region in the same cycle to perform display is supplied. Fig. 20A shows, as an example, a drive frequency (F _BCLK =120 Hz) corresponding to the maximum drive frequency 120Hz in the gate drive circuit 33, and a light emission control clock signal (for example, a light emission control clock signal of a frequency of 100 kHz) for supplying the drive frequency to the light emission control drive circuit 34 of each region.

As shown in fig. 20B, may have a different structure from that of fig. 20A. In fig. 20B, the gate clock signal of the driving frequency F _GCLK equal to or lower than the driving frequency F _BCLK of the light emission control driving circuit 34 is supplied from the functional circuit 40 to each circuit of the gate driving circuit 33 included in the driving circuit 30 (F _GCLK≤F_BCLK). As shown in fig. 20B, a light emission control clock signal of a driving frequency F _BCLK for performing display by repeating lighting and non-lighting at the same cycle is supplied from the function circuit 40 to the light emission control driving circuit 34 included in the driving circuit 30. Fig. 20B shows, as an example, the following structure: when the maximum driving frequency of the plurality of gate driving circuits 33 is F _{GCLK_MAX}, a light emission control clock signal for setting the driving frequency to be equal to or lower than the driving frequency F _{GCLK_MAX} (F _BCLK≤F_{GCLK_MAX}) is supplied.

As described above, by operating in a case where the period in which the image data is updated by the gate driving circuit 33 and the period in which the light emitting element is turned on by the light emission control driving circuit 34 are different, the repetition period of the period T _E and the period T _B does not become long even if the driving frequency of the gate driving circuit 33 is reduced, and therefore, degradation of the display quality can be suppressed.

< Structural example of Gate drive Circuit >

Fig. 21A shows an example of a block diagram for explaining a circuit configuration of the gate driver circuit 33. Further, fig. 21B shows an example of a timing chart for explaining a circuit configuration of the gate driver circuit 33 shown in fig. 21A.

The gate driving circuit 33 shown in fig. 21A includes a shift register SR, a logical multiplication circuit AND, a level shifter LS, AND a buffer BUF. The shift register SR is supplied with the gate clock signal GCLK and the start pulse GSP. Further, the logical multiplication circuit AND is supplied with the pulse width control signal GPWC. By adopting this structure, as shown in fig. 21B, the gate driving circuit shown in fig. 21A can sequentially output selection signals in the wirings GL [1] to GL [ k ] (k is a natural number) of a plurality of rows.

< Structural example of light emission control drive Circuit >

Fig. 22A shows an example of a block diagram for explaining a circuit configuration of the light emission control driving circuit 34. Fig. 22B shows an example of a timing chart for explaining the circuit configuration of the light emission control driving circuit 34 shown in fig. 22A.

The light emission control driving circuit shown in fig. 22A includes a shift register SR, a level shifter LS, and a buffer BUF. The shift register SR is supplied with the light emission control clock signal BCLK and the start pulse BSP. The aspect ratio (ratio of the length of H level and L level) of the start pulse BSP is set according to the ratio (lighting ratio) of the lighting period and the non-lighting period of the light emitting element. By adopting this structure, as shown in fig. 21B, the light emission control driving circuit shown in fig. 22A can sequentially output selection signals in the wirings BL [1] to BL [ k ] (k is a natural number) of a plurality of rows.

Note that the light emission control driving circuit 34 outputs a selection signal after the gate driving circuit 33 outputs the selection signal. Specifically, as shown in the timing chart of fig. 23 (dotted arrow in the drawing), by the light emission control driving circuit 34 outputting the selection signal after the gate driving circuit 33 outputting the selection signal, light emission control can be performed according to the current corresponding to the image data.

As described above, the electronic device according to one embodiment of the present invention can operate the gate driving circuit and the light emission control driving circuit in different periods, and therefore the selection signal for controlling writing of image data and the selection signal for controlling the lighting period operate in different periods in the 1-frame period (1F). That is, when the update of the image data with the drive frequency being different for each sub display section is controlled, the period of the update of the image data by the gate drive circuit and the period of the lighting of the light emitting element by the light emission control drive circuit are different, so even if the drive frequency of the gate drive circuit is reduced, the period T _E and the period T _B controlled by the light emission control drive circuit can be repeated in a short period, and therefore, the degradation of the display quality can be suppressed.

Embodiment 3

In this embodiment, a configuration example of the sub display section 19 including a plurality of pixels 230 arranged in a matrix of p rows and q columns (p and q are integers of 2 or more) will be described. Fig. 24A is a block diagram illustrating the sub display section 19. The sub display section 19 is electrically connected to the source driver circuit 31 and the gate driver circuit 33 provided in the region 39.

In fig. 24A, the p-th row and 1-th column pixel 230 is represented as pixel 230[ p,1], the 1-st row and q-th column pixel 230 is represented as pixel 230[1, q ], and the p-th row and q-th column pixel 230 is represented as pixel 230[ p, q ].

The circuit in the gate driving circuit 33 is used as a scanning line driving circuit, for example. The circuit in the source driving circuit 31 is used as a signal line driving circuit, for example.

For example, an OS transistor may be used as a transistor constituting the pixel 230 and an Si transistor may be used as a transistor constituting the driver circuit. The off-state current of the OS transistor is low, so power consumption can be reduced. In addition, si transistors operate faster than OS transistors, and are therefore suitable for use in driving circuits. In addition, an OS transistor may be used as a transistor constituting the pixel 230 and a transistor constituting a driver circuit according to the mode of the display device. In addition, according to the mode of the display device, a Si transistor may be used as both a transistor constituting the pixel 230 and a transistor constituting the driver circuit. In addition, depending on the mode of the display device, a Si transistor may be used as a transistor constituting the pixel 230 and an OS transistor may be used as a transistor constituting the driver circuit.

In addition, both of a Si transistor and an OS transistor may be used as a transistor constituting the pixel 230. In addition, both of the Si transistor and the OS transistor may be used as transistors constituting the driving circuit.

Fig. 24A shows p wirings GL arranged substantially parallel to each other and whose potential is controlled by the gate driving circuit 33, and q wirings SL arranged substantially parallel to each other and whose potential is controlled by the source driving circuit 31. For example, the pixels 230 arranged in the r-th row (r represents an arbitrary number, and is an integer of 1 or more and p or less in the present embodiment or the like) are electrically connected to the gate driver circuit 33 through the r-th wiring GL. The pixels 230 arranged in the s-th column (s is an arbitrary number, and is an integer of 1 to q in the present embodiment or the like) are electrically connected to the source driver circuit 31 through the s-th wiring SL. In fig. 24A, the pixel 230 of the r-th row and s-th column is represented as a pixel 230[ r, s ].

Note that the wiring GL electrically connected to the pixels 230 on one row is not limited to one. In addition, the wiring SL electrically connected to the pixels 230 on one column is not limited to one. The wiring GL and the wiring SL are merely examples, and the wiring electrically connected to the pixel 230 is not limited to the wiring GL and the wiring SL.

By arranging the pixels 230 that control red light, the pixels 230 that control green light, and the pixels 230 that control blue light in a matrix shape and using them as one pixel 240 in total, and controlling the light emission amount (light emission luminance) of each pixel 230, full-color display can be realized. In other words, the three pixels 230 are used as sub-pixels. That is, the three sub-pixels control the light emission amounts of red light, green light, or blue light, respectively (see fig. 24B 1). The colors of light controlled by the three sub-pixels are not limited to combinations of red (R), green (G), and blue (B), and may be combinations of cyan (C), magenta (M), and yellow (Y) (see fig. 24B 2).

When the pixels 240 are arranged in a matrix of 1920×1080, the display unit 13 capable of full-color display with a so-called 2K resolution can be realized. In addition, for example, when the pixels 240 are arranged in a matrix of 3840×2160, the display unit 13 capable of full-color display with a resolution of 4K can be realized. In addition, for example, when the pixels 240 are arranged in a matrix of 7680x4320, the display unit 13 capable of full-color display with 8K resolution can be realized. By adding the pixels 240, the display portion 13 capable of full-color display with a resolution of 16K or 32K can also be realized.

As a layout of the three pixels 230 constituting one pixel 240, delta layout may be adopted (see fig. 24B 3). Specifically, the pixels 230 may be arranged such that the central points of the three pixels 230 constituting one pixel 240 are connected to form a triangle. Note that the arrangement of the pixels 230 is not limited to the stripe arrangement and Delta arrangement. As a layout of the pixels 230, a Zigzag layout, an S stripe layout, a bayer layout, or a Pentile layout may be adopted.

In addition, the areas of the three sub-pixels (pixels 230) may also be different. When the light emission efficiency, the reliability, and the like are different depending on the light emission color, the area of the sub-pixel may be changed depending on the light emission color (see fig. 24B 4). Note that the arrangement of the subpixels shown in fig. 24B4 may also be referred to as an "S-stripe arrangement" or the like.

In addition, four sub-pixels may be used as one pixel in total. For example, a sub-pixel for controlling white light may be added to three sub-pixels for controlling red light, green light, and blue light, respectively (see fig. 24B 5). By additionally controlling the sub-pixels of the white light, the brightness of the display area can be improved. In addition, a subpixel for controlling yellow light may be added to three subpixels for controlling red light, green light, and blue light, respectively (see fig. 24B 6). In addition, a sub-pixel for controlling white light may be added to three sub-pixels for controlling cyan light, magenta light, and yellow light, respectively (see fig. 24B 7).

The number of subpixels used as one pixel is increased, and subpixels for controlling light of red, green, blue, cyan, magenta, yellow, and the like can be appropriately combined and used, whereby reproducibility of halftone can be improved. Therefore, display quality can be improved.

The display device according to one embodiment of the present invention can reproduce color gamuts of various specifications. For example, a color gamut or the like of the following specifications can be reproduced: PAL (PHASEALTERNATING LINE: phase alternating line) specification and NTSC (NationalTelevision SystemCommittee: national television standards committee) specification for use in television broadcasting; sRGB (standard RGB) specification and AdobeRGB specification widely used in display devices for electronic devices such as personal computers, digital cameras, and printers; ITU-RBT.709(InternationalTelecommunication UnionRadiocommunication SectorBroadcasting Service(Television)709： international telecommunications union radio communication sector broadcast service (television) 709, used in HDTV (HighDefinitionTelevision, also known as high definition); DCI-P3 (DIGITAL CINEMA INITIATIVES P3: digital cinema initiatives P3) specification for use in digital cinema projection; and ITU-rbt.2020 (rec.2020 (Recommendation 2020: 2020)) specifications for use in UHDTV (Ultra High Definition Television, also referred to as ultra-high definition), and the like.

In addition, a pixel 231 having a light receiving element may be provided in one pixel 240. In the pixel 240 shown in fig. 25A, the pixel 230 (G) that exhibits green light, the pixel 230 (B) that exhibits blue light, the pixel 230 (R) that exhibits red light, and the pixel 231 (S) having a light receiving element are arranged in a stripe shape. Note that the pixel 231 is also referred to as an "imaging pixel" in this specification or the like.

The light receiving element included in the pixel 231 is preferably an element that detects visible light, and is preferably an element that detects one or more of blue, violet, bluish violet, green, yellowish green, yellow, orange, red, or the like. The light receiving element included in the pixel 231 may be an element that detects infrared light.

The pixel 240 shown in fig. 25A adopts a stripe configuration. In addition, when light of a predetermined color is detected by the pixel 231 having the light receiving element, the pixel 230 that displays the light of the color is preferably arranged adjacent to the pixel 231, whereby the detection accuracy can be improved.

In the pixel 240 shown in fig. 25B, three pixels 230 and one pixel 231 are arranged in a matrix. Fig. 25B shows an example in which a pixel 230 that exhibits red light and a pixel 231 having a light receiving element are adjacent in the row direction and a pixel 230 that exhibits blue light and a pixel 230 that exhibits green light are adjacent in the row direction, but is not limited thereto.

The pixel 240 shown in fig. 25C has a structure in which an additional pixel 231 is arranged in an S stripe. The pixel 240 of fig. 25C includes one elongated pixel 230, two horizontally elongated pixels 230, and one horizontally elongated pixel 231. Note that the elongated pixels 230 may be R, G or S, and the arrangement order of the elongated sub-pixels is not limited.

Fig. 25D shows an example in which the pixels 240a and the pixels 240b are alternately arranged. The pixel 240a includes a pixel 230 that emits blue light, a pixel 230 that emits green light, and a pixel 231 having a light receiving element. The pixel 240b includes a pixel 230 that emits red light, a pixel 230 that emits green light, and a pixel 231 having a light receiving element. The pixel 240a and the pixel 240b are collectively used as one pixel 240. In fig. 25D, both of the pixel 240a and the pixel 240b include a pixel 230 and a pixel 231 which display green light, but are not limited thereto. By including the pixel 231 in both the pixel 240a and the pixel 240b, the sharpness of the image pickup pixel can be improved.

Fig. 25E shows an example of a six-square layout as a layout method of the pixels 230 and 231. The six-square layout is preferable because the aperture ratio of each subpixel can be improved. Fig. 25E shows an example in which the top surfaces of the pixels 230 and 231 have a hexagonal shape.

The pixel 240 shown in fig. 25F is an example in which the pixel 230 is arranged on a row and the pixel 231 is arranged below the row.

The pixel 240 shown in fig. 25G is an example in which the pixel 230 and the pixel 230X are arranged in a row, and the pixel 231 is arranged below the row.

As the pixel 230X, for example, a pixel 230 that exhibits infrared light (IR) can be used. That is, the pixel 230X includes a light emitting element 61 that exhibits infrared light (IR). In this case, the pixel 231 preferably includes a light receiving element that detects infrared light. For example, the reflected light of the infrared light emitted from the sub-pixel X may be detected by the pixel 231 while the image is displayed by the pixel 230 emitting the visible light.

In addition, a plurality of pixels 231 may be provided in one pixel 240. At this time, the wavelength regions of the light detected by the plurality of pixels 231 may be the same or different. For example, the visible light may be detected by a part of the plurality of pixels 231 and the infrared light may be detected by another part.

The pixels 231 may not be provided in all the pixels 240, and the pixels 240 including the pixels 231 may be provided in a predetermined number of pixels.

The pixels 231 or 231 and the sensor 125 described above may be used to detect information for personal identification using, for example, a fingerprint, a palm print, an iris, a retina, a pulse shape (including a vein shape, an artery shape), a face, or the like. In addition, the number of blinks, eyelid movements, pupil size, body temperature, pulse, oxygen saturation in blood, etc. of the user may be measured using the pixel 231 or the pixel 231 and the sensor 125 to detect the fatigue, health status, etc. of the user.

The operation of the electronic device may be achieved using the user's gaze movements, blink times, blink cadences, etc. Specifically, the pixel 231 or the pixel 231 and the sensor 125 may be used to detect information such as the line of sight movement, the number of blinks, and the blink rhythm of the user, and one or a combination of the above information may be used as an operation signal of the electronic device. For example, blinking may be used instead of clicking the mouse. By detecting the eye movement and blinking, the user can perform an input operation of the electronic device in a handsfree state. Thus, operability of the electronic apparatus can be improved.

In addition, by providing a plurality of imaging pixels (pixels 231) in the display device 10, the plurality of imaging pixels can be used as the line-of-sight detection section 102. Therefore, the number of components of the electronic apparatus can be reduced. Thus, the electronic device can be reduced in weight, improved in productivity, reduced in cost, and the like.

Fig. 26 shows a configuration example of the display portion 13 in the case where the pixel 240 includes the pixel 231 having a light receiving element. Fig. 26 is a block diagram illustrating the display section 13 including the pixels 231. The display unit 13 includes a plurality of pixels 240 arranged in a matrix. As the pixel 240, fig. 26 illustrates a pixel structure of fig. 25F.

In fig. 26, the display unit 13 is electrically connected to the first driving unit 141, the second driving unit 143, and the readout unit 142. Specifically, the first driving section 141 is electrically connected to the plurality of pixels 231 through the plurality of wirings 161. One wiring 161 is electrically connected to a plurality of pixels 231 arranged in one row. The readout portion 142 is electrically connected to the plurality of pixels 231 through the plurality of wirings 162. One wiring 162 is electrically connected to a plurality of pixels 231 arranged on one column. The second driving unit 143 is electrically connected to the readout unit 142 via a plurality of wirings 163.

The wiring connected to one pixel 231 is not limited to the wiring 161 and the wiring 162. Wirings other than the wiring 161 and the wiring 162 can be connected to the pixel 231.

The first driving unit 141, the reading unit 142, and the second driving unit 143 are electrically connected to the control unit 144. The control section 144 has a function of controlling the operations of the first driving section 141, the reading section 142, and the second driving section 143.

The first driving section 141 has a function of selecting the pixels 231 for each row. The pixels 231 of the row selected by the first driving section 141 output image pickup data to the readout section 142 through the wiring 162.

The readout unit 142 holds the image data supplied from the pixels 231 and performs noise removal processing or the like. As the noise removal processing, CDS (Correlated Double Sampling: correlated double sampling) processing or the like may be performed, for example. The readout unit 142 may have a function of amplifying the image data, a function of a/D converting the image data, and the like.

The second driving unit 143 has a function of sequentially selecting the image data held by the reading unit 142 and outputting the image data from the output terminal OUT to the outside.

Note that as shown in fig. 24A, the plurality of pixels 230 are electrically connected to the source driver circuit 31 and the gate driver circuit 33, and this is not shown in fig. 26. In addition, fig. 26 shows an example in which one first driving section 141, one reading section 142, one second driving section 143, and a control section 144 are provided in the display section 13, but they may be provided in each sub-display section 19.

By providing the first driving section 141, the reading section 142, the second driving section 143, and the control section 144 in each sub-display section 19, the operation speeds of the first driving section 141, the reading section 142, the second driving section 143, and the control section 144 with respect to the area determined to be unnecessary for the image capturing operation can be reduced or their operations can be stopped. Accordingly, power consumption of the display device can be reduced.

In addition, the first driving section 141, the reading section 142, the second driving section 143, and the control section 144 may be provided in the layer 20, similarly to the source driving circuit 31 and the gate driving circuit 33.

< Example of the circuit configuration of the pixel 231 >

Fig. 27A is a circuit diagram illustrating a circuit configuration example of the pixel 231. The pixel 231 includes a light receiving element 71 (also referred to as a "photoelectric conversion element" or "image pickup element") and a pixel circuit 72. In this specification and the like, the pixel circuit 72 is sometimes referred to as an "imaging pixel circuit".

The pixel circuit 72 includes a transistor 132 and a readout circuit 73. The readout circuit 73 includes a transistor 133, a transistor 134, a transistor 135, and a capacitor 138. Note that the capacitor 138 may not be provided.

One electrode (cathode) of the light receiving element 71 is electrically connected to one of the source and the drain of the transistor 132. The other of the source and the drain of the transistor 132 is electrically connected to one of the source and the drain of the transistor 133. One of a source and a drain of the transistor 133 is electrically connected to one electrode of the capacitor 138. One electrode of the capacitor 138 is electrically connected to the gate of the transistor 134. One of a source and a drain of the transistor 134 is electrically connected to one of a source and a drain of the transistor 135.

Here, a wiring that connects the other of the source and the drain of the transistor 132, one of the source and the drain of the transistor 133, one electrode of the capacitor 138, and the gate of the transistor 134 is set as the node FD. The node FD may be used as a charge detection section.

The other electrode (anode) of the light receiving element 71 is electrically connected to the wiring 121. The gate of the transistor 132 is electrically connected to the wiring 127. The other of the source and the drain of the transistor 133 is electrically connected to the wiring 122. The other of the source and the drain of the transistor 134 is electrically connected to the wiring 123. The gate of the transistor 133 is electrically connected to the wiring 126. The gate of the transistor 135 is electrically connected to the wiring 128. The other electrode of the capacitor 138 is electrically connected to a reference potential line such as GND wiring, for example. The other of the source and the drain of the transistor 135 is electrically connected to the wiring 352.

The wirings 127, 126, and 128 have functions as signal lines for controlling the on state and the off state of each transistor. The wiring 352 has a function as an output line.

The wirings 121, 122, and 123 function as power supply lines. In the structure shown in fig. 27A, the cathode side of the light receiving element 71 is electrically connected to the transistor 132, and the node FD is reset to a high potential to operate. Therefore, the wiring 122 is set to a high potential (a potential higher than that of the wiring 121).

Note that although the cathode of the light receiving element 71 is electrically connected to the node FD in the structure shown in fig. 27A, a structure in which the anode side of the light receiving element 71 is electrically connected to one of the source and the drain of the transistor 132 may be employed. In this case, since the node FD is reset to a low potential and is operated, the wiring 122 may be set to a low potential (a potential lower than the wiring 121).

The transistor 132 has a function of controlling the potential of the node FD. Transistor 132 is also referred to as a "pass transistor". The transistor 133 has a function of resetting the potential of the node FD. The transistor 133 is also referred to as a "reset transistor". The transistor 134 is used as a source follower circuit, and can output the potential of the node FD to the wiring 352 as image data. The transistor 135 has a function of selecting a pixel which outputs image data. The transistor 134 is also referred to as an "amplifying transistor". Transistor 135 is also referred to as a "select transistor".

As shown in fig. 27B, the light receiving element 71 and the transistor 132 may be combined into one to electrically connect the plurality of groups of light receiving elements 71 and the transistor 132 to one node FD. That is, a plurality of sets of the light receiving element 71 and the transistor 132 may be electrically connected to one readout circuit 73.

By using one readout circuit 73 in common by the plurality of sets of light receiving elements 71 and the transistors 132, the area occupied by each pixel 231 can be reduced. Accordingly, the mounting density of the pixels 231 can be improved. For example, the readout circuit 73 may be formed in the layer 20, and the light receiving element 71 and the transistor 132 may be formed in the layer 50. The light receiving element 71 may be formed in the layer 60.

In fig. 27B, the first group of light receiving element 71 and transistor 132 are shown as light receiving element 71_1 and transistor 132_1. The gate of the transistor 132_1 is electrically connected to the wiring 127_1. In addition, the second group of light receiving element 71 and transistor 132 are denoted as light receiving element 71_2 and transistor 132_2. The gate of the transistor 132_2 is electrically connected to the wiring 127_2. The k-th group (k is an integer of 1 or more) of light receiving elements 71 and transistors 132 are denoted as light receiving elements 71—k and transistors 132—k. The gate of the transistor 132_k is electrically connected to the wiring 127_k.

In the structure shown in fig. 27B, one set of the light receiving element 71 and the transistor 132 can be regarded as one pixel 231. In fig. 27B, a pixel 231 configured by the light receiving element 71_1 and the transistor 132_1 is shown as a pixel 231_1. In addition, a pixel 231 formed of the light receiving element 71_2 and the transistor 132_2 is denoted as a pixel 231_2. In addition, a pixel 231 configured by the light receiving element 71_k and the transistor 132_k is denoted as a pixel 231_k. In the structure shown in fig. 27B, the transistor 132 corresponds to the pixel circuit 72.

< Structural example of light-emitting element >

A light-emitting element 61 that can be used for a display device according to one embodiment of the present invention will be described.

As shown in fig. 28A, the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (a conductor 171 and a conductor 173). The EL layer 172 may be composed of a plurality of layers such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 may include, for example, a layer containing a substance having high electron injection property (an electron injection layer), a layer containing a substance having high electron transport property (an electron transport layer), or the like. The light-emitting layer 4411 includes, for example, a light-emitting compound. The layer 4430 may include, for example, a layer containing a substance having high hole injection property (a hole injection layer) and a layer containing a substance having high hole transport property (a hole transport layer).

The structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 which are provided between a pair of electrodes can be used as a single light-emitting unit, and the structure of fig. 28A is referred to as a single structure in this specification or the like.

Fig. 28B is a modified example of the EL layer 172 included in the light-emitting element 61 shown in fig. 28A. Specifically, the light-emitting element 61 shown in FIG. 28B includes a layer 4430-1 over a conductor 171, a layer 4430-2 over a layer 4430-1, a light-emitting layer 4411 over a layer 4430-2, a layer 4420-1 over a light-emitting layer 4411, a layer 4420-2 over a layer 4420-1, and a conductor 173 over a layer 4420-2. For example, when the conductor 171 and the conductor 173 are used as an anode and a cathode, respectively, the layer 4430-1 is used as a hole injection layer, the layer 4430-2 is used as a hole transport layer, the layer 4420-1 is used as an electron transport layer, and the layer 4420-2 is used as an electron injection layer. Alternatively, when the conductor 171 and the conductor 173 are used as a cathode and an anode, respectively, the layer 4430-1 is used as an electron injection layer, the layer 4430-2 is used as an electron transport layer, the layer 4420-1 is used as a hole transport layer, and the layer 4420-2 is used as a hole injection layer. By adopting such a layer structure, carriers can be efficiently injected into the light-emitting layer 4411, and recombination efficiency of carriers in the light-emitting layer 4411 can be improved.

As shown in fig. 28C, a structure in which a plurality of light-emitting layers (light-emitting layers 4411, 4412, and 4413) are provided between the layers 4420 and 4430 is also a modification example of a single structure.

As shown in fig. 28D, a structure in which a plurality of light emitting units (EL layers 172a and 172 b) are connected in series with an intermediate layer (charge generation layer) 4440 interposed therebetween is referred to as a series structure or a stacked structure in this specification. By adopting the series structure, a light-emitting element capable of emitting light with high luminance can be realized.

In addition, when the light-emitting element 61 has a series structure shown in fig. 28D, the light-emitting colors of the EL layer 172a and the EL layer 172b can be made the same. For example, the emission colors of the EL layers 172a and 172b may be green.

Further, by using the light-emitting element 61 that emits red light (R), the light-emitting element 61 that emits green light (G), and the light-emitting element 61 that emits blue light (B) as sub-pixels, one pixel is constituted by the three sub-pixels, and full-color display can be realized. When the display portion 13 includes three sub-pixels R, G, B, each light-emitting element may have a series structure. Specifically, the EL layer 172a and the EL layer 172B of the sub-pixel of R each contain a material capable of emitting red light, the EL layer 172a and the EL layer 172B of the sub-pixel of G each contain a material capable of emitting green light, and the EL layer 172a and the EL layer 172B of the sub-pixel of B each contain a material capable of emitting blue light. In other words, the materials of the light-emitting layer 4411 and the light-emitting layer 4412 may be the same. By making the emission colors of the EL layer 172a and the EL layer 172b the same, the current density per unit emission luminance can be reduced. Therefore, the reliability of the light emitting element 61 can be improved.

The light emitting color of the light emitting element may be red, green, blue, cyan, magenta, yellow, white, or the like depending on the material constituting the EL layer 172. In addition, by providing the light-emitting element with a microcavity structure, color purity can be further improved.

The light-emitting layer may contain two or more kinds of light-emitting substances each emitting light, such as R (red), G (green), B (blue), Y (yellow), and O (orange). The white light-emitting element preferably has a structure in which the light-emitting layer contains two or more kinds of light-emitting substances. In order to obtain white light emission, two or more kinds of light-emitting substances each having a complementary color relationship may be selected. For example, by placing the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary relationship, a light-emitting element that emits light in white over the entire light-emitting element can be obtained. The same applies to a light-emitting element including three or more light-emitting layers.

The light-emitting layer preferably contains two or more kinds of light-emitting substances each of which emits light such as R (red), G (green), B (blue), Y (yellow), O (orange), and the like. Or preferably comprises two or more luminescent materials each of which comprises two or more spectral components in R, G, B. Further, as the light-emitting substance, a substance that emits near infrared light may be used.

Examples of the light-emitting substance include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), a substance that exhibits delayed fluorescence by thermal activation (ThermallyActivatedDelayedFluorescence: TADF material), and the like. As the light-emitting substance included in the EL element, an inorganic compound (a quantum dot material or the like) can be used in addition to an organic compound.

< Method of Forming light-emitting element >

An example of a method for forming the light-emitting element 61 is described below.

Fig. 29A is a schematic plan view of the light emitting element 61. The light-emitting element 61 includes a plurality of light-emitting elements 61R that exhibit red, a plurality of light-emitting elements 61G that exhibit green, and a plurality of light-emitting elements 61B that exhibit blue. In fig. 29A, symbols "R", "G", and "B" are attached to the light emitting regions of the light emitting elements for the convenience of distinguishing the light emitting elements. Fig. 29A shows an example of a structure having three emission colors of red (R), green (G), and blue (B), but is not limited thereto. For example, a structure having four or more colors may be adopted.

The light emitting elements 61R, 61G, and 61B are all arranged in a matrix. Fig. 29A shows a so-called stripe arrangement, that is, an arrangement in which light emitting elements of the same color are arranged in one direction, but the arrangement method of the light emitting elements is not limited thereto.

As the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B, organic EL elements such as an OLED (Organic LightEmittingDiode: organic light-emitting diode) or a QLED (Quantum-dotLightEmittingDiode: quantum dot organic light-emitting diode) are preferably used. Examples of the light-emitting substance included in the EL element include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), a substance that exhibits thermally activated delayed fluorescence (ThermallyActivatedDelayedFluorescence: TADF) material), and the like.

Fig. 29B is a schematic cross-sectional view corresponding to the dash-dot line A1-A2 in fig. 29A. Fig. 29B shows a cross section of the light emitting element 61R, the light emitting element 61G, and the light emitting element 61B. The light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B are each provided over an insulator 363 and include a conductor 171 serving as a pixel electrode and a conductor 173 serving as a common electrode. As the insulator 363, one or both of an inorganic insulating film and an organic insulating film can be used. As the insulator 363, an inorganic insulating film is preferably used. Examples of the inorganic insulating film include oxide insulating films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film.

The light-emitting element 61R includes an EL layer 172R between a conductor 171 serving as a pixel electrode and a conductor 173 serving as a common electrode. The EL layer 172R contains a light-emitting organic compound that emits light at least in red. The EL layer 172G in the light-emitting element 61G contains a light-emitting organic compound that emits at least green light. The EL layer 172B in the light-emitting element 61B contains a light-emitting organic compound that emits light at least in blue.

In addition to a layer containing a light-emitting organic compound (a light-emitting layer), each of the EL layers 172R, EL and 172B may include one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

Each light emitting element is provided with a conductor 171 serving as a pixel electrode. The conductor 173 serving as a common electrode is a continuous layer common to the light-emitting elements. Either one of the conductor 171 serving as a pixel electrode and the conductor 173 serving as a common electrode uses a conductive film having transparency to visible light, and the other uses a conductive film having reflectivity. A bottom emission type (bottom emission structure) display device can be manufactured by making the conductor 171 used as a pixel electrode light transmissive and the conductor 173 used as a common electrode light transmissive, whereas a top emission type (top emission structure) display device can be manufactured by making the conductor 171 used as a pixel electrode light transmissive and the conductor 173 used as a common electrode light transmissive. Note that by making both the conductor 171 serving as a pixel electrode and the conductor 173 serving as a common electrode have light transmittance, a double-sided emission type (double-sided emission structure) display device can also be manufactured.

For example, when the light emitting element 61R has a top emission structure, light 175R from the light emitting element 61R is emitted to the side of the conductor 173. When the light-emitting element 61R has a top emission structure, light 175G from the light-emitting element 61G is emitted to the side of the conductor 173. When the light-emitting element 61B has a top emission structure, light 175B from the light-emitting element 61B is emitted to the side of the conductor 173.

The insulator 272 is provided so as to cover an end portion of the conductor 171 serving as a pixel electrode. The end of insulator 272 is preferably tapered in shape. The insulator 272 can be made of the same material as that used for the insulator 363.

The insulator 272 is provided to prevent an unintended electrical short between the adjacent light emitting elements 61 and to unintended light emission from the light emitting elements 61. Further, the insulator 272 also has a function of not bringing the metal mask into contact with the conductor 171 when the EL layer 172 is formed using the metal mask.

The EL layer 172R, EL layer 172G and the EL layer 172B each include a region in contact with the top surface of the conductor 171 serving as a pixel electrode and a region in contact with the surface of the insulator 272. In addition, the ends of the EL layer 172R, EL, 172G, and 172B are located on the insulator 272.

As shown in fig. 29B, a gap is provided between the two EL layers between the light emitting elements having different emission colors. Thus, the EL layers 172R, EL and 172G and 172B are preferably provided so as not to contact each other. Thus, it is possible to appropriately prevent current from flowing through the adjacent two EL layers to generate unintended light emission (also referred to as crosstalk). Therefore, the contrast can be improved and a display device with high display quality can be realized.

The EL layer 172R, EL and the EL layer 172B can be formed separately by vacuum deposition using a shadow mask such as a metal mask. The EL layer may be manufactured separately by photolithography. By using the photolithography method, a high-definition display device which is difficult to realize when using a metal mask can be realized.

Note that in this specification and the like, a device manufactured using a metal mask or an FMM (FINEMETAL MASK, high-definition metal mask) is sometimes referred to as a device of an MM (MetalMask) structure. In this specification and the like, a device manufactured without using a metal mask or an FMM is sometimes referred to as a MML (Metal Mask Less) -structured device. Since the display device of the MML structure is not manufactured using a metal mask, the degree of freedom in design such as pixel arrangement and pixel shape is higher than that of the display device of the MM structure.

Further, a protective layer 271 is provided over the conductor 173 serving as a common electrode so as to cover the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. The protective layer 271 has a function of preventing impurities such as water from diffusing from above to each light-emitting element.

The protective layer 271 may have a single-layer structure or a stacked-layer structure including at least an inorganic insulating film, for example. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film. Further, as the protective layer 271, a semiconductor material such as indium gallium oxide or Indium Gallium Zinc Oxide (IGZO) may be used. The protective layer 271 may be formed by an ALD method, a CVD method, or a sputtering method. Note that the protective layer 271 is exemplified as having a structure including an inorganic insulating film, but is not limited thereto. For example, the protective layer 271 may have a stacked structure of an inorganic insulating film and an organic insulating film.

In the present specification, nitrogen oxides refer to compounds having a nitrogen content greater than an oxygen content. In addition, oxynitride refers to a compound having an oxygen content greater than a nitrogen content. Furthermore, the content of each element can be measured using, for example, rutherford backscattering spectrometry (RBS: rutherfordBackscattering Spectrometry) or the like.

When indium gallium zinc oxide is used for the protective layer 271, processing can be performed by wet etching or dry etching. For example, when IGZO is used for the protective layer 271, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also referred to as a mixed acid aluminum etching solution)) may be used. The mixed acid aluminum etching solution can be prepared by the following steps of: acetic acid: nitric acid: water = 53.3:6.7:3.3:36.7 and its vicinity.

The structure shown in fig. 29B may be referred to as an SBS structure described later.

Fig. 29C shows an example different from the above-described structure. Specifically, fig. 29C includes a light-emitting element 61W that emits white light. The light-emitting element 61W includes an EL layer 172W that exhibits white light between a conductor 171 serving as a pixel electrode and a conductor 173 serving as a common electrode.

The EL layer 172W may be formed by stacking two or more light-emitting layers selected so that the respective light-emitting colors are in a complementary relationship. In addition, a stacked EL layer in which a charge generation layer is sandwiched between light-emitting layers may be used.

Fig. 29C shows three light emitting elements 61W in parallel. The upper portion of the light-emitting element 61W on the left is provided with a colored layer 264R. The colored layer 264R is used as a bandpass filter that transmits red light. Similarly, a coloring layer 264G transmitting green light is provided on the upper portion of the middle light-emitting element 61W, and a coloring layer 264B transmitting blue light is provided on the upper portion of the right light-emitting element 61W. Thereby, the display device can be caused to display a color image.

Here, between the adjacent two light emitting elements 61W, the EL layer 172W and the conductor 173 serving as a common electrode are separated from each other. This prevents the current from flowing through the EL layer 172W in the adjacent two light-emitting elements 61W, thereby preventing unintended light emission. In particular, when a stacked EL layer in which a charge generation layer is provided between two light-emitting layers is used as the EL layer 172W, the following problems are involved: when the sharpness is higher, that is, the distance between adjacent pixels is smaller, the influence of crosstalk is more remarkable, and the contrast is lowered. Therefore, by adopting such a structure, a display device having both high definition and high contrast can be realized.

The EL layer 172W is preferably separated by photolithography and the conductor 173 is used as a common electrode. Thus, the gap between the light emitting elements can be reduced, and a display device having a high aperture ratio can be realized, for example, as compared with the case of using a shadow mask such as a metal mask.

Note that in the light-emitting element of the bottom emission structure, a coloring layer may be provided between the conductor 171 and the insulator 363 which are used as pixel electrodes.

Fig. 29D shows an example different from the above-described structure. Specifically, in fig. 29D, the insulator 272 is not provided between the light-emitting elements 61R, 61G, and 61B. By adopting this structure, a display device having a high aperture ratio can be realized. In addition, since the irregularities of the light emitting element 61 are reduced without providing the insulator 272, the viewing angle of the display device is improved. Specifically, the viewing angle may be set to 150 ° or more and less than 180 °, preferably 160 ° or more and less than 180 °.

In addition, the protective layer 271 covers the side surfaces of the EL layer 172R, EL, the layer 172G, and the EL layer 172B. By adopting this structure, impurities (typically, water or the like) which may enter from the side surfaces of the EL layers 172R, EL, 172G, and 172B can be suppressed. In addition, since the leakage current between the adjacent light emitting elements 61 is reduced, the saturation and contrast are improved and the power consumption is reduced.

In the structure shown in fig. 29D, the top surfaces of the conductor 171, the EL layer 172R, and the conductor 173 are substantially uniform in shape. Such a structure can be formed simultaneously with the formation of the conductor 171, the EL layer 172R, and the conductor 173 using a resist mask or the like. This process can also be referred to as self-aligned patterning because the EL layer 172R and the conductor 173 are processed using the conductor 173 as a mask. Note that although the EL layer 172R is described here, the same structure may be used for the EL layers 172G and 172B.

In fig. 29D, a protective layer 273 is further provided on the protective layer 271. For example, the region 275 may be provided between the protective layer 271 and the protective layer 273 by forming the protective layer 271 by an apparatus capable of depositing a film having higher coverage (typically, an ALD apparatus or the like) and forming the protective layer 273 by an apparatus capable of depositing a film having lower coverage than the protective layer 271 (typically, a sputtering apparatus). In other words, region 275 is located between EL layer 172R and EL layer 172G and between EL layer 172G and EL layer 172B.

Zone 275 comprises, for example, any one or more selected from the group consisting of air, nitrogen, oxygen, carbon dioxide, and group 18 elements (typically helium, neon, argon, krypton, xenon, etc.), and the like. In addition, the region 275 sometimes contains, for example, a gas used in depositing the protective layer 273. For example, when the protective layer 273 is deposited by sputtering, the region 275 sometimes contains any one or more of the above-described group 18 elements. Note that when the region 275 contains a gas, identification of the gas or the like may be performed by gas chromatography or the like. Or when the protective layer 273 is deposited by sputtering, a gas used for sputtering may be contained in the film of the protective layer 273. In this case, when the analysis is performed on the protective layer 273 by energy dispersive X-ray analysis (EDX analysis), an element such as argon is sometimes detected.

In addition, when the refractive index of the region 275 is lower than that of the protective layer 271, light emitted from the EL layer 172R, EL layer 172G or the EL layer 172B is reflected at the interface of the protective layer 271 and the region 275. Thus, light emitted from the EL layer 172R, EL or the EL layer 172G or 172B may be suppressed from entering an adjacent pixel. This can suppress the mixing of different emission colors from adjacent pixels, and can improve the display quality of the display device.

In addition, when the structure shown in fig. 29D is employed, a region between the light-emitting element 61R and the light-emitting element 61G or a region between the light-emitting element 61G and the light-emitting element 61B (hereinafter, simply referred to as a distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements may be 1 μm or less, preferably 500nm or less, more preferably 200nm or less, 100nm or less, 90nm or less, 70nm or less, 50nm or less, 30nm or less, 20nm or less, 15nm or less, or 10nm or less. In other words, a region having a distance of 1 μm or less, preferably a region of 0.5 μm (500 nm) or less, more preferably a region of 100nm or less, between the side surface of the EL layer 172R and the side surface of the EL layer 172G or between the side surface of the EL layer 172G and the side surface of the EL layer 172B is provided.

In addition, for example, when the region 275 contains a gas, mixing of light from each light-emitting element, crosstalk, or the like can be suppressed while element separation between light-emitting elements is performed.

In addition, the region 275 may be a space or may be filled with a filler. Examples of the filler include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In addition, a photoresist may be used as the filler. The photoresist used as the filler may be either a positive type photoresist or a negative type photoresist.

Fig. 30A shows an example different from the above-described structure. Specifically, the structure shown in fig. 30A is different from that shown in fig. 29D in the structure of the insulator 363. A part of the top surface of the insulator 363 is shaved off and has a concave portion when the light emitting elements 61R, 61G, and 61B are processed. The protective layer 271 is formed in the recess. In other words, the bottom surface having the protective layer 271 is located in a region below the bottom surface of the conductor 171 when viewed in cross section. By having this region, impurities (typically, water or the like) which can enter the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B from below can be appropriately suppressed. The recessed portions may be formed when impurities (also referred to as residues) that may adhere to the side surfaces of the light-emitting elements 61R, 61G, and 61B during processing of the light-emitting elements are removed by wet etching or the like. By covering the side surfaces of each light-emitting element with the protective layer 271 after removing the residues, a highly reliable display device can be realized.

Fig. 30B shows an example different from the above-described configuration. Specifically, the structure shown in fig. 30B includes an insulator 276 and a microlens array 277 in addition to the structure shown in fig. 30A. Insulator 276 is used as an adhesive layer. In addition, when the refractive index of the insulator 276 is lower than that of the microlens array 277, the microlens array 277 can collect light emitted from the light emitting elements 61R, 61G, and 61B. Thus, the light extraction efficiency of the display device can be improved. Especially, when the user looks at the display surface of the display device from the front, a bright image can be seen, so that this is preferable. As the insulator 276, various curing adhesives such as a photo-curing adhesive such as an ultraviolet curing adhesive, a reaction curing adhesive, a heat curing adhesive, and an anaerobic adhesive can be used. Examples of such binders include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene-vinyl acetate) resins. In particular, a material having low moisture permeability such as epoxy resin is preferably used. In addition, a two-liquid mixed type resin may be used. In addition, an adhesive sheet or the like may be used.

Fig. 30C shows an example different from the above-described configuration. Specifically, the structure shown in fig. 30C includes three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the structure shown in fig. 30A. Further, an insulator 276 is included over the three light-emitting elements 61W, and a colored layer 264R, a colored layer 264G, and a colored layer 264B are included over the insulator 276. Specifically, the red light transmitting colored layer 264R is provided at a position overlapping the left light emitting element 61W, the green light transmitting colored layer 264G is provided at a position overlapping the center light emitting element 61W, and the blue light transmitting colored layer 264B is provided at a position overlapping the right light emitting element 61W. Thereby, the semiconductor device can display a color image. The structure shown in fig. 30C is also a modified example of the structure shown in fig. 29C.

Fig. 30D shows an example different from the above-described configuration. Specifically, in the structure shown in fig. 30D, the protective layer 271 is provided adjacent to the side surfaces of the conductor 171 and the EL layer 172. The conductor 173 is provided as a continuous layer common to the light emitting elements. In addition, in the structure shown in fig. 30D, the region 275 is preferably filled with a filler.

By providing the light-emitting element 61 with an optical microcavity resonator (microcavity) structure, the color purity of the emitted light color can be improved. When the light-emitting element 61 has a microcavity structure, the product (optical distance) of the distance d between the conductors 171 and 173 and the refractive index n of the EL layer 172 is set to m times (m is an integer of 1 or more) the half of the wavelength λ. The distance d can be obtained by equation 1.

D=m×λ/(2×n) equation 1).

According to expression 1, the distance d is determined in the light emitting element 61 of the microcavity structure based on the wavelength (emission color) of the emitted light. The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G is sometimes provided thicker than the EL layer 172B, and the EL layer 172R is sometimes provided thicker than the EL layer 172G.

Note that strictly speaking, the distance d is a distance from a reflection region in the conductor 171 serving as a reflection electrode to a reflection region in the conductor 173 serving as an electrode (semi-transmission-semi-reflection electrode) having the transmittance and the reflectivity of emitted light. For example, in the case where the conductor 171 is a laminate of silver and ITO (IndiumTin Oxide) of a transparent conductive film and ITO is located on the EL layer 172 side, the distance d corresponding to the emission color can be set by adjusting the thickness of ITO. That is, even if the thicknesses of the EL layers 172R, EL, 172G and 172B are the same, the distance d suitable for the emission color can be obtained by changing the thickness of the ITO.

However, it is sometimes difficult to strictly determine the positions of the reflection regions in the conductors 171 and 173. In this case, it is assumed that the microcavity effect can be sufficiently obtained by assuming that any position of the conductor 171 and the conductor 173 is a reflection region.

The light-emitting element 61 is constituted by a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, and the like. A detailed configuration example of the light emitting element 61 will be described in other embodiments. In order to improve the light extraction efficiency of the microcavity structure, it is preferable to set the optical distance from the conductor 171 serving as the reflective electrode to the light-emitting layer to be an odd multiple of λ/4. In order to achieve this optical distance, the thickness of each layer constituting the light-emitting element 61 is preferably adjusted.

In addition, when light is emitted from the side of the conductor 173, the reflectance of the conductor 173 is preferably higher than the transmittance thereof. The light transmittance of the conductor 173 is preferably 2% or more and 50% or less, more preferably 2% or more and 30% or less, and still more preferably 2% or more and 10% or less. By decreasing the transmittance (increasing the reflectance) of the conductor 173, the microcavity effect can be increased.

Fig. 31A shows an example different from the above-described structure. Specifically, in the structure shown in fig. 31A, the EL layer 172 extends beyond the end of the conductor 171 in each of the light-emitting elements 61R, 61G, and 61B. For example, in the light-emitting element 61R, the EL layer 172R extends beyond the end of the conductor 171. In addition, in the light-emitting element 61G, the EL layer 172G extends beyond the end of the conductor 171. In addition, in the light-emitting element 61B, the EL layer 172B extends beyond the end of the conductor 171.

In addition, in each of the light-emitting elements 61R, 61G, and 61B, the EL layer 172 and the protective layer 271 have a region overlapping with the insulator 270 interposed therebetween. In addition, in the region between the adjacent light emitting elements 61, an insulator 278 is provided on the protective layer 271.

Examples of the insulator 278 include epoxy resin, acrylic resin, silicone resin, phenol resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene-vinyl acetate) resin. In addition, a photoresist may be used as the insulator 278. The photoresist used as the insulator 278 may be either a positive type photoresist or a negative type photoresist.

The light-emitting elements 61R, 61G, 61B, and the insulator 278 have a common layer 174, and the common layer 174 has a conductor 173. The common layer 174 has a region in contact with the EL layer 172R, a region in contact with the EL layer 172G, and a region in contact with the EL layer 172B. The light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B share a common layer 174.

As the common layer 174, one or more of a hole injection layer, a hole transport layer, a hole blocking layer, an electron transport layer, and an electron injection layer may be used. For example, the common layer 174 may be a carrier injection layer (a hole injection layer or an electron injection layer). The common layer 174 may also be referred to as a part of the EL layer 172. Further, the common layer 174 may be provided as needed. When the common layer 174 is provided, a layer having the same function as the common layer 174 may not be provided as a layer included in the EL layer 172.

The conductor 173 is provided with a protective layer 273, and the protective layer 273 is provided with an insulator 276.

Fig. 31B shows an example different from the above-described configuration. Specifically, the structure shown in fig. 31B includes three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the structure shown in fig. 31A. Further, an insulator 276 is included over the three light-emitting elements 61W, and a colored layer 264R, a colored layer 264G, and a colored layer 264B are included over the insulator 276. Specifically, the red light transmitting colored layer 264R is provided at a position overlapping the left light emitting element 61W, the green light transmitting colored layer 264G is provided at a position overlapping the center light emitting element 61W, and the blue light transmitting colored layer 264B is provided at a position overlapping the right light emitting element 61W. Thereby, the semiconductor device can display a color image. The structure shown in fig. 31B is also a modified example of the structure shown in fig. 30C.

As shown in fig. 31C, the light emitting element 61R, the light emitting element 61G, and the light receiving element 71 may be provided over the insulator 363. The light-receiving element 71 shown in fig. 31C can be realized by using an active layer 182 (also referred to as a "light-receiving layer") serving as a photoelectric conversion layer in place of the EL layer 172 in the light-emitting element 61. The active layer 182 has a function of changing the resistance value according to the wavelength and intensity of incident light. Like the EL layer 172, the active layer 182 can be formed using an organic compound. Further, an inorganic material such as silicon may be used for the active layer 182.

The light receiving element 71 has a function of detecting light Lin incident from the outside of the display device through the protective layer 273, the conductor 173, and the common layer 174. Further, a coloring layer that transmits light in an arbitrary wavelength region may be provided on the incident light Lin side so as to overlap the light receiving element 71.

< Material usable for light-emitting element and light-receiving element >

Materials usable for the light emitting element and the light receiving element are described.

The hole injection layer is a layer containing a material having high hole injection property, which injects holes from the anode to the hole transport layer. Examples of the material having high hole injection property include an aromatic amine compound, a composite material containing a hole-transporting material and an acceptor material (electron acceptor material), and the like.

The hole transport layer is a layer that transports holes injected from the anode through the hole injection layer to the light emitting layer. The hole transport layer is a layer containing a hole transporting material. As the hole transporting material, a material having a hole mobility of 1X 10 ^-6cm²/Vs or more is preferably used. Note that as long as the hole transport property is higher than the electron transport property, substances other than the above may be used. As the hole-transporting material, a material having high hole-transporting properties such as a pi-electron rich type aromatic hetero compound (for example, carbazole derivative, thiophene derivative, furan derivative, or the like) or an aromatic amine (a compound containing an aromatic amine skeleton) is preferably used.

The electron transport layer is a layer that transports electrons injected from the cathode through the electron injection layer to the light emitting layer. The electron transport layer is a layer containing an electron transport material. As the electron-transporting material, a material having an electron mobility of 1X 10 ^-6cm²/Vs or more is preferably used. Note that as long as the electron transport property is higher than the hole transport property, substances other than the above may be used. Examples of the electron-transporting material include materials having high electron-transporting properties such as a metal complex having a quinoline skeleton, a metal complex having a benzoquinoline skeleton, a metal complex having an oxazole skeleton, a metal complex having a thiazole skeleton, an oxadiazole derivative, a triazole derivative, an imidazole derivative, an oxazole derivative, a thiazole derivative, a phenanthroline derivative, a quinoline derivative having a quinoline ligand, a benzoquinoline derivative, a quinoxaline derivative, a dibenzoquinoxaline derivative, a pyridine derivative, a bipyridine derivative, a pyrimidine derivative, and a pi-electron-deficient aromatic compound such as a nitrogen-containing aromatic compound.

The electron injection layer is a layer containing a material having high electron injection property, which injects electrons from the cathode to the electron transport layer. As the material having high electron injection properties, alkali metal, alkaline earth metal, or a compound thereof can be used. As the material having high electron injection properties, a composite material containing an electron-transporting material and a donor material (electron-donor material) may be used.

Examples of the electron injection layer include alkali metals, alkaline earth metals, and their compounds such as lithium, cesium, ytterbium, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF _x, x is an arbitrary number), lithium 8- (hydroxyquinoline) (abbreviated as Liq), lithium 2- (2-pyridyl) phenol (abbreviated as LiPP), lithium 2- (2-pyridyl) -3-hydroxypyridine (pyridinolato) (abbreviated as LiPPy), lithium 4-phenyl-2- (2-pyridyl) phenol (abbreviated as LiPPP), lithium oxide (LiO _x), cesium carbonate, and the like. The electron injection layer may have a stacked structure of two or more layers. As this stacked structure, for example, a structure using lithium fluoride as the first layer and ytterbium as the second layer can be used.

Alternatively, an electron-transporting material may be used as the electron injection layer. For example, a compound having an electron-deficient aromatic heterocycle and having an unshared electron pair can be used for the electron-transporting material. Specifically, a compound having at least one of a pyridine ring, a diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), and a triazine ring can be used.

In addition, the lowest unoccupied molecular orbital (LUMO: lowestUnoccupiedMolecular Orbital) of the organic compound having an unshared electron pair is preferably-3.6 eV or more and-2.3 eV or less. In general, the highest occupied molecular orbital (HOMO: highestOccupiedMolecularOrbital) energy level and LUMO energy level of an organic compound can be estimated using CV (cyclic voltammetry), photoelectron spectroscopy, light absorption spectroscopy, reverse-light electron spectroscopy, or the like.

For example, as an organic compound having an unshared electron pair, 4, 7-diphenyl-1, 10-phenanthroline (abbreviated as: BPhen), 2, 9-bis (naphthalen-2-yl) -4, 7-diphenyl-1, 10-phenanthroline (abbreviated as: NBPhen), 2- (1, 3-phenylene) bis [ 9-phenyl-1, 10-phenanthroline ] (abbreviated as: mPPhen P), and a bisquinoxalino [2,3-a:2',3' -c ] phenazine (abbreviation: HATNA) or 2,4, 6-tris [3' - (pyridin-3-yl) biphenyl-3-yl ] -1,3, 5-triazine (abbreviation: tmPPPyTz), and the like. In addition, NBPhen has a high glass transition temperature (Tg) as compared with BPhen, and thus has high heat resistance.

The light receiving element includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes. In this specification or the like, one of a pair of electrodes is sometimes referred to as a pixel electrode and the other is sometimes referred to as a common electrode.

Of the pair of electrodes included in the light receiving element, one electrode is used as an anode and the other electrode is used as a cathode. The following description will be given by taking a case where a pixel electrode is used as an anode and a common electrode is used as a cathode as an example. By applying a reverse bias between the pixel electrode and the common electrode to drive the light receiving element, light incident to the light receiving element can be detected to generate electric charge, and thus can be extracted as current. Or the pixel electrode may be used as a cathode and the common electrode may be used as an anode.

The active layer included in the light receiving element includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors containing organic compounds. In this embodiment mode, an example of a semiconductor included in an active layer using an organic semiconductor is described. The use of an organic semiconductor is preferable because the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition method) and the manufacturing apparatus can be used in common.

Examples of the material of the n-type semiconductor included in the active layer include organic semiconductor materials having electron acceptances such as fullerenes (e.g., C ₆₀、C₇₀) and fullerene derivatives. Fullerenes have a football shape that is energetically stable. The HOMO level and LUMO level of fullerenes are deep (low). Since fullerenes have a deep LUMO level, electron acceptors (acceptors) are extremely high. Generally, when pi electron conjugation (resonance) expands on a plane like benzene, electron donor properties (donor type) become high. On the other hand, fullerenes have a spherical shape, and although pi-electron conjugation expands, electron acceptors become high. When the electron acceptors are high, charge separation is caused at high speed and high efficiency, and therefore, the composition is advantageous for a light-receiving element. C ₆₀、C₇₀ has a broad absorption band in the visible region, and in particular, C ₇₀ has a larger pi-electron conjugated system than C ₆₀ and also has a broader absorption band in the long wavelength region, so that it is preferable. In addition, examples of fullerene derivatives include methyl [6,6] -phenyl-C ₇₁ -butyrate (abbreviated as PC70 BM), methyl [6,6] -phenyl-C ₆₁ -butyrate (abbreviated as PC60 BM), and 1',1",4',4" -tetrahydro-bis [1,4] methanonaphtho (methanonaphthaleno) [1,2:2',3',56, 60:2",3" ] [5,6] fullerene-C ₆₀ (abbreviated as ICBA) and the like.

Examples of the material of the N-type semiconductor include perylene tetracarboxylic acid derivatives such as N, N' -dimethyl-3, 4,9, 10-perylene tetracarboxylic acid diimide (abbreviated as Me-PTCDI).

Examples of the material of the n-type semiconductor include 2,2'- (5, 5' - (thieno [3,2-b ] thiophene-2, 5-diyl) bis (thiophene-5, 2-diyl)) bis (methane-1-yl-1-subunit) dipropylene dinitrile (abbreviated as FT2 TDMN).

Examples of the material of the n-type semiconductor include a metal complex having a quinoline skeleton, a metal complex having a benzoquinoline skeleton, a metal complex having an oxazole skeleton, a metal complex having a thiazole skeleton, an oxadiazole derivative, a triazole derivative, an imidazole derivative, an oxazole derivative, a thiazole derivative, a phenanthroline derivative, a quinoline derivative, a benzoquinoline derivative, a quinoxaline derivative, a dibenzoquinoxaline derivative, a pyridine derivative, a bipyridine derivative, a pyrimidine derivative, a naphthalene derivative, an anthracene derivative, a coumarin derivative, a rhodamine derivative, a triazine derivative, a quinone derivative, and the like.

Examples of the material of the p-type semiconductor contained in the active layer include organic semiconductor materials having electron donor properties such as Copper (II) phthalocyanine (coppers (II) phthalocyanine: cuPc), tetraphenyl dibenzo-bisindenopyrene (Tetraphenyldibenzoperiflanthene: DBP), zinc phthalocyanine (ZincPhthalocyanine: znPc), tin phthalocyanine (SnPc), quinacridone, rubrene, and the like.

Examples of the p-type semiconductor material include carbazole derivatives, thiophene derivatives, furan derivatives, and compounds having an aromatic amine skeleton. Examples of the material of the p-type semiconductor include naphthalene derivatives, anthracene derivatives, pyrene derivatives, triphenylene derivatives, fluorene derivatives, pyrrole derivatives, benzofuran derivatives, benzothiophene derivatives, indole derivatives, dibenzofuran derivatives, dibenzothiophene derivatives, indolocarbazole derivatives, porphyrin derivatives, phthalocyanine derivatives, naphthalocyanine derivatives, quinacridone derivatives, rubrene derivatives, naphthacene derivatives, polyphenylene derivatives, polyparaphenylene derivatives, polyfluorene derivatives, polyvinylcarbazole derivatives, and polythiophene derivatives.

The HOMO level of the organic semiconductor material having electron donating property is preferably shallower (higher) than the HOMO level of the organic semiconductor material having electron accepting property. The LUMO level of the organic semiconductor material having electron donating property is preferably shallower (higher) than the LUMO level of the organic semiconductor material having electron accepting property.

As the organic semiconductor material having electron-accepting property, spherical fullerenes are preferably used, and as the organic semiconductor material having electron-donating property, organic semiconductor materials having shapes similar to a plane are preferably used. Molecules of similar shapes have a tendency to aggregate easily, and when the same molecule is aggregated, carrier transport properties can be improved due to the close energy levels of molecular orbitals.

For example, the active layer is preferably formed by co-evaporation of an n-type semiconductor and a p-type semiconductor. Further, an n-type semiconductor and a p-type semiconductor may be stacked to form an active layer.

The light-receiving element may include, as a layer other than the active layer, a layer containing a substance having high hole-transporting property, a substance having high electron-transporting property, a bipolar substance (a substance having high electron-transporting property and hole-transporting property), or the like. The material is not limited to the above-described material, and may include a layer containing a material having high hole injection property, a hole blocking material, a material having high electron injection property, an electron blocking material, or the like.

The light-receiving element may use a low-molecular compound or a high-molecular compound, and may further contain an inorganic compound. The layer constituting the light-receiving element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

For example, as a hole transporting material or an electron blocking material, a polymer compound such as poly (3, 4-ethylenedioxythiophene)/(polystyrene sulfonic acid) (abbreviated as PEDOT/PSS) or an inorganic compound such as molybdenum oxide or copper iodide (CuI) can be used. As the electron transporting material or the hole blocking material, an inorganic compound such as zinc oxide (ZnO) or an organic compound such as ethoxylated Polyethyleneimine (PEIE) may be used. The light receiving element may include, for example, a mixed film of PEIE and ZnO.

As active layer poly [ [4, 8-bis [5- (2-ethylhexyl) -2-thienyl ] benzo [1,2-b ] s used as donor can be used: 4,5-b' ] dithiophene-2, 6-diyl ] -2, 5-thiophenediyl [5, 7-bis (2-ethylhexyl) -4, 8-dioxo-4 h,8 h-benzo [1,2-c:4,5-c' ] dithiophene-1, 3-diyl ] ] polymer (PBDB-T) or PBDB-T derivative. For example, a method of dispersing a receptor material in PBDB-T or PBDB-T derivative or the like can be used.

In addition, three or more materials may be mixed in the active layer. For example, a third material may be mixed in addition to the material of the n-type semiconductor and the material of the p-type semiconductor for the purpose of amplifying the wavelength region. In this case, the third material may be a low molecular compound or a high molecular compound.

At least a part of the structural example shown in the present embodiment and the drawings corresponding to the structural example may be appropriately combined with other structural examples, drawings, and the like.

Embodiment 4

In this embodiment, a cross-sectional configuration example of the display device 10 (the display device 10A or the display device 10B) which is one embodiment of the present invention will be described.

Fig. 32 is a sectional view showing a structural example of the display device 10. The display device 10 includes a substrate 11 and a substrate 12, and the substrate 11 and the substrate 12 are bonded together with a sealant 712.

As the substrate 11, a substrate such as a glass substrate or a single crystal silicon substrate can be used.

The substrate 11 includes a semiconductor substrate 15, and the semiconductor substrate 15 is provided with a transistor 445 and a transistor 601. The transistor 445 and the transistor 601 may be the transistor 21 provided in the layer 20 shown in embodiment mode 1.

The transistor 445 is constituted of a conductor 448 serving as a gate electrode, an insulator 446 serving as a gate insulator, and a part of the substrate 11, and includes a semiconductor region 447 including a channel formation region, a low-resistance region 449a serving as one of a source region and a drain region, and a low-resistance region 449b serving as the other of the source region and the drain region. Transistor 445 may be p-channel type or n-channel type.

The transistor 445 and other transistors are electrically separated by the element separation layer 403. Fig. 32 shows a case where the transistor 445 and the transistor 601 are electrically separated by the element separation layer 403. The element separation layer 403 can be formed by a LOCOS (LOCal Oxidation ofSilicon: local oxidation of silicon) method, an STI (Shallow Trench Isolation: shallow trench isolation) method, or the like.

Here, in the transistor 445 shown in fig. 32, the semiconductor region 447 has a convex shape. The side surfaces and the top surface of the semiconductor region 447 are covered with a conductor 448 through an insulator 446. Note that fig. 32 does not show a case where the conductor 448 covers the side face of the semiconductor region 447. In addition, a material for adjusting a work function can be used for the conductor 448.

Like the transistor 445, a transistor whose semiconductor region has a convex shape can be referred to as a fin transistor because of the use of a convex portion of a semiconductor substrate. Further, an insulator may be provided so as to be in contact with the top surface of the convex portion, and may be used as a mask for forming the convex portion. Although fig. 32 shows a case where a portion of the substrate 11 is processed to form a convex portion, an SOI substrate may be processed to form a semiconductor having a convex portion.

Further, the structure of the transistor 445 shown in fig. 32 is only one example and is not limited to this, and an appropriate transistor may be used according to a circuit structure, a circuit operation method, or the like. For example, the transistor 445 may be a planar transistor.

The transistor 601 can have the same structure as the transistor 445.

An element separation layer 403, a transistor 445, and a transistor 601 are provided over the substrate 11, and an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided. Insulator 405, insulator 407, insulator 409, and insulator 411 are each embedded with an electrical conductor 451. Here, the height of the top surface of the conductive body 451 may be substantially the same as the height of the top surface of the insulator 411.

The insulator 421 and the insulator 214 are provided on the conductors 451 and 411. Insulator 421 and insulator 214 have conductor 453 embedded therein. Here, the height of the top surface of the conductor 453 may be made substantially the same as the height of the top surface of the insulator 214.

The insulator 216 is provided on the conductor 453 and the insulator 214. The insulator 216 has a conductive body 455 embedded therein. Here, the top surface of the conductive body 455 may be made substantially the same height as the top surface of the insulator 216.

Insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281 are provided on conductor 455 and insulator 216. Insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281 have conductor 305 embedded therein. Here, the height of the top surface of the conductor 305 may be made substantially the same as the height of the top surface of the insulator 281.

Insulator 361 is provided on conductor 305 and insulator 281. Conductor 317 and conductor 337 are embedded in insulator 361. Here, the top surface of the conductor 337 may be substantially the same height as the top surface of the insulator 361.

The insulator 363 is provided on the conductor 337 and the insulator 361. The insulator 363 is embedded with a conductor 347, a conductor 353, a conductor 355, and a conductor 357. Here, the heights of the top surfaces of the conductors 353, 355, and 357 may be substantially the same as the height of the top surface of the insulator 363.

Wiring 760, a part of which is used as a connection electrode, is provided on the conductor 353, the conductor 355, the conductor 357, and the insulator 363. Further, an anisotropic conductor 780 is provided so as to be electrically connected to the wiring 760, and an FPC (FlexiblePrintedCircuit: flexible circuit board) 716 is provided so as to be electrically connected to the anisotropic conductor 780. By using the FPC716, various signals and the like can be supplied to the display device 10 from the outside of the display device 10.

As shown in fig. 32, a low-resistance region 449b serving as the other of the source region and the drain region of the transistor 445 is electrically connected to the FPC716 through the conductor 451, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the wiring 760, and the anisotropic conductor 780. In fig. 32, three conductors including a conductor 353, a conductor 355, and a conductor 357 are shown as conductors having a function of electrically connecting a wiring 760 and a conductor 347, and one embodiment of the present invention is not limited thereto. The number of conductors having a function of electrically connecting the wiring 760 and the conductors 347 may be one, two, or four or more. By providing a plurality of conductors having a function of electrically connecting the wiring 760 and the conductors 347, contact resistance can be reduced.

A transistor 750 is provided over the insulator 214. The transistor 750 may be the transistor 52 provided in the layer 50 shown in embodiment mode 1. For example, a transistor provided in the pixel circuit 51 may be used. The transistor 750 can use an OS transistor as appropriate. The OS transistor has a feature that an off-state current is extremely low. Thus, image data and the like can be held for a long time, and the refresh frequency can be reduced. For example, the frame rate or refresh rate at the time of displaying a still image may be set to 1Hz or less, preferably 0.1Hz or less. Thereby, power consumption of the display device 10 can be reduced.

Insulator 254, insulator 280, insulator 274, and insulator 281 have conductors 301a and 301b embedded therein. The conductor 301a is electrically connected to one of the source and the drain of the transistor 750, and the conductor 301b is electrically connected to the other of the source and the drain of the transistor 750. Here, the heights of the top surfaces of the conductors 301a and 301b may be substantially the same as the height of the top surface of the insulator 281.

The insulator 361 is embedded with the conductor 311, the conductor 313, the conductor 331, the capacitor 790, the conductor 333, and the conductor 335. The conductor 311 and the conductor 313 are electrically connected to the transistor 750 and function as wirings. The conductor 333 and the conductor 335 are electrically connected to the capacitor 790. Here, the heights of the top surfaces of the conductors 331, 333, and 335 may be substantially the same as the height of the top surface of the insulator 361.

The insulator 363 is embedded with the conductor 341, the conductor 343, and the conductor 351. Here, the height of the top surface of the conductor 351 may be substantially the same as the height of the top surface of the insulator 363.

The insulator 405, the insulator 407, the insulator 409, the insulator 411, the insulator 421, the insulator 214, the insulator 280, the insulator 274, the insulator 281, the insulator 361, and the insulator 363 serve as interlayer films, and may serve as planarizing films each covering the concave-convex shapes thereunder. For example, in order to improve the flatness of the top surface of the insulator 363, the plane thereof may be planarized by a planarization process using a chemical mechanical polishing (CMP: chemicalMechanicalPolishing) method or the like.

As shown in fig. 32, the capacitor 790 includes a lower electrode 321, an upper electrode 325. Further, an insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitor 790 has a stacked structure in which an insulator 323 serving as a dielectric is sandwiched between a pair of electrodes. Although fig. 32 shows an example in which the capacitor 790 is provided on the insulator 281, the capacitor 790 may be provided on a different insulator from the insulator 281.

Fig. 32 shows an example in which the conductor 301a, the conductor 301b, and the conductor 305 are formed in the same layer. Further, an example in which the conductor 311, the conductor 313, the conductor 317, and the lower electrode 321 are formed in the same layer is also shown. Further, an example in which the conductor 331, the conductor 333, the conductor 335, and the conductor 337 are formed in the same layer is also shown. Further, an example in which the conductor 341, the conductor 343, and the conductor 347 are formed in the same layer is also shown. Further, an example in which the conductor 351, the conductor 353, the conductor 355, and the conductor 357 are formed in the same layer is also shown. By forming a plurality of conductors in the same layer, the manufacturing process of the display device 10 can be simplified, and thus the manufacturing cost of the display device 10 can be reduced. In addition, they may be formed in different layers and contain different kinds of materials, respectively.

The display device 10 shown in fig. 32 includes a light emitting element 61. The light-emitting element 61 includes a conductor 772, an EL layer 786, and a conductor 788. The EL layer 786 contains an organic compound or an inorganic compound such as quantum dots.

Examples of the material usable for the organic compound include a fluorescent material and a phosphorescent material. Examples of materials that can be used as the quantum dots include colloidal quantum dot materials, alloy type quantum dot materials, core Shell (Core Shell) quantum dot materials, and Core type quantum dot materials.

Further, the conductor 772 is electrically connected to the other of the source and the drain of the transistor 750 through the conductor 351, the conductor 341, the conductor 331, the conductor 313, and the conductor 301 b. The conductor 772 is formed on the insulator 363 and is used as a pixel electrode.

As the conductive body 772, a material having transparency to visible light or a material having reflectivity can be used. As the light-transmitting material, for example, an oxide material containing indium, zinc, tin, or the like can be used. As the reflective material, for example, a material containing aluminum, silver, or the like can be used.

Although not illustrated in fig. 32, the display device 10 may be provided with an optical member (optical substrate) such as a polarizing member, a phase difference member, an antireflection member, or the like.

A light shielding layer 738 is provided on one side of the substrate 12, and an insulator 734 in contact with the light shielding layer 738. The light shielding layer 738 has a function of shielding light emitted from the adjacent region. Or the light shielding layer 738 has a function of preventing external light from reaching the transistor 750 or the like.

The display device 10 shown in fig. 32 is provided with an insulator 730 on the insulator 363. Here, the insulator 730 may cover a portion of the electric conductor 772. Further, the light-emitting element 61 includes a light-transmitting conductor 788, and may be a light-emitting element of a top emission structure.

Further, the light shielding layer 738 is provided so as to have a region overlapping with the insulator 730. Further, the light shielding layer 738 is covered with an insulator 734. Further, the sealing layer 732 fills the space between the light emitting element 61 and the insulator 734.

A structural body 778 is provided between the insulator 730 and the EL layer 786. Further, a structural body 778 is provided between the insulator 730 and the insulator 734.

Fig. 33 shows a modified example of the display device 10 shown in fig. 32. The display device 10 shown in fig. 33 is different from the display device 10 shown in fig. 32 in that a coloring layer 736 is provided. Further, the coloring layer 736 has a region overlapping with the light emitting element 61. By providing the coloring layer 736, the color purity of the light extracted from the light emitting element 61 can be improved. Accordingly, the display device 10 can display a high-quality image. Further, since all the light emitting elements 61 in the display device 10 can be, for example, light emitting elements that emit white light, it is not necessary to form the EL layer 786 by coating separately, and a high-definition display device 10 can be realized.

The light emitting element 61 may have an optical microcavity resonator (microcavity) structure. Thus, light of a predetermined color (for example, RGB) can be extracted without providing a coloring layer, and the display device 10 can perform color display. By adopting a structure in which a coloring layer is not provided, absorption of light by the coloring layer can be suppressed. Thereby, the display device 10 can display a high-luminance image, and the power consumption of the display device 10 can be reduced. In addition, when the EL layer 786 is formed in an island shape in each pixel or the EL layer 786 is formed in a stripe shape in each pixel row, that is, the EL layer 786 is formed by separate coating, a structure in which a coloring layer is not provided may be employed. The luminance of the display device 10 may be, for example, 500cd/m ² or more, preferably 1000cd/m ² or more and 10000cd/m ² or less, more preferably 2000cd/m ² or more and 5000cd/m ² or less.

Embodiment 5

In this embodiment, a cross-sectional configuration example of the display device 10 different from that of embodiment 3 will be described.

Fig. 34A shows a cross-sectional structure example of the display device 10. The display device 10 shown in fig. 34A includes a substrate 16, a light-emitting element 61R, a light-emitting element 61G, a light-receiving element 71, a transistor 300, and a transistor 310.

The light emitting element 61R has a function of presenting red light (R). The light emitting element 61G has a function of exhibiting green light. Transistor 300 and transistor 310 are transistors having a channel formation region in substrate 16. As the substrate 16, a semiconductor substrate such as a single crystal silicon substrate can be used, for example. Transistor 300 and transistor 310 include a portion of substrate 16, conductor 371, low resistance region 372, insulator 373, and insulator 374. The conductor 371 is used as a gate electrode. An insulator 373 is located between the substrate 16 and the conductor 371, and is used as a gate insulator. The low resistance region 372 is a region doped with impurities in the substrate 16, and is used as a source or a drain. Insulator 374 covers the sides of conductor 371.

The transistor 300 corresponds to, for example, the transistor 52B shown in the above embodiment. The transistor 310 corresponds to the transistor 132 shown in the above embodiment, for example.

Further, between the adjacent two transistors 300, an element separation layer 403 is provided so as to be embedded in the substrate 16.

Further, an insulator 261 is provided so as to cover the transistor 310, and a capacitor 791 is provided over the insulator 261.

The capacitor 791 includes a conductor 792, a conductor 794, and an insulator 793 therebetween. The conductor 792 serves as one electrode of the capacitor 791, the conductor 794 serves as the other electrode of the capacitor 791, and the insulator 793 serves as a dielectric of the capacitor 791.

The conductor 792 is provided on the insulator 261 and embedded in the conductor 795. The conductor 792 is electrically connected to one of the source and the drain of the transistor 300 through a plug 257 embedded in the insulator 261. The insulator 793 is provided so as to cover the conductor 792. The conductors 792 and 794 have regions overlapping each other with the insulator 793 interposed therebetween.

An insulator 255a is provided so as to cover the capacitor 791, an insulator 255b is provided on the insulator 255a, and an insulator 255c is provided on the insulator 255 b. The insulator 255c is provided with a light emitting element 61R and a light emitting element 61G. An insulator is provided in a region between adjacent light emitting devices and a light receiving device. In fig. 34A and the like, a protective layer 271 and an insulator 278 on the protective layer 271 are provided in this region.

An insulator 270 is provided over each of the EL layers 172R and 172G included in the light-emitting elements 61R and 61G. The EL layer 172R, EL, the layer 172G, and the insulator 278 have a common layer 174, and the common layer 174 has a conductor 173. The conductor 173 is provided with a protective layer 273.

The conductor 171 is electrically connected to one of the source and the drain of the transistor 310 through a plug 256 embedded in the insulator 793, the insulator 255a, the insulator 255b, and the insulator 255c, a conductor 792 embedded in the conductor 795, and a plug 257 embedded in the insulator 261. The height of the top surface of insulator 255c is identical or substantially identical to the height of the top surface of plug 256. Various conductive materials may be used for the plug.

Further, the light emitting element 61R, the light emitting element 61G, and the light receiving element 71 are provided with an insulator 276. The electrical conductors 171 to the insulator 276 correspond to the layer 60. The insulator 276 has the substrate 12 disposed thereon. Insulator 276 is used as an adhesive layer. The stacked structure of the substrate 16 to the insulator 255c corresponds to the layers 50 of the display device 10A and the display device 10B.

In the structural example shown in fig. 34A, a light emitting element is formed in the layer 60, and a light receiving element is formed in the layer 50 or the layer 20.

The light receiving element 71 has a function of detecting light Lin incident from the outside of the display device through the insulator 276, the insulator 255a, the insulator 261, and the like.

Fig. 34B shows a cross-sectional structure example different from the cross-sectional structure example of the display device 10 shown in fig. 34A. Fig. 34B shows a modified example of fig. 34A. The display device 10 shown in fig. 34B is provided with a light-emitting element 61W instead of the light-emitting element 61R and the light-emitting element 61G, and includes a coloring layer in a region overlapping the light-emitting element 61W on the insulator 276. Fig. 34B shows a cross-sectional structure example of the display device 10 including the colored layer 264R overlapped with one light-emitting element 61W and the colored layer 264G overlapped with the other light-emitting element 61W.

The light emitting element 61W has a function of displaying white light. The colored layer 264R has a function of transmitting red light, and the colored layer 264G has a function of transmitting green light. White light (W) from the light-emitting element 61W is emitted as red light to the outside of the display device through the colored layer 264R. Further, white light (W) from the light-emitting element 61W is emitted as green light to the outside of the display device through the colored layer 264G. Note that although not shown in fig. 34B, a colored layer that transmits light in a wavelength region other than red light and green light, such as blue light, may be used.

Further, a coloring layer 264X may be provided on a region of the insulator 276 overlapping the light receiving element 71. As the colored layer 264X, a colored layer transmitting light in an arbitrary wavelength region may be provided. By providing the colored layer 264X, only light transmitted through the colored layer 264X can be detected by the light receiving element 71.

The display device 10 shown in fig. 34B includes the insulator 258 on the colored layer 264R, the colored layer 264G, and the colored layer 264X, and the substrate 12 on the insulator 258. The insulator 258 is used as an adhesive layer.

Fig. 35A shows a modified example of the display device 10 shown in fig. 34B. The display device 10 shown in fig. 35A has a structure in which the same EL layer 172W is commonly used between adjacent light-emitting elements 61W. The EL layer 172W remains on the region overlapping the light receiving element 71. As long as the EL layer 172W is thin to transmit the light Lin, the light Lin can be detected even if the EL layer 172W remains on the region overlapping the light receiving element 71.

Fig. 35B shows a modified example of the display device 10 shown in fig. 34A. As in the above embodiment, the light receiving element 71 can be realized by using the active layer 182 serving as a photoelectric conversion layer in place of the EL layer 172 of the light emitting element 61.

In the display device 10 shown in fig. 35B, the light emitting element 61 and the light receiving element 71 are provided in the layer 60. The light receiving element 71 provided in the layer 60 is electrically connected to one of the source and the drain of the transistor 310 through the plug 256 and the plug 257.

As shown in fig. 36A, the colored layers 264R and 264G may be provided so as to overlap the light-emitting element 61W, and the colored layer 264X may be provided so as to overlap the light-receiving element 71.

As shown in fig. 36B, the colored layers 264R and 264G may be provided so as to overlap the light-emitting element 61W, and the colored layers may not be provided on the light-receiving element 71.

Fig. 37 shows a modified example of the display device 10 shown in fig. 34A. The display device 10 shown in fig. 37 has a structure in which a transistor 300 and a transistor 302 are stacked. The channel of transistor 300 is formed in substrate 16. The channel of the transistor 302 is formed in the substrate 17. A semiconductor substrate is used for both the substrate 16 and the substrate 17.

The display device 10 shown in fig. 37 has the following structure: the substrate 16 provided with the transistor 300, the capacitor 791, and the light receiving element 71 is bonded to the substrate 17 provided with the transistor 302.

Here, an insulator 345 is preferably provided on the bottom surface of the substrate 16. Further, an insulator 346 is preferably provided over the insulator 262 provided over the substrate 17. The insulator 345 and the insulator 346 are insulators used as protective layers, and can suppress diffusion of impurities into the substrate 16 and the substrate 17.

Further, an insulator 796 and an insulator 797 may be provided between the insulator 261 and the conductor 792. Further, a conductor 798 may be provided on the insulator 261. Preferably, the conductor 798 is provided so as to be embedded in the insulator 797.

A plug 342 is disposed in the substrate 16 through the substrate 16 and an insulator 345. Here, an insulator 344 is preferably provided to cover the side surface of the plug 342. Insulator 344 is an insulator that is used as a protective layer and inhibits diffusion of impurities to substrate 16. In the case where substrate 16 is a silicon substrate, plugs 342 are also referred to as through silicon vias (TSV: through Silicon Via).

A conductor 348 is provided under the insulator 345 on the back surface (surface on the opposite side of the substrate 12) side of the substrate 16. The electrical conductor 348 is preferably disposed embedded in the insulator 332. Further, it is preferable to planarize the bottom surfaces of the conductor 348 and the insulator 332. Here, the conductor 348 is electrically connected to the conductor 798 through the plug 342.

On the other hand, the substrate 17 is provided with a conductor 349 on the insulator 346. The conductor 349 is preferably provided embedded in the insulator 336. Further, it is preferable to planarize the top surfaces of the conductor 349 and the insulator 336.

Substrate 17 is electrically connected to substrate 16 by bonding electrical conductor 348 to electrical conductor 349. Here, by improving the flatness of the surface formed by the conductor 349 and the insulator 332 and the surface formed by the conductor 348 and the insulator 336, the conductor 348 and the conductor 349 can be favorably bonded.

The same conductive material is preferably used for the conductors 348 and 349. For example, a metal film containing an element selected from Al, cr, cu, ta, ti, mo, W, a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above element as a component, or the like can be used. Copper is particularly preferably used for the conductors 348 and 349. Thus, a cu—cu (copper-copper) direct bonding technique (a technique of conducting electricity by connecting pads of Cu (copper) to each other) can be employed.

In the display device 10 shown in fig. 37, the stacked structure of the conductor 348 and the insulators 332 to 255c corresponds to the layers 50 of the display device 10A and the display device 10B. The stacked structure of the substrate 17 to the conductor 349 and the insulator 336 corresponds to the layers 20 of the display device 10A and the display device 10B.

As in the display device 10 shown in fig. 38, a bump 358 may be provided between the conductor 348 and the conductor 349 to electrically connect the conductor 348 and the conductor 349 with each other through the bump 358. The bump 358 may be formed using a conductive material including gold (Au), nickel (Ni), indium (In), tin (Sn), or the like, for example. For example, solder may be used as the bump 358. In addition, an adhesive layer 359 may be provided between the insulator 332 and the insulator 336. In addition, when the bump 358 is provided, the insulator 332 and the insulator 336 may not be provided.

Fig. 39 shows a modified example of the display device 10 shown in fig. 36A and 36B. In the display device 10 shown in fig. 39, a transistor 380 is provided over the substrate 16. Accordingly, the display device 10 shown in fig. 39 has a structure in which the transistor 380 and the transistor 302 are stacked. Transistor 380 is a transistor with a back gate. As the substrate 16, a semiconductor substrate may be used, or a substrate of another material may be used.

In fig. 39, the light receiving element 71 shown in fig. 35B is used as the light receiving element 71. Specifically, an organic semiconductor is used as an active layer used as a photoelectric conversion layer.

Transistor 380 includes a semiconductor 382, an insulator 384, a conductor 385, a pair of conductors 383, an insulator 326, and a conductor 381. As the semiconductor 382, for example, an oxide semiconductor can also be used.

In the display device 10 shown in fig. 39, an insulator 324 is provided over the substrate 16. Insulator 324 serves as a barrier layer that prevents diffusion of impurities such as water or hydrogen from the substrate 16 side to transistor 380 and prevents oxygen from escaping from semiconductor 382 to the insulator 324 side. As the insulator 324, for example, a film which is less likely to be diffused by hydrogen or oxygen than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, a silicon nitride film, or the like can be used.

The insulator 324 is provided with a conductor 381, and the insulator 326 is provided so as to cover the conductor 381. At least a portion of the insulator 326 which contacts the semiconductor 382 is preferably an oxide insulating film such as a silicon oxide film. The top surface of insulator 326 is preferably planarized.

A semiconductor 382 is disposed on insulator 326. A pair of conductors 383 are in contact with the semiconductor 382 and serve as source and drain electrodes.

An insulator 327 is provided so as to cover the top surface and the side surfaces of the pair of conductors 383, the side surfaces of the semiconductor 382, and the like, and an insulator 261 is provided on the insulator 327. The insulator 327 serves as a barrier layer that prevents diffusion of impurities such as water or hydrogen from the insulator 261 or the like to the semiconductor 382 and oxygen from being taken out of the semiconductor 382. As the insulator 327, an insulating film similar to that of the insulator 324 can be used.

The insulator 327 and the insulator 261 are provided with openings reaching the semiconductor 382. The opening has embedded therein an insulator 384 in contact with the side surfaces of the insulator 261, the insulator 327, and the conductor 383 and the top surface of the semiconductor 382, and a conductor 385 in contact with the insulator 384.

The conductor 385 is used as the first gate electrode of the transistor 380 and the insulator 384 is used as the first gate insulator. Conductor 381 is used as the second gate electrode of transistor 380 and a portion of insulator 326 is used as the second gate insulator.

When one of the first gate electrode and the second gate electrode is referred to as a "gate" or a "gate electrode", the other of the first gate electrode and the second gate electrode is sometimes referred to as a "back gate" or a "back gate electrode".

The top surface of the conductor 385, the top surface of the insulator 384, and the top surface of the insulator 261 are subjected to planarization treatment so that the heights thereof are uniform or substantially uniform, and the insulator 329 and the insulator 263 are provided so as to cover them.

The insulator 261 and the insulator 263 are used as interlayer insulators. Insulator 329 serves as a barrier layer that prevents diffusion of impurities such as water or hydrogen from the side of insulator 263 to transistor 380. The insulator 329 may be formed of an insulating film similar to the insulator 327 and the insulator 324.

A plug 799 electrically connected to one of the pair of conductors 383 is provided so as to be fitted into openings provided in the insulator 796, the insulator 797, the insulator 263, the insulator 329, the insulator 261, and the insulator 327.

Here, in the plug 799, it is preferable to use a conductive material in which hydrogen and oxygen are not easily diffused as a portion of a side surface of each opening in contact with the insulator 796, the insulator 797, the insulator 263, the insulator 329, the insulator 261, and the insulator 327 and a portion of a bottom of the opening in contact with the conductor 383.

In the display device 10 shown in fig. 39, the plug 342 is provided so as to pass through the insulator 263, the insulator 329, the insulator 261, the insulator 327, the insulator 326, the insulator 324, the substrate 16, and the insulator 345. Further, as described above, it is preferable to provide the insulator 344 covering the side surface of the plug 342.

In addition, as in the display device 10 shown in fig. 40, a bump 358 may be provided between the conductor 348 and the conductor 349 so that the conductor 348 and the conductor 349 are electrically connected to each other by the bump 358. In addition, an adhesive layer 359 may be provided between the insulator 332 and the insulator 336. The display device 10 shown in fig. 40 is a modified example of the display device 10 shown in fig. 39, and is also a modified example of the display device 10 shown in fig. 37.

As shown in fig. 35A, the colored layer 264X may be provided so as to overlap the light receiving element 71.

Embodiment 6

< Structural example of OS transistor >

In this embodiment mode, a configuration example of an OS transistor which can be used in a display device according to one embodiment of the present invention will be described. Fig. 41A, 41B, and 41C are a top view and a cross-sectional view of a transistor 750 and a periphery of the transistor 750, which can be used in a display device according to one embodiment of the present invention. The transistor 750 can also be used as the transistor 380 or the like.

Fig. 41A is a top view of the transistor 750. Fig. 41B and 41C are cross-sectional views of the transistor 750. Here, fig. 41B is a cross-sectional view along the chain line A1-A2 in fig. 41A, which corresponds to a cross-sectional view in the channel length direction of the transistor 750. Fig. 41C is a sectional view along the chain line A3-A4 in fig. 41A, which corresponds to a sectional view in the channel width direction of the transistor 750. Note that, for ease of understanding, part of the constituent elements are omitted in the top view of fig. 41A.

As shown in fig. 41A to 41C, the transistor 750 includes: a metal oxide 220a disposed on a substrate (not shown); a metal oxide 220b disposed on the metal oxide 220a; a conductor 242a and a conductor 242b disposed on the metal oxide 220b and separated from each other; insulator 280 disposed on conductors 242a and 242b and having openings formed between conductors 242a and 242b; a conductor 260 disposed in the opening; and an insulator 250 disposed between the metal oxide 220b, the conductor 242a, the conductor 242b, and the insulator 280 and the conductor 260. Here, as shown in fig. 41B and 41C, the top surface of the conductor 260 is preferably substantially aligned with the top surfaces of the insulator 250 and the insulator 280. Hereinafter, the metal oxide 220a and the metal oxide 220b may be collectively referred to as the metal oxide 220. The conductors 242a and 242b are sometimes collectively referred to as conductors 242.

In the transistor 750 illustrated in fig. 41A to 41C, the side surfaces of the conductors 242a and 242b on the side of the conductor 260 have a substantially vertical shape. The transistor 750 shown in fig. 41A to 41C is not limited to this, and the angle formed by the side surfaces and the bottom surface of the conductor 242a and the conductor 242b may be 10 ° or more and 80 ° or less, and preferably 30 ° or more and 60 ° or less. The opposite side surfaces of the conductor 242a and the conductor 242b may have a plurality of surfaces.

As shown in fig. 41A to 41C, an insulator 254 is preferably arranged between the insulator 222, the insulator 224, the metal oxide 220a, the metal oxide 220b, the conductor 242a, the conductor 242b, and the insulator 250 and the insulator 280. Here, as shown in fig. 41B and 41C, the insulator 254 preferably contacts the side surface of the insulator 250, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242B, the side surfaces of the metal oxide 220a, the metal oxide 220B, and the insulator 222, and the top surface of the insulator 222.

Note that in the transistor 750, a region where a channel is formed (hereinafter also referred to as a channel formation region) and three layers of the metal oxide 220a, the metal oxide 220b, and the metal oxide 220c are stacked in the vicinity thereof, but the present invention is not limited to this. For example, the metal oxide 220b and the metal oxide 220c may have a two-layer structure or a stacked structure of four or more layers. The metal oxide 220a, the metal oxide 220b, and the metal oxide 220c may each have a stacked structure of two or more layers.

Here, the conductor 260 is used as a gate electrode of a transistor, and the conductor 242a and the conductor 242b are each used as a source electrode or a drain electrode. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and to be sandwiched in the region between the conductor 242a and the conductor 242 b. Here, the arrangement of the conductors 260, 242a, and 242b is selected to be self-aligned with respect to the opening of the insulator 280. That is, in the transistor 750, the gate electrode may be self-aligned between the source electrode and the drain electrode. Thus, the conductor 260 can be formed without providing a margin for alignment, and thus the occupied area of the transistor 750 can be reduced. Thus, the display device can be made high definition. In addition, the bezel of the display device can be reduced.

As shown in fig. 41A to 41C, the conductor 260 preferably includes a conductor 260a disposed inside the insulator 250 and a conductor 260b disposed so as to be embedded inside the conductor 260 a. In addition, in the transistor 750, the conductor 260 has a two-layer structure, but the present invention is not limited thereto. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers.

The transistor 750 preferably includes an insulator 214 disposed over a substrate (not shown), an insulator 216 disposed over the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed over the insulator 216 and the conductor 205, and an insulator 224 disposed over the insulator 222. The metal oxide 220a is preferably disposed on the insulator 224.

Further, an insulator 274 and an insulator 281 which serve as interlayer films are preferably arranged over the transistor 750. Here, the insulator 274 is preferably in contact with the top surfaces of the conductor 260, the insulator 250, and the insulator 280.

Further, the insulator 222, the insulator 254, and the insulator 274 preferably have a function of suppressing diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, and the like). For example, insulator 222, insulator 254, and insulator 274 preferably have a lower hydrogen permeability than insulator 224, insulator 250, and insulator 280. Further, the insulator 222 and the insulator 254 preferably have a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like). For example, insulator 222 and insulator 254 preferably have a lower oxygen permeability than insulator 224, insulator 250, and insulator 280.

Preferably, the conductors 245 (the conductors 245a and 245 b) which are electrically connected to the transistor 750 and used as plugs are provided. Further, an insulator 241 (an insulator 241a and an insulator 241 b) is provided in contact with a side surface of the conductor 245 serving as a plug. That is, the insulator 241 is formed in contact with the inner walls of the openings of the insulator 254, the insulator 280, the insulator 274, and the insulator 281. Further, a first conductor of the conductor 245 may be provided in contact with a side surface of the insulator 241 and a second conductor of the conductor 245 may be provided inside thereof. Here, the height of the top surface of the conductor 245 may be substantially the same as the height of the top surface of the insulator 281. In addition, although the structure in which the first conductor of the conductor 245 and the second conductor of the conductor 245 are stacked in the transistor 750 is shown, the present invention is not limited to this. For example, the conductor 245 may have a single-layer structure or a stacked structure of three or more layers. When the structure has a laminated structure, ordinals may be given in the order of formation to distinguish them.

In addition, a metal oxide used as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used for the metal oxide 220 including a channel formation region (the metal oxide 220a and the metal oxide 220 b) in the transistor 750. For example, as the metal oxide to be the channel formation region of the metal oxide 220, a metal oxide having a band gap of 2eV or more, preferably 2.5eV or more is preferably used.

The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, indium (In) and zinc (Zn) are preferably contained. In addition, the element M is preferably contained. The element M may be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co). In particular, the element M is preferably aluminum (Al), gallium (Ga), yttrium (Y) or tin (Sn). Further, the element M more preferably contains one or both of gallium (Ga) and tin (Sn).

In addition, the thickness of the region of the metal oxide 220b that does not overlap the conductor 242 may be thinner than the thickness of the region thereof that overlaps the conductor 242. The thin region is formed by removing a part of the top surface of the metal oxide 220b when the conductors 242a and 242b are formed. When a conductive film to be the conductor 242 is deposited on the top surface of the metal oxide 220b, a low-resistance region is sometimes formed near the interface with the conductive film. In this manner, by removing a low-resistance region between the conductor 242a and the conductor 242b on the top surface of the metal oxide 220b, channel formation can be suppressed in this region.

In one embodiment of the present invention, a display device including a transistor having a small size and having high definition can be provided. Further, a display device including a transistor with a large on-state current and having high luminance can be provided. Further, a display device including a transistor which operates at a high speed and which operates at a high speed can be provided. Further, a display device including a transistor with stable electrical characteristics and having high reliability can be provided. Further, a display device including a transistor with a small off-state current and having low power consumption can be provided.

The following describes a detailed structure of the transistor 750 which can be used in the display device according to one embodiment of the present invention.

The conductor 205 is arranged to include a region overlapping with the metal oxide 220 and the conductor 260. Further, the electric conductor 205 is preferably provided in such a manner as to be embedded in the insulator 216.

The conductor 205 includes a conductor 205a and a conductor 205b. The conductor 205a contacts the bottom surface and the side wall of the opening provided in the insulator 216. The conductor 205b is provided so as to be fitted into a recess formed in the conductor 205 a. Here, the height of the top surface of the conductor 205b is substantially equal to the height of the top surface of the conductor 205a and the height of the top surface of the insulator 216.

The conductive material having the function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N ₂O、NO、NO₂ or the like), copper atoms, and the like is preferably used as the conductive material 205 a. Further, a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) is preferably used.

By using a conductive material having a function of suppressing diffusion of hydrogen as the conductor 205a, diffusion of impurities such as hydrogen contained in the conductor 205b to the metal oxide 220 through the insulator 224 or the like can be suppressed. Further, by using a conductive material having a function of suppressing diffusion of oxygen as the conductive body 205a, the conductive body 205b can be suppressed from being oxidized and the conductivity can be reduced. As the conductive material having a function of suppressing oxygen diffusion, for example, titanium nitride, tantalum nitride, ruthenium oxide, or the like can be used. Thus, the conductive body 205a may be a single layer or a stacked layer of the above-described conductive material. For example, titanium nitride may be used as the conductor 205 a.

Further, the conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, tungsten may be used for the conductor 205 b.

Here, the conductor 260 is sometimes used as a first gate (also referred to as a top gate) electrode. In addition, the conductor 205 is sometimes used as a second gate (also referred to as a bottom gate) electrode. In this case, V _th of the transistor 750 can be controlled by independently changing the potential supplied to the conductor 205 without interlocking with the potential supplied to the conductor 260. In particular, by applying a negative potential to the conductor 205, V _th of the transistor 750 can be increased and the off-state current reduced. Therefore, in the case where the negative potential is supplied to the conductor 205, the drain current at the potential of 0V supplied to the conductor 260 can be reduced as compared with the case where the negative potential is not supplied to the conductor 205.

The conductor 205 is preferably larger than the channel formation region in the metal oxide 220. In particular, as shown in fig. 41C, the conductor 205 preferably extends to a region outside of an end portion intersecting with the metal oxide 220 in the channel width direction. That is, it is preferable that the conductor 205 and the conductor 260 overlap each other with an insulator therebetween on the outer side of the side surface in the channel width direction of the metal oxide 220.

By having the above-described structure, the channel formation region of the metal oxide 220 can be electrically surrounded by the electric field of the conductor 260 serving as the first gate electrode and the electric field of the conductor 205 serving as the second gate electrode.

Further, as shown in fig. 41C, the conductor 205 is extended to serve as a wiring. However, the present invention is not limited to this, and an electric conductor used as a wiring may be provided under the electric conductor 205.

The insulator 214 is preferably used as a blocking insulating film for suppressing entry of impurities such as water or hydrogen into the transistor 750 from the substrate side. Accordingly, it is preferable to use an insulating material having a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N ₂O、NO、NO₂ or the like), copper atoms or the like (not easily allowing the impurities to permeate therethrough) as the insulator 214. Or an insulating material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) (not easily allowing the oxygen to permeate therethrough) is preferably used.

For example, aluminum oxide, silicon nitride, or the like is preferably used as the insulator 214. This can suppress diffusion of impurities such as water and hydrogen from the substrate side to the transistor 750 side with respect to the insulator 214. Further, diffusion of oxygen contained in the insulator 224 or the like to the substrate side more than the insulator 214 can be suppressed.

Further, the dielectric constants of the insulator 216, the insulator 280, and the insulator 281 used as the interlayer film are preferably lower than those of the insulator 214. By using a material having a low dielectric constant as an interlayer film, parasitic capacitance generated between wirings can be reduced. For example, as the insulator 216, the insulator 280, and the insulator 281, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, or the like is suitably used.

Insulator 222 and insulator 224 are used as gate insulators.

Here, in the insulator 224 in contact with the metal oxide 220, oxygen is preferably desorbed by heating. In this specification and the like, oxygen desorbed by heating is sometimes referred to as excess oxygen. For example, silicon oxide, silicon oxynitride, or the like may be appropriately used as the insulator 224. By providing an insulator containing oxygen in contact with the metal oxide 220, oxygen vacancies in the metal oxide 220 can be reduced, and thus the reliability of the transistor 750 can be improved.

Specifically, as the insulator 224, an oxide material that releases a part of oxygen by heating is preferably used. The oxide that releases oxygen by heating is an oxide film in which the release amount of oxygen converted to oxygen atoms in TDS (Thermal Desorption Spectroscopy: thermal desorption spectroscopy) analysis is 1.0x10 ¹⁸atoms/cm³ or more, preferably 1.0x10 ¹⁹atoms/cm³ or more, more preferably 2.0x10 ¹⁹atoms/cm³ or more, or 3.0x10 ²⁰atoms/cm³ or more. The surface temperature of the film in the TDS analysis is preferably in the range of 100 ℃ to 700 ℃, or 100 ℃ to 400 ℃.

As with the insulator 214 or the like, the insulator 222 is preferably used as a barrier insulating film for suppressing mixing of impurities such as water and hydrogen into the transistor 750 from the substrate side. For example, insulator 222 preferably has a lower hydrogen permeability than insulator 224. By surrounding the insulator 224, the metal oxide 220, the insulator 250, and the like with the insulator 222, the insulator 254, and the insulator 274, entry of impurities such as water or hydrogen into the transistor 750 from the outside can be suppressed.

The insulator 222 preferably has a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom and an oxygen molecule) (the oxygen is not easily permeated). For example, insulator 222 preferably has a lower oxygen permeability than insulator 224. By providing the insulator 222 with a function of suppressing diffusion of oxygen or impurities, diffusion of oxygen contained in the metal oxide 220 to the substrate side can be reduced, which is preferable. Further, the reaction of the conductor 205 with oxygen of the insulator 224 or the metal oxide 220 can be suppressed.

As the insulator 222, an insulator containing an oxide of one or both of aluminum and hafnium is preferably used as an insulating material. As the insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. When the insulator 222 is formed using such a material, the insulator 222 is used as a layer which suppresses release of oxygen from the metal oxide 220 or entry of impurities such as hydrogen into the metal oxide 220 from the peripheral portion of the transistor 750.

Alternatively, for example, alumina, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. Further, the insulator may be subjected to nitriding treatment. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the insulator. For example, the insulator 222 may have a structure in which three layers of silicon nitride, silicon oxide, and aluminum oxide are stacked in this order.

As the insulator 222, for example, an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃), or (Ba, sr) TiO ₃ (BST) may be used in a single layer or a stacked layer. When miniaturization and high integration of transistors are performed, problems such as leakage current may occur due to thinning of the gate insulator. By using a high-k material as an insulator to be used as a gate insulator, the gate potential of the transistor when operating can be reduced while maintaining physical thickness.

The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the laminated structure made of the same material, and may be a laminated structure made of a different material. For example, an insulator similar to the insulator 224 may be provided under the insulator 222.

The metal oxide 220 includes a metal oxide 220a and a metal oxide 220b on the metal oxide 220 a. When the metal oxide 220a is provided under the metal oxide 220b, diffusion of impurities from a structure formed under the metal oxide 220a to the metal oxide 220b can be suppressed.

The metal oxide 220 preferably has a stacked structure of oxides in which the atomic ratios of the metal atoms are different from each other. For example, in the case where the metal oxide 220 contains at least indium (In) and the element M, the atomic number ratio of the element M to the other element In the constituent elements of the metal oxide 220a is preferably larger than the atomic number ratio of the element M to the other element In the constituent elements of the metal oxide 220 b. Further, the atomic number ratio of the element M to In the metal oxide 220a is preferably larger than the atomic number ratio of the element M to In the metal oxide 220 b.

Preferably, the energy of the conduction band bottom of metal oxide 220a is made higher than the energy of the conduction band bottom of metal oxide 220 b. In other words, the electron affinity of the metal oxide 220a is preferably smaller than the electron affinity of the metal oxide 220 b.

Here, in the junction of the metal oxide 220a and the metal oxide 220b, the energy level of the conduction band bottom changes gently. In other words, the above-described case may be expressed as that the energy level of the conduction band bottom of the junction of the metal oxide 220a and the metal oxide 220b is continuously changed or continuously joined. For this reason, it is preferable to reduce the defect state density of the mixed layer formed at the interface of the metal oxide 220a and the metal oxide 220 b.

Specifically, by including a common element (main component) in addition to oxygen in the metal oxide 220a and the metal oxide 220b, a mixed layer having a low defect state density can be formed. For example, in the case where the metal oxide 220b is an in—ga—zn oxide, a ga—zn oxide, gallium oxide, or the like can be used as the metal oxide 220 a.

Specifically, as the metal oxide 220a, in: ga: zn=1: 3:4[ atomic number ratio ] or the vicinity thereof or 1:1:0.5[ atomic number ratio ] or a metal oxide in the vicinity thereof. In addition, as the metal oxide 220b, in: ga: zn=4: 2:3[ atomic number ratio ] or the vicinity thereof or 3:1:2[ atomic number ratio ] or a metal oxide in the vicinity thereof.

At this time, the main path of the carriers is the metal oxide 220b. By providing the metal oxide 220a with the above structure, the defect state density of the interface between the metal oxide 220a and the metal oxide 220b can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and thus the transistor 750 can obtain a high on-state current and high frequency characteristics.

A conductor 242 (a conductor 242a and a conductor 242 b) serving as a source electrode and a drain electrode is provided over the metal oxide 220 b. As the conductor 242, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above metal element as a component, an alloy in which the above metal element is combined, or the like is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like is preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are conductive materials which are not easily oxidized or materials which absorb oxygen and maintain conductivity are preferable.

By forming the above-described conductor 242 so as to be in contact with the metal oxide 220, the oxygen concentration in the vicinity of the conductor 242 in the metal oxide 220 sometimes decreases. In addition, a metal compound layer including a metal included in the conductor 242 and a component of the metal oxide 220 is sometimes formed near the conductor 242 in the metal oxide 220. In this case, the carrier density increases in a region near the conductor 242 of the metal oxide 220, and the resistance of the region decreases.

Here, a region between the conductor 242a and the conductor 242b is formed so as to overlap with the opening of the insulator 280. Accordingly, the conductor 260 can be arranged self-aligned between the conductor 242a and the conductor 242 b.

The insulator 250 is used as a gate insulator. Insulator 250 is preferably disposed in contact with the top surface of metal oxide 220 b. As the insulator 250, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids can be used. In particular, silicon oxide and silicon oxynitride are preferable because they have thermal stability.

Like the insulator 224, it is preferable to reduce the concentration of impurities such as water and hydrogen in the insulator 250. The thickness of the insulator 250 is preferably 1nm or more and 20nm or less.

Further, a metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably inhibits oxygen diffusion from insulator 250 to conductor 260. This can suppress oxidation of the conductor 260 due to oxygen in the insulator 250.

In addition, the metal oxide is sometimes used as part of a gate insulator. Therefore, in the case where silicon oxide, silicon oxynitride, or the like is used for the insulator 250, a metal oxide which is a high-k material having a high relative dielectric constant is preferably used as the metal oxide. By providing the gate insulator with a stacked structure of the insulator 250 and the metal oxide, a stacked structure having high thermal stability and a high relative dielectric constant can be formed. Accordingly, the gate potential applied when the transistor operates can be reduced while maintaining the physical thickness of the gate insulator. In addition, the equivalent oxide thickness (EOT: equivalentoxide thickness) of the insulator used as the gate insulator can be reduced.

Specifically, a metal oxide containing one or two or more kinds selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used. In particular, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used as an insulator containing an oxide of one or both of aluminum and hafnium.

Although the conductor 260 has a two-layer structure in fig. 41A to 41C, it may have a single-layer structure or a stacked structure of three or more layers.

The conductor 260a preferably has a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N ₂O、NO、NO₂ or the like), copper atoms, and the like. Further, a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) is preferably used.

Further, when the conductor 260a has a function of suppressing diffusion of oxygen, oxygen contained in the insulator 250 can be suppressed from oxidizing the conductor 260b, resulting in a decrease in conductivity. As the conductive material having a function of suppressing diffusion of oxygen, for example, tantalum nitride, ruthenium oxide, or the like is preferably used.

Further, as the conductor 260b, a conductive material containing tungsten, copper, or aluminum as a main component is preferably used. Further, since the conductor 260 is also used as a wiring, a conductor having high conductivity is preferably used. For example, a conductive material containing tungsten, copper, or aluminum as a main component may be used. The conductor 260b may have a stacked structure, for example, a stacked structure of titanium, titanium nitride, and the above-described conductive material.

Further, as shown in fig. 41A and 41C, in a region of the metal oxide 220b which does not overlap with the conductor 242, that is, a channel formation region of the metal oxide 220, a side surface of the metal oxide 220 is covered with the conductor 260. Thereby, the electric field of the conductor 260 used as the first gate electrode can be easily influenced to the side surface of the metal oxide 220. This can improve the on-state current and frequency characteristics of the transistor 750.

The insulator 254 is preferably used as a block insulating film for preventing impurities such as water and hydrogen from being mixed into the transistor 750 from the side of the insulator 280, similarly to the insulator 214 and the like. For example, insulator 254 preferably has a lower hydrogen permeability than insulator 224. As shown in fig. 41B and 41C, the insulator 254 preferably contacts the side surface of the insulator 250, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242B, the metal oxide 220a, and the top surface of the insulator 224. By adopting such a structure, hydrogen contained in the insulator 280 can be suppressed from entering the metal oxide 220 from the top surface or the side surface of the conductor 242a, the conductor 242b, the metal oxide 220a, the metal oxide 220b, and the insulator 224.

The insulator 254 also has a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom and an oxygen molecule) (the oxygen is not easily permeated). For example, insulator 254 preferably has a lower oxygen permeability than insulator 280 or insulator 224.

The insulator 254 is preferably deposited by sputtering. Oxygen may be added near the region where insulator 224 contacts insulator 254 by depositing insulator 254 using a sputtering method under an atmosphere containing oxygen. Thus, oxygen can be supplied from this region into the metal oxide 220 through the insulator 224. Here, by providing the insulator 254 with a function of suppressing oxygen diffusion to the upper side, oxygen diffusion from the metal oxide 220 to the insulator 280 can be prevented. Further, by making the insulator 222 have a function of suppressing oxygen diffusion to the lower side, oxygen diffusion from the metal oxide 220 to the substrate side can be prevented. Thus, oxygen is supplied to the channel formation region in the metal oxide 220. Thus, oxygen vacancies of the metal oxide 220 can be reduced and normally-on activation of the transistor can be suppressed.

As the insulator 254, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be deposited. Note that as an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used.

Insulator 280 is preferably disposed over insulator 224, metal oxide 220 and conductor 242, with insulator 254 interposed therebetween. For example, the insulator 280 is preferably formed of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, or the like. In particular, silicon oxide and silicon oxynitride are preferable because they have thermal stability. In particular, a material such as silicon oxide, silicon oxynitride, or silicon oxide having voids is preferable because it is easy to form a region containing oxygen which is desorbed by heating.

Further, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. In addition, the top surface of insulator 280 may also be planarized.

The insulator 274 is preferably used as a barrier insulating film for suppressing the contamination of impurities such as water or hydrogen into the insulator 280 from above, similarly to the insulator 214. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, or the like can be used.

An insulator 281 serving as an interlayer film is preferably provided over the insulator 274. As with the insulator 224, the concentration of impurities such as water and hydrogen in the insulator 281 is preferably reduced.

The conductors 245a and 245b are disposed in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductors 245a and 245b are provided so as to sandwich the conductor 260. In addition, the top surfaces of the conductors 245a and 245b may be on the same plane as the top surface of the insulator 281.

Further, an insulator 241a is provided so as to be in contact with the inner walls of the openings of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and a first conductor of the conductor 245a is formed so as to be in contact with the side surfaces thereof. At least a portion of the bottom of the opening is located an electrical conductor 242a, and electrical conductor 245a is in contact with electrical conductor 242 a. Similarly, an insulator 241b is provided so as to contact the inner walls of the openings of the insulators 281, 274, 280, and 254, and a first conductor of the conductor 245b is formed so as to contact the side surfaces thereof. At least a portion of the bottom of the opening is located conductor 242b, and conductor 245b is in contact with conductor 242 b.

The conductor 245a and the conductor 245b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 245a and the conductor 245b may have a stacked structure.

When a stacked structure is used as the conductor 245, the conductor having the function of suppressing diffusion of impurities such as water or hydrogen is preferably used as the conductor in contact with the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281. For example, tantalum nitride, titanium nitride, ruthenium oxide, or the like is preferably used. The conductive material having a function of suppressing diffusion of impurities such as water or hydrogen can be used in a single layer or a stacked layer. By using this conductive material, oxygen added to the insulator 280 can be prevented from being absorbed by the conductors 245a and 245 b. Further, impurities such as water and hydrogen can be prevented from entering the metal oxide 220 from a layer above the insulator 281 through the conductors 245a and 245 b.

As the insulator 241a and the insulator 241b, for example, an insulator that can be used for the insulator 254 or the like may be used. Since the insulator 241a and the insulator 241b are provided in contact with the insulator 254, the metal oxide 220 can be prevented from being mixed with impurities such as water and hydrogen from the insulator 280 through the conductors 245a and 245 b. Further, the oxygen contained in the insulator 280 can be suppressed from being absorbed by the conductors 245a and 245 b.

Although not shown, conductors used as wirings may be arranged so as to be in contact with the top surface of the conductor 245a and the top surface of the conductor 245 b. The conductor used as the wiring preferably uses a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may have a stacked structure, for example, a stacked structure of titanium, titanium nitride, and the above-described conductive material. The conductor may be formed so as to be fitted into the opening of the insulator.

< Materials constituting transistors >

The following describes constituent materials that can be used for the transistor.

[ Substrate ]

As a substrate for forming the transistor, an insulator substrate, a semiconductor substrate, or a conductor substrate can be used, for example. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), and a resin substrate. Examples of the semiconductor substrate include a semiconductor substrate made of silicon, germanium, or the like, and a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, or the like. Further, a semiconductor substrate having an insulator region inside the semiconductor substrate may be mentioned, for example, an SOI (silicon on insulator) substrate or the like. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Or a substrate containing a metal nitride, a substrate containing a metal oxide, or the like can be given. Further, an insulator substrate provided with a conductor or a semiconductor, a semiconductor substrate provided with a conductor or an insulator, a conductor substrate provided with a semiconductor or an insulator, or the like can be also mentioned. Alternatively, a substrate having elements provided over these substrates may be used. Examples of the element provided over the substrate include a capacitor, a resistor, a switching element, a light-emitting element, and a memory element.

[ Insulator ]

Examples of the insulator include insulating oxides, nitrides, oxynitrides, metal oxides, metal oxynitrides, and metal oxynitrides.

For example, when miniaturization and high integration of transistors are performed, problems such as leakage current may occur due to thinning of the gate insulator. By using a high-k material as an insulator used as a gate insulator, a low voltage at the time of transistor operation can be achieved while maintaining physical thickness. On the other hand, by using a material having a low relative dielectric constant for an insulator used as an interlayer film, parasitic capacitance generated between wirings can be reduced. Therefore, the material is preferably selected according to the function of the insulator.

Examples of the insulator having a relatively high dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

Examples of the insulator having a low relative dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, and resin.

The transistor using the oxide semiconductor is surrounded by an insulator (the insulator 214, the insulator 222, the insulator 254, the insulator 274, or the like) having a function of suppressing permeation of impurities such as hydrogen and oxygen, whereby the electric characteristics of the transistor can be stabilized. As an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used in a single layer or a stacked layer. Specifically, as an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, a metal oxide such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, a metal nitride such as aluminum nitride, aluminum titanium nitride, silicon oxynitride, or silicon nitride can be used.

The insulator used as the gate insulator is preferably an insulator having a region containing oxygen which is desorbed by heating. For example, by adopting a structure in which silicon oxide or silicon oxynitride having a region containing oxygen which is desorbed by heating is in contact with the metal oxide 220, oxygen vacancies contained in the metal oxide 220 can be filled.

[ Electric conductor ]

As the conductor, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, and the like, an alloy containing the above metal element as a component, an alloy in which the above metal element is combined, or the like is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like is preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are conductive materials which are not easily oxidized or materials which absorb oxygen and maintain conductivity are preferable. Further, a semiconductor having high conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, and a silicide such as nickel silicide may be used.

In addition, a plurality of conductive layers formed of the above materials may be stacked. For example, a stacked-layer structure of a material containing the above metal element and a conductive material containing oxygen may be used. In addition, a stacked structure of a material containing the above metal element and a conductive material containing nitrogen may be used. In addition, a stacked-layer structure in which a material containing the above metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined may also be employed.

In addition, in the case where a metal oxide is used for a channel formation region of a transistor, a stacked-layer structure in which a material containing the above-described metal element and a conductive material containing oxygen are combined is preferably used as a conductive body to be used as a gate electrode. In this case, a conductive material containing oxygen is preferably provided on the channel formation region side. By disposing a conductive material containing oxygen on the channel formation region side, oxygen detached from the conductive material is easily supplied to the channel formation region.

In particular, as the conductor used as the gate electrode, a conductive material containing a metal element and oxygen contained in a metal oxide forming a channel is preferably used. In addition, a conductive material containing the above metal element and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Further, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide to which silicon is added may be used. In addition, indium gallium zinc oxide containing nitrogen may also be used. By using the above material, hydrogen contained in the channel-forming metal oxide may be trapped in some cases. Or hydrogen entering from an insulator or the like outside may sometimes be trapped.

< Transistor including oxide semiconductor >

Next, a case where the oxide semiconductor film is used for a transistor will be described.

The metal oxide for the OS transistor preferably contains at least indium or zinc, more preferably contains indium and zinc. For example, the metal oxide preferably contains indium, M (M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc. In particular, M is preferably one or more selected from gallium, aluminum, yttrium, and tin, more preferably gallium.

The metal oxide may be formed by a sputtering method, a Chemical Vapor Deposition (CVD) method such as a metal organic chemical vapor deposition (MOCVD: metal Organic ChemicalVaporDeposition) method, an atomic layer deposition (ALD: atomic Layer Deposition) method, or the like.

Hereinafter, an oxide containing indium (In), gallium (Ga), and zinc (Zn) is described as an example of a metal oxide. Note that oxides containing indium (In), gallium (Ga), and zinc (Zn) are sometimes referred to as In-Ga-Zn oxides.

By using the oxide semiconductor described above for a transistor, a transistor with high field effect mobility can be realized. Further, a transistor with high reliability can be realized.

An oxide semiconductor having a low carrier concentration is preferably used for the transistor. For example, the carrier concentration in the oxide semiconductor may be 1×10 ¹⁷cm^-3 or less, preferably 1×10 ¹⁵cm^-3 or less, more preferably 1×10 ¹³cm^-3 or less, further preferably 1×10 ¹¹cm^-3 or less, still further preferably less than 1×10 ¹⁰cm^-3, and 1×10 ^-9cm^-3 or more. In the case of aiming at reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film can be reduced to reduce the defect state density. In the present specification and the like, a state in which the impurity concentration is low and the defect state density is low is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". Further, an oxide semiconductor having a low carrier concentration is sometimes referred to as a "high-purity intrinsic" or a "substantially high-purity intrinsic" oxide semiconductor.

Since the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a low defect state density, it is possible to have a low trap state density.

Further, it takes a long time until the charge trapped by the trap level of the oxide semiconductor disappears, and the charge may act like a fixed charge. Therefore, the transistor in which a channel formation region is formed in an oxide semiconductor having a high trap state density may have unstable electrical characteristics.

Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like. Note that impurities in an oxide semiconductor refer to elements other than the main component constituting the oxide semiconductor, for example. For example, an element having a concentration of less than 0.1atomic% can be said to be an impurity.

< Impurity >

Here, the influence of each impurity in the oxide semiconductor will be described.

When the oxide semiconductor contains silicon or carbon which is one of group 14 elements, a defect state is formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor (concentration measured by secondary ion mass spectrometry (SIMS: secondaryIonMass Spectrometry)) is set to, for example, 2X 10 ¹⁸atoms/cm³ or less, and preferably 2X 10 ¹⁷atoms/cm³ or less.

When the oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is sometimes formed to form a carrier. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal easily has normally-on characteristics. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor measured by SIMS is 1×10 ¹⁸atoms/cm³ or less, preferably 2×10 ¹⁶atoms/cm³ or less.

When the oxide semiconductor contains nitrogen, electrons are easily generated as carriers, and the carrier concentration is increased, so that the oxide semiconductor is n-type. As a result, a transistor using an oxide semiconductor containing nitrogen for a semiconductor tends to have normally-on characteristics. Or trap levels are sometimes formed when the oxide semiconductor contains nitrogen. As a result, the electrical characteristics of the transistor may be unstable. Therefore, the nitrogen concentration in the oxide semiconductor measured by SIMS is set to be less than 5×10 ¹⁹atoms/cm³, preferably 5×10 ¹⁸atoms/cm³ or less, more preferably 1×10 ¹⁸atoms/cm³ or less, and still more preferably 5×10 ¹⁷atoms/cm³ or less.

Hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to generate water, and thus oxygen vacancies are sometimes formed. When hydrogen enters the oxygen vacancy, electrons are sometimes generated as carriers. In addition, some of the hydrogen may be bonded to oxygen bonded to a metal atom, thereby generating electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen easily has normally-on characteristics. Thus, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by SIMS is set to be less than 1×10 ²⁰atoms/cm³, preferably less than 1×10 ¹⁹atoms/cm³, more preferably less than 5×10 ¹⁸atoms/cm³, and still more preferably less than 1×10 ¹⁸atoms/cm³.

By using an oxide semiconductor whose impurity is sufficiently reduced for a channel formation region of a transistor, the transistor can have stable electrical characteristics.

Embodiment 7

In this embodiment, an electronic device that can include the display device described in the above embodiment will be described.

The electronic device illustrated below is an electronic device in which the display unit includes the display device described in the above embodiment, and thus can realize high definition. In addition, high definition and large screen electronic devices can be realized at the same time.

An image having a resolution of, for example, 4K2K, 8K4K, 16K8K or higher can be displayed on the display portion of the electronic device according to one embodiment of the present invention.

Examples of the electronic device include a large-sized electronic device having a relatively large screen such as a television set, a notebook-sized personal computer, a display device, a digital signage, a pachinko machine, and a game machine, and a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, and a sound reproducing device.

An electronic device according to an embodiment of the present invention can be assembled along a plane or a curved surface of an inner wall or an outer wall of a house, a building, or the like, an interior or an exterior of an automobile, or the like.

Fig. 42A is an external view of a camera 8000 mounted with a viewfinder 8100.

Camera 8000 includes a housing 8001, a display portion 8002, operation buttons 8003, shutter buttons 8004, and the like. Further, a detachable lens 8006 is attached to the camera 8000.

In the camera 8000, the lens 8006 and the housing may also be formed as one body.

The camera 8000 can perform imaging by pressing a shutter button 8004 or touching a display portion 8002 serving as a touch panel.

The housing 8001 includes an interposer having electrodes, and may be connected to a flash device or the like in addition to the viewfinder 8100.

The viewfinder 8100 includes a housing 8101, a display portion 8102, buttons 8103, and the like.

The housing 8101 is attached to the camera 8000 by an embedder that is embedded into the embedder of the camera 8000. The viewfinder 8100 can display an image or the like received from the camera 8000 on the display portion 8102.

The button 8103 is used as a power button or the like.

The display device according to one embodiment of the present invention can be used for the display portion 8002 of the camera 8000 and the display portion 8102 of the viewfinder 8100. A viewfinder may be incorporated in the camera 8000.

Fig. 42B is an external view of the head mounted display 8200.

The head mount display 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, a cable 8205, and the like. Further, a battery 8206 is incorporated in the mounting portion 8201.

Power is supplied from the battery 8206 to the main body 8203 via the cable 8205. The main body 8203 includes a wireless receiver or the like, and can display received image information or the like on the display unit 8204. Further, since the main body 8203 includes a camera, the actions of the eyeball and the eyelid of the user can be used as an input method.

Further, a plurality of electrodes may be provided to the mounting portion 8201 at positions contacted by the user to detect a current flowing through the electrodes in accordance with the movement of the eyeballs of the user, thereby realizing the function of recognizing the line of sight of the user. Further, the electrode may have a function of monitoring the pulse of the user based on the current flowing through the electrode. The mounting portion 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, or may have a function of displaying biological information of the user on the display portion 8204, a function of changing an image displayed on the display portion 8204 in synchronization with the operation of the head of the user, or the like.

The display device according to one embodiment of the present invention can be used for the display portion 8204.

Fig. 42C, 42D, and 42E are external views of the head mounted display 8300. The head mount display 8300 includes a housing 8301, a display portion 8302, a band-shaped fixing tool 8304, and a pair of lenses 8305.

The user can see the display on the display portion 8302 through the lens 8305. Preferably, the display portion 8302 is curved. Because the user can feel a high sense of realism. Further, the images displayed on different areas of the display unit 8302 are seen by the lenses 8305, respectively, whereby three-dimensional display or the like using parallax can be performed. In addition, one embodiment of the present invention is not limited to the configuration in which one display portion 8302 is provided, and two display portions 8302 may be provided so that two different display portions are respectively arranged for a pair of eyes of a user.

The display device according to one embodiment of the present invention can be used for the display portion 8302. Since the display device including the semiconductor device according to one embodiment of the present invention has extremely high resolution, even if the display device is enlarged by using the lens 8305 as shown in fig. 42E, a more realistic image can be displayed without making the user see the pixels.

The electronic apparatus shown in fig. 43A to 43G includes a housing 9000, a display portion 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (the sensor has a function of measuring a force, a displacement, a position, a speed, an acceleration, an angular velocity, a rotation speed, a distance, light, liquid, magnetism, temperature, a chemical substance, sound, time, hardness, an electric field, electric current, voltage, electric power, radiation, flow, humidity, inclination, vibration, smell, or infrared rays), a microphone 9008, or the like.

The electronic devices shown in fig. 43A to 43G have various functions. For example, it may have the following functions: a function of displaying various information (still image, moving image, character image, etc.) on the display section; a function of the touch panel; a function of displaying a calendar, date, time, or the like; functions of controlling processing by using various software (programs); a function of performing wireless communication; a function of reading out a program or data stored in the storage medium to process; etc. Note that the functions of the electronic apparatus are not limited to the above functions, but may have various functions. The electronic device may include a plurality of display portions. In addition, the electronic device may be provided with a camera or the like so as to have the following functions: a function of capturing a still image or a moving image to store the captured image in a storage medium (an external storage medium or a storage medium built in a camera); a function of displaying the photographed image on a display section; etc.

Next, the electronic devices shown in fig. 43A to 43G are described in detail.

Fig. 43A is a perspective view showing the television device 9100. The large display portion 9001, which is 50 inches or more or 100 inches or more, for example, can be incorporated into the television set 9100.

Fig. 43B is a perspective view showing the portable information terminal 9101. The portable information terminal 9101 can be used as a smart phone, for example. The portable information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. Further, the portable information terminal 9101 may display text or image information on a plurality of sides thereof. Fig. 43B shows an example in which three icons 9050 are displayed. Further, information 9051 indicated by a dotted rectangle may be displayed on the other surface of the display portion 9001. As an example of the information 9051, information indicating the receipt of an email, SNS, a telephone, or the like can be given; a title of an email, SNS, or the like; a sender name; a date; time; a battery balance; and antenna received signal strength, etc. Or an icon 9050 or the like may be displayed at a position where the information 9051 is displayed.

Fig. 43C is a perspective view showing the portable information terminal 9102. The portable information terminal 9102 has a function of displaying information on three or more surfaces of the display portion 9001. Here, examples are shown in which the information 9052, the information 9053, and the information 9054 are displayed on different surfaces. For example, the user may confirm the information 9053 displayed at a position that can be seen from above the portable information terminal 9102 in a state where the portable information terminal 9102 is placed in a coat pocket. The user can confirm the display without taking out the portable information terminal 9102 from the pocket, whereby it is possible to determine whether to answer a call, for example.

Fig. 43D is a perspective view showing the wristwatch-type portable information terminal 9200. The display surface of the display portion 9001 is curved, and can display on the curved display surface. For example, the portable information terminal 9200 can perform handsfree call by communicating with a headset which can perform wireless communication. The portable information terminal 9200 includes a connection terminal 9006, and can exchange data with other information terminals or can be charged. In addition, the charging operation can also be performed by using wireless power supply.

Fig. 43E, 43F, and 43G are perspective views showing the portable information terminal 9201 that can be folded. Fig. 43E is a perspective view of the portable information terminal 9201 in an expanded state, fig. 43G is a perspective view of the portable information terminal 9201 in a folded state, and fig. 43F is a perspective view of the portable information terminal 9201 in a state in the middle of changing from one state to the other state in fig. 43E and 43G. The portable information terminal 9201 has good portability in a folded state and excellent display versatility in an unfolded state because it has a large display area that is seamlessly spliced. The display portion 9001 included in the portable information terminal 9201 is supported by three housings 9000 to which the hinge 9055 is connected. For example, the display portion 9001 may be curved with a radius of curvature of 1mm or more and 150mm or less.

Fig. 44A shows an example of a television apparatus. The display portion 7500 of the television device 7100 is assembled in the housing 7101. Here, a structure in which the housing 7101 is supported by a bracket 7103 is shown.

The television device 7100 shown in fig. 44A can be operated by an operation switch provided in the housing 7101 or a remote control operation device 7111 provided separately. Further, the touch panel may be applied to the display portion 7500, and the operation of the television device 7100 may be performed by touching the display portion 7500 with a finger or the like. The remote controller 7111 may include a display unit in addition to the operation buttons.

The television device 7100 may be provided with a receiver of television broadcast or a communication device for connecting to a communication network.

Fig. 44B shows a notebook personal computer 7200. The notebook personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. The display portion 7500 is incorporated in the housing 7211.

Fig. 44C shows an example of a digital signage (DIGITAL SIGNAGE).

The digital signage 7300 shown in fig. 44C includes a housing 7301, a display portion 7500, a speaker 7303, and the like. Further, an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like may be included.

The larger the display portion 7500 is, the larger the amount of information that can be provided at a time is, and the attention is easily drawn, whereby, for example, the advertising effect can be improved.

The touch panel is preferably used for the display portion 7500 so that a user can operate the touch panel. Thus, the advertisement system can be used not only for advertisement, but also for providing route information, traffic information, guidance of commercial facilities, and other information required by users.

As shown in fig. 44C, the digital signage 7300 can be preferably interlocked with an information terminal apparatus 7311 such as a smart phone carried by a user by wireless communication. For example, information of an advertisement displayed on the display portion 7500 may be displayed on the screen of the information terminal device 7311, and by operating the information terminal device 7311, the display of the display portion 7500 may be switched.

Further, a game can be executed on the digital signage 7300 with the information terminal apparatus 7311 as an operation unit (controller). Thus, a plurality of unspecified users can participate in the game at the same time, and enjoy the game.

Fig. 44D shows a digital signage 7400 provided on an inner wall 7401 of a cylindrical space. The digital signage 7400 includes a plurality of imaging devices 7402 and a plurality of acoustic devices 7403 in addition to a display portion 7500 provided along a curved surface of the inner wall 7401. The digital signage 7400 can be linked to the operation of the display 7500 and the audio device 7403 by a plurality of imaging devices 7402 for performing line-of-sight measurement (eye tracking) or detecting gestures of the user. For example, the display portion 7500 can be switched and the sound of the audio device 7403 can be switched by the user's line of sight to the information of the advertisement displayed on the display portion 7500. Thus, the user can enjoy highly realistic display, sound, and the like.

The display device according to one embodiment of the present invention can be applied to the display portion 7500 shown in fig. 44A to 44D.

In addition, in an electronic device in which the display device according to one embodiment of the present invention shown in fig. 44A to 44D can be used, the electronic device can be connected to an external server via a network. Further, the processing requiring high computation power may be performed in the electronic device not in the server connected via the network. This type of processing is also called a so-called thin client, and only limited processing is performed on a terminal (here, an electronic device) on the user side (client side) and high-level processing such as application and management is performed on the server side, whereby the processing scale of the terminal on the client side can be reduced. Thus, since an arithmetic device having high arithmetic performance is not required to be used in the electronic apparatus, it is easy to realize low cost, light weight and miniaturization. In the electronic device according to one embodiment of the present invention, the thin client and the electronic device side may be combined to perform processing requiring processing with high computation capability.

At least a part of this embodiment can be implemented in combination with other embodiments described in this specification as appropriate.

Example 1

In this embodiment, a specific example of a display device that can be used for the electronic device shown in embodiment 1 will be described based on a structure that is produced in advance.

Fig. 45 is a cross-sectional view of a stacked structure of a CMOS circuit (Si CMOS LSI) composed of Si transistors and a circuit (OSLSI) composed of OS transistors using CAAC-OS (c-axis ALIGNED CRYSTALLINE OS). The CMOS LSI including SiFET provided in the layer 501 employs a 55nm process, and the wiring layers are six layers. In OSLSI including an OSFET disposed in the layer 502, three wiring layers are disposed under the OSFET and three wiring layers are disposed on the OSFET. In addition, an OEL layer manufactured using a pixel electrode by photolithography is formed on the upper layer.

FIG. 46 is a graph of the amount of current when drain voltages are applied to SiFET and OSFETs. SiFET has characteristics of W (channel width) =120 nm and L (channel length) =60 nm, and when the gate voltage is 0V, vd withstand voltage is 5V or less. On the other hand, OSFET has a high withstand voltage, specifically, when w=130 nm, l=200 nm, and the gate voltage and back gate voltage are 0V, vd withstand voltage is 20V or more.

For high definition, the pixel size needs to be reduced. For this reason, miniaturization of transistors of the pixel circuit is required. The voltage required for emission of OEL is unchanged regardless of the miniaturization of the transistor. In order to improve the luminance of OEL, a fine and high withstand voltage transistor is required. OSFETs meet the above requirements. Further, it is known that an OSFET can be formed after a process of forming a copper wiring or the like of SiFET without affecting SiFET characteristics. The characteristics of OSFET can obtain normally-off characteristics even with w=130 nm and l=200 nm.

Fig. 47 is a schematic illustration of a Si/CAAC-OS structure with a CAAC-OS FET laminated integrally (monolithic) on a Si substrate forming SiFET. Layer 503 represents a layer provided with pixels composed of CAAC-OS FETs and OELs. As shown in fig. 47, si driving circuits such as a source driving circuit SD and a gate driving circuit GD may be built in a lower layer of the pixel circuit in the region surrounded by the wiring SL and the wiring GL in the layer of the CAAC-OS. Therefore, the narrowing and the division control of the wirings SL and GL can be realized.

A global driver is provided in a circuit provided in a layer including SiFET. The global driver includes a plurality of local drivers including a source driver circuit SD and a gate driver circuit GD.

Fig. 48 is a top view showing a circuit configuration including layers SiFET. Four global drivers 504 may be provided in a layer comprising SiFET, for example. Also shown in fig. 48 is an input output circuit (IO) 505. The blocks of each global driver 504 use the same circuitry and the same layout, which can reduce design and verification time.

Fig. 49 is a block diagram of the circuitry of global driver 504. Fig. 49 shows the input-output circuit 511 and the global driver 504. In addition, in fig. 49, an LVDS circuit 512A for a control signal, an LVDS circuit 512B for a data signal, a serial-to-parallel converter 513, a control circuit 506, a resistor string circuit 516, and a plurality of local drivers 520 are shown as circuits included in the global driver 504. The control circuit 506 includes a timing generator 514 and a setting register 515. The local driver 520 includes a source driver circuit 517, a gate driver circuit 518, and a setting register 519.

The global driver 504 is provided with a setting register 515 for changing the scanning direction or the operation timing. Thus, a plurality of global drivers may be used to operate as one panel. In addition, the global drivers 504 include, for example, eight local drivers 520. For example, the local drivers 520 may independently drive the 480×720 pixel matrix, respectively. That is, the screen is 8-division driven in units of global drivers. The whole screen can be subjected to 32-division driving. By adopting such a configuration, parallel operation can be performed while reducing the loads of the gate driver circuit 518 and the source driver circuit 517. Therefore, circuit operation can be performed at a high-speed frame rate.

Fig. 50 is a block diagram of the circuitry of local driver 520. The local driver 520 includes a gate driving circuit 518 and a source driving circuit 517. The local driver 520 is connected to a data bus 526. The source driving circuit 517 includes a logic circuit 521, a latch circuit 522, a transfer transistor logic (PTL) circuit 523, an amplifying circuit 524, and a demultiplexing circuit 525. In order to efficiently connect the 512-gradation output from the resistor string circuit 516 to the plurality of source driving circuits 517, the gate driving circuits 518 are arranged in the direction of the wiring GL. With the arrangement described above, the output from the resistor string circuit 516 is commonly used in the plurality of source driving circuits 517, so that the influence of the output unevenness of the resistor string circuit 516 can be suppressed.

Fig. 51 is a schematic diagram for explaining the connection of the output of each local driver 520 to the pixel array. In fig. 51, layer 531 shows the uppermost layer provided with SiFET of local drivers 520. In addition, layer 532 shows a wiring layer for connecting the pixel array of the upper layer with the local driver 520. Layer 533 shows a layer having a pixel array including a pixel circuit surrounded by wiring SL and wiring GL. In the layer 531, an output terminal 534 shows an output terminal of a gate driver circuit, and an output terminal 535 shows an output terminal of a source driver circuit.

The output terminal 534 of the gate driver circuit in the layer 531 is connected to the wiring GL of the layer 533 through the wiring layer in the layer 532 immediately above. Further, the output terminal 535 of the source driver circuit in the layer 531 is connected to the wiring SL of the layer 533 through the wiring layer in the layer 532 directly above. The output terminal 534 of the gate driver circuit is connected to the wiring GL of the layer 533 directly above through a wiring extending in the layer 532. Accordingly, the output terminals 534 of the gate driving circuit are arranged in the gate line direction, and by changing the arrangement by the lead wiring, it is possible to be accurately connected to the pixel array.

Fig. 52 shows a circuit structure of a pixel 540 provided in the layer 533 of fig. 51. The pixel 540 includes a pixel circuit 541 and a light emitting element EL. The pixel circuit 541 includes seven OS transistors (M1 to M7) and three capacitors (C1 to C3). Seven OS transistors and three capacitors (7 Tr-3C) included in the pixel circuit 541 are connected to the wirings GL1 to GL3, the wiring SL, and the wirings V1, V0, ANODE, CATHODE to which a predetermined constant potential is supplied.

Fig. 53A and 53B are diagrams for explaining a schematic diagram of an actual trial layout of the pixel circuit corresponding to 7Tr-3C shown in fig. 52.

Fig. 53A shows a schematic diagram corresponding to a layout diagram of a transistor, and shows an electrode GE as a gate of the transistor, and an electrode SDE as a source or a drain of the transistor.

Fig. 53B shows a schematic diagram of a layout diagram of the sub-pixels of the pixel circuit corresponding to 7Tr-3C shown in fig. 52. The unit sub-pixel has a size of 2.64 μm×7.92 μm, and if a fine and high withstand voltage OSFET is used, a plurality of transistors can be arranged, and the degree of freedom in design is high.

Fig. 53B shows an electrode 551 connected to the wiring GL2, an electrode 552 connected to the wiring GL1, an electrode 553 connected to the wiring SL, and an electrode 554 connected to the wiring GL3, in addition to the arrangement of the OS transistors M1 to M7. By adopting this structure, the wiring SL and the wiring GL on the OSLSI side and the output terminal on the Si CMOS LSI side can be arranged and connected at any position in the sub-pixel. Therefore, the layout can be performed without turning off the sub-pixels in the portion transmitting the signals of the upper and lower layers.

Note that as shown in fig. 53B, wirings and electrodes are arranged in addition to the OS transistors M1 to M7 and the electrodes 551 to 554. The wiring and electrodes are pseudo transistors that do not contribute to operation. The dummy transistors are arranged at equal intervals in the x-direction and the y-direction for the purpose of stabilizing the characteristics of the OS transistors M1 to M7.

Here, a display device in which a pixel circuit including an OSFET and a driver circuit including SiFET are stacked is manufactured. Table 1 shows the specifications of the display device produced in trial.

TABLE 1

The screen size in the pilot panel was 1.50 inches diagonally with a resolution of 3840 x 2880. The light emitting element including the OEL layer is formed by coating RGB colors, respectively, by photolithography. The precision is higher than that of a structure in which each color of RGB is coated using a high-definition metal mask, and a high definition exceeding 1000ppi or a high aperture ratio of 53.7% can be achieved by a trial-produced panel.

The structure in which RGB colors are applied separately (separate application method) is superior in viewing angle to the structure in which a light emitting element including an OEL layer exhibiting white color is combined with a color filter to perform color display (WTC method), and there is no concern of reduction in luminance due to the color filter, so that power consumption can be reduced to about one third. Further, since a current leakage path between sub-pixels can be eliminated, color mixing due to light emission caused by leakage can be prevented. Since the driver circuit is disposed on the region overlapping with the screen circuit, the layout area including the driver circuit and the pixel circuit can be reduced. As a result, the number of display devices obtained is increased, and thus low cost can be achieved.

The structure in which the stacked Si CMOS LSI and OSLSI are color-displayed by the respective coating methods has five advantages of aperture ratio, color purity, viewing angle, power consumption, and cost, as compared with the structure in which the Si CMOS LSI is color-displayed by WTC method.

Since the aperture ratio is not limited by the size of the high-definition metal mask, a high aperture ratio can be achieved. Since color mixing due to a color filter or leakage current does not occur, color purity is excellent. Since it is not affected by the adjacent color filters, the viewing angle is excellent. Since the light emitting element has high current efficiency and can achieve low power consumption at the same luminance, power consumption is excellent. Low power consumption can also be achieved by using a structure in which Si CMOS LSI and OSLSI are stacked to hold data, or the like. The Si CMOS LSI and OSLSI can be reduced in size by stacking them, and the number of obtained Si CMOS LSI and OSLSI can be increased, which is excellent from the viewpoint of low cost.

Fig. 54 shows a display image of a display device incorporating a drive circuit capable of driving 32 display regions in parallel by integrally stacking OSLSI on a Si CMOS LSI. By using a layout of a connection region having 7Tr-3C and having a pixel circuit and a driving circuit provided in a sub-pixel, the display device can realize divided display driving of a pixel array which is difficult to realize when a single layer of Si CMOS LSI or OSLSI is used. As is clear from fig. 54, although a line display failure (also referred to as a "line defect") and a display unevenness are confirmed, an image is displayed on the entire screen.

(Additional description of the descriptions of the present specification and the like)

Next, the above embodiment and the description of each structure in the embodiment will be additionally described.

The structure shown in each embodiment mode can be combined with the structure shown in other embodiment modes as appropriate to constitute one embodiment mode of the present invention. In addition, when a plurality of structural examples are shown in one embodiment, these structural examples may be appropriately combined.

In addition, the content (or a part thereof) described in one embodiment may be applied to the other content (or a part thereof) described in the one embodiment and/or the content (or a part thereof) described in one or more other embodiments, the content (or a part thereof) described in one embodiment may be combined with the other content (or a part thereof) described in the one embodiment and/or the content (or a part thereof) described in one or more other embodiments, and the other content (or a part thereof) described in the one embodiment and/or the content (or a part thereof) described in one or more other embodiments may be replaced with the content (or a part thereof) described in the one embodiment.

The content described in the embodiments refers to the content described in the embodiments with reference to the drawings or the content described in the specification.

Further, by combining the drawing (or a part thereof) shown in one embodiment with other parts of the drawing, other drawings (or a part thereof) shown in the embodiment, and/or drawings (or a part thereof) shown in one or more other embodiments, more drawings can be constituted.

In this specification and the like, constituent elements are classified by functions and are represented by blocks independent of each other. However, in an actual circuit or the like, it may be difficult to distinguish between components according to functions, one circuit may involve a plurality of functions, or a plurality of circuits may involve one function. Accordingly, the blocks in the block diagrams are not limited to the components described in the specification, and may be expressed in any other way as appropriate.

Further, in the drawings, dimensions, thicknesses of layers, or regions are arbitrarily shown for convenience of description. Accordingly, the present invention is not limited to the dimensions in the drawings. The drawings are schematically shown for clarity, and are not limited to the shapes, numerical values, and the like shown in the drawings. For example, it may include a signal caused by noise, a non-uniformity of voltage or current, a non-uniformity of signal, voltage or current caused by time deviation, or the like.

In this specification and the like, when a connection relation of a transistor is described, it is described as "one of a source and a drain" (or a first electrode or a first terminal) or "the other of a source and a drain" (or a second electrode or a second terminal). This is because the source and drain of the transistor change according to the structure or operating condition of the transistor, or the like. Further, the source and the drain of the transistor may be appropriately referred to as a source (drain) terminal, a source (drain) electrode, or the like, as the case may be.

In the present specification and the like, the terms "electrode" and "wiring" do not define the constituent elements functionally. For example, an "electrode" is sometimes used as part of a "wiring" and vice versa. The term "electrode" or "wiring" includes a case where a plurality of "electrodes" or "wirings" are integrally formed.

In this specification, the voltage and the potential may be appropriately replaced. The voltage refers to a potential difference from a potential to be a reference, and when the potential to be the reference is, for example, a ground voltage, the voltage may be referred to as a potential. The ground potential does not necessarily mean 0V. The potential is opposite, and the potential to be supplied to the wiring or the like may vary depending on the potential to be a reference.

In this specification and the like, words such as "film" and "layer" may be exchanged with each other according to circumstances or conditions. For example, the term "conductive layer" may be changed to the term "conductive film". For example, the term "insulating film" may be changed to the term "insulating layer".

In this specification and the like, a switch means an element having a function of controlling whether or not to flow a current by changing to a conductive state (on state) or a nonconductive state (off state). Or the switch means an element having a function of selecting and switching a path of a current.

In this specification and the like, for example, a channel length refers to a distance between a source and a drain in a region where a semiconductor (or a portion where a current flows in the semiconductor when the transistor is in an on state) and a gate overlap or a region where a channel is formed in a top view of the transistor.

In this specification and the like, for example, a channel width refers to a length of a region where a semiconductor (or a portion where a current flows in the semiconductor when a transistor is in an on state) and a gate overlap or a portion where a source and a drain oppose each other in a region where a channel is formed.

In this specification and the like, "a and B connected" includes a case where a and B are electrically connected in addition to a case where a and B are directly connected. Here, "a and B are electrically connected" means that an object having a certain electrical action exists between a and B, and an electrical signal can be transmitted and received between a and B.

[ Description of the symbols ]

10: Display device, 11: substrate, 12: substrate, 13: display unit, 14: terminal portion, 15: semiconductor substrate, 16: substrate, 17: substrate, 19: secondary display unit, 20: layer, 21: transistor, 22: channel formation region, 30: drive circuit, 31: source driving circuit, 33: gate drive circuit, 34: light emission control drive circuit, 40: functional circuit, 50: layer, 51: pixel circuit, 60: a layer.

Claims

1. An electronic device, comprising:

A display device;

An arithmetic unit; and

A line-of-sight detection section,

Wherein the display device comprises a display part divided into a plurality of sub-display parts, a plurality of gate driving circuits and a plurality of source driving circuits,

One of the gate driving circuits and one of the source driving circuits are electrically connected to one of the sub-display parts,

Each of the plurality of sub-display sections includes a plurality of pixel circuits and a plurality of light emitting elements,

The sight line detection section has a function of detecting a sight line of a user,

The operation unit has a function of assigning each of the plurality of sub-display units as a first area or a second area using a detection result of the line-of-sight detection unit,

The gate driving circuit included in the second region outputs a selection signal that sets a lighting period of the light emitting element during 1 frame as a first period,

The gate driving circuit included in the first region outputs a selection signal that sets a lighting period of the light emitting element during 1 frame to a second period,

And, the first period is shorter than the second period.

2. The electronic device according to claim 1,

Wherein the first region includes a region overlapping a gaze point of the user.

3. The electronic device according to claim 1 or 2,

Wherein the plurality of gate driving circuits and the plurality of source driving circuits are all disposed in a first layer,

The plurality of pixel circuits are disposed in a second layer on the first layer,

And the plurality of light emitting elements are disposed in a third layer on the second layer.

4. An electronic device according to claim 3,

Wherein the plurality of gate driving circuits and the plurality of source driving circuits have transistors including a first semiconductor,

And each of the plurality of pixel circuits has a transistor including a second semiconductor.

5. The electronic device according to claim 4,

Wherein the first semiconductor comprises silicon.

6. The electronic device according to claim 4 or 5,

Wherein the second semiconductor includes an oxide semiconductor.

7. An electronic device, comprising:

A display device;

An arithmetic unit; and

A line-of-sight detection section,

Wherein the display device comprises a display part divided into a plurality of sub-display parts, a plurality of first grid driving circuits, a plurality of light-emitting control driving circuits and a plurality of source driving circuits,

One of the first gate driving circuits, one of the light emission control driving circuits and one of the source driving circuits are electrically connected to one of the sub display parts,

The first gate driving circuit included in the second region outputs a selection signal for updating image data of the pixel circuit at a first period,

The first gate driving circuit included in the first region outputs a selection signal for updating image data of the pixel circuit in a second period,

The second period is shorter than the first period,

And, the light emission control driving circuit included in the first region and the light emission control driving circuit included in the second region output a selection signal for lighting the light emitting element according to the second period.

8. The electronic device according to claim 7,

9. The electronic device according to claim 7 or 8,

Wherein the plurality of first gate driving circuits, the plurality of light emission control driving circuits, and the plurality of source driving circuits are all disposed in a first layer,

10. An electronic device according to claim 9,

Wherein the plurality of first gate driving circuits, the plurality of light emission control driving circuits, and the plurality of source driving circuits have transistors including a first semiconductor,

11. An electronic device according to claim 10,

Wherein the first semiconductor comprises silicon.

12. The electronic device according to claim 10 or 11,

Wherein the second semiconductor includes an oxide semiconductor.