CN118234371A

CN118234371A - Chip packaging method

Info

Publication number: CN118234371A
Application number: CN202410170278.7A
Authority: CN
Inventors: 熊敬; 索武生; 丁晓兵; 常成星; 成学斌
Original assignee: Shanghai Xinwang Microelectronics Technology Co ltd
Current assignee: Shanghai Xinwang Microelectronics Technology Co ltd
Priority date: 2024-02-06
Filing date: 2024-02-06
Publication date: 2024-06-21

Abstract

The invention relates to the technical field of integrated circuits, and discloses a chip packaging method. The packaging method can reduce the EMI electromagnetic interference of the chip to other devices, so that the packaging method can be better applied to an environment sensitive to the electromagnetic interference, and the anti-electromagnetic interference capability of the chip can be improved.

Description

Chip packaging method

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a chip packaging method.

Background

In the field of integrated circuits, many functions are implemented without the use of inductive elements: the chips of switching power supplies such as DCDC and the like need to use an inductor as an energy storage element to realize the conversion of a power domain; solenoid valves commonly used in industrial control require the use of electromagnetic coils to generate electromagnetic forces to effect valve opening and closing; the inductor is used as a medium wave antenna in a radio, and the like, and meanwhile, the inductor is widely applied to circuits such as oscillators, filters, and the like. However, the use of inductors faces serious electromagnetic leakage problems, as shown in fig. 1: when a variable current flows through the inductor, the inductor generates a variable magnetic field, in the figure, magnetic force lines of the inductor are axially parallel to the current direction inside the inductor coil, and the degree of density is proportional to the magnitude of the current flowing through the inductor. Since the current flowing through the inductor is a continuously variable current, and the flux linkage size ψ=l×i in the inductor, the inductance flux linkage also varies with the inductance current, i.e. the magnetic field strength around the inductor coil will vary with the current. The magnetic flux generated by the inductor leaks outside the chip, so that the chip can influence other parts of the system which are sensitive to electromagnetic interference; meanwhile, the magnetic flux exposed outside the chip can reduce the anti-interference capability of the chip, and in the field with higher information security requirements, the magnetic flux exposed outside the chip of the inductor greatly improves the risk of information leakage of the chip.

It is because of the magnetic flux leaking to the outside of the chip existing in the inductor, so that the use of some chips is limited, such as DCDC chips used in automobiles, and in order to increase the power density, the most mainstream technical route is to increase the switching frequency, which brings about a problem that high switching frequency can generate serious electromagnetic interference EMI in the electric system of the electric vehicle. For electromagnetic leakage of the inductor, common protective measures include shielding, filtering, isolation and the like, namely, shielding is to encapsulate a leakage source by using a shielding material, and the shielding can prevent electromagnetic waves generated by the leakage source in the shielding body from leaking to an external space and can stop external electromagnetic waves at the shielding body, so that the shielding not only achieves the aim of preventing information from leaking, but also has the function of preventing external strong electromagnetic radiation, but also has higher shielding cost; filtering is also one of the main methods for inhibiting electromagnetic leakage, and a proper filter is additionally arranged on a power line or a signal line to block a conduction leakage path, so that the conduction leakage is greatly inhibited; isolation suppresses electromagnetic leakage by separating equipment in the information system that requires significant protection from the system, making it particularly protected, and cutting off its electromagnetic leakage path from other equipment in the system.

Disclosure of Invention

The invention provides a chip packaging method, which is characterized in that a magnetic field generated by the built-in annular winding is bound in the package, so that the electromagnetic interference of the chip to other devices is reduced, the chip can be better applied to an environment sensitive to the electromagnetic interference, and the anti-electromagnetic interference capability of the chip can be improved.

The invention can be realized by the following technical scheme:

a chip packaging method packages an annular winding and a bare chip as a whole to form a novel chip with low magnetic flux leakage, wherein a closed magnetic path formed by energizing the annular winding can be restrained inside the annular winding.

Further, the bare chip is disposed inside or outside the toroidal winding.

Further, the annular winding is provided in a plurality, and the annular winding is arranged in a horizontal nesting mode or in a vertical interval mode.

Further, a closed-shaped magnetic core is arranged inside the annular winding, and the annular winding is wound around the magnetic core as a winding center.

Further, the annular winding is arranged in a circular, square or polygonal shape.

Further, the bare chip is set as a switching power supply chip, the corresponding output PAD PAD is connected with the input end of the annular winding, the corresponding feedback PAD PAD is connected with the output end of the annular winding, the feedback PAD PAD and the output end of the annular winding are jointly packaged in the packaging shell, and the output end of the annular winding is led out of the packaging shell to serve as an output pin of the novel DCDC chip.

The beneficial technical effects of the invention are as follows:

(1) The annular winding and the bare chip are packaged in the same packaging shell as a whole, so that a magnetic path generated by the annular winding is bound in the packaging shell of the chip, electromagnetic leakage of the chip is reduced, and electromagnetic interference of the chip to other devices is reduced, so that the magnetic flux-guiding device can be better applied to environments sensitive to electromagnetic interference.

(2) The magnetic path generated by the annular winding is restrained inside the chip package, so that the electromagnetic leakage of the chip is reduced, and the anti-electromagnetic interference capability of the chip is further improved.

(3) Because the magnetic path generated by the annular winding is bound inside the chip package, the outside cannot read the chip information through capturing the electromagnetic leakage of the winding, and the chip information leakage risk is reduced.

(4) For the chip of the switching power supply, the annular winding and the bare chip are sealed in the same package, so that the feedback pad of the chip can be directly connected to the output end of the internal winding of the package, the number of package pins is reduced, meanwhile, the area occupied by a conversion module or a voltage stabilizing module and the like constructed by the switching power supply chip is reduced, the miniaturized use of a DCDC circuit can be met, the application of the switching power supply in automobile electronic equipment is facilitated, meanwhile, the switching power supply can be widely applied to portable equipment such as a communication system and a mobile phone, and the application range of the DCDC circuit is widened.

Drawings

Fig. 1 is a schematic diagram of distribution of magnetic lines of inductance in a DCDC circuit in the prior art;

fig. 2 is a schematic circuit diagram of a DCDC power switch chip according to an embodiment of the present invention;

fig. 3 (a) and (b) are schematic diagrams of the positional relationship between a DCDC power switching core and an inductor in the prior art;

FIG. 3 (c) is a schematic diagram illustrating the positional relationship between the DC power switching core and the inductor according to the present invention;

Fig. 4 is a schematic view showing a structure of a plurality of toroidal winding arrangements with magnetic cores according to the present invention, wherein fig. 4 (a) shows a horizontal nested arrangement, fig. 4 (b) shows a vertical spaced nested arrangement, and fig. 4 (c) shows a three-dimensional spiral structure arrangement.

Detailed Description

The following detailed description of the invention refers to the accompanying drawings and preferred embodiments.

As shown in fig. 2 and 3, the present invention provides a chip packaging method, in which a ring winding and a bare chip are packaged as a whole to form a novel chip with low magnetic flux leakage, and a closed magnetic path formed by energizing the ring winding can be restrained inside the ring winding. Therefore, the annular winding is packaged in the chip, so that electromagnetic leakage of the chip can be reduced, electromagnetic interference of the chip to other equipment is reduced, the chip can be better applied to an environment sensitive to electromagnetic interference, and the anti-electromagnetic interference capability of the chip can be improved.

The bare chip can be arranged inside the annular winding or outside the annular winding, and the bare chip is particularly determined according to practical situations, such as packaging technology and the like.

In order to reduce electromagnetic interference EMI, a closed magnetic core 2 matched with the annular winding 1 may be disposed inside the annular winding 1, the annular winding 1 is wound around the magnetic core 2 as a winding center, and may be configured as a circle, a square or a polygon, so that magnetic lines of force generated after the annular winding 1 is electrified are more forcefully constrained inside the magnetic core or inside the winding, so that the magnetic lines of force are not exposed out of a chip package, electromagnetic leakage of the chip is reduced, electromagnetic interference is not generated to other devices, and meanwhile, an inductance value is increased, thereby effectively reducing electromagnetic interference EMI generated by the chip itself, and further improving anti-electromagnetic interference capability of the chip itself.

Considering the adjustment of the inductance value, the annular windings can be provided with a plurality of annular windings, as shown in fig. 4, the annular windings are horizontally nested, the large annular windings are outside and the small annular windings are inside, and the corresponding positions inside the packaging shell can be provided with containing grooves, so that the placement of the plurality of annular windings is standardized, and the space utilization is facilitated; or a plurality of annular windings are vertically arranged at intervals, at the moment, the packaging shell can be expanded in height, and the annular windings are correspondingly arranged in the packaging shell by adopting interlayer arrangement; or the annular winding adopts a three-dimensional spiral structure, magnetic force lines generated after the power is supplied are basically restrained inside the annular winding, and only a small amount of leakage exists at the port; the size of the inductance value of the annular winding with the magnetic core can be changed in the mode so as to adapt to the chip requirements of different specification grades.

Taking a switching power supply chip DCDC as an example, a specific structure of the package is described in detail.

As shown in fig. 3, the bare chip may be disposed inside or outside the toroidal winding, preferably inside, during packaging, which is more conducive to reducing the area of the PCB board and achieving miniaturization of the DCDC circuit. For the DCDC in the bare chip, at this time, the output voltage pin, such as SW pin, of the output PAD PAD of the bare chip corresponds to the output end of the finished DCDC chip and is connected with the input end of the annular winding, the feedback voltage pin, such as FB pin, of the output PAD PAD of the bare chip corresponds to the feedback voltage pin and is connected with the output end of the annular winding, the feedback voltage pin and the feedback voltage pin are jointly packaged in the packaging shell, the output end of the annular winding is led out of the packaging shell to serve as the output voltage pin of the novel DCDC chip, and therefore the pins of the novel DCDC chip do not need to feed back the voltage pin, and the pins are arranged on the surface of the packaging shell but only comprise the grounding pin, the VIN pin, the EN pin and the like, so that the PCB area occupied jointly by the annular inductor and the DCDC chip can be reduced, electromagnetic interference of a switching power supply and the like formed by the DCDC chip can be reduced, the miniaturized use of the DCDC circuit can be met, the application of the switching power supply in automobile electronic equipment can be facilitated, and the application range of the DCDC circuit can be widely applied to portable equipment such as a communication system and a mobile phone.

While particular embodiments of the present invention have been described above, it will be appreciated by those skilled in the art that these are merely illustrative, and that many changes and modifications may be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims.

Claims

1. A method of packaging a chip, characterized by: the annular winding and the bare chip are packaged as a whole, and a closed magnetic path formed after the annular winding is electrified can be restrained in the annular winding, so that a novel chip with low magnetic flux leakage is formed.

2. The chip packaging method according to claim 1, wherein: the bare chip is disposed inside or outside the toroidal winding.

3. The chip packaging method according to claim 2, wherein: the annular winding is provided with a plurality of annular windings which are horizontally nested or vertically spaced.

4. A chip packaging method according to claim 3, wherein: and a closed magnetic core matched with the annular winding is arranged inside the annular winding, and the annular winding is wound by taking the magnetic core as a winding center.

5. The chip packaging method according to claim 1, wherein: the annular winding is arranged in a round, square or polygonal shape.

6. The chip packaging method according to claim 1, wherein: the bare chip is arranged as a switching power supply chip, the corresponding output PAD PAD is connected with the input end of the annular winding, the corresponding feedback PAD PAD is connected with the output end of the annular winding, the output PAD PAD and the output end of the annular winding are packaged in the packaging shell together, and the output end of the annular winding is led out of the packaging shell to serve as an output pin of the novel DCDC chip.