CN118226234A - Chip testing method for high-low temperature circulation - Google Patents
Chip testing method for high-low temperature circulation Download PDFInfo
- Publication number
- CN118226234A CN118226234A CN202410643279.9A CN202410643279A CN118226234A CN 118226234 A CN118226234 A CN 118226234A CN 202410643279 A CN202410643279 A CN 202410643279A CN 118226234 A CN118226234 A CN 118226234A
- Authority
- CN
- China
- Prior art keywords
- pulse width
- sequence
- time window
- low temperature
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 59
- 230000001105 regulatory effect Effects 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims description 44
- 238000010438 heat treatment Methods 0.000 claims description 14
- 238000009863 impact test Methods 0.000 claims description 14
- 101150029607 SS18L1 gene Proteins 0.000 claims description 10
- 239000003795 chemical substances by application Substances 0.000 claims description 9
- 239000003507 refrigerant Substances 0.000 claims description 9
- 238000000354 decomposition reaction Methods 0.000 claims description 7
- 238000012163 sequencing technique Methods 0.000 claims description 4
- 230000001276 controlling effect Effects 0.000 claims description 3
- 238000004364 calculation method Methods 0.000 claims description 2
- 230000000737 periodic effect Effects 0.000 abstract description 3
- 238000005259 measurement Methods 0.000 abstract description 2
- 238000001816 cooling Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 4
- 238000011056 performance test Methods 0.000 description 3
- 238000010998 test method Methods 0.000 description 3
- 230000005355 Hall effect Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 102000037983 regulatory factors Human genes 0.000 description 1
- 108091008025 regulatory factors Proteins 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention relates to the technical field of chip measurement, in particular to a chip testing method of high-low temperature circulation, which comprises the following steps: acquiring current time sequence data of chip operation, and acquiring current data fitting waveforms in a fitting way; setting a time window, analyzing trend change periodic characteristics of a waveform fitted to current data of the time window, and constructing a waveform pulse width disorder coefficient; decomposing the fitting waveform of the current data of the time window to construct PR component density; constructing a waveform pulse width sequence trend coefficient according to the data distribution characteristic and the time variation characteristic of the waveform pulse width disorder coefficient; acquiring a warping index of a waveform pulse width sequence; and constructing a high-low temperature interval regulating factor, realizing the control of the temperature of the heat flow cover, and completing the chip test of high-low temperature circulation. The invention aims to regulate and control the high and low temperature test ranges of different types of chips, has flexibility for testing different chips, and can test various types of chips.
Description
Technical Field
The application relates to the technical field of chip measurement, in particular to a chip testing method for high-low temperature circulation.
Background
With the rapid development of the semiconductor industry, chips are widely used in various fields. The chip must be tested in a high and low temperature environment before shipping to simulate the performance of the chip in different environments. The conventional high-low temperature performance test method is to perform combined test by a test machine and a three-temperature separator. However, this test method has high equipment cost and limited flexibility, and has a limit on the kinds of test products. The test method is more suitable for the conditions of less product types but larger quantity in a chip manufacturer; for small lot, multi-variety testing requirements, the flexibility and economy of such testing methods may be less than ideal.
For small-batch high-low temperature cyclic testing of various chips, a heat flow cover is conventionally adopted at present to test the chips in a temperature rising and reducing mode. And (3) introducing the air dried and cleaned by the air compressor into a refrigerant/heating agent for low-temperature/high-temperature treatment, and cooling/heating the chip by reaching the position of a heat flow cover where the chip to be tested is positioned through an external pipeline. The high-low temperature test method needs to be subjected to a high-low temperature treatment process once for each chip to be tested. However, this method has a drawback that the time cost is greatly increased and the detection efficiency is low when small-lot and multi-variety chips are handled.
Disclosure of Invention
In order to solve the technical problems, the invention provides a chip testing method for high-low temperature circulation, which aims to solve the existing problems.
The invention relates to a chip testing method of high-low temperature circulation, which adopts the following technical scheme:
One embodiment of the invention provides a chip testing method of high-low temperature circulation, which comprises the following steps:
Acquiring a current time sequence data sequence of chip operation;
Fitting the current time sequence data sequence to obtain a current data fitting waveform; setting time windows, and uniformly dividing the current time sequence data sequence to obtain current time sequence data subsequences of each time window; fitting trend change cycle characteristics of waveforms according to current data of each time window to obtain waveform pulse width disorder coefficients of each time window; decomposing the fitting waveform of the current data of each time window to obtain PR components; acquiring PR component density degree of each time window according to data distribution of each PR component; acquiring waveform pulse width sequence trend coefficients of all time windows according to the data distribution characteristics and time variation characteristics of waveform pulse width disorder coefficients of all time windows; acquiring the warping index of the waveform pulse width sequence of each time window according to the PR component density degree of each time window and the waveform pulse width sequence trend coefficient; acquiring high-low temperature interval regulating factors according to the distribution of the warp indexes of the waveform pulse width sequences of all time windows;
the temperature of the heat flow cover is controlled according to the high-low temperature interval regulating factors; and (5) completing chip testing of high and low temperature cycles.
Preferably, the fitting the current time sequence data sequence to obtain a current data fitting waveform includes:
And taking the current time sequence data as the input of a local polynomial fitting algorithm, wherein the output of the fitting algorithm is a current data fitting waveform.
Preferably, the waveform pulse width disorder coefficient of each time window is obtained according to the trend change cycle characteristic of the fitting waveform of the current data of each time window, specifically:
Obtaining wave crests and wave troughs of current data fitting waveforms of all time windows; taking the data between each wave crest and the wave crest after each wave crest as each period;
For each time window, acquiring the pulse width of each period; calculating the mean value and variance of the pulse width of all the periods of the time window; presetting an adjusting parameter larger than zero; calculating a sum of the variance and the adjustment parameter; calculating the difference between the pulse width of each period and the average value; calculating an absolute value of a ratio of the difference to the sum; taking the average value of the absolute values of all the periods of the time window as a waveform pulse width disorder coefficient of the time window.
Preferably, the acquiring the pulse width of each period specifically includes:
Respectively sequencing the wave peaks and the wave troughs of each time window according to a time sequence to form a wave peak sequence and a wave trough sequence;
Respectively calculating the difference opposite numbers of each element in the wave crest sequence and the wave trough sequence and the corresponding time point of the next element of each element; calculating the sum of the difference value opposite numbers of the wave crest sequences and the difference value opposite numbers of the wave trough sequences; one half of the sum is taken as the pulse width of each cycle.
Preferably, the decomposing the fitting waveform of the current data of each time window to obtain the PR component specifically includes:
And fitting the current data fitting waveforms of each time window to obtain a preset number of PR components by adopting a time scale decomposition algorithm.
Preferably, the acquiring the PR component density of each time window according to the data distribution of each PR component includes:
discretizing each PR component, wherein the data number of the discretized PR components is consistent with the data number of the current time sequence data subsequences of each time window;
the PR component density degree expression for each time window is:
，
In the method, in the process of the invention, Representing PR component density within time window x,/>For the number of PR components, M represents the number of data in PR component,/>K-th value representing the t-th PR component in time window x,/>The mean value of the t-th PR component in the time window x is represented.
Preferably, the step of obtaining the trend coefficient of the waveform pulse width sequence of each time window according to the data distribution characteristic and the time variation characteristic of the waveform pulse width disorder coefficient of all the time windows specifically includes:
Sequencing the waveform pulse width disorder coefficients of all time windows according to a time sequence to form a waveform pulse width sequence; uniformly dividing the waveform pulse width sequence into M sub-windows, wherein M is a preset value; the waveform pulse width sequence trend coefficient expression of each time window is as follows:
，
In the method, in the process of the invention, Representing the waveform pulse width sequence trend coefficient within the time window x,/>Representing the number of sub-windows in a waveform pulse width sequence,/>、/>Respectively represent the maximum value and the minimum value of the messy coefficient of the waveform pulse width in the jth sub-window in the waveform pulse width sequence,/>、Respectively representing the time points corresponding to the maximum value and the minimum value of the waveform pulse width disorder coefficient in the jth sub-window in the waveform pulse width sequence,/>The j-th sub-window of the waveform pulse width sequence is represented.
Preferably, the warp index of the waveform pulse width sequence of each time window is the product of the PR component density degree of each time window and the trend coefficient of the waveform pulse width sequence.
Preferably, the obtaining the high-low temperature interval regulating factor according to the distribution of the warp index of the waveform pulse width sequence of all the time windows specifically includes:
Presetting a parameter adjusting coefficient larger than zero; calculating the average value of the warp indexes of the waveform pulse width sequences of all time windows; calculating the opposite number of the ratio of the mean value to the parameter adjusting coefficient; taking the opposite number as an exponent of an exponential function based on a natural constant; and taking the difference value between 1 and the calculation result of the exponential function as a high-low temperature interval regulating factor.
Preferably, the control of the temperature of the heat flow cover is realized according to the high-low temperature interval regulating factor, and the specific steps include:
Setting a regulating threshold, increasing the amount of refrigerant/heating agent introduced into the heat flow cover of the impact testing machine when the regulating factor of the high-low temperature interval is larger than or equal to the regulating threshold, and reducing the amount of refrigerant/heating agent introduced into the heat flow cover of the impact testing machine when the regulating factor of the high-low temperature interval is smaller than the regulating threshold.
The invention has at least the following beneficial effects:
The invention mainly analyzes the pulse width of the current waveform, constructs a waveform pulse width disorder coefficient, adopts an inherent time scale decomposition algorithm to decompose the current data into components with different frequency characteristics, constructs a waveform pulse width sequence warp index, respectively acquires the waveform characteristics of chip current from the angles of a time domain and a frequency domain, and identifies the chips with different varieties according to the difference of the current waveform characteristics generated by the chips with different varieties in operation, thereby regulating and controlling the temperature range of a heat flow cover of a high-low temperature impact tester, testing different chips, testing various kinds of chips, and overcoming the defects of high time cost and low detection efficiency when the existing method is used for processing small-batch and multi-variety chips.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for testing a chip in a high-low temperature cycle according to the present invention;
FIG. 2 is a schematic diagram of a high and low temperature impact tester;
FIG. 3 is a flowchart for obtaining the control factor in the high and low temperature range.
Detailed Description
In order to further describe the technical means and effects adopted by the invention to achieve the preset aim, the following is a detailed description of a specific implementation, structure, characteristics and effects of a chip testing method for high-low temperature cycle according to the invention with reference to the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" means that the embodiments are not necessarily the same. Furthermore, the particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
The following specifically describes a specific scheme of the chip testing method of high-low temperature cycle provided by the invention with reference to the accompanying drawings.
The embodiment of the invention provides a chip testing method for high and low temperature circulation.
Specifically, a method for testing a chip with high-low temperature cycle is provided, please refer to fig. 1, and the method comprises the following steps:
Step S001: and acquiring current waveform data of the chip before the chip is subjected to high-low temperature environmental performance test.
In order to realize small-batch and multi-variety testing of chips, the accuracy and the reliability of the testing are ensured. The embodiment provides a method capable of circularly testing a chip at high and low temperatures, wherein a testing device is a high and low temperature impact testing machine, and the high and low temperature impact testing machine comprises a 1-testing machine table, a 2-rotating turntable, a 3-high and low temperature impact testing machine heat flow cover, a 4-heat preservation cover, a 5-sealing material, a 6-fixed base and a 7-testing socket, wherein the high and low temperature impact testing machine is shown in figure 2.
As shown in FIG. 2, a plurality of products are placed in a heat flow cover of a high-low temperature impact testing machine, and when one product is tested by a testing machine, a rotary turntable in the high-low temperature circulation testing device is rotated to rotate the next product to a testing position of the testing machine. The circulation testing device, the heat flow cover of the high-low temperature impact testing machine and the plane of the testing machine can jointly form a closed space, and the closed space can be heated and cooled by the high-low temperature impact testing machine.
When one chip in the heat flow cover is tested, other chips in the collection cover are in a heating or cooling state, so that the current waveform characteristics of the chips during operation can be detected in advance, and the variety of the chips can be judged. Therefore, besides an interface for detecting the circuit performance of the chip, the Hall effect sensor interface is arranged on the test machine to collect the current of the chip during operation. The Hall effect sensor collects current data every 1ms, and the collection time length is determined according to the time of the performance test. Thus, a current time sequence data sequence of the chip operation is obtained and is marked as L.
Step S002: the pulse width characteristic analysis of the chip current waveform is used for constructing a waveform pulse width disorder coefficient; on the basis, the frequency and the change frequency characteristics of the chip current are further analyzed, and a waveform pulse width sequence warp index is constructed; and obtaining the high-low temperature interval regulating factors based on the warping index of the waveform pulse width sequence.
The detection method provided by the embodiment has universality, can be suitable for chips with different packages, and can meet the chip test requirements of different varieties only by replacing the test socket or integrally replacing the rotary turntable. When a single chip is tested, the temperature of the chips is raised/lowered simultaneously, and after the tested chip is tested, the turntable is rotated to test another chip which is in the heat flow cover and is subjected to high and low temperature treatment. Meanwhile, as the rotating turntable is rotated, one chip outside the heat flow cover can be moved into the heat flow cover, and high-temperature and low-temperature treatment can be performed while the rest chips in the heat flow cover are tested.
The current waveforms generated by the chips of different varieties when in operation have different characteristics under the influence of factors such as the architecture, the application field and the execution task of the chips. And (3) identifying chips of different varieties according to the characteristics of the current waveform by analyzing the current data waveform. To facilitate analysis of the current time series data L, it is evenly divided into 50 time windows. The current time sequence data subsequence under the xth time window is recorded as。
Firstly, analyzing the pulse width of a waveform, and adopting a local polynomial fitting algorithm to continuously convert the discrete data because the acquired current data are discrete data, wherein the input of the algorithm is a flow time sequence data sequence, the output is a current data fitting waveform, and the local polynomial fitting algorithm is a known technology and the specific process is not repeated. Then, a current time sequence data subsequence is obtainedThe corresponding current data fits the peaks and troughs of the waveform. Recording the time sequence of the wave peaks as a wave peak sequenceSimilarly, the trough sequence is denoted/>. The pulse width of the current waveform may vary depending on the chip type, for example, the memory chip is involved in a data read/write task, and the current waveform may show a periodic characteristic when data is read, and the current data between two adjacent peaks is recorded as one period. Constructing a waveform pulse width disorder coefficient, wherein the expression is as follows:
，
，
In the method, in the process of the invention, Representing the waveform pulse width disorder coefficient within the time window x,/>Representing the number of cycles within the time window x,/>Pulse width representing the i-th period in the current waveform,/>、/>Respectively represent the time points corresponding to the (i+1) th and (i) th values in the peak sequence,/>、/>Respectively represent the time points corresponding to the (i+1) th and (i) th values in the trough sequence,/>、/>Mean and variance of pulse width of all cycles in current waveformIn order to preset an adjustment parameter greater than zero, the value of this embodiment is 1, which is used to avoid the denominator being 0.
Calculated as the more rapid the impulse response in the current waveformValue sumThe smaller the value, the shorter the pulse width of the period, indicating that the chip needs to meet the requirements of the relevant high frequency operation. The pulse width stability is different in different chip varieties, and the instability may be caused by noise in the circuit, such as electromagnetic interference or element noise. The more stable the pulse width of a high performance chip is, therefore, if the pulse width value/>Away from the mean within the time window, while the larger the variance is,/>The larger the value, the larger the disorder coefficient of the waveform pulse width is, which indicates that the chip may belong to a chip variety which has the periodic characteristic of working current and has low requirement on the working performance.
Besides the pulse width factor of the current when the chip works, the chip variety can be further classified through kurtosis and high-frequency component characteristics of the current waveform. Such as a radio frequency chip for wireless communication tasks, the waveform characteristics of the current show up as frequent changes as it performs communication related tasks; digital signal processing chips are often used to perform computationally intensive tasks, and current waveforms may be characterized as having high frequency components. Therefore, the kurtosis and high frequency components of the waveform are analyzed to construct a waveform pulse width sequence equalization index.
First, a waveform is fitted to current data in each time window, and is decomposed by adopting an inherent time scale Decomposition (ITD) algorithm, signals with different frequency characteristics are separated from the current data, and the input of the ITD algorithm is the waveform fitted to the current data and is output as PR components with different frequency characteristics. The present embodiment sets the number of layers of the PR component to 4, and is denoted as PR1, PR2, PR3, and PR4 in the order of decomposition. The ITD algorithm is a well-known technique, and the specific process is not described in detail. Because PR components are continuous data, 4 PR components are discretized by adopting an equidistant value method, and the number of data in each discretized PR component and the current time sequence data subsequenceThe number of data in the data set is kept consistent. From this, the PR component density of each time window is calculated, expressed as:
，
In the method, in the process of the invention, Representing PR component density within time window x,/>For the number of PR components, M represents the number of data in PR component,/>K-th value representing the t-th PR component in time window x,/>The mean value of the t-th PR component in the time window x is represented.
If the thickness of PR component is higher, the data value of each data value is far from the average value is more, the calculated data value is moreThe larger the value, the more characteristic the chip current waveform exhibits as having a high frequency component.
If the kurtosis and high frequency components of the chip current waveform are more complex, the data of each PR component obtained by decomposition is more dense. Then the waveform pulse width disorder coefficient under the continuous time window is formed into waveform pulse width sequence according to the time window sequence and is recorded asAnd the sequence C is uniformly divided into M sub-windows, in the embodiment, the value of M is 10, so that the waveform pulse width sequence trend coefficient of each time window is calculated, and the expression is as follows:
，
In the method, in the process of the invention, Representing the waveform pulse width sequence trend coefficient within the time window x,/>Representing the number of sub-windows in a waveform pulse width sequence,/>、/>Respectively represent the maximum value and the minimum value of the messy coefficient of the waveform pulse width in the jth sub-window in the waveform pulse width sequence,/>、Respectively representing the time points corresponding to the maximum value and the minimum value of the waveform pulse width disorder coefficient in the jth sub-window in the waveform pulse width sequence,/>The j-th sub-window of the waveform pulse width sequence is represented.
If the extreme difference in the sub-window of the waveform pulse width sequence is larger, that isThe larger the value and the shorter the time interval corresponding to the range data, i.e./>, theThe smaller the value is, the waveform pulse width sequence trend coefficient/>The larger the indication is that the waveform pulse width sequence changes rapidly and significantly within the sub-window.
Calculating a waveform pulse width sequence warp index from the above, wherein the expression is as follows:
，
In the method, in the process of the invention, Representing the warp index,/>, of the waveform pulse width sequence within the time window xRepresenting the waveform pulse width sequence trend coefficient within the time window x,/>Representing the PR component density within the time window x.
And finally, the larger the warp index of the waveform pulse width sequence is calculated, the more frequent the change of the current waveform is, and the more likely the current waveform belongs to a chip variety with high requirements on working performance.
Because the high and low temperature intervals required by different types of chips during testing are different, the intervals for heating and cooling the chips should be different. For example, a radio frequency chip and a digital signal processing chip need to work normally in a larger temperature difference environment, and a temperature difference interval between a memory chip and a working environment is relatively low. Therefore, the chip variety can be identified according to the current waveform characteristics, so that the quantity of the refrigerant/heating agent fed into the air compressor for drying and cleaning during testing can be controlled. Further, the high-low temperature interval regulatory factors are constructed as follows:
，
In the method, in the process of the invention, Represents a high-low temperature interval regulatory factor,/>An exponential function based on natural constants is represented,Representing the mean function, H representing the set of the warp indices of the waveform pulse width sequence over all time windows,/>For the parameter adjustment coefficient greater than zero, the value of the parameter adjustment coefficient is 6 in the embodiment, and the function of the parameter adjustment coefficient is to control the change speed of the exponential function. The flow of obtaining the high-low temperature regulating factor is shown in fig. 3.
When the average value of the warp index of the waveform pulse width sequence of all time windows is larger, the chip is indicated to belong to a chip variety with high requirements on working performance, and the high-low temperature interval regulating factor is calculatedThe larger the/>, whereinThe value range (0, 1) indicates that the amount of refrigerant/heating agent introduced is increased before performance testing to achieve a suitable detection of high and low temperature intervals.
Step S003: and controlling the temperature of a heat flow cover of the high-low temperature impact testing machine according to the high-low temperature interval regulating factors, and finally detecting the chip.
Setting a regulation threshold value ifWhen the temperature is greater than or equal to the regulation threshold value, the amount of the refrigerant/heating agent introduced into the heat flow cover of the impact testing machine is increased, if/>When the temperature is smaller than the regulating threshold, the amount of the refrigerant/heating agent introduced into the heat flow cover of the impact testing machine is reduced, and the high and low temperature regulating threshold in the embodiment is 0.75. In the testing process of the last chip, heating or cooling treatment is carried out on the product to be tested, after the last chip is tested, the heating or cooling process of the next chip is finished, the turntable is rotated, and the chip to be tested is detected. Therefore, the chip testing method of the high-low temperature cycle is realized.
In summary, the embodiment of the invention constructs the pulse width disorder coefficient of the waveform by analyzing the pulse width of the current waveform, adopts the inherent time scale decomposition algorithm to decompose the current data into components with different frequency characteristics, constructs the warping index of the waveform pulse width sequence, obtains the waveform characteristics of the chip current from the angles of time domain and frequency domain respectively, identifies the chips with different varieties according to the difference of the current waveform characteristics generated by the chips with different varieties when in operation, further regulates and controls the temperature range of the heat flow cover of the high and low temperature impact tester, has flexibility for testing different chips, can test various chips, and overcomes the defects of high time cost and low detection efficiency when the existing method processes small-batch and multi-variety chips.
It should be noted that: the sequence of the embodiments of the present invention is only for description, and does not represent the advantages and disadvantages of the embodiments. And the foregoing description has been directed to specific embodiments of this specification. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
In this specification, each embodiment is described in a progressive manner, and the same or similar parts of each embodiment are referred to each other, and each embodiment mainly describes differences from other embodiments.
The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; the technical solutions described in the foregoing embodiments are modified or some of the technical features are replaced equivalently, so that the essence of the corresponding technical solutions does not deviate from the scope of the technical solutions of the embodiments of the present application, and all the technical solutions are included in the protection scope of the present application.
Claims (10)
1. A chip testing method of high-low temperature circulation is characterized by comprising the following steps:
Acquiring a current time sequence data sequence of chip operation;
Fitting the current time sequence data sequence to obtain a current data fitting waveform; setting time windows, and uniformly dividing the current time sequence data sequence to obtain current time sequence data subsequences of each time window; fitting trend change cycle characteristics of waveforms according to current data of each time window to obtain waveform pulse width disorder coefficients of each time window; decomposing the fitting waveform of the current data of each time window to obtain PR components; acquiring PR component density degree of each time window according to data distribution of each PR component; acquiring waveform pulse width sequence trend coefficients of all time windows according to the data distribution characteristics and time variation characteristics of waveform pulse width disorder coefficients of all time windows; acquiring the warping index of the waveform pulse width sequence of each time window according to the PR component density degree of each time window and the waveform pulse width sequence trend coefficient; acquiring high-low temperature interval regulating factors according to the distribution of the warp indexes of the waveform pulse width sequences of all time windows;
the temperature of the heat flow cover is controlled according to the high-low temperature interval regulating factors; and (5) completing chip testing of high and low temperature cycles.
2. The method for testing a chip in a high-low temperature cycle according to claim 1, wherein said fitting the current time series data sequence to obtain a current data fitting waveform comprises:
And taking the current time sequence data as the input of a local polynomial fitting algorithm, wherein the output of the fitting algorithm is a current data fitting waveform.
3. The method for testing a chip in a high-low temperature cycle according to claim 1, wherein the waveform pulse width disorder coefficients of each time window are obtained according to the trend change cycle characteristics of the fitting waveform of the current data of each time window, specifically:
Obtaining wave crests and wave troughs of current data fitting waveforms of all time windows; taking the data between each wave crest and the wave crest after each wave crest as each period;
For each time window, acquiring the pulse width of each period; calculating the mean value and variance of the pulse width of all the periods of the time window; presetting an adjusting parameter larger than zero; calculating a sum of the variance and the adjustment parameter; calculating the difference between the pulse width of each period and the average value; calculating an absolute value of a ratio of the difference to the sum; taking the average value of the absolute values of all the periods of the time window as a waveform pulse width disorder coefficient of the time window.
4. The method for testing a chip in a high-low temperature cycle as claimed in claim 3, wherein said obtaining pulse width of each cycle comprises:
Respectively sequencing the wave peaks and the wave troughs of each time window according to a time sequence to form a wave peak sequence and a wave trough sequence;
Respectively calculating the difference opposite numbers of each element in the wave crest sequence and the wave trough sequence and the corresponding time point of the next element of each element; calculating the sum of the difference value opposite numbers of the wave crest sequences and the difference value opposite numbers of the wave trough sequences; one half of the sum is taken as the pulse width of each cycle.
5. The method for testing a chip in high and low temperature cycle as claimed in claim 1, wherein the decomposing the fitting waveform of the current data in each time window to obtain the PR component specifically comprises:
And fitting the current data fitting waveforms of each time window to obtain a preset number of PR components by adopting a time scale decomposition algorithm.
6. The method for testing a chip in a high and low temperature cycle as claimed in claim 1, wherein said obtaining the PR component density of each time window according to the data distribution of each PR component comprises:
discretizing each PR component, wherein the data number of the discretized PR components is consistent with the data number of the current time sequence data subsequences of each time window;
the PR component density degree expression for each time window is:
，
In the method, in the process of the invention, Representing PR component density within time window x,/>For the number of PR components, M represents the number of data in PR component,/>K-th value representing the t-th PR component in time window x,/>The mean value of the t-th PR component in the time window x is represented.
7. The method for testing a chip in high and low temperature cycle according to claim 1, wherein the step of obtaining the waveform pulse width sequence trend coefficient of each time window according to the data distribution characteristic and the time variation characteristic of the waveform pulse width disorder coefficient of all time windows comprises the following steps:
Sequencing the waveform pulse width disorder coefficients of all time windows according to a time sequence to form a waveform pulse width sequence; uniformly dividing the waveform pulse width sequence into M sub-windows, wherein M is a preset value; the waveform pulse width sequence trend coefficient expression of each time window is as follows:
，
In the method, in the process of the invention, Representing the waveform pulse width sequence trend coefficient within the time window x,/>Representing the number of sub-windows in a waveform pulse width sequence,/>、/>Respectively represent the maximum value and the minimum value of the messy coefficient of the waveform pulse width in the jth sub-window in the waveform pulse width sequence,/>、/>Respectively representing the time points corresponding to the maximum value and the minimum value of the waveform pulse width disorder coefficient in the jth sub-window in the waveform pulse width sequence,/>The j-th sub-window of the waveform pulse width sequence is represented.
8. The method of claim 1, wherein the pulse width sequence warp index of each time window is a product of the PR component density of each time window and the trend coefficient of the pulse width sequence.
9. The method for testing a chip in high and low temperature cycle as claimed in claim 1, wherein the obtaining the high and low temperature interval control factor according to the distribution of the warp index of the waveform pulse width sequence of all time windows specifically comprises:
Presetting a parameter adjusting coefficient larger than zero; calculating the average value of the warp indexes of the waveform pulse width sequences of all time windows; calculating the opposite number of the ratio of the mean value to the parameter adjusting coefficient; taking the opposite number as an exponent of an exponential function based on a natural constant; and taking the difference value between 1 and the calculation result of the exponential function as a high-low temperature interval regulating factor.
10. The method for testing a chip in a high-low temperature cycle according to claim 1, wherein the controlling the temperature of the heat flow cover according to the high-low temperature interval regulation factor comprises the following specific steps:
Setting a regulating threshold, increasing the amount of refrigerant/heating agent introduced into the heat flow cover of the impact testing machine when the regulating factor of the high-low temperature interval is larger than or equal to the regulating threshold, and reducing the amount of refrigerant/heating agent introduced into the heat flow cover of the impact testing machine when the regulating factor of the high-low temperature interval is smaller than the regulating threshold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410643279.9A CN118226234A (en) | 2024-05-23 | 2024-05-23 | Chip testing method for high-low temperature circulation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410643279.9A CN118226234A (en) | 2024-05-23 | 2024-05-23 | Chip testing method for high-low temperature circulation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN118226234A true CN118226234A (en) | 2024-06-21 |
Family
ID=91502918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410643279.9A Pending CN118226234A (en) | 2024-05-23 | 2024-05-23 | Chip testing method for high-low temperature circulation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN118226234A (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120197570A1 (en) * | 2011-01-27 | 2012-08-02 | Mehran Ramezani | Measurement of Parameters Within an Integrated Circuit Chip Using a Nano-Probe |
| CN108152037A (en) * | 2017-11-09 | 2018-06-12 | 同济大学 | Method for Bearing Fault Diagnosis based on ITD and improvement shape filtering |
| CN109596973A (en) * | 2018-12-29 | 2019-04-09 | 北京智芯微电子科技有限公司 | The test method of chip parameter under different temperatures |
| CN112147488A (en) * | 2020-09-25 | 2020-12-29 | 杰华特微电子（杭州）有限公司 | Chip parameter testing and calibrating method |
| CN113917311A (en) * | 2021-09-14 | 2022-01-11 | 中国电子技术标准化研究院 | Chip parameter tolerance testing method and device |
| CN117607731A (en) * | 2024-01-22 | 2024-02-27 | 张家港乐达汽车电器有限公司 | Full-color LED electronic circuit display screen power failure detection method |
| CN117833441A (en) * | 2024-01-11 | 2024-04-05 | 国网山东省电力公司莱芜供电公司 | Automatic switching monitoring method and system for low-voltage dual-power switch cabinet |
| CN117892066A (en) * | 2024-03-14 | 2024-04-16 | 杭州银湖电气设备有限公司 | Vibration noise data processing method for magnetic control reactor |
| CN117909621A (en) * | 2024-03-19 | 2024-04-19 | 青蛙泵业股份有限公司 | Method and system for monitoring running state of sewage and dirt submerged electric pump |
-
2024
- 2024-05-23 CN CN202410643279.9A patent/CN118226234A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120197570A1 (en) * | 2011-01-27 | 2012-08-02 | Mehran Ramezani | Measurement of Parameters Within an Integrated Circuit Chip Using a Nano-Probe |
| CN108152037A (en) * | 2017-11-09 | 2018-06-12 | 同济大学 | Method for Bearing Fault Diagnosis based on ITD and improvement shape filtering |
| CN109596973A (en) * | 2018-12-29 | 2019-04-09 | 北京智芯微电子科技有限公司 | The test method of chip parameter under different temperatures |
| CN112147488A (en) * | 2020-09-25 | 2020-12-29 | 杰华特微电子（杭州）有限公司 | Chip parameter testing and calibrating method |
| CN113917311A (en) * | 2021-09-14 | 2022-01-11 | 中国电子技术标准化研究院 | Chip parameter tolerance testing method and device |
| CN117833441A (en) * | 2024-01-11 | 2024-04-05 | 国网山东省电力公司莱芜供电公司 | Automatic switching monitoring method and system for low-voltage dual-power switch cabinet |
| CN117607731A (en) * | 2024-01-22 | 2024-02-27 | 张家港乐达汽车电器有限公司 | Full-color LED electronic circuit display screen power failure detection method |
| CN117892066A (en) * | 2024-03-14 | 2024-04-16 | 杭州银湖电气设备有限公司 | Vibration noise data processing method for magnetic control reactor |
| CN117909621A (en) * | 2024-03-19 | 2024-04-19 | 青蛙泵业股份有限公司 | Method and system for monitoring running state of sewage and dirt submerged electric pump |
Non-Patent Citations (1)
| Title |
|---|
| 冯伟英, 中国优秀硕士学位论文全文数据库，低温环境下计算机温度控制系统的设计与实现, 15 April 2015 (2015-04-15), pages 11 - 15 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Hsu et al. | Multiple time-series convolutional neural network for fault detection and diagnosis and empirical study in semiconductor manufacturing | |
| US8046193B2 (en) | Determining process condition in substrate processing module | |
| CN116518640B (en) | Refrigerator control method, system and equipment | |
| US20060180570A1 (en) | Application of in-situ plasma measurements to performance and control of a plasma processing system | |
| JP2004509407A (en) | Adaptive sampling method for improving control in semiconductor manufacturing. | |
| JP7285187B2 (en) | System and method for anomaly characterization based on joint analysis of history and time series | |
| CN117196353B (en) | Environmental pollution assessment and monitoring method and system based on big data | |
| CN116609720A (en) | Data-driven-based intelligent error compensation method and system for desk-top multimeter | |
| CN118226234A (en) | Chip testing method for high-low temperature circulation | |
| CN113094893A (en) | Wafer quality virtual measurement method and device, computer equipment and storage medium | |
| US7212950B2 (en) | Methods and apparatus for equipment matching and characterization | |
| CN109947048B (en) | Data-based numerical control machine tool feeding system parameter identification method | |
| Tchatchoua et al. | 1D ResNet for fault detection and classification on sensor data in semiconductor manufacturing | |
| Deshmukh et al. | A wireless electronic nose (WEN) for the detection and classification of fruits: A case study | |
| Sarker et al. | Performance evaluation of iterative signal design for system identification | |
| US20200410148A1 (en) | Ic manufacturing recipe similarity evaluation methods and systems | |
| Bártová et al. | Early defect detection using clustering algorithms | |
| Khouni et al. | Nonlinear System Identification using Uncoupled State Multi-model Approach: Application to the PCB Soldering System. | |
| McWilliams et al. | A PRESS statistic for two-block partial least squares regression | |
| El-Midany et al. | A Proposed Performance Prediction Approach for Manufacturing Process Using Artifical Neural Networks. | |
| CN109975349B (en) | Method for measuring semiconductor thermal resistance | |
| CN111680262B (en) | Self-adaptive gain gradient projection identification method | |
| Lelono et al. | Tofu shelf life using electronic nose based on curve fitting method | |
| Miguel et al. | Temperature Analysis of an Aging Chamber Using Mobile Average Filter | |
| Zanco et al. | Hyperparameter determination in multivariate macromodeling based on radial basis functions |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination |