CN118157643A - Microfluidic active matrix driving circuit and microfluidic device - Google Patents

Abstract

The application provides a microfluidic active matrix driving circuit and a microfluidic device. The control end of the reset module and the control end of the charging module are connected with the same scanning signal end, and the input end of the reset module and the input end of the charging module are connected with the same data signal end, so that when the signal output end needs to write high potential, the reset module can further raise the potential of the second node, thereby realizing rapid charging of the signal output end, and further enabling the microfluidic active matrix driving circuit to have higher response speed; and secondly, the first storage module is arranged between the power supply signal end and the second node so as to maintain the potential of the second node, so that the microfluidic active matrix driving circuit has higher accuracy and stability.

Description

Microfluidic active matrix driving circuit and microfluidic device

Technical Field

The application relates to the technical field of microfluidics, in particular to a microfluidic active matrix driving circuit and a microfluidic device.

Background

The microfluidic device is a device for moving liquid drops by means of the change of the liquid wetting effect, and can complete state conversion such as movement, fusion, splitting and the like of the liquid drops so as to analyze optical, chemical and physical properties of different components or fused components.

In the construction of a microfluidic platform, its droplet control stage is the core component of the platform. The conventional microfluidic device realizes the operation of fluid by designing different types of channels and micro-pump valve structures, the structure of the mode is complex, the processing is complicated, accurate and stable operation and control of liquid drops cannot be performed, the failure rate of liquid drop operation and control efficiency is high, and the operation and control efficiency is low.

Disclosure of Invention

The application mainly solves the technical problems of high failure rate and low control efficiency of droplet control in the prior art by providing a microfluidic active matrix driving circuit and a microfluidic device.

In order to solve the technical problems, the first technical scheme provided by the application is as follows: there is provided a microfluidic active matrix driving circuit for driving a pixel electrode in an active matrix, comprising:

The control end of the charging module is electrically connected with the scanning signal end, the input end of the charging module is electrically connected with the data signal end, and the output end of the charging module is electrically connected with the first node;

The control end of the driving module is electrically connected with the first node, the input end of the driving module is electrically connected with the power signal end, and the output end of the driving module is electrically connected with the signal output end of the microfluidic active matrix driving circuit through the second node;

The control end of the reset module is connected with the same scanning signal end with the control end of the charging module, the input end of the reset module is connected with the same data signal end with the input end of the charging module, and the output end of the reset module is electrically connected with the second node;

One end of the first storage module is electrically connected with the power signal end, and the other end of the first storage module is electrically connected with the second node;

And one end of the second storage module is electrically connected with the power signal end, and the other end of the second storage module is electrically connected with the first node.

The charging module comprises a first transistor, wherein the grid electrode of the first transistor is electrically connected with the scanning signal end, the source electrode of the first transistor is electrically connected with the first node, and the drain electrode of the first transistor is electrically connected with the data signal end;

The driving module comprises a driving transistor, wherein the grid electrode of the driving transistor is electrically connected with the first node, the source electrode of the driving transistor is electrically connected with the second node, and the drain electrode of the driving transistor is electrically connected with the power signal end;

The first storage module comprises a first capacitor, one end of the first capacitor is electrically connected with the power signal end, and the other end of the first capacitor is electrically connected with the second node;

the second storage module comprises a second capacitor, one end of the second capacitor is electrically connected with the power signal end, and the other end of the second capacitor is electrically connected with the first node.

The reset module comprises a second transistor, wherein the grid electrode of the second transistor is electrically connected with the scanning signal end, the source electrode of the second transistor is electrically connected with the second node, and the drain electrode of the second transistor is electrically connected with the data signal end.

The reset module comprises a second transistor and a third transistor, wherein the grid electrode of the second transistor is electrically connected with the scanning signal end, the source electrode of the second transistor is electrically connected with the drain electrode of the third transistor, and the drain electrode of the second transistor is electrically connected with the data signal end; the grid electrode of the third transistor is electrically connected with the scanning signal end, and the source electrode of the third transistor is electrically connected with the second node.

Wherein the second capacitor is a preset value.

The microfluidic active matrix driving circuit further comprises a third storage module, one end of the third storage module is connected with the control end of the charging module and the same scanning signal end, and the other end of the third storage module is electrically connected with the first node.

The third storage module comprises a third capacitor, one end of the third capacitor is electrically connected with the scanning signal end, and the other end of the third capacitor is electrically connected with the first node;

The sum of the capacitance value of the second capacitor and the capacitance value of the third capacitor is a preset value, and the capacitance value of the third capacitor is smaller than the capacitance value of the second capacitor.

Wherein, the power signal output by the power signal terminal is high potential; the microfluidic active matrix driving circuit comprises a working phase and a resetting phase, and the driving time sequence of the working phase sequentially comprises a first phase and a second phase;

In the first stage, the scanning signal output by the scanning signal end is at a high potential, the data signal output by the data signal end is at a high potential, and the charging module, the driving module and the resetting module are started so that the signal output end is written with the high potential;

In the second stage, the scanning signal output by the scanning signal end is at a low potential, the charging module and the resetting module are closed, and the driving module is kept open, so that the signal output end is continuously written with a high potential;

in the reset stage, the scanning signal output by the scanning signal end is at a high potential, the data signal output by the data signal end is at a low potential, the charging module and the reset module are turned on, and the driving module is turned off, so that the signal output end is written with the low potential.

In order to solve the technical problems, a second technical scheme provided by the application is as follows: a microfluidic device is provided, which includes the microfluidic active matrix driving circuit described above.

Wherein the microfluidic device comprises: a first substrate and a second substrate disposed opposite to each other, and a channel for accommodating one or more droplets is formed between the first substrate and the second substrate;

The first substrate comprises a first substrate, a common electrode and a first hydrophobic layer which are sequentially stacked towards the second substrate;

The second substrate comprises a second substrate, a driving circuit layer, a pixel electrode, an insulating layer and a second hydrophobic layer which are sequentially stacked towards the first substrate; the driving circuit layer comprises a plurality of microfluidic active matrix driving circuits which are arranged in an array manner;

The channel is located between the first hydrophobic layer and the second hydrophobic layer.

The application has the beneficial effects that: the application provides a microfluidic active matrix driving circuit and a microfluidic device, which are different from the prior art, wherein the microfluidic active matrix driving circuit is used for driving pixel electrodes in an active matrix. The microfluidic active matrix driving circuit comprises a charging module, a driving module, a resetting module, a first storage module and a second storage module. The control end of the charging module is electrically connected with the scanning signal end, the input end of the charging module is electrically connected with the data signal end, and the output end of the charging module is electrically connected with the first node. The control end of the driving module is electrically connected with the first node, the input end of the driving module is electrically connected with the power signal end, and the output end of the driving module is electrically connected with the signal output end of the microfluidic active matrix driving circuit through the second node. The control end of the reset module is connected with the same scanning signal end with the control end of the charging module, the input end of the reset module is connected with the same data signal end with the input end of the charging module, and the output end of the reset module is electrically connected with the second node. One end of the first storage module is electrically connected with the power signal end, and the other end of the first storage module is electrically connected with the second node. One end of the second storage module is electrically connected with the power signal end, and the other end of the second storage module is electrically connected with the first node. The control end of the reset module and the control end of the charging module are connected with the same scanning signal end, and the input end of the reset module and the input end of the charging module are connected with the same data signal end, so that when the signal output end needs to write high potential, the reset module can further raise the potential of the second node, thereby realizing rapid charging of the signal output end, and further enabling the microfluidic active matrix driving circuit to have higher response speed; and secondly, the first storage module is arranged between the power supply signal end and the second node so as to maintain the potential of the second node, so that the microfluidic active matrix driving circuit has higher accuracy and stability.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without any inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a first embodiment of a microfluidic active matrix driving circuit provided by the present application;

Fig. 2 is a driving timing diagram of the microfluidic active matrix driving circuit provided by the present application;

FIG. 3 is a potential diagram of a first node and a second node in a microfluidic active matrix driving circuit provided by the present application;

fig. 4 is a schematic structural diagram of a second embodiment of the microfluidic active matrix driving circuit provided by the present application;

fig. 5 is a schematic structural diagram of a third embodiment of the microfluidic active matrix driving circuit provided by the present application;

fig. 6 is a schematic structural diagram of a fourth embodiment of the microfluidic active matrix driving circuit provided by the present application;

fig. 7 is a schematic structural diagram of an embodiment of a microfluidic device according to the present application.

Reference numerals illustrate:

100. A microfluidic active matrix drive circuit; 10. a charging module; t1, a first transistor; 20. a driving module; t0, driving transistor; 30. a reset module; t2, a second transistor; t3, third transistor; 40. a first storage module; c1, a first capacitor; 50. a second storage module;

C2, a second capacitor; 60. a third storage module; c3, a third capacitor; A. a first node; B. a second node; gate, scan signal terminal/scan signal; data, data signal terminals/Data signals; VDD, power signal terminal/power signal; 200. a microfluidic device; 210. a first substrate; 211. a first substrate; 212. a common electrode; 213. a first hydrophobic layer; 220. a second substrate; 221. a second substrate; 222. a driving circuit layer; 223. a pixel electrode; 224. an insulating layer; 225. a second hydrophobic layer; 230. a channel.

Detailed Description

The following describes embodiments of the present application in detail with reference to the drawings.

In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, interfaces, techniques, etc., in order to provide a thorough understanding of the present application.

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms "first," "second," "third," and the like in this disclosure are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", and "a third" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. All directional indications (such as up, down, left, right, front, back … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement, etc. between the components in a particular gesture (as shown in the drawings), and if the particular gesture changes, the directional indication changes accordingly. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a first embodiment of a microfluidic active matrix driving circuit provided by the present application, and fig. 2 is a driving timing diagram of the microfluidic active matrix driving circuit provided by the present application.

The present application provides a microfluidic active matrix driving circuit 100 for driving pixel electrodes (see fig. 7) in an active matrix. The microfluidic active matrix driving circuit 100 includes a charging module 10, a driving module 20, a reset module 30, a first memory module 40, and a second memory module 50. The control end of the charging module 10 is electrically connected with the scan signal end Gate, the input end of the charging module 10 is electrically connected with the Data signal end Data, and the output end of the charging module 10 is electrically connected with the first node A. The control end of the driving module 20 is electrically connected with the first node a, the input end of the driving module 20 is electrically connected with the power signal end VDD, and the output end of the driving module 20 is electrically connected with the signal output end of the microfluidic active matrix driving circuit 100 through the second node B. The control end of the reset module 30 is connected with the same scanning signal end Gate with the control end of the charging module 10, the input end of the reset module 30 is connected with the same Data signal end Data with the input end of the charging module 10, and the output end of the reset module 30 is electrically connected with the second node B. One end of the first memory module 40 is electrically connected to the power signal terminal VDD, and the other end of the first memory module 40 is electrically connected to the second node B. One end of the second memory module 50 is electrically connected to the power signal terminal VDD, and the other end of the second memory module 50 is electrically connected to the first node a.

The control end of the reset module 30 and the control end of the charging module 10 are connected with the same scanning signal end Gate, and the input end of the reset module 30 and the input end of the charging module 10 are connected with the same Data signal end Data, so that when the signal output end needs to be written with high potential, the reset module 30 can further pull up the potential of the second node B, thereby realizing rapid charging of the signal output end, and further enabling the microfluidic active matrix driving circuit 100 to have higher response speed; next, the first memory module 40 is disposed between the power signal terminal VDD and the second node B to maintain the potential of the second node B, so that the micro-fluidic active matrix driving circuit 100 has high accuracy and stability.

Further, the charging module 10 includes a first transistor T1, a Gate of the first transistor T1 is electrically connected to the scan signal terminal Gate, a source of the first transistor T1 is electrically connected to the first node a, and a drain of the first transistor T1 is electrically connected to the Data signal terminal Data.

The driving module 20 includes a driving transistor T0, a gate of the driving transistor T0 is electrically connected to the first node a, a source of the driving transistor T0 is electrically connected to the second node B, and a drain of the driving transistor T0 is electrically connected to the power signal terminal VDD.

The first memory module 40 includes a first capacitor C1, one end of the first capacitor C1 is electrically connected to the power signal terminal VDD, and the other end of the first capacitor C1 is electrically connected to the second node B.

The second memory module 50 includes a second capacitor C2, one end of the second capacitor C2 is electrically connected to the power signal terminal VDD, and the other end of the second capacitor C2 is electrically connected to the first node a.

In this embodiment, the capacitance value of the second capacitor C2 is a preset value, where the magnitude of the preset value is not limited, and is selected according to the actual requirement. The reset module 30 includes a second transistor T2, a Gate of the second transistor T2 is electrically connected to the scan signal terminal Gate, a source of the second transistor T2 is electrically connected to the second node B, and a drain of the second transistor T2 is electrically connected to the Data signal terminal Data.

The types of the first transistor T1, the second transistor T2 and the driving transistor T0 are not limited herein, and are selected according to actual requirements.

The signal output terminal in the present application is electrically connected to the pixel electrode.

Further, the power signal VDD output from the power signal terminal VDD is at a high potential.

In this embodiment, the power signal terminal VDD is electrically connected to the high potential signal line.

The microfluidic active matrix driving circuit 100 includes an operation phase and a reset phase, and a driving timing of the operation phase sequentially includes a first phase and a second phase.

In the first stage, the scan signal Gate outputted from the scan signal Gate is at a high potential, the Data signal Data outputted from the Data signal Data is at a high potential, and the charging module 10, the driving module 20 and the reset module 30 are turned on, so that the signal output terminal is written with the high potential.

In the second stage, the scan signal Gate outputted from the scan signal Gate is at a low potential, the charging module 10 and the reset module 30 are turned off, and the driving module 20 is kept turned on, so that the signal output terminal is continuously written with a high potential.

In the reset phase, the scan signal Gate output by the scan signal Gate is at a high potential, the Data signal Data output by the Data signal Data is at a low potential, the charging module 10 and the reset module 30 are turned on, and the driving module 20 is turned off, so that the signal output terminal is written with the low potential.

In the first stage, the scan signal Gate output by the scan signal Gate is at a high potential, the Data signal Data output by the Data signal Data is at a high potential, the first transistor T1 and the second transistor T2, and the Data signal Data is written into the second node B through the second transistor T2 to pull up the potential of the second node B; meanwhile, the Data signal Data is written into the first node a through the charging module 10 to pull up the potential of the first node a to a high potential, thereby turning on the driving transistor T0 and charging the second capacitor C2. The power signal VDD is written into the second node B through the driving transistor T0 to further pull up the potential of the second node B, so as to accelerate the charging of the signal output terminal, thereby enabling the microfluidic active matrix driving circuit 100 to have a higher response speed.

In the second stage, the scan signal Gate output by the scan signal terminal Gate is at a low potential, the first transistor T1 and the second transistor T2 are turned off, and the potential of the first node a remains at a high potential due to the storage effect of the second capacitor C2, so that the driving transistor T0 may remain on, and the power signal VDD may still be written into the second node B via the driving transistor T0, so that the signal output terminal may continue to maintain at a high potential.

In the reset phase, the scan signal Gate outputted from the scan signal Gate is at a high potential, the Data signal Data outputted from the Data signal terminal Data is at a low potential, the first transistor T1 and the second transistor T2 are turned on, and the Data signal Data is written into the second node B through the second transistor T2, so that the signal output terminal is written into the low potential. The Data signal Data is written into the first node a through the first transistor T1 to pull the potential of the first node a low to turn off the driving transistor T0.

Referring to fig. 3, fig. 3 is a potential diagram of a first node and a second node in the microfluidic active matrix driving circuit provided by the present application.

In a specific embodiment, when the potential of the power signal VDD output by the power signal terminal VDD is 30V, the potential of the Data signal Data output by the Data signal terminal Data is 35V, the potential of the scan signal Gate output by the scan signal terminal Gate is 40V, and the frequency is set to 60 hz, it is obtained that in the first stage, both the first transistor T1 and the second transistor T2 are turned on, so that both the Data signal Data and the power signal VDD can be written into the second node B, and the second node B can reach the target voltage (i.e., the voltage of the signal output terminal reaches the target voltage) in the first stage of one frame in the 60 hz charging time, so that the microfluidic active matrix driving circuit 100 has a higher response speed. The Data signal Data is written into the first node a through the first transistor T1 to pull the potential of the first node a high to a high potential, and the potential of the first node a is higher than the potential of the second node B. In the second stage, due to the storage effect of the second capacitor C2, the second capacitor C2 charges the first node a, and in this stage, the potential of the first node a gradually decreases but is still higher than the threshold voltage of the driving transistor T0, so that the driving transistor T0 is kept on, the power signal VDD can be written into the second node B via the driving transistor T0, so that the second node B can still maintain the target voltage (i.e. the voltage of the signal output terminal is still maintained as the target voltage), so that the microfluidic active matrix driving circuit 100 has higher accuracy and stability.

It should be appreciated that when a higher frequency is desired, the capacitance of the second capacitor C2 may be designed according to the frequency (e.g., the capacitance of the second capacitor C2 is reduced) to increase the charging and discharging speeds of the second node B.

In this embodiment, the control end of the reset module 30 and the control end of the charging module 10 are connected to the same scan signal end Gate, and the input end of the reset module 30 and the input end of the charging module 10 are connected to the same Data signal end Data, so that in the first stage, the reset module 30 can raise the potential of the second node B, thereby realizing rapid charging of the signal output end, and further enabling the microfluidic active matrix driving circuit 100 to have a higher response speed; next, the first memory module 40 is disposed between the power signal terminal VDD and the second node B to maintain the potential of the second node B, so that the micro-fluidic active matrix driving circuit 100 has high accuracy and stability.

Referring to fig. 2 and fig. 4, fig. 4 is a schematic structural diagram of a second embodiment of a microfluidic active matrix driving circuit according to the present application.

The second embodiment of the microfluidic active matrix driving circuit 100 provided by the present application is basically the same as the first embodiment of the microfluidic active matrix driving circuit 100 provided by the present application in that: the reset module 30 includes a second transistor T2 and a third transistor T3.

In this embodiment, the reset module 30 includes a second transistor T2 and a third transistor T3, wherein a Gate of the second transistor T2 is electrically connected to the scan signal terminal Gate, a source of the second transistor T2 is electrically connected to a drain of the third transistor T3, and a drain of the second transistor T2 is electrically connected to the Data signal terminal Data. The Gate of the third transistor T3 is electrically connected to the scan signal terminal Gate, and the source of the third transistor T3 is electrically connected to the second node B.

In the present embodiment, the second transistor T2 and the third transistor T3 are the same type.

Compared with the first embodiment of the microfluidic active matrix driving circuit 100 provided by the present application, the present embodiment also can make the microfluidic active matrix driving circuit 100 have a higher response speed, and in this embodiment, the reset module 30 is further provided with a third transistor T3, so that the leakage of the potential of the second node B is reduced, thereby better maintaining the potential of the signal output end, and further improving the accuracy and stability of the microfluidic active matrix driving circuit 100.

Referring to fig. 2 and fig. 5, fig. 5 is a schematic structural diagram of a third embodiment of a microfluidic active matrix driving circuit according to the present application.

The third embodiment of the microfluidic active matrix driving circuit 100 provided by the present application is basically the same as the first embodiment of the microfluidic active matrix driving circuit 100 provided by the present application in that: the microfluidic active matrix drive circuit 100 further comprises a third memory module 60.

In this embodiment, the microfluidic active matrix driving circuit 100 further includes a third memory module 60, one end of the third memory module 60 is connected to the same scan signal terminal Gate with the control terminal of the charging module 10, and the other end of the third memory module 60 is electrically connected to the first node a.

Specifically, the third storage module 60 includes a third capacitor C3, one end of the third capacitor C3 is electrically connected to the scan signal terminal Gate, and the other end of the third capacitor C3 is electrically connected to the first node a. The third memory module 60 of the present embodiment can accelerate the charging speed of the first node a and effectively reduce the leakage current of the driving transistor T0.

Further, the sum of the capacitance value of the second capacitor C2 and the capacitance value of the third capacitor C3 is a preset value, and the capacitance value of the third capacitor C3 is smaller than the capacitance value of the second capacitor C2. It can be understood that the sum of the capacitance value of the second capacitor C2 and the capacitance value of the third capacitor C3 in the present embodiment is equal to the capacitance value of the second capacitor C2 in the first embodiment, and is a preset value, so as to ensure that the charging rate of the first node a is consistent. Specifically, in fig. 5 and fig. 6, the sum of the capacitance value of the second capacitor C2 and the capacitance value of the third capacitor C3 is equal to the capacitance value of the second capacitor C2 in fig. 4, so that the storage capacitance of the first node a is unchanged, and the charging rate of the first node a is ensured to be consistent. Meanwhile, the decrease of the charging rate of the first node a due to the addition of the third capacitor C3 in the present embodiment is avoided.

The purpose of introducing the third capacitor C3 in this embodiment is to enable the first node a and the Gate of the scanning signal end to generate a coupling effect, so that in the first stage, the potential of the first node a can be quickly pulled up by coupling, the opening speed of the driving transistor T0 is faster, and the charging rate of the second node B is further improved; after the second capacitor C2 is discharged, due to the coupling effect of the third capacitor C3, the potential of the first node a can be coupled lower, so that the turn-off effect of the driving transistor T0 is better, the leakage of the driving transistor T0 is reduced, and the drift of the potential of the second node B in the reset stage is further reduced.

It should be understood that the capacitance value of the third capacitor C3 in the present application is much smaller than that of the second capacitor C2, so that only the first node a and the scan signal terminal Gate can be coupled to generate a certain coupling amount.

The turn-off effect of the driving transistor T0 also depends on the ratio of the capacitance value of the third capacitor C3 to the preset value, and the larger the ratio is, the higher the coupling effect between the first node a and the Gate of the scan signal terminal is, and the better the turn-off effect of the driving transistor T0 is in the second stage. It should be understood that the capacitance of the third capacitor C3 is not required to be too large, and only the required coupling amount is required to be obtained, so as to avoid that the potential of the first node a is suddenly coupled and pulled low in the first stage, which affects the turn-on of the driving transistor T0. The specific values of the capacitance value of the first capacitor C1, the capacitance value of the second capacitor C2, and the capacitance value of the third capacitor C3 are not limited, and are selected according to actual requirements.

Specifically, in the first stage, the scan signal Gate output by the scan signal Gate is at a high potential, the Data signal Data output by the Data signal Data is at a high potential, the first transistor T1 and the second transistor T2 are turned on, and the Data signal Data is written into the second node B through the second transistor T2 to pull up the potential of the second node B; meanwhile, the Data signal Data is written into the first node a through the charging module 10 to pull up the potential of the first node a to a high potential, thereby turning on the driving transistor T0 and charging the second capacitor C2. Due to the third capacitor C3, the potential of the first node a can be quickly raised by the rising edge of the scan signal Gate, so that the driving transistor T0 can be turned on quickly. The power signal VDD is written into the second node B through the driving transistor T0 to further pull up the potential of the second node B, so as to accelerate the charging of the signal output terminal, thereby enabling the microfluidic active matrix driving circuit 100 to have a higher response speed.

In the second stage, the scan signal Gate output by the scan signal terminal Gate is at a low potential, the first transistor T1 and the second transistor T2 are turned off, and the potential of the first node a is pulled down but still remains at a high potential due to the coupling action of the third capacitor C3 and the storage action of the second capacitor C2, so that the driving transistor T0 can be kept on, and the power signal VDD can still be written into the second node B via the driving transistor T0, so that the signal output terminal can continue to maintain at a high potential.

In the reset phase, the scan signal Gate outputted from the scan signal Gate is at a high potential, the Data signal Data outputted from the Data signal terminal Data is at a low potential, the first transistor T1 and the second transistor T2 are turned on, and the Data signal Data is written into the second node B through the second transistor T2, so that the signal output terminal is written into the low potential. The Data signal Data is written into the first node a through the first transistor T1 to pull the potential of the first node a low to turn off the driving transistor T0. Due to the coupling effect of the third capacitor C3, the scanning signal Gate of the second stage couples the potential of the first node a lower, the driving transistor T0 is turned off better, the leakage current of the driving transistor T0 is effectively reduced, and then the drift of the low potential of the second node B is reduced, so that the low potential maintaining effect of the signal output end of the reset stage is better.

In the embodiment, the microfluidic active matrix driving circuit 100 has a higher response speed, and compared with the first embodiment of the microfluidic active matrix driving circuit 100 provided by the application, the potential of the first node a can be accelerated to be raised to a high potential in the first stage due to the arrangement of the third capacitor C3, so that the charging of the signal output end is accelerated, and the microfluidic active matrix driving circuit 100 has a higher response speed. Secondly, after the discharging of the second capacitor C2 is finished, due to the coupling effect of the third capacitor C3, the potential of the first node a can be coupled by the scan signal Gate of the second stage to be lower, so that the turn-off effect of the driving transistor T0 is better, the electric leakage of the driving transistor T0 is reduced, and further, the drift of the potential of the second node B in the reset stage is reduced, so that the low potential maintaining effect of the signal output end is better, that is, the microfluidic active matrix driving circuit 100 has better accuracy and stability.

Referring to fig. 2 and fig. 6, fig. 6 is a schematic structural diagram of a fourth embodiment of a microfluidic active matrix driving circuit according to the present application.

The fourth embodiment of the microfluidic active matrix driving circuit 100 provided by the present application is basically the same as the second embodiment of the microfluidic active matrix driving circuit 100 provided by the present application in that: the microfluidic active matrix drive circuit 100 further comprises a third memory module 60.

In this embodiment, the microfluidic active matrix driving circuit 100 further includes a third memory module 60, one end of the third memory module 60 is connected to the same scan signal terminal Gate with the control terminal of the charging module 10, and the other end of the third memory module 60 is electrically connected to the first node a.

Specifically, the third storage module 60 includes a third capacitor C3, one end of the third capacitor C3 is electrically connected to the scan signal terminal Gate, and the other end of the third capacitor C3 is electrically connected to the first node a. The third memory module 60 of the present embodiment can accelerate the charging speed of the first node a and effectively reduce the leakage current of the driving transistor T0. The sum of the capacitance value of the second capacitor C2 and the capacitance value of the third capacitor C3 is a preset value, and the capacitance value of the third capacitor C3 is smaller than the capacitance value of the second capacitor C2, and the introduction effect of the third capacitor C3 is the same as that of the above embodiment, which is not repeated herein, please refer to the above description.

The working phase and the resetting phase of the second embodiment of the microfluidic active matrix driving circuit 100 according to the present application are substantially identical, and are not described herein again, please refer to the above description.

The present embodiment can also make the microfluidic active matrix driving circuit 100 have a higher response speed. Compared with the second embodiment of the microfluidic active matrix driving circuit 100 provided by the application, the accuracy and stability of the microfluidic active matrix driving circuit 100 can be further improved.

Referring to fig. 7, fig. 7 is a schematic structural diagram of an embodiment of a microfluidic device according to the present application.

The present application provides a microfluidic device 200. The microfluidic device 200 includes the microfluidic active matrix drive circuit described above.

Specifically, the microfluidic device 200 includes a first substrate 210 and a second substrate 220 disposed opposite to each other, and a channel 230 accommodating one or more droplets is formed between the first substrate 210 and the second substrate 220.

The first substrate 210 includes a first substrate 211, a common electrode 212, and a first hydrophobic layer 213, which are sequentially stacked toward the second substrate 220.

The second substrate 220 includes a second substrate 221, a driving circuit layer 222, a pixel electrode 223, an insulating layer 224, and a second hydrophobic layer 225, which are sequentially stacked toward the first substrate 210. The insulating layer 224 covers the pixel electrode 223. The driving circuit layer 222 includes a plurality of microfluidic active matrix driving circuits arranged in an array. The pixel electrodes 223 are arranged in one-to-one correspondence with the microfluidic active matrix driving circuits.

The channels 230 are located between the first hydrophobic layer 213 and the second hydrophobic layer 225.

The microfluidic device 200 controls the droplet to enter the channel 230 and drives the pixel electrode 223 to realize the generation, transfer, mixing and splitting of the droplet, and performs accurate and stable control on the droplet, wherein the failure rate of droplet control is low and the control efficiency is higher.

It can be understood that the microfluidic active matrix driving circuit of the present application can significantly improve the driving capability of the pixel electrode 223, and accurately and stably control the droplet through the pixel electrode 223, and has the advantages of simple operation, reduced failure rate of droplet control, and improved control precision.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The foregoing is only the embodiments of the present application, and therefore, the patent protection scope of the present application is not limited thereto, and all equivalent structures or equivalent flow changes made by the content of the present specification and the accompanying drawings, or direct or indirect application in other related technical fields, are included in the patent protection scope of the present application.

Claims (10)

1. A microfluidic active matrix drive circuit for driving pixel electrodes in an active matrix, comprising:

The control end of the charging module is electrically connected with the scanning signal end, the input end of the charging module is electrically connected with the data signal end, and the output end of the charging module is electrically connected with the first node;

The control end of the driving module is electrically connected with the first node, the input end of the driving module is electrically connected with the power signal end, and the output end of the driving module is electrically connected with the signal output end of the microfluidic active matrix driving circuit through the second node;

The control end of the reset module is connected with the same scanning signal end with the control end of the charging module, the input end of the reset module is connected with the same data signal end with the input end of the charging module, and the output end of the reset module is electrically connected with the second node;

One end of the first storage module is electrically connected with the power signal end, and the other end of the first storage module is electrically connected with the second node;

And one end of the second storage module is electrically connected with the power signal end, and the other end of the second storage module is electrically connected with the first node.

2. The microfluidic active matrix drive circuit of claim 1, wherein the charging module comprises a first transistor, a gate of the first transistor is electrically connected to the scan signal terminal, a source of the first transistor is electrically connected to the first node, and a drain of the first transistor is electrically connected to the data signal terminal;

The driving module comprises a driving transistor, wherein the grid electrode of the driving transistor is electrically connected with the first node, the source electrode of the driving transistor is electrically connected with the second node, and the drain electrode of the driving transistor is electrically connected with the power signal end;

The first storage module comprises a first capacitor, one end of the first capacitor is electrically connected with the power signal end, and the other end of the first capacitor is electrically connected with the second node;

the second storage module comprises a second capacitor, one end of the second capacitor is electrically connected with the power signal end, and the other end of the second capacitor is electrically connected with the first node.

3. The microfluidic active matrix drive circuit of claim 2, wherein the reset module comprises a second transistor, a gate of the second transistor is electrically connected to the scan signal terminal, a source of the second transistor is electrically connected to the second node, and a drain of the second transistor is electrically connected to the data signal terminal.

4. The microfluidic active matrix drive circuit of claim 2, wherein the reset module comprises a second transistor and a third transistor, wherein a gate of the second transistor is electrically connected to the scan signal terminal, a source of the second transistor is electrically connected to a drain of the third transistor, and a drain of the second transistor is electrically connected to the data signal terminal; the grid electrode of the third transistor is electrically connected with the scanning signal end, and the source electrode of the third transistor is electrically connected with the second node.

5. The microfluidic active matrix drive circuit of claim 4, wherein the second capacitance is a preset value.

6. The microfluidic active matrix driving circuit of claim 3 or 4, further comprising a third memory module, wherein one end of the third memory module is connected to the same scanning signal end as the control end of the charging module, and the other end of the third memory module is electrically connected to the first node.

7. The microfluidic active matrix drive circuit of claim 6, wherein the third memory module comprises a third capacitor, one end of the third capacitor is electrically connected to the scan signal terminal, and the other end of the third capacitor is electrically connected to the first node;

The sum of the capacitance value of the second capacitor and the capacitance value of the third capacitor is a preset value, and the capacitance value of the third capacitor is smaller than the capacitance value of the second capacitor.

8. The microfluidic active matrix driving circuit according to claim 1, wherein the power signal output from the power signal terminal is at a high potential; the microfluidic active matrix driving circuit comprises a working phase and a resetting phase, and the driving time sequence of the working phase sequentially comprises a first phase and a second phase;

In the first stage, the scanning signal output by the scanning signal end is at a high potential, the data signal output by the data signal end is at a high potential, and the charging module, the driving module and the resetting module are started so that the signal output end is written with the high potential;

In the second stage, the scanning signal output by the scanning signal end is at a low potential, the charging module and the resetting module are closed, and the driving module is kept open, so that the signal output end is continuously written with a high potential;

in the reset stage, the scanning signal output by the scanning signal end is at a high potential, the data signal output by the data signal end is at a low potential, the charging module and the reset module are turned on, and the driving module is turned off, so that the signal output end is written with the low potential.

9. A microfluidic device comprising a microfluidic active matrix drive circuit according to any one of claims 1 to 8.

10. The microfluidic device of claim 9, wherein the microfluidic device comprises: a first substrate and a second substrate disposed opposite to each other, and a channel for accommodating one or more droplets is formed between the first substrate and the second substrate;

The first substrate comprises a first substrate, a common electrode and a first hydrophobic layer which are sequentially stacked towards the second substrate;

The second substrate comprises a second substrate, a driving circuit layer, a pixel electrode, an insulating layer and a second hydrophobic layer which are sequentially stacked towards the first substrate; the driving circuit layer comprises a plurality of microfluidic active matrix driving circuits which are arranged in an array manner;

The channel is located between the first hydrophobic layer and the second hydrophobic layer.