CN118152717A - Signal conversion method based on multifunctional sine interpolation structure - Google Patents

Abstract

The embodiment of the disclosure provides a signal transformation method based on a multifunctional sine interpolation structure; the method is applied to the field of signal processing. The method comprises the steps that a bus configuration unit carries out static configuration on a control unit to determine the working mode of the control unit; the working mode comprises resampling extraction and interpolation; the control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer; the control unit starts counting when a first initial sampling point is input, the count value of the timer is increased from increment according to extraction/interpolation, and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit; the sine operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients. In this way, resampling and Keystone transformation can be performed for the ASIC and the SoC chip, the computing power can be improved along with the improvement of the technological level and the design level of the ASIC and the SoC chip, and the method has the advantages of low complexity and high precision.

Description

Signal conversion method based on multifunctional sine interpolation structure

Technical Field

The disclosure relates to the field of signal processing, and in particular relates to a signal transformation method based on a multifunctional sine interpolation structure.

Background

In the field of radar and communication, signal transformation operations such as resampling, keystone transformation and the like are often required for radar echo signals and communication signals. The existing signal conversion operation processing platforms are an FPGA and a DSP, and although the signal processing method based on the FPGA can realize a high-degree software definition function, the FPGA has a plurality of defects in the aspects of time sequence convergence design, power consumption reduction and the like for the conditions of large-scale signal processing and higher requirements on signal processing capacity; although the signal processing method based on the DSP has stronger signal processing capability, the DSP as a serial signal processor cannot operate on an intensive algorithm, so that the application range of the method is limited.

The ASIC chip can operate the intensive algorithm, so that the optimal computing capacity and the optimal computing efficiency are realized, and the method is more suitable for mass production; the SoC chip can process signals with higher frequency, has larger integration scale, can generally reach millions to tens of millions, can process large-scale signals, is more flexible to apply, can be integrated with a plurality of special peripheral chips, and expands the application range. However, the ASIC chip and the SoC chip cannot be programmed after curing, and the functions of the chips are fixed. Therefore, it is particularly important to study a multifunctional signal processing method based on an ASIC and an SoC chip.

Disclosure of Invention

The disclosure provides a signal conversion method, device, equipment and storage medium based on a multifunctional sine interpolation structure.

According to a first aspect of the present disclosure, a signal transformation method based on a multifunctional octal interpolation structure is provided. The method comprises the following steps:

the bus configuration unit performs static configuration on the control unit and determines the working mode of the control unit; the working mode comprises resampling extraction and interpolation;

The control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer;

the control unit starts counting when a first initial sampling point is input, the count value of the timer is increased from increment according to extraction/interpolation, and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit;

The sine operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register.

In some implementations of the first aspect, the count value of the timer is incremented from increment according to decimation/interpolation, and the sampling point corresponding to the incremented count value and the corresponding decimation/interpolation coefficient are output to the sing operation unit, including:

When the count value of the timer is increased according to the extraction/interpolation self-increment, when the count value is increased to a count threshold, the timer re-counts, the count value increased when the count value is increased to the count threshold is accumulated with the count value obtained by re-counting, and when the accumulated quantity reaches the extraction/interpolation self-increment, the control unit outputs a sampling point corresponding to the count value obtained by re-counting and an extraction/interpolation coefficient corresponding to the sampling point to the sine operation unit; the extraction/interpolation coefficient corresponding to the sampling point is obtained according to the counting value obtained by recounting.

In some implementations of the first aspect, the operating mode further includes Keystone transform extraction and interpolation;

the control unit waits for sampling points/waiting number of sampling points according to the working mode and the input initial sampling point setting coefficient;

The control unit performs Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, performs Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and the corresponding extraction/interpolation coefficients to the sine operation unit;

The sine operation unit also performs corresponding extraction/interpolation operation on the sampling points after extraction/interpolation of Keystone transformation and the corresponding extraction/interpolation coefficients through the shift register.

In some implementations of the first aspect, the control unit performs Keystone transform decimation on the initial sample point according to the coefficient wait sample point and the resampling decimation method, including:

the control unit moves the initial sampling points to the shift register one by one;

When no coefficient waiting sampling point moves to the shift register or all initial sampling points finish resampling extraction, taking the difference of the count value of the current timer minus the count threshold value as a new count value, increasing the new count value according to the extraction self increment, and carrying out resampling extraction on the sampling points in the shift register by the control unit and outputting the resampled extracted sampling points;

When the coefficient waits for the sampling point to move to the shift register and the initial sampling point does not completely finish resampling extraction, increasing the current count value according to the extraction self-increment, resampling and extracting the sampling point in the shift register by the control unit, outputting the resampled and extracted sampling point, and moving the next initial sampling point in the control unit to the shift register; resampling and extracting each output sampling point, and adding 1 to the value of an output counter;

and repeating the conditions that the judgment coefficient waits for the sampling points to move to the shift register and all the initial sampling points to finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

In some implementations of the first aspect, when no coefficient waiting sampling point moves to the shift register or all initial sampling points have completed resampling extraction, the control unit performs resampling extraction on the sampling points in the shift register and outputs the resampled extracted sampling points, and then includes:

If the value of the output counter is not equal to the number of the initial sampling points, repeating the judgment of the coefficient to wait for the sampling points to move to the shift register and the condition that all the initial sampling points finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

In some implementations of the first aspect, performing Keystone transform interpolation on the initial sample point according to the sample point wait number and the resampling interpolation method includes:

The control unit moves the initial sampling points one by one into the shift register and performs validity check on the number of the sampling points according to the waiting number of the sampling points;

After the validity of the number of the sampling points is checked, if the current count value of the timer is smaller than or equal to the count threshold, the control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and the value of the output counter of each sampling point output by the resampling interpolation is increased by 1;

If the current count value of the timer is larger than the count threshold, taking the difference of the current count value minus the count threshold as a new count value so that the timer continues counting according to the new count value and moving the next initial sampling point in the control unit into the shift register, and repeating the validity check of the number of sampling points until the validity check of the number of sampling points passes.

In some implementations of the first aspect, the sample number validity check includes:

If the number of sampling points in the shift register is the same as the waiting number of the sampling points, the validity check of the number of the sampling points is passed;

The control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and then comprises the following steps:

If the value of the output counter is smaller than the number of the initial sampling points, outputting the sampling points after resampling and interpolation and adding 1 to the value of the output counter;

and repeatedly comparing the current count value with the count threshold until the value of the output counter is greater than or equal to the number of the initial sampling points.

In some implementations of the first aspect, the performing, by the sing operation unit, a corresponding decimation/interpolation operation on the sampling points and corresponding decimation/interpolation coefficients by the shift register includes:

The sine operation unit multiplies the sampled/interpolated sampling points and the corresponding sampled/interpolated coefficients which are input into the shift register, adds up the multiplication results corresponding to the sampled sampling points to obtain the corresponding extraction operation results, and adds up the multiplication results corresponding to the interpolated sampling points to obtain the corresponding interpolation operation results.

According to a second aspect of the present disclosure, a signal conversion device based on a multifunctional octave interpolation structure is provided. The device comprises:

The bus configuration unit is used for carrying out static configuration on the control unit and determining the working mode of the control unit; the working mode comprises resampling extraction and interpolation;

The control unit is used for calculating the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer; the sampling point and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit;

And the sine operation unit is used for carrying out corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register.

According to a third aspect of the present disclosure, an electronic device is provided. The electronic device includes: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method as described above.

According to a fourth aspect of the present disclosure, there is provided a non-transitory computer readable storage medium storing computer instructions for causing a computer to perform the method as described above.

In the present disclosure, a bus configuration unit performs static configuration on a control unit, and determines a working mode of the control unit, where the working mode includes resampling extraction and interpolation, keystone transformation extraction and interpolation; when resampling extraction and interpolation are carried out, the control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer, the control unit starts counting when the first initial sampling point is input, the count value of the timer is increased according to the extraction/interpolation self-increment, the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit, and the operation is repeated until all the initial sampling points complete the extraction/interpolation; the sine operation unit performs corresponding resampling extraction/interpolation operation on the received sampling points and the corresponding resampling extraction/interpolation coefficients through the shift register; when Keystone conversion extraction/interpolation is carried out, the control unit sets coefficient waiting sampling points/sampling point waiting quantity according to the working mode and the input initial sampling points, carries out Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, carries out Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and corresponding extraction/interpolation coefficients to the Xingge operation unit; and the sine operation unit performs corresponding Keystone conversion extraction/interpolation operation on the received sampling points and the corresponding Keystone conversion extraction/interpolation coefficients through the shift register. In this way, resampling and Keystone transformation can be performed for the ASIC and the SoC chips, multiple signal transformation methods can be defined as much as possible before chip layout solidification, calculation power can be continuously improved along with improvement of the technological level and the design level of the ASIC and the SoC chips, and the method has the advantages of low complexity and high precision.

It should be understood that what is described in this summary is not intended to limit the critical or essential features of the embodiments of the disclosure nor to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. For a better understanding of the present disclosure, and without limiting the disclosure thereto, the same or similar reference numerals denote the same or similar elements, wherein:

fig. 1 shows a flowchart of a signal transformation method based on a multifunctional singer interpolation structure according to an embodiment of the present disclosure;

FIG. 2 illustrates a flow chart of a resampling extraction/interpolation method provided by an embodiment of the present disclosure;

Fig. 3 shows a flowchart of a Keystone transformation extraction method provided by an embodiment of the present disclosure;

fig. 4 shows a flowchart of a Keystone transformation interpolation method provided by an embodiment of the present disclosure;

Fig. 5 shows a block diagram of a signal conversion device based on a multifunctional sine interpolation structure according to an embodiment of the present disclosure;

fig. 6 illustrates a block diagram of an exemplary electronic device capable of implementing embodiments of the present disclosure.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments in this disclosure without inventive faculty, are intended to be within the scope of this disclosure.

In addition, the term "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

Aiming at the problems in the background technology, the embodiment of the disclosure provides a signal conversion method and device based on a multifunctional sine interpolation structure. Specifically, the bus configuration unit performs static configuration on the control unit, and determines the working mode of the control unit, wherein the working mode comprises resampling extraction and interpolation, keystone transformation extraction and interpolation; when resampling extraction and interpolation are carried out, the control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer, the control unit starts counting when the first initial sampling point is input, the count value of the timer is increased according to the extraction/interpolation self-increment, the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit, and the operation is repeated until all the initial sampling points complete the extraction/interpolation; the sine operation unit performs corresponding resampling extraction/interpolation operation on the received sampling points and the corresponding resampling extraction/interpolation coefficients through the shift register; when Keystone conversion extraction/interpolation is carried out, the control unit sets coefficient waiting sampling points/sampling point waiting quantity according to the working mode and the input initial sampling points, carries out Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, carries out Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and corresponding extraction/interpolation coefficients to the Xingge operation unit; and the sine operation unit performs corresponding Keystone conversion extraction/interpolation operation on the received sampling points and the corresponding Keystone conversion extraction/interpolation coefficients through the shift register. In this way, resampling and Keystone transformation can be performed for the ASIC and the SoC chips, multiple signal transformation methods can be defined as much as possible before chip layout solidification, calculation power can be continuously improved along with improvement of the technological level and the design level of the ASIC and the SoC chips, and the method has the advantages of low complexity and high precision.

The signal conversion method and device based on the multifunctional sine interpolation structure provided by the embodiment of the disclosure are described in detail below through specific embodiments with reference to the accompanying drawings.

Fig. 1 shows a flowchart of a signal transformation method based on a multifunctional singer interpolation structure according to an embodiment of the disclosure, where the method 100 includes the following steps:

s110, the bus configuration unit performs static configuration on the control unit and determines the working mode of the control unit; the modes of operation include resampling decimation and interpolation.

In some embodiments, the bus configuration unit is an important medium for interaction between the main control unit such as a CPU and a DSP and the sine operation unit and the control unit;

Specifically, the bus configuration unit performs static configuration on the control unit through the AXL-Lite bus according to the setting of the main control unit, and determines the working mode of the control unit; the bus configuration unit reports the operation result output by the sine operation unit to the main control unit through the AXI bus.

In some embodiments, the modes of operation further include Keystone transform extraction and interpolation.

S120, the control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer.

In some embodiments, when the working mode is resampling and extracting, the control unit calculates the self-increment of the timer according to the resampling and extracting proportion and the bit number of the timer; when the working mode is resampling interpolation, the control unit calculates interpolation self-increment of the timer according to the resampling interpolation proportion and the bit number of the timer; for example, the timer has a bit number of 16, a decimation ratio of 4/5, and an interpolation ratio of 5/4, then the extraction is from the incrementInterpolation self-increment

S130, the control unit starts counting when the first initial sampling point is input, the count value of the timer is increased from increment according to extraction/interpolation, and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit.

In some embodiments, the count value of the timer is increased from increment according to the decimation/interpolation, and the sampling point corresponding to the increased count value and the corresponding decimation/interpolation coefficient are output to the singer operation unit, including:

When resampling extraction is performed (as in the first flow shown in fig. 2), when the count value of the timer increases according to the self-increment of extraction, when the count value increases to the count threshold value, the timer re-counts, the count value increased when the count value increases to the count threshold value is accumulated with the count value obtained by re-counting, when the accumulated amount reaches the self-increment of extraction, the control unit outputs a sampling point corresponding to the count value obtained by re-counting and an extraction coefficient corresponding to the sampling point to the sine operation unit, and if the count value does not increase to the count threshold value, the timer continues to count; repeating the operation until all the initial sampling points are completely extracted; the extraction coefficients corresponding to the sampling points are obtained according to the count values obtained by re-counting;

when resampling interpolation is carried out (as shown in a second flow shown in fig. 2), when the count value of the timer is increased according to the interpolation self-increment, when the count value is increased to a count threshold value, the timer is used for re-counting, the count value increased when the count value is increased to the count threshold value is accumulated with the count value obtained by re-counting, when the accumulated quantity reaches the interpolation self-increment, the control unit outputs a sampling point corresponding to the count value obtained by re-counting and an interpolation coefficient corresponding to the sampling point to the sine operation unit, and if the count value is not increased to the count threshold value, the timer is used for continuing counting; repeating the operation until all the initial sampling points complete interpolation; the interpolation coefficient corresponding to the sampling point is obtained according to the count value obtained by re-counting;

For example, the number of bits of the timer is 16, the extraction ratio is 4/5, the interpolation ratio is 5/4, the self-increment is 81920, the self-increment is 52429, and the count threshold is 2 ¹⁶ (i.e., 65536);

When resampling extraction is carried out, the control unit starts counting when a first initial sampling point is input, the counting value of the timer overflows when the counting value of the timer is increased to 65536, at the moment, a second initial sampling point is input to the control unit, the timer recounts, when the counting value is 16384 (namely 81920 minus the difference of 65536), the control unit outputs the sampling point corresponding to the counting value of 16384 and the extraction coefficient corresponding to the sampling point to the Xinge operation unit, the timer continues counting, when the counting value reaches 65536, a third initial sampling point is input to the control unit, the timer recounts, when the counting value obtained by recount and the counting value increased when reaching 65536 are accumulated to 81920, the control unit outputs the sampling point corresponding to the recount counting value (namely 32768) and the extraction coefficient corresponding to the sampling point to the Xinge unit, and the operation is repeated until all the initial sampling points complete resampling extraction;

When the resampling interpolation is carried out, the control unit starts counting when a first initial sampling point is input, the count value of the timer is increased according to interpolation self-increment, when the count value is increased to 52429, the control unit outputs the sampling point corresponding to the count value and the interpolation coefficient corresponding to the sampling point to the sine operation unit, the timer continues counting, when the count value reaches a counting threshold value, the timer overflows, a second initial sampling point is input to the control unit, the timer re-counts, when the count value (13107) increased when the timer reaches the counting threshold value and the count value obtained by re-counting are added to 52429, the control unit outputs the sampling point corresponding to the re-counted count value (39322) and the interpolation coefficient corresponding to the sampling point to the sine operation unit, and the operation is repeated until all the initial sampling points complete the resampling interpolation;

Further, the control unit uses the high 8 bits of the timer to address according to the counted value obtained by re-counting, and obtains the extraction/interpolation coefficient corresponding to the counted value obtained by re-counting in the sine function pre-stored table.

In some embodiments, when Keystone transformation extraction/interpolation is performed, the control unit waits for sampling points/the waiting number of sampling points according to the working mode and the input initial sampling points setting coefficient;

The control unit performs Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, performs Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and the corresponding extraction/interpolation coefficients to the sine operation unit.

In some embodiments, the control unit performs Keystone transform extraction on the initial sampling point according to the coefficient wait sampling point and the resampling extraction method (as shown in the flowchart of fig. 3), including:

the control unit moves the initial sampling points to the shift register one by one;

When no coefficient waiting sampling point moves to the shift register or all initial sampling points finish resampling extraction, taking the difference of the count value of the current timer minus the count threshold value as a new count value, increasing the new count value according to the extraction self increment, and carrying out resampling extraction on the sampling points in the shift register by the control unit and outputting the resampled extracted sampling points;

When the coefficient waits for the sampling point to move to the shift register and the initial sampling point does not completely finish resampling extraction, increasing the current count value according to the extraction self-increment, resampling and extracting the sampling point in the shift register by the control unit, outputting the resampled and extracted sampling point, and moving the next initial sampling point in the control unit to the shift register; resampling and extracting each output sampling point, and adding 1 to the value of an output counter;

repeating the conditions that the judgment coefficient waits for the sampling points to move to the shift register and all the initial sampling points to finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points;

Further, when no coefficient waiting sampling point moves to the shift register or all initial sampling points have completed resampling extraction, the control unit performs resampling extraction on the sampling points in the shift register and outputs resampled extracted sampling points, and then includes:

If the value of the output counter is not equal to the number of the initial sampling points, repeating the judgment of the coefficient to wait for the sampling points to move to the shift register and the condition that all the initial sampling points finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

In some embodiments, keystone transform interpolation (such as the flowchart shown in FIG. 4) is performed on the initial sample points according to the sample point waiting number and the resampling interpolation method, including:

The control unit moves the initial sampling points one by one into the shift register and performs validity check on the number of the sampling points according to the waiting number of the sampling points;

After the validity of the number of the sampling points is checked, if the current count value of the timer is smaller than or equal to the count threshold, the control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and the value of the output counter of each sampling point output by the resampling interpolation is increased by 1;

If the current count value of the timer is larger than the count threshold, taking the difference of the count value of the current timer minus the count threshold as a new count value so that the timer continues counting according to the new count value and moving the next initial sampling point in the control unit into the shift register, and repeating the validity check of the number of the sampling points until the validity check of the number of the sampling points passes;

further, the validity check of the number of sampling points includes:

If the number of sampling points in the shift register is the same as the waiting number of the sampling points, the validity check of the number of the sampling points is passed;

The control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and then comprises the following steps:

If the value of the output counter is smaller than the number of the initial sampling points, outputting the sampling points after resampling and interpolation and adding 1 to the value of the output counter;

and repeatedly comparing the current count value with the count threshold until the value of the output counter is greater than or equal to the number of the initial sampling points.

S140, the sine operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register.

In some embodiments, the performing, by the sine operation unit, a corresponding decimation/interpolation operation on the sampling points and the corresponding decimation/interpolation coefficients by the shift register includes:

The sine operation unit multiplies the resampled sampling points input into the shift register by the corresponding extraction coefficients, and adds up the multiplication results corresponding to the sampling points obtained by the resampling extraction to obtain a resampling extraction operation result;

The sine operation unit multiplies the resampled and interpolated sampling points and the corresponding interpolation coefficients which are input into the shift register, and adds up the multiplication results corresponding to the sampling points obtained by the resampling and interpolation to obtain a resampling and interpolation operation result.

In some embodiments, the sine operation unit further performs corresponding extraction/interpolation operation on the sampling points after extraction/interpolation of the Keystone transformation and the corresponding extraction/interpolation coefficients through the shift register;

specifically, the sine operation unit multiplies the sampling points after the extraction of the Keystone transformation and the corresponding extraction coefficients, which are input into the shift register, and adds the multiplication results corresponding to the sampling points obtained by the Keystone transformation to obtain a Keystone transformation extraction operation result; the sine operation unit multiplies the sampling points after the interpolation of the Keystone transformation and the corresponding interpolation coefficients, which are input into the shift register, and adds the multiplication results corresponding to the sampling points obtained by the interpolation of the Keystone transformation to obtain the extraction operation result of the Keystone transformation.

According to the embodiment of the disclosure, the bus configuration unit performs static configuration on the control unit, and determines the working mode of the control unit, wherein the working mode comprises resampling extraction and interpolation, keystone transformation extraction and interpolation; when resampling extraction and interpolation are carried out, the control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer, the control unit starts counting when the first initial sampling point is input, the count value of the timer is increased according to the extraction/interpolation self-increment, the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit, and the operation is repeated until all the initial sampling points complete the extraction/interpolation; the sine operation unit performs corresponding resampling extraction/interpolation operation on the received sampling points and the corresponding resampling extraction/interpolation coefficients through the shift register; when Keystone conversion extraction/interpolation is carried out, the control unit sets coefficient waiting sampling points/sampling point waiting quantity according to the working mode and the input initial sampling points, carries out Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, carries out Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and corresponding extraction/interpolation coefficients to the Xingge operation unit; and the sine operation unit performs corresponding Keystone conversion extraction/interpolation operation on the received sampling points and the corresponding Keystone conversion extraction/interpolation coefficients through the shift register. In this way, resampling and Keystone transformation can be performed for the ASIC and the SoC chips, multiple signal transformation methods can be defined as much as possible before chip layout solidification, calculation power can be continuously improved along with improvement of the technological level and the design level of the ASIC and the SoC chips, and the method has the advantages of low complexity and high precision.

It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present disclosure is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present disclosure. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all alternative embodiments, and that the acts and modules referred to are not necessarily required by the present disclosure.

The foregoing is a description of embodiments of the method, and the following further describes embodiments of the present disclosure through examples of apparatus.

Fig. 2 shows a block diagram of a signal conversion device based on a multifunctional singer interpolation structure according to an embodiment of the present disclosure. The apparatus 200 comprises:

The bus configuration unit 210 is configured to perform static configuration on the control unit, and determine an operation mode of the control unit; the modes of operation include resampling decimation and interpolation.

In some embodiments, bus configuration unit 210 is specifically configured to:

the working mode also comprises Keystone transformation extraction and interpolation.

A control unit 220 for calculating the extraction/interpolation self-increment of the timer according to the extraction/interpolation ratio corresponding to the operation mode and the bit number of the timer; and the sampling point and the corresponding extraction/interpolation coefficient corresponding to the increased count value are output to the sine operation unit.

In some embodiments, the control unit 220 is specifically configured to:

The count value of the timer is increased from increment according to extraction/interpolation, and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit, comprising:

When the count value of the timer is increased according to the extraction/interpolation self-increment, when the count value is increased to a count threshold, the timer re-counts, the count value increased when the count value is increased to the count threshold is accumulated with the count value obtained by re-counting, and when the accumulated quantity reaches the extraction/interpolation self-increment, the control unit outputs a sampling point corresponding to the count value obtained by re-counting and an extraction/interpolation coefficient corresponding to the sampling point to the sine operation unit; the extraction/interpolation coefficient corresponding to the sampling point is obtained according to the counting value obtained by recounting.

In some embodiments, the control unit 220 is further configured to:

the control unit waits for sampling points/waiting number of sampling points according to the working mode and the input initial sampling point setting coefficient;

The control unit performs Keystone conversion extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, performs Keystone conversion interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone conversion extraction/interpolation and the corresponding extraction/interpolation coefficients to the sine operation unit.

In some embodiments, the control unit 220 is further configured to:

the control unit carries out Keystone transformation extraction on the initial sampling point according to the coefficient waiting sampling point and the resampling extraction method, and the method comprises the following steps:

the control unit moves the initial sampling points to the shift register one by one;

When no coefficient waiting sampling point moves to the shift register or all initial sampling points finish resampling extraction, taking the difference of the count value of the current timer minus the count threshold value as a new count value, increasing the new count value according to the extraction self increment, and carrying out resampling extraction on the sampling points in the shift register by the control unit and outputting the resampled extracted sampling points;

When the coefficient waits for the sampling point to move to the shift register and the initial sampling point does not completely finish resampling extraction, increasing the current count value according to the extraction self-increment, resampling and extracting the sampling point in the shift register by the control unit, outputting the resampled and extracted sampling point, and moving the next initial sampling point in the control unit to the shift register; resampling and extracting each output sampling point, and adding 1 to the value of an output counter;

and repeating the conditions that the judgment coefficient waits for the sampling points to move to the shift register and all the initial sampling points to finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

In some embodiments, the control unit 220 is further configured to:

When no coefficient waits for the sampling point to move to the shift register or all the initial sampling points have completed resampling extraction, the control unit performs resampling extraction on the sampling points in the shift register and outputs the resampled extracted sampling points, and then comprises:

If the value of the output counter is not equal to the number of the initial sampling points, repeating the judgment of the coefficient to wait for the sampling points to move to the shift register and the condition that all the initial sampling points finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

In some embodiments, the control unit 220 is further configured to:

Carrying out Keystone conversion interpolation on the initial sampling points according to the waiting number of the sampling points and a resampling interpolation method, wherein the Keystone conversion interpolation comprises the following steps:

The control unit moves the initial sampling points one by one into the shift register and performs validity check on the number of the sampling points according to the waiting number of the sampling points;

After the validity of the number of the sampling points is checked, if the current count value of the timer is smaller than or equal to the count threshold, the control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and the value of the output counter of each sampling point output by the resampling interpolation is increased by 1;

If the current count value of the timer is larger than the count threshold, taking the difference of the current count value minus the count threshold as a new count value so that the timer continues counting according to the new count value and moving the next initial sampling point in the control unit into the shift register, and repeating the validity check of the number of sampling points until the validity check of the number of sampling points passes.

In some embodiments, the control unit 220 is further configured to:

The validity check of the number of sampling points comprises the following steps:

If the number of sampling points in the shift register is the same as the waiting number of the sampling points, the validity check of the number of the sampling points is passed;

The control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and then comprises the following steps:

If the value of the output counter is smaller than the number of the initial sampling points, outputting the sampling points after resampling and interpolation and adding 1 to the value of the output counter;

and repeatedly comparing the current count value with the count threshold until the value of the output counter is greater than or equal to the number of the initial sampling points.

The sine operation unit 230 is configured to perform corresponding decimation/interpolation operations on the sampling points and the corresponding decimation/interpolation coefficients through the shift register.

In some embodiments, the sinc operation unit 230 is specifically configured to:

The sine operation unit also performs corresponding extraction/interpolation operation on the sampling points after extraction/interpolation of Keystone transformation and the corresponding extraction/interpolation coefficients through the shift register.

In some embodiments, the octave operation unit 230 is further configured to:

the sine operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register, and the method comprises the following steps:

The sine operation unit multiplies the sampled/interpolated sampling points and the corresponding sampled/interpolated coefficients which are input into the shift register, adds up the multiplication results corresponding to the sampled sampling points to obtain the corresponding extraction operation results, and adds up the multiplication results corresponding to the interpolated sampling points to obtain the corresponding interpolation operation results.

It can be appreciated that each module/unit in the detection apparatus 200 shown in fig. 5 has a function of implementing each step in the detection method 100 provided in the embodiment of the disclosure, and can achieve the corresponding technical effects, which are not described herein for brevity.

Fig. 6 illustrates a block diagram of an exemplary electronic device capable of implementing embodiments of the present disclosure. The electronic device 600 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device 600 may also represent various forms of mobile apparatuses, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing apparatuses. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the disclosure described and/or claimed herein.

As shown in fig. 6, the electronic device 600 includes a computing unit 601 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 602 or a computer program loaded from a storage unit 608 into a Random Access Memory (RAM) 603. In the RAM603, various programs and data required for the operation of the electronic device 600 can also be stored. The computing unit 601, ROM602, and RAM603 are connected to each other by a bus 604. An I/O interface 605 is also connected to bus 604.

A number of components in the electronic device 600 are connected to the I/O interface 605, including: an input unit 606 such as a keyboard, mouse, etc.; an output unit 607 such as various types of displays, speakers, and the like; a storage unit 608, such as a magnetic disk, optical disk, or the like; and a communication unit 609 such as a network card, modem, wireless communication transceiver, etc. The communication unit 609 allows the electronic device 600 to exchange information/data with other devices through a computer network, such as the internet, and/or various telecommunication networks.

The computing unit 601 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 601 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 601 performs the various methods and processes described above, such as method 100. For example, in some embodiments, the method 100 may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 608. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 600 via the ROM602 and/or the communication unit 609. One or more of the steps of the method 100 described above may be performed when a computer program is loaded into the RAM603 and executed by the computing unit 601. Alternatively, in other embodiments, the computing unit 601 may be configured to perform the method 100 by any other suitable means (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems-on-chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

It should be noted that the present disclosure further provides a non-transitory computer readable storage medium storing computer instructions, where the computer instructions are configured to cause a computer to perform the method 100 and achieve corresponding technical effects achieved by performing the method according to the embodiments of the present disclosure, which are not described herein for brevity.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: display means for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.

The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel, sequentially, or in a different order, provided that the desired results of the disclosed aspects are achieved, and are not limited herein.

The above detailed description should not be taken as limiting the scope of the present disclosure. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present disclosure are intended to be included within the scope of the present disclosure.

Claims (10)

1. A signal transformation method based on a multifunctional sine interpolation structure is characterized by comprising the following steps:

The bus configuration unit performs static configuration on the control unit and determines the working mode of the control unit; the working mode comprises resampling extraction and interpolation;

The control unit calculates the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer;

the control unit starts counting when a first initial sampling point is input, the count value of the timer is increased from increment according to extraction/interpolation, and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit;

and the sine operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register.

2. The method according to claim 1, wherein the counting value of the timer is incremented from increment according to the decimating/interpolating, and the sampling point corresponding to the incremented counting value and the corresponding decimating/interpolating coefficient are output to the sing operation unit, comprising:

when the count value of the timer is increased according to the extraction/interpolation self-increment, when the count value is increased to a count threshold, the timer re-counts, the count value increased when the count value is increased to the count threshold is accumulated with the count value obtained by re-counting, and when the accumulated quantity reaches the extraction/interpolation self-increment, the control unit outputs a sampling point corresponding to the count value obtained by re-counting and an extraction/interpolation coefficient corresponding to the sampling point to the sine operation unit; and the extraction/interpolation coefficient corresponding to the sampling point is obtained according to the counting value obtained by re-counting.

3. The method of claim 1, wherein the operating modes further comprise Keystone transformation extraction and interpolation;

the control unit waits for sampling points/waiting number of sampling points according to the working mode and the input initial sampling point setting coefficient;

the control unit performs Keystone transformation extraction on the initial sampling points according to the coefficient waiting sampling points and the resampling extraction method, performs Keystone transformation interpolation on the initial sampling points according to the sampling point waiting quantity and the resampling interpolation method, and outputs the sampling points after Keystone transformation extraction/interpolation and the corresponding extraction/interpolation coefficients to the sine operation unit;

The sine operation unit also performs corresponding extraction/interpolation operation on the sampling points after extraction/interpolation of Keystone transformation and the corresponding extraction/interpolation coefficients through the shift register.

4. A method according to claim 3, wherein the control unit performs Keystone transform extraction on the initial sample points according to the coefficient wait sample points and resampling extraction method, comprising:

the control unit moves the initial sampling points to the shift register one by one;

When no coefficient waiting sampling point moves to the shift register or all initial sampling points finish resampling extraction, taking the difference of the count value of the current timer minus the count threshold value as a new count value, increasing the new count value according to the extraction self increment, and carrying out resampling extraction on the sampling points in the shift register by the control unit and outputting the resampled extracted sampling points;

When the coefficient waits for the sampling point to move to the shift register and the initial sampling point does not completely finish resampling extraction, increasing the current count value according to the extraction self-increment, resampling and extracting the sampling point in the shift register by the control unit, outputting the resampled and extracted sampling point, and moving the next initial sampling point in the control unit to the shift register; resampling and extracting each output sampling point, and adding 1 to the value of an output counter;

and repeating the conditions that the judgment coefficient waits for the sampling points to move to the shift register and all the initial sampling points to finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

5. The method according to claim 4, wherein when no coefficient waiting sampling point moves to the shift register or all initial sampling points have completed resampling extraction, the control unit performs resampling extraction on the sampling points in the shift register and outputs the resampled extracted sampling points, and then comprises:

If the value of the output counter is not equal to the number of the initial sampling points, repeating the judgment of the coefficient to wait for the sampling points to move to the shift register and the condition that all the initial sampling points finish resampling extraction until the value of the output counter is equal to the number of the initial sampling points.

6. The method of claim 3, wherein the step of,

The Keystone transformation interpolation is carried out on the initial sampling point according to the waiting number of the sampling points and the resampling interpolation method, and the method comprises the following steps:

The control unit moves the initial sampling points one by one into the shift register and performs validity check on the number of the sampling points according to the waiting number of the sampling points;

After the validity of the number of the sampling points passes, if the current count value of the timer is smaller than or equal to the count threshold, the control unit carries out resampling interpolation on the sampling points in the shift register according to the current count value, and the value of the output counter of each sampling point output by the resampling interpolation is increased by 1;

If the current count value of the timer is larger than the count threshold, taking the difference of the current count value minus the count threshold as a new count value so that the timer continues counting according to the new count value and moving the next initial sampling point in the control unit into the shift register, and repeating the validity check of the number of sampling points until the validity check of the number of sampling points passes.

7. The method of claim 6, wherein the step of providing the first layer comprises,

The validity check of the number of sampling points comprises the following steps:

If the number of sampling points in the shift register is the same as the waiting number of the sampling points, the validity check of the number of the sampling points is passed;

the control unit carries out resampling interpolation on sampling points in the shift register according to the current count value, and then comprises the following steps:

If the value of the output counter is smaller than the number of the initial sampling points, outputting the sampling points after resampling and interpolation and adding 1 to the value of the output counter;

and repeatedly comparing the current count value with the count threshold until the value of the output counter is greater than or equal to the number of the initial sampling points.

8. The method of claim 1, wherein the step of determining the position of the substrate comprises,

The singer operation unit performs corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through a shift register, and the singer operation unit comprises:

The sine operation unit multiplies the sampled/interpolated sampling points and the corresponding sampled/interpolated coefficients which are input into the shift register, adds up the multiplication results corresponding to the sampled sampling points to obtain the corresponding extraction operation results, and adds up the multiplication results corresponding to the interpolated sampling points to obtain the corresponding interpolation operation results.

9. A signal conversion device based on a multifunctional sine interpolation structure, comprising:

The bus configuration unit is used for carrying out static configuration on the control unit and determining the working mode of the control unit; the working mode comprises resampling extraction and interpolation;

The control unit is used for calculating the extraction/interpolation self-increment of the timer according to the extraction/interpolation proportion corresponding to the working mode and the bit number of the timer; the sampling point and the sampling point corresponding to the increased count value and the corresponding extraction/interpolation coefficient are output to the sine operation unit;

And the sine operation unit is used for carrying out corresponding extraction/interpolation operation on the sampling points and the corresponding extraction/interpolation coefficients through the shift register.

10. An electronic device, comprising:

At least one processor; and

A memory communicatively coupled to the at least one processor; wherein,

The memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-8.