CN118112716A - Integrated photon chip and preparation method thereof - Google Patents

Integrated photon chip and preparation method thereof Download PDF

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Publication number
CN118112716A
CN118112716A CN202410058957.5A CN202410058957A CN118112716A CN 118112716 A CN118112716 A CN 118112716A CN 202410058957 A CN202410058957 A CN 202410058957A CN 118112716 A CN118112716 A CN 118112716A
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lithium tantalate
optical
chip
electro
layer
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欧欣
王成立
蔡佳辰
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Abstract

The application relates to the technical field of semiconductor photoelectricity, in particular to an integrated photon chip and a preparation method thereof. The integrated photon chip provided by the embodiment of the application is provided with the same supporting substrate and further comprises a lithium tantalate photon system positioned on the supporting substrate, wherein the lithium tantalate photon system comprises an optical transmission waveguide; and the electrical interconnection system is positioned on the lithium tantalate photon system and comprises a traveling wave electrode, a welding electrode and a lead wire used for connecting the traveling wave electrode and the welding electrode. Therefore, the integrated photon chip has low cost and excellent optical performance.

Description

Integrated photon chip and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor photoelectricity, in particular to an integrated photon chip and a preparation method thereof.
Background
With the rapid increase of data transmission quantity of data centers, cloud services, super computing centers and the like, the high-density optical interconnection technology compatible with the application is not quite variable, lower energy consumption and faster data transmission rate can be realized, and low-loss data interconnection, high-computation-power and high-fidelity signal processing are ensured. Whether the photoelectric hybrid calculation or the commercialized optical module is generally considered, the photoelectric device based on the electro-optic modulation is used for completing the rapid switching of the optical signal and the electrical signal, so that the large-scale high-speed electro-optic modulator with low cost, high modulation rate and small volume and the related photonic device are obtained, and are necessary routes for the industrialization of optical chips in the future.
With reference to the development of silicon-based materials in traditional microelectronic chips, silicon-based photonics platforms based on silicon materials have been rapidly developed in the past twenty years, and industry standardization has been achieved by means of low cost of silicon materials and mature manufacturing processes of microelectronics industry, and products thereof have been put into practical use on a large scale in the fields of optical communication, optical calculation and optical sensing. While silicon-based photonics has been successful in commercialization, the high-speed electro-optic effect that silicon materials do not possess still limits the application of silicon-based photonics chips in high linearity, high transmission rate (e.g., 800G), low optical loss scenarios. In recent years, based on the second order nonlinear effect (pockels effect), lithium niobate materials are expected to realize high-linearity, high-speed electro-optic modulation while ensuring low-loss transmission, however, while lithium niobate materials on insulators exhibit their excellent electro-optic modulation performance academically, the high cost of lithium niobate itself greatly hinders the progress toward commercial photonics platforms. Therefore, industrialization of high-speed optical chips requires an integrated photonic chip having both low cost and excellent optoelectronic performance.
Disclosure of Invention
In order to solve the above technical problems, in one aspect, the present application discloses an integrated photonic chip, which includes:
a support substrate;
A lithium tantalate photonic system located on the support substrate, the lithium tantalate photonic system including an optical transmission waveguide;
And the electrical interconnection system is positioned on the lithium tantalate photon system and comprises a traveling wave electrode, a welding electrode and a lead wire used for connecting the traveling wave electrode and the welding electrode.
In one possible embodiment, the lithium tantalate photonic system further comprises a combination of one or more of a microring resonator, a racetrack resonator, an arrayed waveguide grating, and a mach-zender interferometer.
In one possible embodiment, the support substrate comprises a substrate and an optical insulation layer on the substrate;
the material of the optical insulating layer comprises silicon oxide;
The material of the substrate comprises quartz, silicon or sapphire.
In one possible embodiment, the lithium tantalate photonic system functions include an electro-optical interconnect system for optical modules, a high-power optical computing system based on electro-optical modulation, a multi-channel optical communication and a wavelength division multiplexing system.
In a possible embodiment, the electro-optical interconnection system for an optical module is composed of a mach-zender electro-optical modulator, an optical coupling interface, a laser gain chip, an application specific integrated circuit chip and the electrical interconnection system;
The Mach-Zehnder electro-optic modulator consists of a straight waveguide and a multimode interference coupler and is used for modulating high-speed electro-light on a lithium tantalate sheet;
The optical coupling interface is used for realizing the conversion from light on the lithium tantalate sheet to low-loss optical fiber light;
the laser gain chip is used for providing a light source;
The asic chip is used to output digital electrical signals and load them onto the bonding electrodes via leads so that the asic chip can be used for the implementation of the optical portion or I/O of the co-packaged optical module.
In a possible embodiment, the high-power optical computing system based on electro-optical modulation consists of a transformation matrix structure, a multimode interference coupler and an electrode system;
initializing an input item at an input end of the high-power optical computing system based on electro-optical modulation by a1×N multimode interference coupler and a phase modulator;
The transformation matrix structure consists of cascade Mach Zehnder interferometers which are connected in multiple stages; wherein two cascaded mach-zender interferometers are used to control two phase terms to achieve an adjustable SU (2) unitary transformation.
In one possible embodiment, the multichannel optical communication and wavelength division multiplexing system is composed of a lithium tantalate micro-ring resonator, an adjustable wavelength division multiplexer and an optical receiving packaging module;
When continuous light is input into the multichannel optical communication and wavelength division multiplexing system based on the Kerr nonlinear effect, the lithium tantalate micro-ring resonator generates a Kerr optical frequency comb by using a cascading fourth-order nonlinear effect; the adjustable wavelength division multiplexer is composed of cascaded add-drop type micro-ring resonators and is used for loading electro-optic phase modulation electrodes matched with the radius of the micro-ring, and the resonance peak positions of the add-drop type micro-ring resonators are modulated by the electro-optic phase modulation electrodes so as to realize the multi-channel on-chip adjustable filtering function;
The light receiving packaging module is composed of a co-packaged silicon germanium detector, a digital signal processing chip and an application specific integrated circuit chip and is used for receiving signals and carrying out signal self-feedback on a phase modulation electrode loaded on the adjustable wavelength division multiplexer.
The application also discloses a method for preparing the integrated photon chip, which comprises the following steps:
providing a substrate structure; the substrate structure comprises a supporting substrate and a lithium tantalate layer positioned on the supporting substrate;
Sequentially performing photoetching and etching treatment on the lithium tantalate layer to form the lithium tantalate photon system on the support substrate;
The electrical interconnect system is formed over the lithium tantalate photonic system.
In one possible embodiment, the providing a substrate structure includes:
Providing a lithium tantalate wafer;
Ion implantation is carried out on the lithium tantalate wafer so as to form a defect layer in the lithium tantalate wafer;
and bonding the lithium tantalate wafer and the support substrate, and performing annealing stripping treatment on the bonded structure to form the substrate structure.
In one possible embodiment, the ion implanted ions comprise hydrogen, helium, or a combination thereof;
When the ion implantation is hydrogen ion, the ion implantation energy is 10 keV-300 keV, and the ion implantation dosage is 1e 15~5e17cm-1.
In a possible embodiment, the performing photolithography and etching treatment on the lithium tantalate layer sequentially includes:
forming a mask on the lithium tantalate layer;
etching the lithium tantalate layer by using a dry etching process, and removing the mask;
The patterned lithium tantalate layer is removed based on a wet etch.
By adopting the technical scheme, the integrated photon chip provided by the application has the following beneficial effects:
The integrated photon chip provided by the embodiment of the application is provided with the same supporting substrate and further comprises a lithium tantalate photon system positioned on the supporting substrate, wherein the lithium tantalate photon system comprises an optical transmission waveguide; and the electrical interconnection system is positioned on the lithium tantalate photon system and comprises a traveling wave electrode, a welding electrode and a lead wire used for connecting the traveling wave electrode and the welding electrode. Because the integrated photon chip has a lithium tantalate photon system, the integrated photon chip comprising the integrated photon chip has low cost and more excellent optical performance (such as strong electro-optic effect, relatively wider optical transparent window, larger forbidden band width and larger forbidden band width).
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a cross-sectional view of an integrated photonic chip provided in the present application;
Fig. 2 is a top view of an electro-optical interconnection system of an optical module provided by the present application;
FIG. 3 is a top view of a high power optical computing system based on electro-optic modulation provided by the present application;
fig. 4 is a top view of a multichannel optical communication and wavelength division multiplexing system provided by the present application;
FIG. 5 is a schematic flow chart of an integrated photonic chip fabrication process according to the present application;
fig. 6-9 are schematic diagrams of structures during formation of a lithium tantalate photonic system in accordance with the present application.
The following supplementary explanation is given to the accompanying drawings:
1-a support substrate; 101-a substrate; 102-an optical insulating layer; a lithium-tantalate photonic system; 21-an optical transmission waveguide; 3-an electrical interconnection system; 31-travelling wave electrode; 32-welding electrodes; 33-lead wires; 4-optical coupling interface; 5-Mach Zehnder interferometers; 6-a laser gain chip; 7-an application specific integrated circuit chip; a lithium 8-tantalate microring resonator; 9-an adjustable wavelength division multiplexer; 10-a light receiving package module; a layer of 11-lithium tantalate; 12-a polishing device; 13-masking; a 14-multimode interference coupler; 141-a first multimode interference coupler; 142-a second multimode interference coupler.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the application. In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "top", "bottom", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may include one or more of the feature, either explicitly or implicitly. Moreover, the terms "first," "second," and the like, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the application described herein may be implemented in sequences other than those illustrated or otherwise described herein.
When a range of values is disclosed herein, the range is considered to be continuous and includes both the minimum and maximum values for the range, as well as each value between such minimum and maximum values. Further, when a range refers to an integer, each integer between the minimum and maximum values of the range is included. Further, when multiple range description features or characteristics are provided, the ranges may be combined. In other words, unless otherwise indicated, all ranges disclosed herein are to be understood to include any and all subranges subsumed therein. For example, a specified range from "1 to 10" should be considered to include any and all subranges between the minimum value of 1 and the maximum value of 10. Exemplary subranges from 1 to 10 include, but are not limited to, 1 to 6.1, 3.5 to 7.8, 5.5 to 10, and the like.
Referring to fig. 1, the present application provides an integrated photonic chip, which includes a support substrate 1, a lithium tantalate photonic system 2, and an electrical interconnection system 3; a lithium tantalate photonic system 2 is located on the support substrate 1, the lithium tantalate photonic system 2 including an optical transmission waveguide 21; an electrical interconnection system 3 is located on the lithium tantalate photonic system 2, the electrical interconnection system 3 comprising a travelling wave electrode 31, a welding electrode 32 and a wire 33 for connecting the travelling wave electrode 31, the welding electrode 32. Optionally, the welding electrode 32 is electrically connected to an external processing chip (such as an asic chip), and the traveling wave electrode 31 is located on the lithium tantalate photonic system 2, specifically around the optical transmission waveguide 21.
The lithium tantalate has low cost and excellent electro-optical performance, and can be used as a base material of a next-generation high-speed optical chip. Compared with the lithium niobate material, the lithium tantalate has excellent optical performance equivalent to that of the lithium niobate material, such as strong electro-optic effect, relatively wider optical transparent window and larger forbidden bandwidth, so the lithium tantalate integrated photon chip provided by the application has the advantages of more excellent optical performance, low cost and convenience in mass production and processing.
In a possible embodiment, referring to fig. 1, the support substrate 1 includes a substrate 101 and an optical insulation layer 102 disposed on the substrate 101; the material of the optical insulation layer 102 includes silicon oxide; the material of the substrate 101 includes quartz, silicon, or sapphire. The refractive index of the waveguide is greater than the refractive index of the optically insulating layer 102.
In one possible embodiment, the lithium tantalate subsystem 2 includes a plurality of photonic chips of different functionality. Optionally, the lithium tantalate photonic system 2 includes one or more combinations of micro-ring resonators, racetrack resonators, arrayed waveguide gratings, and mach-zender interferometers.
In one possible embodiment, the functions of the lithium tantalate photonic system 2 include an electro-optical interconnection system for optical modules, a high-power optical computing system based on electro-optical modulation, a multi-channel optical communication and a wavelength division multiplexing system. That is, the integrated photonic chip provided in the embodiment of the present application may be specifically applied to the above three systems, but may not be limited to the above three systems in practice.
In a possible embodiment, referring to fig. 2, the electro-optical interconnection system for an optical module is composed of a mach-zender electro-optical modulator, an optical coupling interface 4, a laser gain chip 6, an Application SPECIFIC INTEGRATED Circuit (ASIC) chip, and the electrical interconnection system 3; the mach-zender electro-optic modulator consists of a straight waveguide (i.e., optical transmission waveguide 2 as illustrated in fig. 2) and a multimode interference coupler 14 (multi-mode inferometer, MMI) for modulation of high-speed electro-light on a lithium tantalate chip; the multimode interference coupler 14 is used for splitting light, and the optical coupling interface 4 is used for converting light on the lithium tantalate sheet into low-loss optical fiber light; the laser gain chip 6 is used for providing a light source; the asic chip 7 is used to output digital electrical signals and load them onto the bonding electrodes 32 via leads 33 so that the asic chip 7 can be used for the implementation of the optical part or I/O of a co-packaged optical module. Alternatively, the multimode interference coupler 14 includes a first multimode interference coupler 141 and a second multimode interference coupler 142, where the first multimode interference coupler 141 is near the input end and the second multimode interference coupler 142 is near the output end, and specifically, the first multimode interference coupler 141 is a 1×2MMI, and the second multimode interference couplers 142 are all2×1 MMIs. Of course, the channel types of the multimode interference coupler 14 are not limited to the above 1×2 and 2×1, and may be other types, such as n×m, where M and N are integers greater than 2, as desired. The laser gain chip 6 is connected with the multimode interference couplers 14 and the multimode interference couplers 14 through lithium tantalate waveguides.
In one possible embodiment, referring to fig. 3, the high-power optical computing system based on electro-optic modulation is composed of a transformation matrix structure, a multimode interference coupler 14, and an electrode system; initializing an input term at an input end of the electro-optical modulation-based high-power optical computing system by a 1×n multimode interference coupler 14 and a phase modulator; the transformation matrix structure consists of cascade Mach Zehnder interferometers 5 (MZIs) connected in multiple stages; wherein two cascaded mach-zehnder interferometers 5 may form an all-fiber cascaded mach-zehnder interferometer 5 (CMZI) that may control two phase terms to implement an adjustable SU (2) unitary transformation, further, multiple SU (2) transformations may implement initialization of an N x N arbitrary matrix, which may be used for multiple convolutional layer construction of a photonic neural network.
In a possible embodiment, referring to fig. 4, the multichannel optical communication and wavelength division multiplexing system is composed of a lithium tantalate micro-ring resonator 8, an adjustable wavelength division multiplexer 9 and an optical receiving package module 10; when continuous light is input into the multichannel optical communication and wavelength division multiplexing system based on the Kerr nonlinear effect, the lithium tantalate micro-ring resonator 8 is used for generating a Kerr optical frequency comb by utilizing the cascade fourth-order nonlinear effect, so that on-chip multichannel signal source generation is obtained; the adjustable wavelength division multiplexer 9 is composed of cascaded add-drop type micro-ring resonators and is used for loading electro-optic phase modulation electrodes matched with the micro-ring radius, and the resonance peak positions of the add-drop type micro-ring resonators are modulated by the electro-optic to realize the multi-channel on-chip adjustable filtering function; the light receiving packaging module 10 is composed of a co-packaged silicon germanium detector, a digital signal processing chip and an application specific integrated circuit chip 7, and is used for receiving signals and performing signal self-feedback on the phase modulation electrode loaded on the adjustable wavelength division multiplexer 9.
The preparation flow of the integrated photon chip can be based on the formation of 4 inch, 6 inch and 8 inch lithium tantalate wafers, and is suitable for industrial large-scale preparation.
Referring to fig. 5, an embodiment of the present application discloses a method for preparing the integrated photonic chip, which includes:
s501: providing a substrate structure; the substrate structure comprises a support substrate 1 and a lithium tantalate layer 11 on the support substrate 1.
In a possible embodiment, step S501 may specifically include: providing a lithium tantalate wafer; ion implantation is carried out on the lithium tantalate wafer so as to form a defect layer in the lithium tantalate wafer; and bonding the lithium tantalate wafer and the support substrate 1, and performing annealing stripping treatment on the bonded structure to form the substrate structure shown in fig. 6. In one possible embodiment, the ion implanted ions comprise hydrogen, helium, or a combination thereof; when the ion implantation is hydrogen ion, the ion implantation energy is 10 keV-300 keV, and the ion implantation dosage is 1e 15~5e17cm-1. Alternatively, the bonded structure may be separated into two structures along the defect layer, namely, a first structure and a second structure, wherein the first structure only comprises lithium tantalate, and the second structure comprises a support substrate 1 and a lithium tantalate layer 11 (i.e., a substrate structure) on the support substrate 1, and referring to fig. 7, the surface of the lithium tantalate layer 11 of the second structure is subjected to chemical mechanical polishing by using a polishing device 12, so as to obtain a substrate structure with a smooth surface. The steps of ion implantation, bonding with the support substrate 1 and annealing and stripping can be repeated for the first structure to obtain a substrate structure, and the stripped first structure can be repeatedly utilized, so that the preparation cost is further reduced.
In another possible embodiment, the preparation process of the substrate structure may be a direct bonding manner, and then the substrate structure is formed by using a chemical mechanical polishing process, where a substrate 101 may be provided first, an optical insulating layer 102 is formed by depositing on the substrate 101, a support substrate 1 is obtained, a lithium tantalate wafer is provided, and then the lithium tantalate wafer is bonded to the support substrate 1, and then the lithium tantalate wafer is thinned to a predetermined thickness by using a chemical mechanical polishing process, so as to obtain the substrate structure as shown in fig. 6.
S503: and sequentially performing photoetching and etching treatment on the lithium tantalate layer 11 to form the lithium tantalate photon system 2 on the support substrate 1.
In a possible embodiment, step S503 may specifically include: forming a mask 13 on the lithium tantalate layer 11; etching the lithium tantalate layer 11 by using a dry etching process, and removing the mask 13; the etch redeposition of the patterned lithium tantalate layer 11 is removed based on a wet etch. Alternatively, the mask 13 may be a photoresist, or may be a hard mask 13, and when the mask 13 is a photoresist, the specific manner of forming the mask 13 may be: coating a photoresist on the lithium tantalate layer 11, and heating the supporting substrate 1 to bake the photoresist; the photoresist is sequentially exposed and developed to form a patterned photoresist layer on the lithium tantalate layer 11, resulting in the structure shown in fig. 8. Alternatively, the exposure method may be a step (Stepper) lithography or a scanning (Scanner) lithography. In a possible embodiment, the photoresist layer has a thickness of 300-800 nm, alternatively, the photoresist layer may have a thickness of 300nm,400nm,500nm,600nm,700nm, 800nm, or the like. In a possible embodiment, the photoresist is an ultraviolet photoresist; the temperature of the heating treatment is 60-200 ℃ for 1-30 minutes, and optionally, the temperature of the heating treatment can be 60 ℃,80 ℃,100 ℃,120 ℃,140 ℃,160 ℃,180 ℃ or 200 ℃; the time may be 1 minute, 5 minutes, 10 minutes, 15 minutes, 20 minutes, 25 minutes, or 30 minutes. In one possible embodiment, to increase the accuracy of the exposed lines, a multiple exposure technique (e.g., 3 times, 4 times, 5 times, etc.) may be used for the photoresist, each exposure dose being 50-3000 μC/cm 2, and the total exposure dose being 200-12000 μC/cm 2. The lithium tantalate layer 11 may optionally be etched using ion beam lithography or reactive coupled plasma etching, the etching gas comprising argon, optionally during dry etching (which may specifically be referred to as dry etching the lithium tantalate layer 11), the etching gas is capable of physically sputtering and chemically etching the lithium tantalate layer 11 and producing etching redeposition that adheres to the lithium tantalate waveguide sidewall. After the etching of the lithium tantalate layer 11 is completed, the mask 13 is removed, and the structure shown in fig. 9 can be obtained. The specific way to remove the photoresist may be: and removing the photoresist by wet etching, wherein the wet etching solution comprises ethanolamine, and the concentration of the ethanolamine is 1-50%.
When the mask 13 is a hard mask 13, the specific manner of forming the mask 13 may be: and forming a diamond-like mask on the lithium tantalate layer 11, etching the lithium tantalate layer 11 by using a dry etching process, and removing the diamond-like mask to obtain the lithium tantalate photonic system 2.
In one possible embodiment, the diamond-like mask may be formed in the following manner: sequentially forming a dielectric layer and a diamond-like carbon layer on the lithium tantalate layer 11; and sequentially carrying out photoetching and etching treatment on the diamond-like carbon layer to form the diamond-like carbon mask on the dielectric layer. The dielectric layer can enhance the adhesion between the diamond-like carbon layer and the lithium tantalate layer 11, and can also serve as an intermediate layer to release stress caused by thermal mismatch of the two films. In a possible embodiment, the thickness of the dielectric layer is 2nm to 5um, alternatively, the thickness of the dielectric layer may be 2nm,10nm,50nm,100nm,500nm,1000nm,2000nm,3000nm,4000nm or 5000nm. Optionally, the material of the dielectric layer comprises silicon nitride, silicon dioxide and styrene-acrylic butene; methods of forming the dielectric layer include plasma enhanced chemical vapor deposition and inductively coupled plasma chemical vapor deposition. The above-described dielectric layer growth method is not limited to only these two types, and for example, benzocyclobutene may be formed using a spin coating method.
In the embodiment of the application, the process of forming the diamond-like mask on the dielectric layer may be that a photoresist layer is formed on the diamond-like layer by coating a photoresist on the diamond-like layer, then patterning the photoresist layer based on a photolithography process, and then patterning the diamond-like layer by using an inductively coupled plasma etching process to form the diamond-like mask on the dielectric layer, thereby obtaining the structure shown in fig. 8, and subsequently removing the photoresist. In particular, the exposure process in the photolithography process may include an electron beam exposure, an optical exposure method.
In a possible embodiment, during the etching process of the diamond-like layer, the etching gas is oxygen with a voltage of 100V to 1000V, alternatively, the voltage may be set to 100V,200V,300V,400V,500V,600V,700V,800V,900V or 1000V. The acceleration voltage is set to 100V to 300V, alternatively, the acceleration voltage may be set to 10V,50V,100V,150V,200V,250V, or 300V. The gas flow rate is set to 10 to 100sccm, alternatively, the gas flow rate may be set to 10sccm,20sccm,30sccm,40sccm,50sccm,60sccm,70sccm,80sccm,90sccm, or 100sccm.
In one possible embodiment, the diamond-like layer is formed by physical vapor deposition (e.g., vacuum evaporation, sputter coating, arc plasma coating, ion coating, molecular beam epitaxy, etc.), chemical vapor deposition, and enhanced plasma chemical vapor deposition. Optionally, the thickness of the diamond-like carbon layer is 10 nm-5 um. Alternatively, the thickness of the diamond-like layer may be 10nm,50nm,100nm,500nm,1000nm,2000nm,3000nm,4000nm or 5000nm.
In a possible embodiment, during the etching of the lithium tantalate layer 11, the etching gas includes argon gas at a voltage of 100V to 1000V, alternatively, the voltage may be set to 100V,200V,300V,400V,500V,600V,700V,800V,900V or 1000V. The acceleration voltage is set to 100V to 300V, alternatively, the acceleration voltage may be set to 10V,50V,100V,150V,200V,250V, or 300V. The gas flow rate is set to 10 to 100sccm, alternatively, the gas flow rate may be set to 10sccm,20sccm,30sccm,40sccm,50sccm,60sccm,70sccm,80sccm,90sccm, or 100sccm.
In a possible embodiment, when a dielectric layer is formed on the lithium tantalate layer 11, the dielectric layer is further etched during the etching process of the lithium tantalate layer 11, and then, after the diamond-like mask is removed, the dielectric layer remaining on the patterned lithium tantalate layer 11 is removed.
Since the etching of the lithium tantalate layer 11 by the dry etching process may cause etching redeposition to adhere to the sidewall of the lithium tantalate waveguide, thereby affecting the optical performance of the waveguide, the etching redeposition on the patterned lithium tantalate layer 11 may be removed by wet etching after the mask 13 is removed. The wet etching solution can be a mixed solution of hydrogen peroxide and a strong alkali solution. Optionally, the strong base solution comprises sodium hydroxide, potassium hydroxide or a mixture thereof with water or ammonia water. Optionally, the temperature of the preset corrosive liquid is 50-100 ℃. In an alternative embodiment for removing the etch redeposition, the temperature of the pre-set etchant may be 50 degrees celsius, 60 degrees celsius, 70 degrees celsius, 80 degrees celsius, 90 degrees celsius, or 100 degrees celsius. Optionally, the preset corrosive liquid may be a composition of hydrogen peroxide and potassium hydroxide, a composition of hydrogen peroxide and sodium hydroxide, a composition of hydrogen peroxide, water, ammonia water and potassium hydroxide, or a composition of hydrogen peroxide, water, ammonia water and sodium hydroxide. When the preset corrosive liquid is a composition of potassium hydroxide and hydrogen peroxide, the volume ratio of the potassium hydroxide to the hydrogen peroxide is 1:1 to 10:1. Alternatively, the volume ratio of potassium hydroxide to hydrogen peroxide may be 1:1,2:1,3:1,4:1,5:1,6:1,7:1,8:1,9:1 or 10:1.
In one possible embodiment, after the etch redeposition is removed, the method further comprises: and carrying out high-temperature treatment on the integrated photon chip to repair lattice damage to the lithium tantalate waveguide in the dry etching process, so that the optical performance of the lithium tantalate waveguide can be improved. In one possible embodiment, the high temperature treatment is performed at a temperature of 150 to 700 degrees celsius in an atmosphere comprising oxygen for a period of 2 to 5 hours. In an alternative embodiment of the processing temperature of the high temperature process, the processing temperature may be 150 degrees celsius, 200 degrees celsius, 250 degrees celsius, 300 degrees celsius, 350 degrees celsius, 400 degrees celsius, 450 degrees celsius, 500 degrees celsius, 600 degrees celsius, 650 degrees celsius, or 700 degrees celsius. In an alternative embodiment of the treatment time for the high temperature treatment, the treatment time may be 2 hours, 2.5 hours, 3 hours, 3.5 hours, 4 hours, 4.5 hours or 5 hours. It should be noted that, for some materials, the high temperature treatment temperature must be less than the curie temperature to ensure that the polarization direction is unchanged (e.g., barium titanate needs to be less than 150 degrees celsius, lithium tantalate needs to be less than 600 degrees celsius).
S505: the electrical interconnect system 3 is formed on the lithium tantalate photonic system 2.
In the embodiment of the present application, the specific way of forming the electrical interconnection system 3 in step S505 may include coating a photoresist on the lithium tantalate photonic system 2, exposing by using Deep Ultraviolet (DUV) lithography, wherein the exposure mode may be step (Stepper) lithography or scanning (Scanner) lithography, so as to transfer the electrode pattern onto the photoresist; and depositing a metal electrode by utilizing an electron beam, and removing the photoresist to obtain the integrated photon chip.
The embodiment of the application provides an on-chip integrated lithium tantalate photon chip and a large-scale preparation method thereof, wherein the on-chip integrated lithium tantalate photon chip comprises a high-speed electro-optical modulator, a multichannel signal source, a wavelength division multiplexer and an on-chip interferometer, the chip functions cover photoelectric conversion, optical calculation, multichannel signal source generation and wavelength division multiplexing thereof, meanwhile, a high-compatibility and large-scale processing method is provided, a large-scale preparation process gap of a lithium tantalate material is filled, and a foundation is provided for the next generation of high-flux photon systems for optical communication and optical calculation and large-scale industrial manufacturing.
The foregoing description of the preferred embodiments of the present application is not intended to limit the application, but rather, the application is to be construed in scope and spirit of the application.

Claims (11)

1. An integrated photonic chip, comprising:
a support substrate;
A lithium tantalate photonic system located on the support substrate, the lithium tantalate photonic system including an optical transmission waveguide;
And the electrical interconnection system is positioned on the lithium tantalate photon system and comprises a traveling wave electrode, a welding electrode and a lead wire used for connecting the traveling wave electrode and the welding electrode.
2. The integrated photonic chip of claim 1, wherein the lithium tantalate photonic system further comprises a combination of one or more of a micro-ring resonator, a racetrack resonator, an arrayed waveguide grating, and a mach-zender interferometer.
3. The integrated photonic chip of claim 1, wherein the support substrate comprises a substrate and an optical insulating layer on the substrate;
the material of the optical insulating layer comprises silicon oxide;
The material of the substrate comprises quartz, silicon or sapphire.
4. The integrated photonic chip of claim 1, wherein the functions of the lithium tantalate photonic system include an electro-optical interconnect system for optical modules, a high-power optical computing system based on electro-optical modulation, a multi-channel optical communication, and a wavelength division multiplexing system.
5. The integrated photonic chip of claim 4, wherein the electro-optic interconnect system for optical modules is comprised of a mach-zender electro-optic modulator, an optical coupling interface, a laser gain chip, an application specific integrated circuit chip, and the electrical interconnect system;
The Mach-Zehnder electro-optic modulator consists of a straight waveguide and a multimode interference coupler and is used for modulating high-speed electro-light on a lithium tantalate sheet;
The optical coupling interface is used for realizing the conversion from light on the lithium tantalate sheet to low-loss optical fiber light;
the laser gain chip is used for providing a light source;
The asic chip is used to output digital electrical signals and load them onto the bonding electrodes via leads so that the asic chip can be used for the implementation of the optical portion or I/O of the co-packaged optical module.
6. The integrated photonic chip of claim 4, wherein the electro-optical modulation-based high power optical computing system is comprised of a transformation matrix structure, a multimode interference coupler, an electrode system;
initializing an input item at an input end of the high-power optical computing system based on electro-optical modulation by a1×N multimode interference coupler and a phase modulator;
The transformation matrix structure consists of cascade Mach Zehnder interferometers which are connected in multiple stages; wherein two cascaded mach-zender interferometers are used to control two phase terms to achieve an adjustable SU (2) unitary transformation.
7. The integrated photonic chip of claim 4, wherein the multichannel optical communication and wavelength division multiplexing system is composed of a lithium tantalate micro-ring resonator, an adjustable wavelength division multiplexer, and an optical receiving package module;
When continuous light is input into the multichannel optical communication and wavelength division multiplexing system based on the Kerr nonlinear effect, the lithium tantalate micro-ring resonator generates a Kerr optical frequency comb by using a cascading fourth-order nonlinear effect; the adjustable wavelength division multiplexer is composed of cascaded add-drop type micro-ring resonators and is used for loading electro-optic phase modulation electrodes matched with the radius of the micro-ring, and the resonance peak positions of the add-drop type micro-ring resonators are modulated by the electro-optic phase modulation electrodes so as to realize the multi-channel on-chip adjustable filtering function;
The light receiving packaging module is composed of a co-packaged silicon germanium detector, a digital signal processing chip and an application specific integrated circuit chip and is used for receiving signals and carrying out signal self-feedback on a phase modulation electrode loaded on the adjustable wavelength division multiplexer.
8. A method of making the integrated photonic chip of any of claims 1-7, comprising:
providing a substrate structure; the substrate structure comprises a supporting substrate and a lithium tantalate layer positioned on the supporting substrate;
Sequentially performing photoetching and etching treatment on the lithium tantalate layer to form the lithium tantalate photon system on the support substrate;
The electrical interconnect system is formed over the lithium tantalate photonic system.
9. The method of claim 8, wherein providing a substrate structure comprises:
Providing a lithium tantalate wafer;
Ion implantation is carried out on the lithium tantalate wafer so as to form a defect layer in the lithium tantalate wafer;
and bonding the lithium tantalate wafer and the support substrate, and performing annealing stripping treatment on the bonded structure to form the substrate structure.
10. The method of claim 9, wherein the ion implanted ions comprise hydrogen, helium, or a combination thereof;
When the ion implantation is hydrogen ion, the ion implantation energy is 10 keV-300 keV, and the ion implantation dosage is 1e 15~5e17cm-1.
11. The method of claim 8, wherein the sequentially performing photolithography and etching processes on the lithium tantalate layer comprises:
forming a mask on the lithium tantalate layer;
etching the lithium tantalate layer by using a dry etching process, and removing the mask;
The patterned lithium tantalate layer is removed based on a wet etch.
CN202410058957.5A 2024-01-15 2024-01-15 Integrated photon chip and preparation method thereof Pending CN118112716A (en)

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