CN118101557A - Network-on-chip structure and flow balancing method of network-on-chip - Google Patents

Network-on-chip structure and flow balancing method of network-on-chip Download PDF

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CN118101557A
CN118101557A CN202410153456.5A CN202410153456A CN118101557A CN 118101557 A CN118101557 A CN 118101557A CN 202410153456 A CN202410153456 A CN 202410153456A CN 118101557 A CN118101557 A CN 118101557A
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router
data packet
port
network
control value
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郭振江
王焕东
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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Abstract

The invention provides a network-on-chip structure and a flow balancing method of a network-on-chip, comprising the following steps: a plurality of routers; the router includes: an arbiter and a plurality of data ports; the arbiter is configured with a control value k; the plurality of data ports includes: the system comprises an upstream port, an injection port and a downstream port, wherein the upstream port is used for receiving a first data packet transmitted by a previous router through the downstream port, and the injection port is used for receiving a second data packet transmitted by an access device; the arbiter is used for selecting the first data packet or the second data packet to be transmitted to the upstream port of the next router through the downstream port according to the control value k, wherein the control value k is used for determining the selection proportion of the first data packet and the second data packet.

Description

Network-on-chip structure and flow balancing method of network-on-chip
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a network-on-chip structure and a flow balancing method for a network-on-chip.
Background
Network-on-chip is a key technology of a multiprocessor architecture, is an interconnection path and a communication network inside a processor, is responsible for message transmission, and is a base of cooperative work of the processor, wherein traffic balancing is a key focus subject of the network-on-chip, and is mainly used for avoiding that a single router occupies most of network bandwidth for a long time.
At present, when data is transmitted, a router can collect congestion information provided by adjacent routers, and transmit transmitted data packets by bypassing the blocked router according to surrounding congestion conditions represented by the congestion information, so that transmission congestion is reduced, and the effect of flow balance is achieved.
In the related art, the router is required to dynamically generate and transmit congestion information, which generates a lot of additional power consumption, circuit area and response time.
Disclosure of Invention
In view of the foregoing, embodiments of the present invention are provided to provide a network-on-chip structure and a traffic balancing method for a network-on-chip that overcome or at least partially solve the foregoing problems.
In a first aspect, an embodiment of the present invention discloses a network-on-chip structure, including:
a plurality of routers;
The router includes: an arbiter and a plurality of data ports; the arbiter is configured with a control value k;
The plurality of data ports includes: the system comprises an upstream port, an injection port and a downstream port, wherein the upstream port is used for receiving a first data packet transmitted by a previous router through the downstream port, and the injection port is used for receiving a second data packet transmitted by access equipment;
The arbiter is configured to select the first data packet or the second data packet to be transmitted to an upstream port of a next router through a downstream port according to the control value k, where the control value k is used to determine a selection ratio of the first data packet and the second data packet.
In a second aspect, an embodiment of the present invention discloses a traffic balancing method for a network on chip, which is applied to a router in a network on chip structure, and the method includes:
obtaining a control value k configured for an arbiter in the router;
And selecting a first data packet transmitted by a last router through a downstream port through the arbiter or selecting a second data packet input by an injection port of the router according to the control value k, and transmitting the first data packet to an upstream port of a next router through the downstream port of the router, wherein the control value k is used for determining the selection ratio of the first data packet and the second data packet.
In the embodiment of the invention, the arbiter of the router can flexibly adjust the selection proportion of the router to the first data packet and the second data packet through the control value k, so that in a specific network-on-chip transmission link, the flexible adjustment of the flow bandwidth of each transmission node in the network-on-chip can be realized through the simple configuration of the control value k, thereby realizing the flow balance of the network-on-chip more conveniently and simply. The complexity of this approach is lower than the strategy based on congestion information adjustment without the need to generate a significant amount of additional power consumption, circuit area, and response time.
Drawings
Fig. 1 is a schematic diagram of a network on chip structure according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another network-on-chip architecture provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram of another network-on-chip architecture provided by an embodiment of the present invention;
FIG. 4 is a schematic diagram of another network-on-chip architecture provided by an embodiment of the present invention;
FIG. 5 is a schematic diagram of another network-on-chip architecture provided by an embodiment of the present invention;
Fig. 6 is a schematic structural diagram of a router according to an embodiment of the present invention;
Fig. 7 is a flowchart of a flow balancing method of a network on chip according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Referring to fig. 1, which shows a schematic diagram of a network-on-chip architecture, the network-on-chip architecture includes: a plurality of routers; the router includes: an arbiter and a plurality of data ports; the arbiter is configured with a control value k; the plurality of data ports includes: the system comprises an upstream port, an injection port and a downstream port, wherein the upstream port is used for receiving a first data packet transmitted by a previous router through the downstream port, and the injection port is used for receiving a second data packet transmitted by an access device; the arbiter is used for selecting the first data packet or the second data packet to be transmitted to the upstream port of the next router through the downstream port according to the control value k, and the control value k is used for determining the selection ratio of the first data packet and the second data packet.
Wherein, among a plurality of routers, the routers are connected with each other, and each router can have an upstream router and/or a downstream router. Preferably, a plurality of routers are sequentially connected in series, the routers sequentially connected in series form a component unit of the network-on-chip structure, and a data transmission direction of the component unit includes: from one end to the other of a plurality of routers connected in series in turn. In one implementation manner of the embodiment of the invention, the access device connected with the injection port of the router may include a processor core and a cache, so that communication of the multi-core processor architecture may be realized, and the cache is used for temporarily storing data interacted with the communication, so as to improve the access speed of the data. The data (second data packet) transmitted to the router through the external device is injection data, and the network on chip generally realizes a service function through the injection data. In addition, in another implementation manner of the embodiment of the present invention, the access device connected to the injection port of the router may include any one of external devices such as a memory, a graphics card, and a network card, that is, through abundant additional access device selection, the function implementation of the architecture of the multi-core processor is improved.
In practical applications, although multiple processor cores in a multi-core processor chip each execute respective codes, data sharing and synchronization are required between the processor cores (such as the processor cores are included in an access device connected to an injection port of each router), so that a multi-core processor hardware structure must support efficient inter-core communication, and performance of an on-chip communication structure will also directly affect performance of the processor.
Thus, network on Chip (NoC) is intended to address communication problems within multi-core processors, where the Network on Chip is an integrated circuit on a Network-based communication subsystem, and the Network on Chip is a router-based packet-switched Network between the systems on Chip. Network-on-chip technology references the interconnect network structure of parallel computers, integrating a large number of computing resources on a single chip and the communication network on chip connecting these resources. Each processor core is provided with an independent router and private caches thereof and are connected together through an on-chip communication network, a message communication mechanism is adopted between the processor cores, and the router and a packet switching technology are used for replacing an on-chip bus of the related technology to complete communication tasks, so that various bottleneck problems caused by bus interconnection of the related technology are solved.
In the embodiment of the invention, in order to realize the flow balance of the network on chip, an arbiter can be arranged in each router, and the data source of each router has two directions: the arbiter is used for deciding the source direction of the data output by the router through the downstream port (one source direction is enabled at a time) when the router transmits each time, namely, selecting the first data packet transmitted by the upstream port or the second data packet input by the injection port as the data transmitted by the downstream port.
Specifically, the arbiter is configured with a control value k, where the control value k is used to determine a selection ratio of the first data packet and the second data packet.
The arbiter can flexibly adjust the selection proportion of the router to the first data packet and the second data packet through the control value k, so that in a specific network-on-chip transmission link, the flexible adjustment of the flow bandwidth of each transmission node in the network-on-chip can be realized through the configuration of the simple control value k, and the flow balance of the network-on-chip can be realized more conveniently and simply. The complexity of this approach is lower than the congestion information adjustment strategy in the related art, without generating a lot of extra power consumption, circuit area and response time.
For example, for a group of routers connected in series in the network on chip (or through which packets are routed in a routing path), the more downstream routers in the direction of transmission receive upstream data (first packets) through upstream ports, the greater the amount of data, because the first packets received by a router are the accumulation of injected data (second packets) for all upstream routers before the router, and therefore the greater the amount of data for the first packets (accumulation results) for the more downstream routers.
Therefore, for the router further back, the control value k of the router can be configured, so that the router further back selects the larger the duty ratio of the upstream data through the arbiter, namely, the router further back provides larger bandwidth allocation for the upstream data with larger data quantity; for the router which is more advanced, the control value k of the router can be configured, so that the router which is more advanced can select the smaller the duty ratio of upstream data through the arbiter, namely the router which is more advanced can provide less bandwidth allocation for the upstream data with smaller data quantity, thereby realizing the flow balance of the network on chip.
It should be noted that, referring to fig. 2, a network-on-chip of a grid structure is shown, and the network-on-chip structure of the embodiment of the present invention may be specifically applied to any transverse column 10, any longitudinal column 20, and any diagonal column 30 in the grid structure. In addition, referring to fig. 3, a network-on-chip of a ring structure is shown, and the network-on-chip structure of the embodiment of the present invention may be applied to the ring structure.
In summary, according to the scheme of the invention, the arbiter of the router can flexibly adjust the selection ratio of the router to the first data packet and the second data packet through the control value k, so that in a specific network-on-chip transmission link, the flexible adjustment of the flow bandwidths of all transmission nodes in the network-on-chip can be realized through the simple configuration of the control value k, thereby realizing the flow balance of the network-on-chip more conveniently and simply. The complexity of this approach is lower than the strategy based on congestion information adjustment without the need to generate a significant amount of additional power consumption, circuit area, and response time.
Optionally, the ratio of the number of times the arbiter selects the first data packet to the number of times the arbiter selects the second data packet is k; the control value k of the router upstream is greater than the control value k of the router downstream.
In the embodiment of the invention, the control value k specifically acts on the arbiter, so that the ratio of the number of times the arbiter selects the first data packet to the number of times the arbiter selects the second data packet is k; that is, in the k+1 arbitration results, the upstream port may win k times (the upstream port wins once, i.e., the router may transmit the first packet transmitted by the upstream port currently through the transmitting operation of the downstream port), and the injection port may win 1 time (the injection port wins once, i.e., the router may transmit the second packet transmitted by the injection port currently through the transmitting operation of the downstream port). Therefore, the arbiter of the router can flexibly adjust the flow bandwidth of the node (i.e. the current flow bandwidth is inclined to the upstream port or the downstream port) by controlling the value k, which is beneficial to improving the convenience and accuracy of flow equalization of the network on chip.
Further, for a group of routers connected in series in the network on chip, the more the router is located at the back in the transmission direction, the larger the data amount of the first data packet received by the router through the upstream port is, because the first data packet received by the router is the accumulation of the second data packets of all the upstream routers before the router, so in order to realize flow balancing, the control value k of the router located at the upstream can be configured to be larger than the control value k of the router located at the downstream, so that for the router located at the back, the larger bandwidth allocation can be provided for the upstream data with the larger data amount through the larger control value k, and the smaller bandwidth allocation can be provided for the injected data with the smaller data amount; and for the router which is more forward, more reasonable bandwidth allocation is provided for upstream data and injection data through a smaller control value k, so that flow balance of the network on chip is realized.
For example, for four routers in series: the router A, the router B, the router C and the router D are used for transmitting data in the directions from the router A to the router D, and as the router A and the router D are end point routers, the arbiter does not need to arbitrate traffic, the router A and the router D do not need to be configured with a control value k, and as the router B and the router C are more backward, the control value k of the router C can be set to be larger than the control value k of the router B, so that traffic balance of all routers in the serial line is realized.
Optionally, the value of the control value k of the router is determined by an accumulated value of the number of injection ports of each of all routers upstream of the router.
In the embodiment of the invention, the first data packet received by the current router is the accumulation of the second data packets of all upstream routers before the router.
For example, referring to fig. 4, assuming that each of 5 routers has 1 injection port, 1 packet is injected into each injection port, since router 1 is a starting router without upstream input, the total statistical traffic output by router 1 to router 2 is 1, i.e., the traffic received by the upstream port of router 2 is 1 at maximum, the total statistical traffic output by router 2 to router 3 after superimposing the injection traffic of router 2 is 2, i.e., the traffic received by the upstream port of router 3 is 2 at maximum, and similarly, the total statistical traffic output by router 3 to router 4 is 3, i.e., the traffic received by the upstream port of router 4 is 3 at maximum. The router 5 is used as a destination router, and the arbiter does not need to work, i.e. the control value k is not required to be configured.
For router 2, control value k=1 may be configured, because the upstream input traffic of router 2 is 1, the local injection traffic is 1, and when the downstream port of router 2 outputs traffic, control value k=1 may have a duty ratio of 1:1, a step of;
For router 3, control value k=2 may be configured, because the upstream input traffic of router 3 is 2, the local injection traffic is 1, and when the downstream port of router 2 outputs traffic, control value k=2 may have a duty ratio of 2:1, a step of;
for router 4, control value k=3 may be configured, because the upstream input traffic of router 3 is 3, the local injection traffic is 1, and control value k=2 may have a duty ratio of 3:1.
Based on the allocation, larger bandwidth allocation can be provided for upstream data with larger data quantity by larger control value k for the router with more back, smaller bandwidth allocation can be provided for injection data with smaller data quantity, so that each router can level the traffic bandwidth of the network on chip, and traffic balance of the network on chip can be realized.
Optionally, the number of routers is greater than or equal to 4, and the number of injection ports of each router is greater than or equal to 1.
In the embodiment of the invention, since the starting router and the ending router in the plurality of routers connected in series do not need an arbiter to arbitrate traffic (the starting router outputs certain injection traffic and the ending router does not need output traffic), at least 2 routers can participate in the configuration of the control value k under the condition that the number of the routers is greater than or equal to 4, and the characteristic that the control value k of the router at the upstream is greater than the control value k of the router at the downstream is formed, so that traffic balance is realized.
In addition, the number of injection ports of each router is greater than or equal to 1, and the router can set a plurality of injection ports to respectively dock a plurality of access devices so as to realize richer functions.
Optionally, the routers are sequentially connected in series, and among the routers sequentially connected in series, the control value k of the router at the head end and the tail end is a random value.
In the embodiment of the invention, since the starting router outputs the injection flow to the downstream, and the destination router does not need to output the flow, the starting router and the destination router in the plurality of routers connected in series do not need to arbitrate the flow, so one scheme can set the control value k of the routers at the head end and the tail end to be a random value, and the other scheme can also not set the control value k of the routers at the head end and the tail end.
Optionally, when the number of the injection ports is multiple, the arbiter is configured to select a target injection port from the multiple injection ports according to a preset selection policy, and select the first data packet or the second data packet transmitted by the target injection port according to the control value k, and transmit the first data packet or the second data packet to an upstream port of the next router through a downstream port.
Optionally, the preset selection policy includes: random selection policy, polling selection policy, priority selection policy.
In one implementation manner of the embodiment of the present invention, when the number of injection ports of the router is multiple, a target injection port may be selected from the multiple injection ports of the router, and then, according to the control value k, a first data packet or a second data packet transmitted by the target injection port is selected and transmitted to an upstream port of a next router through a downstream port.
Referring to fig. 5, assuming that 5 routers each have 2 injection ports, 1 packet is injected into each of 1 injection port, a control value k=1 may be configured for router 2, a control value k=2 may be configured for router 3, and a control value k=3 may be configured for router 4.
In the process of executing the traffic transmission, each router can determine the target injection port from two injection ports of the router, then select the first data packet or the second data packet transmitted by the target injection port for output through the arbiter according to the configured control value k, wherein the router 1 and the router 5 serve as endpoint routers, only the target injection port is determined, and the arbiter is not needed to arbitrate.
Wherein, the random selection strategy refers to randomly selecting a target injection port from a plurality of injection ports; the polling selection strategy refers to selecting a target injection port according to the polling strategy sequence, for example, assuming that the router is provided with three injection ports, the current injection port 1 is selected as the target injection port, the next injection port 2 is selected as the target injection port, and the next injection port 3 is selected as the target injection port, so that the cycle is performed; the priority selection strategy is to set corresponding priorities for all injection ports in advance, and preferentially select the injection port with the higher priority as the target injection port during decision.
In another implementation manner of the embodiment of the present invention, in a case where the number of injection ports of a router is plural, the value of the control value k of each router may be determined by an accumulated value of the number of injection ports of each of all routers upstream of the router.
Referring to fig. 5, it is assumed that 5 routers each have 2 injection ports, 1 packet at a time, 1 injection port at a time.
The total statistical flow output by the router 1 to the router 2 is 2, that is, the maximum flow received by the upstream port of the router 2 is 2, after the injection flow of the router 2 is superimposed, the total statistical flow output by the router 2 to the router 3 is 4, that is, the maximum flow received by the upstream port of the router 3 is 4, and similarly, the total statistical flow output by the router 3 to the router 4 is 6, that is, the maximum flow received by the upstream port of the router 4 is 6.
The control value k=2 may be configured for router 2, the control value k=4 may be configured for router 3, and the control value k=6 may be configured for router 4.
Optionally, referring to fig. 6, a schematic structural diagram of a router is shown, where the router further includes: a counter; the counter is used for: counting a first data volume obtained by a router from an upstream router in a preset time period and a second data volume injected into the router through an injection port in the preset time period; the counter is also used for: and controlling the data receiving strategies of the upstream port and the injection port of the router according to the comparison result of the ratio of the first data quantity and the second data quantity and the control value k.
In the embodiment of the invention, a statistical back pressure strategy can be further introduced to assist in achieving flow equalization, the back pressure is that a certain node in a data transmission line becomes a bottleneck, the processing rate is not up to the rate of upstream data transmission, but the upstream data transmission is required to be limited, based on the strategy, a counter in a router can count a first data volume obtained by the router from the upstream router in a preset time period and a second data volume injected into the router through an injection port in the preset time period, the ratio of the first data volume to the second data volume is compared with a control value k, finally, whether the situation that the data flow of a certain port (the upstream port or the injection port) is overlarge exists at present is determined by utilizing the comparison result, if the situation occurs, the data receiving strategy of the upstream port and the injection port of the router is controlled, namely, the data flow of the upstream port is restrained when the data flow of the upstream port is overlarge, and the data flow of the injection port is restrained when the data flow of the injection port is overlarge.
Optionally, if the ratio is greater than k+m, controlling the arbiter to stop working, and preferentially acquiring the data packet through the injection port; under the condition that the ratio is smaller than k-m, controlling the arbiter to stop working and preferentially acquiring the data packet through the upstream port; under the condition that the ratio is smaller than or equal to k+m and the ratio is larger than or equal to k-m, the priority strategies of the upstream port and the injection port are canceled, and the arbiter is controlled to select a first data packet or a second data packet to be transmitted to the upstream port of the next router through the downstream port according to the control value k; wherein m is a positive integer. For example, m is 1,2,3, 4 … …
In the embodiment of the invention, if the ratio of the first data volume to the second data volume is greater than k+m, the upstream port flow of the current router is considered to be far greater than the local injection port flow, at this time, the upstream port flow needs to be restrained, that is, the arbiter is controlled to stop working, and the data packet is preferentially acquired through the local injection port (the data packet of the injection port is acquired after the data packet of the injection port is acquired), in the restraining process, the ratio of the first data volume to the second data volume is continuously reduced until the ratio is reduced to be in the range of k-m to k+m, the surge flow of the upstream port is considered to be absent in the preset time period, at this time, the priority strategy of the injection port can be canceled, and the arbitration strategy of the arbiter is restored.
In addition, if the ratio of the first data amount to the second data amount is smaller than k-m, the flow of the local injection port of the current router is considered to be far larger than the flow of the upstream port, and the local port flow is restrained at this time, that is, the arbiter is controlled to stop working, and the data packet is preferentially acquired through the upstream port (the data packet of the injection port is acquired after the data packet of the upstream port is acquired). In the inhibiting process, the ratio of the first data amount to the second data amount is increased continuously until the ratio is increased to be in the range of k-m to k+m, and the situation that the surge flow of the injection port does not exist in the preset time period is considered, at this time, the priority strategy of the upstream port can be canceled, and the arbitration strategy of the arbiter is restored.
In summary, according to the scheme of the invention, the arbiter of the router can flexibly adjust the selection ratio of the router to the first data packet and the second data packet through the control value k, so that in a specific network-on-chip transmission link, the flexible adjustment of the flow bandwidths of all transmission nodes in the network-on-chip can be realized through the simple configuration of the control value k, thereby realizing the flow balance of the network-on-chip more conveniently and simply. The complexity of this approach is lower than the strategy based on congestion information adjustment without the need to generate a significant amount of additional power consumption, circuit area, and response time.
Referring to fig. 7, a flow balancing method of a network on chip according to an embodiment of the present invention is applied to a router in a network on chip structure, where the method includes:
step 101, obtaining a control value k configured for an arbiter in the router.
Step 102, selecting, by the arbiter, a first data packet transmitted by a previous router through a downstream port, or selecting a second data packet input by an injection port of the router, and transmitting the first data packet to an upstream port of a next router through the downstream port of the router according to the control value k, where the control value k is used to determine a selection ratio of the first data packet and the second data packet.
The steps 101-102 may be specifically referred to the description of the network-on-chip structure embodiment, and are not described herein.
In summary, according to the scheme of the invention, the arbiter of the router can flexibly adjust the selection ratio of the router to the first data packet and the second data packet through the control value k, so that in a specific network-on-chip transmission link, the flexible adjustment of the flow bandwidths of all transmission nodes in the network-on-chip can be realized through the simple configuration of the control value k, thereby realizing the flow balance of the network-on-chip more conveniently and simply. The complexity of this approach is lower than the strategy based on congestion information adjustment without the need to generate a significant amount of additional power consumption, circuit area, and response time.
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
It is to be understood that the invention is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims (10)

1. A network-on-chip architecture, the network-on-chip architecture comprising:
a plurality of routers;
The router includes: an arbiter and a plurality of data ports; the arbiter is configured with a control value k;
The plurality of data ports includes: the system comprises an upstream port, an injection port and a downstream port, wherein the upstream port is used for receiving a first data packet transmitted by a previous router through the downstream port, and the injection port is used for receiving a second data packet transmitted by access equipment;
The arbiter is configured to select the first data packet or the second data packet to be transmitted to an upstream port of a next router through a downstream port according to the control value k, where the control value k is used to determine a selection ratio of the first data packet and the second data packet.
2. The network on chip architecture of claim 1, wherein a ratio of a number of times the first data packet is selected by the arbiter to a number of times the second data packet is selected by the arbiter is k; the control value k of the router upstream is greater than the control value k of the router downstream.
3. The network on chip architecture of claim 2, wherein the value of the control value k for the router is determined by an accumulated value of the number of injection ports for each of all routers upstream of the router.
4. A network on chip architecture as recited in claim 3, wherein the number of routers is greater than or equal to 4 and the number of injection ports for each router is greater than or equal to 1.
5. The network on chip structure according to claim 1, wherein a plurality of the routers are sequentially connected in series, and control values k of routers at a head end and a tail end among the plurality of routers sequentially connected in series are random values.
6. The network on chip architecture of claim 1, wherein, in the case that the number of the injection ports is plural, the arbiter is configured to select a target injection port from the plural injection ports according to a preset selection policy, and select the first packet or the second packet transmitted by the target injection port according to the control value k, and transmit the second packet to an upstream port of a next router through a downstream port.
7. The network-on-chip architecture of claim 6, wherein the pre-set selection policy comprises: random selection policy, polling selection policy, priority selection policy.
8. The network on chip architecture of claim 1, wherein the router further comprises: a counter;
the counter is used for: counting a first data volume obtained by the router from an upstream router in a preset time period and a second data volume injected into the router through the injection port in the preset time period;
the counter is also used for: and controlling the data receiving strategies of the upstream port and the injection port of the router according to the comparison result of the ratio of the first data volume to the second data volume and the control value k.
9. The network on chip architecture of claim 8, wherein in the case where the ratio is greater than k+m, the arbiter is controlled to stop working and obtain the data packet through the injection port preferentially;
Under the condition that the ratio is smaller than k-m, controlling the arbiter to stop working, and preferentially acquiring the data packet through an upstream port;
under the condition that the ratio is smaller than or equal to k+m and the ratio is larger than or equal to k-m, canceling the priority strategies of the upstream port and the injection port, and controlling the arbiter to select the first data packet or the second data packet to be transmitted to the upstream port of the next router through the downstream port according to the control value k;
Wherein m is a positive integer.
10. A method for balancing traffic of a network on chip, applied to a router in a network on chip structure according to any one of claims 1-9, the method comprising:
obtaining a control value k configured for an arbiter in the router;
And selecting a first data packet transmitted by a last router through a downstream port through the arbiter or selecting a second data packet input by an injection port of the router according to the control value k, and transmitting the first data packet to an upstream port of a next router through the downstream port of the router, wherein the control value k is used for determining the selection ratio of the first data packet and the second data packet.
CN202410153456.5A 2024-02-02 2024-02-02 Network-on-chip structure and flow balancing method of network-on-chip Pending CN118101557A (en)

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