CN118100626B - Power supply regulation and control method and system based on three-way staggered parallel PFC current sharing control - Google Patents

Power supply regulation and control method and system based on three-way staggered parallel PFC current sharing control Download PDF

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CN118100626B
CN118100626B CN202410487644.1A CN202410487644A CN118100626B CN 118100626 B CN118100626 B CN 118100626B CN 202410487644 A CN202410487644 A CN 202410487644A CN 118100626 B CN118100626 B CN 118100626B
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current
pfc
sharing control
pfc circuit
circuit system
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CN118100626A (en
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戴畅
陈延明
黄修江
张振伟
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Shenzhen Lianming Power Supply Co ltd
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Shenzhen Lianming Power Supply Co ltd
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Abstract

The invention relates to the field of current sharing control, and discloses a power supply regulation and control method and a system based on three-way staggered parallel PFC current sharing control, wherein the method comprises the following steps: the method comprises the steps of obtaining a circuit connection topological structure which enables the electric energy output efficiency of a power supply to be highest, constructing three-way staggered parallel PFC circuit systems based on a three-way staggered parallel connection mode, carrying out power-on test analysis, current-sharing regulation and control analysis and power loss analysis on the three-way staggered parallel PFC circuit systems, and correspondingly carrying out power-on optimization, current-sharing control optimization and power loss optimization on the three-way staggered parallel PFC circuit systems based on analysis results. According to the invention, the intelligent regulation and control can be performed on the three-way staggered parallel PFC circuit system, so that the stability, reliability and efficiency of each element in the system, such as a power supply, are improved, the service life of the circuit element is prolonged, and the energy loss and electromagnetic interference are reduced.

Description

Power supply regulation and control method and system based on three-way staggered parallel PFC current sharing control
Technical Field
The invention relates to the field of current sharing control, in particular to a power supply regulation and control method and system based on three-way staggered parallel PFC current sharing control.
Background
The three-way parallel staggered PFC is also called as a three-way parallel staggered PFC circuit, and PFC is Power Factor Correction, which means power factor correction. A three-way parallel staggered PFC circuit is used for improving the design of the power factor of a power supply system. In this design, there are typically three PFC circuits connected in parallel, each circuit being responsible for handling a portion of the load of the power supply. Moreover, the duty cycles of these circuits are staggered neatly to avoid simultaneous operation, thereby reducing impact on the power system. The three-way parallel staggered PFC circuit comprises a circuit structure and a power supply, and when the three-way parallel staggered PFC circuit works, the current sharing control is required for the three-way parallel staggered PFC circuit because the power supply and the circuit can have the conditions of reduced precision and service life of circuit elements or unbalanced load of other circuits caused by overload of the circuit. The current sharing control of the three-way parallel staggered PFC circuit can improve the stability, reliability and efficiency of the system, prolong the service life of circuit elements, reduce energy loss and electromagnetic interference, and have important significance for ensuring the normal operation of the circuit and improving the performance of the system.
Disclosure of Invention
The invention overcomes the defects of the prior art and provides a power supply regulation and control method and a system based on three-way staggered parallel PFC current sharing control.
In order to achieve the above purpose, the invention adopts the following technical scheme:
The first aspect of the invention provides a power supply regulation and control method based on three-way staggered parallel PFC current sharing control, which comprises the following steps:
Different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
Carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
Performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
And carrying out power loss analysis on the current-sharing control qualified PFC circuit system, and carrying out power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result.
Further, in a preferred embodiment of the present invention, the acquiring different circuit connection topologies, analyzing the different circuit connection topologies, and based on the analysis result, combining a three-way interleaving parallel scheme to construct a three-way interleaving parallel PFC circuit system, which specifically includes:
Acquiring a target power supply, and simultaneously acquiring a PFC circuit element and a load which can be connected with the target power supply, wherein the PFC circuit element and the load are calibrated as a target PFC circuit element and a target load;
Based on the target PFC circuit elements, the target loads and the target power supply, retrieving circuit connection topological structures among all the target PFC circuit elements, the target loads and the target power supply in a big data network, and defining the circuit connection topological structures as a circuit connection topological structure set;
Calculating the electric energy output efficiency of a target power supply under different circuit connection topological structures in a circuit connection topological structure set, constructing an electric energy output efficiency ranking table, screening and obtaining the circuit connection topological structure with the highest electric energy output efficiency based on the electric energy output efficiency ranking table, and calibrating the circuit connection topological structure as the target circuit connection topological structure;
Based on a target circuit connection topological structure, connecting a target PFC circuit element, a target load and a target power supply to obtain a single-path PFC circuit, and introducing a three-path staggered parallel scheme, wherein the three-path PFC circuit performs three-path staggered parallel processing to obtain a three-path staggered parallel PFC circuit system.
Further, in a preferred embodiment of the present invention, the power-on test is performed on the three-way interleaved parallel PFC circuit system, and based on the power-on test result, the three-way interleaved parallel PFC circuit system is optimized to obtain a preliminary qualified circuit system, which specifically includes:
starting the three-way staggered parallel PFC circuit system, presetting an electrifying test time, and monitoring whether all the target PFC circuits have current passing through in real time through a universal meter in the electrifying test time;
If all the target PFC circuits can continuously pass the current in the power-on test time, the three-way parallel PFC circuit system is marked as a preliminary qualified circuit system, and if the target PFC circuits cannot continuously pass the current in the power-on test time, the corresponding target PFC circuits are marked as abnormal PFC circuits;
Performing power-on analysis on PFC circuit elements on an abnormal PFC circuit through a universal meter, if the PFC circuit elements cannot be powered on, calibrating the corresponding PFC circuit elements as the abnormal PFC circuit elements, and replacing the abnormal PFC circuit elements to enable the abnormal PFC circuit to continuously pass current in power-on test time;
If the abnormal PFC circuit element is replaced and the abnormal PFC circuit cannot continuously pass the current within the power-on test time, acquiring a controller of the three-way staggered parallel PFC circuit system and acquiring working parameters of the controller when the three-way staggered parallel PFC circuit system works;
Based on a Markov chain algorithm, fault state tracing analysis is carried out on working parameters of the controller to obtain a fault position of the controller, and overhaul scheme output of the fault position of the controller is searched in a big data network, so that all target PFC circuits can continuously pass current in power-on test time of the three-way staggered parallel PFC circuit system.
Further, in a preferred embodiment of the present invention, the current sharing control analysis is performed on the preliminary qualified circuit system, and the current sharing control optimization is performed on the preliminary qualified circuit system based on the current sharing control analysis, which specifically includes:
The output ends of three paths of target PFC circuits in the primary qualified circuit system are connected with a current sampling circuit to obtain a type of PFC circuit, and the current testing time is preset;
In the power-on test time, controlling a target power supply to output power to three PFC circuits, monitoring output current values of the PFC circuits of different paths in real time, and calculating real-time deviation values among the output current values of the PFC circuits of different paths;
if the real-time deviation value among the output current values of the PFC circuits of different paths is kept smaller than a preset threshold value in the power-on test time, the primary qualified circuit system is calibrated as a current-sharing control qualified PFC circuit system;
If the real-time deviation value among the output current values of the PFC circuits of different paths is not kept smaller than a preset threshold value in the power-on test time, carrying out output current test on three PFC circuits through a universal meter to obtain an output current standard value, and judging whether the output current standard value and the output current value of the PFC circuits of the same path are unequal;
if so, carrying out working temperature analysis on the current sampling circuits of the PFC circuits, and if the working temperatures of the current sampling circuits of the PFC circuits are not maintained in a preset range in the power-on test time, connecting a temperature compensation circuit into the PFC circuits, so that the working temperatures of the current sampling circuits of the PFC circuits are maintained in the preset range in the power-on test time;
If the working temperature of the current sampling circuit of the PFC circuit is maintained within a preset range in the power-on test time, but the output current standard value and the output current value of the PFC circuit are still not equal, a filter is added into the current sampling circuit, and the filter is used for filtering high-frequency noise of the current sampling circuit, so that the output current standard value and the output current value of the PFC circuit are equal, and the PFC circuit to be optimized in current sharing control is obtained;
If the real-time deviation value between the output current values of the PFC circuits to be optimized for the current sharing control of different paths is kept smaller than a preset threshold value in the power-on test time, combining the PFC circuits to be optimized for the current sharing control with a target power supply to obtain a PFC circuit system to be optimized for the current sharing control, and performing the current sharing control optimization on the PFC circuit system to be optimized for the current sharing control to obtain a PFC circuit system qualified for the current sharing control.
Further, in a preferred embodiment of the present invention, the current sharing control optimization is performed on the PFC circuit system to be optimized for current sharing control, so as to obtain a qualified current sharing control PFC circuit system, which specifically includes:
Starting a current sharing control PFC circuit system to be optimized, obtaining output current values of the current sharing control PFC circuits to be optimized of different paths in the current sharing control PFC circuit system to be optimized, calibrating the output current values as current values to be analyzed, simultaneously presetting a current expected value, and calculating error values of the current values to be analyzed and the current expected value;
Acquiring a current sharing regulation module, and generating an error signal in the current sharing regulation module based on the error value of the current value to be analyzed and the current expected value;
Acquiring a circuit structure of the PFC circuit to be optimized, analyzing output current values of various points of the PFC circuit to be optimized based on the circuit structure of the PFC circuit to be optimized, and marking points with different output current values from preset values as abnormal circuit points;
Constructing a deep neural network model, and introducing the abnormal circuit points and the error signals into the deep neural network model to update the error signals to obtain optimized error signals, wherein the optimized error signals reflect the sizes and directions of the current at each point of the PFC circuit to be optimized by current sharing control;
And identifying the optimized error signal through a current sharing control module, and based on the optimized error signal, using the current sharing control module to control parameters of the current sharing control PFC circuit to be optimized of different paths in the PFC circuit system to be optimized in real time, so that the real-time deviation value between the output current values of the PFC circuit to be optimized of the current sharing control of the different paths is kept smaller than a preset threshold value, and the qualified PFC circuit system for current sharing control is obtained.
Further, in a preferred embodiment of the present invention, the power loss analysis is performed on the current-sharing control qualified PFC circuit system, and the power loss optimization is performed on the current-sharing control qualified PFC circuit system based on the power loss analysis result, which specifically includes:
Operating the current-sharing control qualified PFC circuit system, acquiring real-time output power of all target loads in the current-sharing control qualified PFC circuit system, calculating total output power of the current-sharing control qualified PFC circuit system based on the real-time output power of all target loads, and acquiring output power of a target power supply;
Calculating a deviation value between the total output power of the current-sharing control qualified PFC circuit system and the output power of the target power supply, calibrating the deviation value as a power deviation value, if the preset maximum power deviation value is larger than the maximum power deviation value, acquiring the ambient temperature of the current-sharing control qualified PFC circuit system around the running process, and calibrating the ambient temperature as an ambient temperature;
real-time adjusting the environmental temperature, and judging whether the power deviation value is smaller than the maximum power deviation value in real time in the environmental temperature adjusting process;
If so, calibrating the environment temperature corresponding to the power deviation value smaller than the maximum power deviation value as an outputtable temperature, and searching a scheme for maintaining the environment temperature around the target power supply as the outputtable temperature in a big data network to output so that the power deviation value is smaller than the maximum power deviation value, thereby obtaining a power loss optimization PFC circuit system;
If not, performing electromagnetic interference intensity measurement on the periphery when the current-sharing control qualified PFC circuit system is operated, obtaining the electromagnetic interference intensity of each position of the current-sharing control qualified PFC circuit system, and calibrating the position with the electromagnetic interference intensity larger than a preset value as an electromagnetic interference abnormal position;
And acquiring an electromagnetic filter, controlling the electromagnetic filter to perform electromagnetic filtering treatment on the electromagnetic interference abnormal position when the current-sharing control qualified PFC circuit system runs, so that the power deviation value is smaller than the maximum power deviation value, and obtaining the power loss optimization PFC circuit system.
The second aspect of the present invention also provides a power supply regulation system based on three-way interleaved parallel PFC current sharing control, the power supply regulation system including a memory and a processor, the memory storing a power supply regulation method, the power supply regulation method when executed by the processor implementing the following steps:
Different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
Carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
Performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
And carrying out power loss analysis on the current-sharing control qualified PFC circuit system, and carrying out power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result.
The invention solves the technical defects in the background technology, and has the following beneficial effects: the method comprises the steps of obtaining a circuit connection topological structure which enables the electric energy output efficiency of a power supply to be highest, constructing three-way staggered parallel PFC circuit systems based on a three-way staggered parallel connection mode, carrying out power-on test analysis, current-sharing regulation and control analysis and power loss analysis on the three-way staggered parallel PFC circuit systems, and correspondingly carrying out power-on optimization, current-sharing control optimization and power loss optimization on the three-way staggered parallel PFC circuit systems based on analysis results. According to the invention, the intelligent regulation and control can be performed on the three-way staggered parallel PFC circuit system, so that the stability, reliability and efficiency of each element in the system, such as a power supply, are improved, the service life of the circuit element is prolonged, and the energy loss and electromagnetic interference are reduced.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other embodiments of the drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 shows a flow chart of a power supply regulation method based on three-way interleaved parallel PFC current sharing control;
FIG. 2 shows a flow chart of a method for current sharing control optimization of preliminary pass circuitry;
fig. 3 shows a program diagram of a power regulation system based on three-way interleaved parallel PFC current sharing control.
Detailed Description
In order that the above-recited objects, features and advantages of the present application will be more clearly understood, a more particular description of the application will be rendered by reference to the appended drawings and appended detailed description. It should be noted that, without conflict, the embodiments of the present application and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those described herein, and therefore the scope of the present invention is not limited to the specific embodiments disclosed below.
Fig. 1 shows a flow chart of a power supply regulation and control method based on three-way staggered parallel PFC current sharing control, which comprises the following steps:
S102: different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
s104: carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
s106: performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
S108: and carrying out power loss analysis on the current-sharing control qualified PFC circuit system, and carrying out power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result.
Further, in a preferred embodiment of the present invention, the acquiring different circuit connection topologies, analyzing the different circuit connection topologies, and based on the analysis result, combining a three-way interleaving parallel scheme to construct a three-way interleaving parallel PFC circuit system, which specifically includes:
Acquiring a target power supply, and simultaneously acquiring a PFC circuit element and a load which can be connected with the target power supply, wherein the PFC circuit element and the load are calibrated as a target PFC circuit element and a target load;
Based on the target PFC circuit elements, the target loads and the target power supply, retrieving circuit connection topological structures among all the target PFC circuit elements, the target loads and the target power supply in a big data network, and defining the circuit connection topological structures as a circuit connection topological structure set;
Calculating the electric energy output efficiency of a target power supply under different circuit connection topological structures in a circuit connection topological structure set, constructing an electric energy output efficiency ranking table, screening and obtaining the circuit connection topological structure with the highest electric energy output efficiency based on the electric energy output efficiency ranking table, and calibrating the circuit connection topological structure as the target circuit connection topological structure;
Based on a target circuit connection topological structure, connecting a target PFC circuit element, a target load and a target power supply to obtain a single-path PFC circuit, and introducing a three-path staggered parallel scheme, wherein the three-path PFC circuit performs three-path staggered parallel processing to obtain a three-path staggered parallel PFC circuit system.
It should be noted that a complete circuit system includes various circuit elements of a power source, a load, such as a capacitor, a resistor, a switch, and the like. PFC means power factor correction, and PFC circuit is a circuit for improving the power factor of a power supply system. The PFC circuit can be obtained by connecting a power supply, a load and a circuit element, but there are various connection modes among the power supply, the load and the circuit element, so there are various connection topologies among the power supply, the load and the circuit element. The power output efficiency of the power supply under different connection topologies is different, and the connection topology output with the highest power output efficiency of the power supply needs to be selected to construct a single-path PFC circuit. The PFC circuit has three paths, and the three paths of PFC circuits are connected with the power supply in a staggered and parallel mode, so that the load can be dispersed in a plurality of circuits, the load pressure of each circuit is reduced, the output power of each circuit is uniformly distributed, the heat of the circuits is dispersed, the service lives of circuit elements are prolonged, and the three paths of parallel PFC circuit system is obtained.
Further, in a preferred embodiment of the present invention, the power-on test is performed on the three-way interleaved parallel PFC circuit system, and based on the power-on test result, the three-way interleaved parallel PFC circuit system is optimized to obtain a preliminary qualified circuit system, which specifically includes:
starting the three-way staggered parallel PFC circuit system, presetting an electrifying test time, and monitoring whether all the target PFC circuits have current passing through in real time through a universal meter in the electrifying test time;
If all the target PFC circuits can continuously pass the current in the power-on test time, the three-way parallel PFC circuit system is marked as a preliminary qualified circuit system, and if the target PFC circuits cannot continuously pass the current in the power-on test time, the corresponding target PFC circuits are marked as abnormal PFC circuits;
Performing power-on analysis on PFC circuit elements on an abnormal PFC circuit through a universal meter, if the PFC circuit elements cannot be powered on, calibrating the corresponding PFC circuit elements as the abnormal PFC circuit elements, and replacing the abnormal PFC circuit elements to enable the abnormal PFC circuit to continuously pass current in power-on test time;
If the abnormal PFC circuit element is replaced and the abnormal PFC circuit cannot continuously pass the current within the power-on test time, acquiring a controller of the three-way staggered parallel PFC circuit system and acquiring working parameters of the controller when the three-way staggered parallel PFC circuit system works;
Based on a Markov chain algorithm, fault state tracing analysis is carried out on working parameters of the controller to obtain a fault position of the controller, and overhaul scheme output of the fault position of the controller is searched in a big data network, so that all target PFC circuits can continuously pass current in power-on test time of the three-way staggered parallel PFC circuit system.
After the three-way parallel staggered PFC circuit system is constructed, the three-way parallel staggered PFC circuit system needs to be electrified and tested, so that whether the three-way parallel staggered PFC circuit system can pass current or not can be judged, and the defect of a circuit of the three-way parallel staggered PFC circuit system, such as the fault of a circuit element or the defect of a controller of the circuit, cannot be proved by the current. And determining whether the PFC circuit can pass the current or not, and using a universal meter to measure the current passing of all PFC circuit elements, wherein if the PFC circuit cannot pass the current, defect detection is required to be carried out on the PFC circuit. Firstly, a PFC circuit element which cannot pass through current needs to be replaced, whether the PFC circuit can continuously pass through the current in the power-on test time after the circuit element is replaced is judged, and if the PFC circuit cannot pass through the current continuously, the defect of a controller of the circuit is judged. The controller controls and manages the circuit, including controlling the output of current in the circuit, etc. If the controller fails, the efficiency and the passing performance of the current in the circuit may be affected, so that the controller needs to be subjected to failure analysis. The fault analysis of the controller can be implemented by introducing a Markov chain algorithm, which is a random model based on a Markov process, and judging the probability distribution of the fault state by analyzing the transition probabilities of different states. The fault location of the controller can be analyzed and obtained by applying the fault location to the controller. After the fault position of the controller is overhauled, the circuit can continuously pass current in a preset time. The power-on test can be carried out on the three-way parallel staggered PFC circuit system, and the power-on optimization can be carried out on the PFC circuit of the three-way parallel staggered PFC circuit system based on the power-on test result.
Further, in a preferred embodiment of the present invention, the power loss analysis is performed on the current-sharing control qualified PFC circuit system, and the power loss optimization is performed on the current-sharing control qualified PFC circuit system based on the power loss analysis result, which specifically includes:
Operating the current-sharing control qualified PFC circuit system, acquiring real-time output power of all target loads in the current-sharing control qualified PFC circuit system, calculating total output power of the current-sharing control qualified PFC circuit system based on the real-time output power of all target loads, and acquiring output power of a target power supply;
Calculating a deviation value between the total output power of the current-sharing control qualified PFC circuit system and the output power of the target power supply, calibrating the deviation value as a power deviation value, if the preset maximum power deviation value is larger than the maximum power deviation value, acquiring the ambient temperature of the current-sharing control qualified PFC circuit system around the running process, and calibrating the ambient temperature as an ambient temperature;
real-time adjusting the environmental temperature, and judging whether the power deviation value is smaller than the maximum power deviation value in real time in the environmental temperature adjusting process;
If so, calibrating the environment temperature corresponding to the power deviation value smaller than the maximum power deviation value as an outputtable temperature, and searching a scheme for maintaining the environment temperature around the target power supply as the outputtable temperature in a big data network to output so that the power deviation value is smaller than the maximum power deviation value, thereby obtaining a power loss optimization PFC circuit system;
If not, performing electromagnetic interference intensity measurement on the periphery when the current-sharing control qualified PFC circuit system is operated, obtaining the electromagnetic interference intensity of each position of the current-sharing control qualified PFC circuit system, and calibrating the position with the electromagnetic interference intensity larger than a preset value as an electromagnetic interference abnormal position;
And acquiring an electromagnetic filter, controlling the electromagnetic filter to perform electromagnetic filtering treatment on the electromagnetic interference abnormal position when the current-sharing control qualified PFC circuit system runs, so that the power deviation value is smaller than the maximum power deviation value, and obtaining the power loss optimization PFC circuit system.
It should be noted that, the output power of three PFC circuits in the qualified PFC circuit system is controlled by current sharing, and the total output power of the current PFC circuit can be calculated by combining the output power of three PFC circuits. Because the power transmission is possibly lost, the total output power of the PFC circuit and the output power of the power supply are deviated, and if the loss is larger than a preset value, namely, the deviation value between the total output power of the PFC circuit and the output power of the power supply is larger than the preset value, the factor affecting the normal transmission of the power is judged in the transmission process of the power. Firstly, judging the change condition of the environmental temperature of the current-sharing control qualified PFC circuit system during working, wherein the power loss is possibly increased due to the abnormal environmental temperature, for example, the parameter of a circuit element is drifted due to the higher environmental temperature, and the circuit precision and stability are affected. Therefore, the environmental temperature needs to be adjusted, and whether the power deviation value can be kept smaller than the maximum power deviation value under different environmental temperatures is judged in the adjusting process. If so, judging that the deviation is overlarge due to the abnormal ambient temperature, and keeping the ambient temperature to be the output temperature all the time. If not, other problems are proved to exist, so that the deviation value is higher. And judging that the electromagnetic intensity around the PFC circuit system qualified in current sharing control is too high, so that loss exists in the electric energy in the transmission process, and the output power is reduced. And the position with larger electromagnetic interference intensity is required to be found for electromagnetic filtering treatment, so that the power loss of the PFC circuit system qualified for current sharing control is optimized.
Fig. 2 shows a flow chart of a method for optimizing current sharing control of a preliminary pass circuit system, comprising the steps of:
s202: carrying out real-time deviation analysis on output current values of PFC circuits of different paths, and if the real-time deviation value is kept smaller than a preset value, obtaining a current-sharing control qualified PFC circuit system;
S204: when the real-time deviation value among the output current values of the PFC circuits of different paths is not smaller than a preset threshold value, performing defect analysis and defect optimization treatment on the PFC circuits of different paths;
S206: and carrying out current sharing control optimization on the PFC circuit system to be optimized to obtain the PFC circuit system qualified in current sharing control.
Further, in a preferred embodiment of the present invention, when the real-time deviation value between the output current values of the PFC circuits of different paths is not smaller than a preset threshold, defect analysis and defect optimization processing are performed on the PFC circuits of one type, which specifically includes:
If the real-time deviation value among the output current values of the PFC circuits of different paths is not kept smaller than a preset threshold value in the power-on test time, carrying out output current test on three PFC circuits through a universal meter to obtain an output current standard value, and judging whether the output current standard value and the output current value of the PFC circuits of the same path are unequal;
if so, carrying out working temperature analysis on the current sampling circuits of the PFC circuits, and if the working temperatures of the current sampling circuits of the PFC circuits are not maintained in a preset range in the power-on test time, connecting a temperature compensation circuit into the PFC circuits, so that the working temperatures of the current sampling circuits of the PFC circuits are maintained in the preset range in the power-on test time;
If the working temperature of the current sampling circuit of the PFC circuit is maintained within the preset range in the power-on test time, but the output current standard value and the output current value of the PFC circuit are still not equal, a filter is needed to be added in the current sampling circuit, and the filter is used for filtering high-frequency noise of the current sampling circuit, so that the output current standard value and the output current value of the PFC circuit are equal, and the PFC circuit to be optimized in current sharing control is obtained.
The method has the advantages that the stability of each element in the circuit can be improved, the load is balanced, the service life of the element is prolonged, and the overall efficiency and the energy utilization rate of the PFC circuit system are improved. When the power-on test time is over, the real-time deviation value between the output current values of the PFC circuits of different paths is not kept smaller than a preset threshold value, and the current intensity of the PFC circuits of three paths is proved to be unequal, so that the current sharing control of the PFC circuits of three paths is needed. Firstly, judging whether the sampling effect of the current sampling circuit on the output current value of the PFC circuit is abnormal, and if so, affecting the accuracy of current sharing control. And the standard value of the output current can be obtained through testing by the universal meter, and if the output current value is equal to the standard value, the current sampling circuit is judged to be free of problems, and the PFC circuit to be optimized for current sharing control is generated. If the current sampling circuits are not equal, defect tracing is needed to be carried out on the current sampling circuits, and the reasons for the decline of the accuracy of the current sampling circuits are judged. Firstly, judging the working temperature of a current sampling circuit, if the working temperature is abnormal, connecting a temperature compensation circuit into a PFC circuit for temperature compensation, and improving the precision. When the working temperature of the current sampling circuit is normal and the output current standard value and the output current value of the current sampling circuit are still not equal, the current sampling circuit is judged to be influenced by power supply fluctuation, so that high-frequency noise interference exists in the current sampling circuit, and a filter can be used for filtering the high-frequency noise to obtain the PFC circuit to be optimized for current sharing control.
Further, in a preferred embodiment of the present invention, the current sharing control optimization is performed on the PFC circuit system to be optimized for current sharing control, so as to obtain a qualified current sharing control PFC circuit system, which specifically includes:
Starting a current sharing control PFC circuit system to be optimized, obtaining output current values of the current sharing control PFC circuits to be optimized of different paths in the current sharing control PFC circuit system to be optimized, calibrating the output current values as current values to be analyzed, simultaneously presetting a current expected value, and calculating error values of the current values to be analyzed and the current expected value;
Acquiring a current sharing regulation module, and generating an error signal in the current sharing regulation module based on the error value of the current value to be analyzed and the current expected value;
Acquiring a circuit structure of the PFC circuit to be optimized, analyzing output current values of various points of the PFC circuit to be optimized based on the circuit structure of the PFC circuit to be optimized, and marking points with different output current values from preset values as abnormal circuit points;
Constructing a deep neural network model, and introducing the abnormal circuit points and the error signals into the deep neural network model to update the error signals to obtain optimized error signals, wherein the optimized error signals reflect the sizes and directions of the current at each point of the PFC circuit to be optimized by current sharing control;
And identifying the optimized error signal through a current sharing control module, and based on the optimized error signal, using the current sharing control module to control parameters of the current sharing control PFC circuit to be optimized of different paths in the PFC circuit system to be optimized in real time, so that the real-time deviation value between the output current values of the PFC circuit to be optimized of the current sharing control of the different paths is kept smaller than a preset threshold value, and the qualified PFC circuit system for current sharing control is obtained.
It should be noted that, if the real-time deviation value between the output current values of the PFC circuits to be optimized is maintained smaller than the preset threshold value in the power-on test time, it is proved that the influence factors of the current sampling circuit on the output current values are smaller. And constructing a PFC circuit system to be optimized for current sharing control, and carrying out current sharing control on the PFC circuit system to be optimized for current sharing control, so that the current of the PFC circuits of three paths of PFC circuits is shared. Firstly, three paths of current values to be analyzed are obtained, and if the deviation between the current values to be analyzed and the expected values is large, the corresponding PFC circuit needs to be optimized. The current sharing control module is used for adjusting the working state of each circuit according to the difference between the output current of each circuit and a set target value, namely an error signal, so as to realize uniform distribution of the current. Firstly, generating an error signal in a current sharing regulation module, acquiring a circuit structure of a PFC circuit to be optimized for current sharing control, analyzing output currents of different points of the PFC circuit to be optimized for current sharing control based on the circuit structure of the PFC circuit to be optimized for current sharing control, and obtaining points with abnormal output currents, wherein the points are marked as abnormal circuit points. The error signal causes the abnormal circuit points with different sizes and directions, the directions of the error signals are also different, and the current sharing control of the circuit needs to be correspondingly controlled according to the sizes and the directions of the error signals. Because the size direction of the error signal is influenced by the abnormal circuit point position, the abnormal circuit point and the error signal are led into a deep neural network model for deep learning to obtain an optimized error signal, and the working parameters of the current sharing regulation and control module are regulated and controlled based on the optimized error signal, so that the real-time deviation value between the output current values of the PFC circuit to be optimized for current sharing control of different paths is kept smaller than a preset threshold value, and the PFC circuit system qualified for current sharing control is obtained.
In addition, the power supply regulation and control method based on three-way staggered parallel PFC current sharing control further comprises the following steps:
in a power loss optimization PFC circuit system, an output current value is obtained in real time by using a current sampling circuit, and is calibrated into a class of current values;
presetting an overcurrent value, connecting a current detection module in parallel in a current sampling circuit, and analyzing the magnitude relation between a class of current values and the overcurrent value in real time based on the current detection module;
If the current value is smaller than the overcurrent value, the power loss optimization PFC circuit system is controlled to continuously operate, and if the current value is larger than the overcurrent value, a current limiting signal and an alarm signal are sent to a controller through a current detection module in the power loss optimization PFC circuit system;
And after the controller receives the current limiting signal and the alarm signal, the controller sends out alarm information, and adjusts the output power of the target power supply in real time through the controller, when the output current value of the power loss optimization PFC circuit system is smaller than the overcurrent value, the output power of the current target power supply is obtained, calibrated to be qualified output power, and the output power of the target power supply is maintained to be qualified output power in the power loss optimization PFC circuit system.
If there is an abnormal current during the operation of the circuit, the current needs to be over-current protected. Current foldback is generally an excessive output power of a power supply, resulting in an excessive power received by a load, resulting in a load short circuit, a circuit element short circuit, or the like. The overcurrent protection of the circuit can ensure that circuit elements are not damaged, and the stability and the reliability of a circuit system are ensured. The output current value of the circuit system is obtained through the current sampling circuit, the current detection module is used for judging whether the output current value is overcurrent or not, if so, the controller is required to send an alarm signal and a current limiting signal, wherein the alarm signal can prompt a worker that the circuit is overcurrent, and maintenance is required. The current limit signal may be a power output power adjustment of the circuitry by the controller to reduce the current value to cause the circuitry to not over-current.
In addition, the power supply regulation and control method based on three-way staggered parallel PFC current sharing control further comprises the following steps:
If the output current value of the power loss optimization PFC circuit system is not smaller than the overcurrent value when the controller adjusts the output power of the target power supply in real time, the power loss optimization PFC circuit system is calibrated as the PFC circuit system to be optimized for overcurrent protection;
in the PFC circuit system to be optimized for overcurrent protection, a target power supply is calibrated as a power supply to be optimized, the operation of the power supply to be optimized is controlled, the fluctuation of the output voltage frequency of the power supply to be optimized is monitored in real time, and an output voltage frequency waveform diagram is constructed based on the fluctuation of the output voltage frequency of the power supply to be optimized;
Performing waveform analysis on the output voltage frequency waveform diagram, presetting a standard frequency threshold, connecting a voltage stabilizer in parallel in a PFC circuit system to be optimized for overcurrent protection when the output voltage frequency is greater than the standard frequency threshold, and performing voltage stabilization treatment on a power supply to be optimized based on the voltage stabilizer to enable the output voltage frequency to be maintained within the standard frequency threshold, so as to obtain the optimized power supply;
And obtaining the overcurrent protection optimized PFC circuit system based on the optimized power supply.
It should be noted that, if the output power of the target power supply is adjusted in real time by the controller, the output current value of the power loss optimization PFC circuit system is not smaller than the overcurrent value, which proves that the current limiting effect of the power loss optimization PFC circuit system by the controller is poor, that is, the overcurrent protection effect is not present. And judging that the power supply of the PFC circuit system is in problem, namely the power supply to be optimized. The power supply output voltage of the power supply to be optimized is abnormal, so that the overcurrent state of the output voltage of the power supply to be optimized can be known according to frequency fluctuation, and the power supply to be optimized is stabilized through a voltage stabilizer, so that an overcurrent protection optimized PFC circuit system is obtained. The over-current protection optimizing PFC circuit system can normally perform over-current protection.
As shown in fig. 3, the second aspect of the present invention further provides a power supply regulation system based on three-way interleaved parallel PFC current sharing control, where the power supply regulation system includes a memory 31 and a processor 32, where a power supply regulation method is stored in the memory 31, and when the power supply regulation method is executed by the processor 32, the following steps are implemented:
Different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
Carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
Performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
And carrying out power loss analysis on the current-sharing control qualified PFC circuit system, and carrying out power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result.
The foregoing is merely illustrative embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think about variations or substitutions within the technical scope of the present invention, and the invention should be covered. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims (5)

1. The power supply regulation and control method based on three-way staggered parallel PFC current sharing control is characterized by comprising the following steps of:
Different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
Carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
Performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
performing power loss analysis on the current-sharing control qualified PFC circuit system, and performing power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result;
The method comprises the steps of carrying out current sharing control analysis on a primary qualified circuit system, and carrying out current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis, wherein the current sharing control optimization comprises the following specific steps:
The output ends of three paths of target PFC circuits in the primary qualified circuit system are connected with a current sampling circuit to obtain a type of PFC circuit, and the current testing time is preset;
In the power-on test time, controlling a target power supply to output power to three PFC circuits, monitoring output current values of the PFC circuits of different paths in real time, and calculating real-time deviation values among the output current values of the PFC circuits of different paths;
if the real-time deviation value among the output current values of the PFC circuits of different paths is kept smaller than a preset threshold value in the power-on test time, the primary qualified circuit system is calibrated as a current-sharing control qualified PFC circuit system;
If the real-time deviation value among the output current values of the PFC circuits of different paths is not kept smaller than a preset threshold value in the power-on test time, carrying out output current test on three PFC circuits through a universal meter to obtain an output current standard value, and judging whether the output current standard value and the output current value of the PFC circuits of the same path are unequal;
if so, carrying out working temperature analysis on the current sampling circuits of the PFC circuits, and if the working temperatures of the current sampling circuits of the PFC circuits are not maintained in a preset range in the power-on test time, connecting a temperature compensation circuit into the PFC circuits, so that the working temperatures of the current sampling circuits of the PFC circuits are maintained in the preset range in the power-on test time;
If the working temperature of the current sampling circuit of the PFC circuit is maintained within a preset range in the power-on test time, but the output current standard value and the output current value of the PFC circuit are still not equal, a filter is added into the current sampling circuit, and the filter is used for filtering high-frequency noise of the current sampling circuit, so that the output current standard value and the output current value of the PFC circuit are equal, and the PFC circuit to be optimized in current sharing control is obtained;
If the real-time deviation value between the output current values of the PFC circuits to be optimized for the current sharing control of different paths is kept smaller than a preset threshold value in the power-on test time, combining the PFC circuits to be optimized for the current sharing control with a target power supply to obtain a PFC circuit system to be optimized for the current sharing control, and performing the current sharing control optimization on the PFC circuit system to be optimized for the current sharing control to obtain a qualified PFC circuit system for the current sharing control;
the PFC circuit system to be optimized for current sharing control is subjected to current sharing control optimization, and the qualified PFC circuit system for current sharing control is obtained, specifically:
Starting a current sharing control PFC circuit system to be optimized, obtaining output current values of the current sharing control PFC circuits to be optimized of different paths in the current sharing control PFC circuit system to be optimized, calibrating the output current values as current values to be analyzed, simultaneously presetting a current expected value, and calculating error values of the current values to be analyzed and the current expected value;
Acquiring a current sharing regulation module, and generating an error signal in the current sharing regulation module based on the error value of the current value to be analyzed and the current expected value;
Acquiring a circuit structure of the PFC circuit to be optimized, analyzing output current values of various points of the PFC circuit to be optimized based on the circuit structure of the PFC circuit to be optimized, and marking points with different output current values from preset values as abnormal circuit points;
Constructing a deep neural network model, and introducing the abnormal circuit points and the error signals into the deep neural network model to update the error signals to obtain optimized error signals, wherein the optimized error signals reflect the sizes and directions of the current at each point of the PFC circuit to be optimized by current sharing control;
And identifying the optimized error signal through a current sharing control module, and based on the optimized error signal, using the current sharing control module to control parameters of the current sharing control PFC circuit to be optimized of different paths in the PFC circuit system to be optimized in real time, so that the real-time deviation value between the output current values of the PFC circuit to be optimized of the current sharing control of the different paths is kept smaller than a preset threshold value, and the qualified PFC circuit system for current sharing control is obtained.
2. The power supply regulation and control method based on three-way staggered parallel PFC current sharing control according to claim 1, wherein the steps of obtaining different circuit connection topological structures, analyzing the different circuit connection topological structures, and based on analysis results, combining a three-way staggered parallel scheme to construct a three-way staggered parallel PFC circuit system are specifically as follows:
Acquiring a target power supply, and simultaneously acquiring a PFC circuit element and a load which can be connected with the target power supply, wherein the PFC circuit element and the load are calibrated as a target PFC circuit element and a target load;
Based on the target PFC circuit elements, the target loads and the target power supply, retrieving circuit connection topological structures among all the target PFC circuit elements, the target loads and the target power supply in a big data network, and defining the circuit connection topological structures as a circuit connection topological structure set;
Calculating the electric energy output efficiency of a target power supply under different circuit connection topological structures in a circuit connection topological structure set, constructing an electric energy output efficiency ranking table, screening and obtaining the circuit connection topological structure with the highest electric energy output efficiency based on the electric energy output efficiency ranking table, and calibrating the circuit connection topological structure as the target circuit connection topological structure;
Based on a target circuit connection topological structure, connecting a target PFC circuit element, a target load and a target power supply to obtain a single-path PFC circuit, and introducing a three-path staggered parallel scheme, wherein the three-path PFC circuit performs three-path staggered parallel processing to obtain a three-path staggered parallel PFC circuit system.
3. The power supply regulation and control method based on three-way staggered parallel PFC current sharing control according to claim 1, wherein the power-on test is performed on the three-way staggered parallel PFC circuit system, and the three-way staggered parallel PFC circuit system is optimized based on a power-on test result to obtain a preliminary qualified circuit system, specifically:
starting the three-way staggered parallel PFC circuit system, presetting an electrifying test time, and monitoring whether all the target PFC circuits have current passing through in real time through a universal meter in the electrifying test time;
If all the target PFC circuits can continuously pass the current in the power-on test time, the three-way parallel PFC circuit system is marked as a preliminary qualified circuit system, and if the target PFC circuits cannot continuously pass the current in the power-on test time, the corresponding target PFC circuits are marked as abnormal PFC circuits;
Performing power-on analysis on PFC circuit elements on an abnormal PFC circuit through a universal meter, if the PFC circuit elements cannot be powered on, calibrating the corresponding PFC circuit elements as the abnormal PFC circuit elements, and replacing the abnormal PFC circuit elements to enable the abnormal PFC circuit to continuously pass current in power-on test time;
If the abnormal PFC circuit element is replaced and the abnormal PFC circuit cannot continuously pass the current within the power-on test time, acquiring a controller of the three-way staggered parallel PFC circuit system and acquiring working parameters of the controller when the three-way staggered parallel PFC circuit system works;
Based on a Markov chain algorithm, fault state tracing analysis is carried out on working parameters of the controller to obtain a fault position of the controller, and overhaul scheme output of the fault position of the controller is searched in a big data network, so that all target PFC circuits can continuously pass current in power-on test time of the three-way staggered parallel PFC circuit system.
4. The power supply regulation and control method based on three-way staggered parallel PFC current sharing control according to claim 1, wherein the power loss analysis is performed on the current sharing control qualified PFC circuit system, and the power loss optimization is performed on the current sharing control qualified PFC circuit system based on the power loss analysis result, specifically:
Operating the current-sharing control qualified PFC circuit system, acquiring real-time output power of all target loads in the current-sharing control qualified PFC circuit system, calculating total output power of the current-sharing control qualified PFC circuit system based on the real-time output power of all target loads, and acquiring output power of a target power supply;
Calculating a deviation value between the total output power of the current-sharing control qualified PFC circuit system and the output power of the target power supply, calibrating the deviation value as a power deviation value, if the preset maximum power deviation value is larger than the maximum power deviation value, acquiring the ambient temperature of the current-sharing control qualified PFC circuit system around the running process, and calibrating the ambient temperature as an ambient temperature;
real-time adjusting the environmental temperature, and judging whether the power deviation value is smaller than the maximum power deviation value in real time in the environmental temperature adjusting process;
If so, calibrating the environment temperature corresponding to the power deviation value smaller than the maximum power deviation value as an outputtable temperature, and searching a scheme for maintaining the environment temperature around the target power supply as the outputtable temperature in a big data network to output so that the power deviation value is smaller than the maximum power deviation value, thereby obtaining a power loss optimization PFC circuit system;
If not, performing electromagnetic interference intensity measurement on the periphery when the current-sharing control qualified PFC circuit system is operated, obtaining the electromagnetic interference intensity of each position of the current-sharing control qualified PFC circuit system, and calibrating the position with the electromagnetic interference intensity larger than a preset value as an electromagnetic interference abnormal position;
And acquiring an electromagnetic filter, controlling the electromagnetic filter to perform electromagnetic filtering treatment on the electromagnetic interference abnormal position when the current-sharing control qualified PFC circuit system runs, so that the power deviation value is smaller than the maximum power deviation value, and obtaining the power loss optimization PFC circuit system.
5. The power supply regulation and control system based on three-way staggered parallel PFC current sharing control is characterized by comprising a memory and a processor, wherein the memory stores a program of the power supply regulation and control method according to any one of claims 1-4, and when the program is executed by the processor, the following steps are realized:
Different circuit connection topological structures are obtained, analysis is carried out on the different circuit connection topological structures, and based on analysis results, a three-way staggered parallel PFC circuit system is constructed by combining a three-way staggered parallel scheme;
Carrying out power-on test on the three-way staggered parallel PFC circuit system, and optimizing the three-way staggered parallel PFC circuit system based on a power-on test result to obtain a preliminary qualified circuit system;
Performing current sharing control analysis on the primary qualified circuit system, and performing current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis;
performing power loss analysis on the current-sharing control qualified PFC circuit system, and performing power loss optimization on the current-sharing control qualified PFC circuit system based on a power loss analysis result;
The method comprises the steps of carrying out current sharing control analysis on a primary qualified circuit system, and carrying out current sharing control optimization on the primary qualified circuit system based on the current sharing control analysis, wherein the current sharing control optimization comprises the following specific steps:
The output ends of three paths of target PFC circuits in the primary qualified circuit system are connected with a current sampling circuit to obtain a type of PFC circuit, and the current testing time is preset;
In the power-on test time, controlling a target power supply to output power to three PFC circuits, monitoring output current values of the PFC circuits of different paths in real time, and calculating real-time deviation values among the output current values of the PFC circuits of different paths;
if the real-time deviation value among the output current values of the PFC circuits of different paths is kept smaller than a preset threshold value in the power-on test time, the primary qualified circuit system is calibrated as a current-sharing control qualified PFC circuit system;
If the real-time deviation value among the output current values of the PFC circuits of different paths is not kept smaller than a preset threshold value in the power-on test time, carrying out output current test on three PFC circuits through a universal meter to obtain an output current standard value, and judging whether the output current standard value and the output current value of the PFC circuits of the same path are unequal;
if so, carrying out working temperature analysis on the current sampling circuits of the PFC circuits, and if the working temperatures of the current sampling circuits of the PFC circuits are not maintained in a preset range in the power-on test time, connecting a temperature compensation circuit into the PFC circuits, so that the working temperatures of the current sampling circuits of the PFC circuits are maintained in the preset range in the power-on test time;
If the working temperature of the current sampling circuit of the PFC circuit is maintained within a preset range in the power-on test time, but the output current standard value and the output current value of the PFC circuit are still not equal, a filter is added into the current sampling circuit, and the filter is used for filtering high-frequency noise of the current sampling circuit, so that the output current standard value and the output current value of the PFC circuit are equal, and the PFC circuit to be optimized in current sharing control is obtained;
If the real-time deviation value between the output current values of the PFC circuits to be optimized for the current sharing control of different paths is kept smaller than a preset threshold value in the power-on test time, combining the PFC circuits to be optimized for the current sharing control with a target power supply to obtain a PFC circuit system to be optimized for the current sharing control, and performing the current sharing control optimization on the PFC circuit system to be optimized for the current sharing control to obtain a qualified PFC circuit system for the current sharing control;
the PFC circuit system to be optimized for current sharing control is subjected to current sharing control optimization, and the qualified PFC circuit system for current sharing control is obtained, specifically:
Starting a current sharing control PFC circuit system to be optimized, obtaining output current values of the current sharing control PFC circuits to be optimized of different paths in the current sharing control PFC circuit system to be optimized, calibrating the output current values as current values to be analyzed, simultaneously presetting a current expected value, and calculating error values of the current values to be analyzed and the current expected value;
Acquiring a current sharing regulation module, and generating an error signal in the current sharing regulation module based on the error value of the current value to be analyzed and the current expected value;
Acquiring a circuit structure of the PFC circuit to be optimized, analyzing output current values of various points of the PFC circuit to be optimized based on the circuit structure of the PFC circuit to be optimized, and marking points with different output current values from preset values as abnormal circuit points;
Constructing a deep neural network model, and introducing the abnormal circuit points and the error signals into the deep neural network model to update the error signals to obtain optimized error signals, wherein the optimized error signals reflect the sizes and directions of the current at each point of the PFC circuit to be optimized by current sharing control;
And identifying the optimized error signal through a current sharing control module, and based on the optimized error signal, using the current sharing control module to control parameters of the current sharing control PFC circuit to be optimized of different paths in the PFC circuit system to be optimized in real time, so that the real-time deviation value between the output current values of the PFC circuit to be optimized of the current sharing control of the different paths is kept smaller than a preset threshold value, and the qualified PFC circuit system for current sharing control is obtained.
CN202410487644.1A 2024-04-23 Power supply regulation and control method and system based on three-way staggered parallel PFC current sharing control Active CN118100626B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115347774A (en) * 2022-08-24 2022-11-15 燕山大学 Multiphase interleaved parallel converter control and fault tolerance method
CN117595249A (en) * 2023-11-30 2024-02-23 国网河南省电力公司南阳供电公司 Construction method of optimization model of distributed power flow controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115347774A (en) * 2022-08-24 2022-11-15 燕山大学 Multiphase interleaved parallel converter control and fault tolerance method
CN117595249A (en) * 2023-11-30 2024-02-23 国网河南省电力公司南阳供电公司 Construction method of optimization model of distributed power flow controller

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