CN118097320A - Dual-branch wafer SEM defect map classification and segmentation method and system - Google Patents

Abstract

The invention discloses a method and a system for classifying and dividing a wafer SEM defect map of double branches, and belongs to the field of integrated circuit manufacturing. The wafer SEM defect map is obtained as a training set, and the wafer SEM defect type and the defect pixel position are marked; carrying out data enhancement processing on the wafer SEM defect map; predicting the defect type and the defect pixel position of the wafer SEM defect map respectively by using a double-branch wafer SEM defect map classification and segmentation model, wherein the double-branch wafer SEM defect map classification and segmentation model comprises classification branches and segmentation branches; and training a double-branch wafer SEM defect map classification and segmentation model by using the training set, and completing defect type classification and defect pixel point position segmentation of the wafer SEM defect map by using the trained model. The classifying branches and the dividing branches of the invention improve the feature extraction capability of the model to the defects, focus the defect areas and realize the effective classification and accurate division of the microscale defect morphology.

Description

Dual-branch wafer SEM defect map classification and segmentation method and system

Technical Field

The invention belongs to the field of integrated circuit manufacturing, and particularly relates to a method and a system for classifying and dividing a wafer SEM defect map of double branches.

Background

The fabrication of Integrated Circuits (ICs) involves complex procedures including thin film deposition, ion implantation, etching, and careful polishing. With the industry advancing toward miniaturization, circuit elements shrink, and designs are increasingly layered, so that each chip is subjected to a series of extensive processing steps. In such fine programming, even the slightest deviation may cause defects on the wafer surface. The accurate identification of the defects is not only a task, but also can help us accurately identify and timely understand the illegal behaviors in the equipment or the program, thereby improving the production yield and the reliability. Currently, wafer defect detection mainly includes three aspects: defect distribution, defect morphology, and defect composition. Artificial intelligence (Al) has demonstrated the potential for improved efficiency in the first two aspects. Much research has been focused on analyzing defect distributions, and the presence of different shapes on the wafer often indicates problems with certain machines. However, there is still a great gap in the study of defect microtopography, which is precisely the preferred aspect of engineers.

The field of wafer defect analysis in the semiconductor manufacturing industry faces significant challenges, particularly: (1) The uniqueness of the defect image provides a complex scenario for automated analysis. The size difference between the defect and the background, coupled with the complex background texture and the wide range of defect types, makes accurate classification and segmentation of defects in SEM images a difficult task. (2) The scarcity and confidentiality of the data sets increases the difficulty of this task. The non-uniform occurrence of various defect types results in highly oblique distribution of data. In view of these obstacles, there is an urgent need for a method that not only extracts and identifies defect features with greater accuracy, but also provides robust classification and segmentation results with limited data availability. Furthermore, to prevent overfitting, particularly in data limited situations, the network architecture must be compact and efficient, with minimal parameter occupation and simplified operation, to facilitate model generalization and minimize computational overhead.

With the rise of deep learning, wafer defect detection technology has evolved toward a more intelligent direction. Various deep learning models, including Convolutional Neural Networks (CNNs), long and Short Term Memories (LSTMs), and automatic encoders, can effectively address complex problems and are used for large-scale data sets. However, most of the existing wafer defect researches focus on analyzing the position distribution of the defect image pattern and whether there are two classifications of defects, which consider each defect as a point and study the degree of aggregation of defects. However, in practical engineering applications, the most time-consuming and experienced part of the engineer's work is the observation and analysis of defect morphology, so that existing studies have limitations in adequately addressing the needs of wafer defect analysis. How to further analyze the morphological characteristics of individual defects for individual portions of the wafer SEM images that are identified as being defective is critical to determining the root cause of defect formation.

With the development of GPU and the improvement of processing speed, classification tasks and segmentation tasks in the image field have good effects. However, these studies have focused mainly on texture defects of the surfaces of steel, wood, etc., which are very different from microscopic defects in semiconductor integrated circuits. In addition, the basis for defect detection has been model construction centered on Convolutional Neural Networks (CNNs); however, a significant limitation of CNN is its relatively limited acceptance domain, which presents a substantial obstacle in efficiently absorbing global context information. For the field of integrated circuit manufacturing, how to achieve the fine classification and segmentation of wafer SEM defect maps is a problem to be solved in the art.

Disclosure of Invention

Aiming at the problems, the invention provides a method and a system for classifying and segmenting a double-branch wafer SEM defect map, which adopt a double-branch network structure for classifying and segmenting the defects of the wafer SEM defect map to realize the full-scale analysis of the wafer defects, are beneficial to the analysis of the root cause of the defects of the wafer SEM defect map and further improve the yield.

In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:

The invention provides a method for classifying and dividing a wafer SEM defect map with double branches, which comprises the following steps:

step 1, obtaining a wafer SEM defect map as a training set, and marking wafer SEM defect types and defect pixel positions;

step 2, carrying out data enhancement processing on the wafer SEM defect map;

Step 3, training a classification and segmentation model of the wafer SEM defect map with double branches by utilizing the training set after data enhancement processing;

The double-branch wafer SEM defect map classifying and dividing model comprises classifying branches and dividing branches, wherein the classifying branches comprise a plurality of convolution blocks and Swin-Transformer blocks, local features of an input wafer SEM defect map are extracted through the convolution blocks, the local features of the images are fused by the Swin-Transformer blocks to generate final features, and the final features are used for defect type classification; the segmentation branch comprises an encoder formed by N layers of encoding blocks, a feature fusion module and a decoder formed by N layers of decoding blocks, wherein the feature fusion module is positioned between each layer of encoding blocks and the decoding blocks, and the final feature in the classification branch is fused into the encoder to participate in calculation;

and 4, completing defect type classification and defect pixel point position segmentation of the wafer SEM defect map to be processed by using the trained wafer SEM defect map classification and segmentation model.

Further, the Swin-transducer block comprises a block division, a layer normalization, a multi-head self-attention mechanism of a window for introducing displacement and an MLP layer;

Firstly, dividing local features of a wafer SEM defect map into non-overlapping small blocks through block division, performing multi-head self-attention mechanism of an input window after layer normalization processing on the small blocks, dividing the small blocks after layer normalization processing into windows, performing self-attention operation in the small blocks, and performing residual connection on self-attention results and the small blocks to finish first-stage calculation; sequentially carrying out layer normalization and MLP layer processing on the first-stage calculation result, and carrying out residual connection on the processing result and the first-stage calculation result to complete second-stage calculation; sequentially carrying out layer normalization and multi-head self-attention mechanism processing of a window for introducing displacement on the second-stage calculation result, and carrying out residual connection on the processing result and the second-stage calculation result to finish third-stage calculation; sequentially carrying out layer normalization and MLP layer processing on the third-stage calculation result, and carrying out residual connection on the processing result and the third-stage calculation result to complete fourth-stage calculation; and converting the data form of the fourth-stage calculation result to generate the final characteristics of the wafer SEM defect map.

Further, the encoder sequentially downsamples the input wafer SEM defect map to realize layer-by-layer encoding, wherein the input of the first layer encoding block is the wafer SEM defect map, the input of the i layer encoding block is the output of the i-1 layer encoding block, and i is more than or equal to 2 and less than or equal to N-1; the input of the N layer coding block is the result of the output of the N-1 layer coding block and the output of the Swin-transducer block in the classification branch after splicing.

Further, the coding block adopts a residual error connecting block.

Further, the ith layer decoding block in the decoder corresponds to the ith layer encoding block in the encoder, the decoder sequentially up-samples the encoding result of the wafer SEM defect map to realize layer-by-layer decoding, gradually restores the resolution of the image, and introduces the encoding features of the corresponding layers through the feature fusion module in the decoding process of each layer; the input of the N layer decoding block is the characteristic of the coding characteristic of the N layer coding block processed by the characteristic fusion module, the input of the N-1 layer decoding block is the result of splicing the characteristic of the coding characteristic of the N-1 layer coding block processed by the characteristic fusion module with the output of the N layer decoding block, and the output of the first layer decoding block is processed by an activation function to obtain the probability of defect of each pixel in the wafer SEM defect map.

Further, the feature fusion module comprises a plurality of attention blocks, wherein the attention blocks firstly reduce the channel number of the original input feature map to 1 by using 1×1 convolution to obtain attention force diagrams of position information in the feature map; multiplying the attention coefficient in the attention map with the original input feature map element by element to generate a modulated feature map; and adding the original input characteristic diagram and the modulated characteristic diagram to obtain an output characteristic diagram.

Further, the number of attention blocks in the feature fusion module increases with the depth of the encoded feature.

Further, the i-th layer coding block is connected with the i-th layer decoding block through i serial attention block combinations, and the attention blocks are used for inputting the decoding blocks of the corresponding layers after the coding characteristics are calibrated.

Further, the step 4 further includes:

And taking the classification and segmentation results of the wafer SEM defect map to be processed as labels, storing a new wafer SEM defect map and the labels thereof in a database, manually checking the new image stored in the database periodically, removing the image with the prediction error, combining the new image in the database with an original training set as a new training set, and training and updating the wafer SEM defect map classification and segmentation model periodically.

The invention also provides a double-branch wafer SEM defect map classifying and dividing system which is used for realizing the double-branch wafer SEM defect map classifying and dividing method.

The invention has the beneficial effects that:

(1) The invention provides a classification and segmentation model of a wafer SEM defect map with double branches, which comprises classification branches and segmentation branches, and can simultaneously obtain classification and segmentation results of wafer microscale defect forms.

(2) The Swin-transducer block and the feature fusion module designed in the double branches improve the feature extraction capability of the model on defects, wherein the feature fusion module enables the model decoder to continuously integrate shallow features and deep features at each stage, focuses on defect areas, and realizes effective classification and accurate segmentation of microscale defect forms.

Drawings

FIG. 1 is a schematic diagram of collecting wafer SEM defect map during semiconductor manufacturing;

FIG. 2 is a schematic diagram of a classification and segmentation model (referred to as a dual-branch network) of a dual-branch wafer SEM defect map according to the present invention;

FIG. 3 is a schematic view of the structure of the STB;

FIG. 4 is a schematic diagram of an AM structure;

Fig. 5 illustrates a semi-supervised application method according to this embodiment.

Detailed Description

The following description is presented to enable one of ordinary skill in the art to make and use the invention.

The drawings are merely schematic illustrations of the present invention and are not necessarily drawn to scale. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor devices and/or microcontroller devices.

The flow diagrams depicted in the figures are exemplary only and not necessarily all steps are included. For example, some steps may be decomposed, and some steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.

The invention provides a method for classifying and dividing defects of a double-branch wafer SEM image, which specifically comprises the following steps:

S1, collecting a wafer SEM defect map and marking a label.

Unifying the sizes of the collected wafer SEM defect graphs and dividing the data to obtain a training set and a testing set; the label comprises wafer SEM defect type and defect pixel position. In this embodiment, as shown in fig. 1, the SEM defect map of the wafer refers to a partial SEM map containing defect portions extracted from the SEM map of the wafer, and each partial SEM map contains a specific defect, which can be implemented by the prior art and is not described herein.

S2, carrying out data enhancement processing on the training set obtained in the step S1.

The data enhancement processing method comprises the following steps: image flipping, mirroring, rotation, brightness contrast adjustment, etc.

S3, constructing a dual-branch wafer SEM defect map classification and segmentation model (hereinafter referred to as dual-branch network).

As shown in fig. 2, the dual branch network is composed of a classification branch part and a segmentation branch part, the wafer SEM defect map is input into both the classification branch and the segmentation branch, in the classification branch, the defect type of the wafer SEM defect map is predicted, and in the segmentation branch, the pixel point position of the defect is predicted.

The classification branch comprises a plurality of convolution blocks, a Swin-Transformer Block (STB) block integrated with a transducer function, a global average pooling layer and a full connection layer. The convolution blocks in the classification branches are used for extracting local features of the input wafer SEM defect map, local modes can be effectively identified through the convolution blocks, and space structure information is reserved. And the STB block further fuses the local features of the images, enhances the details and the precision of the features, and generates final features of the SEM defect map. The final features generated by the STB block reduce the spatial size of the feature map by means of a global averaging pooling layer, reducing the computational effort while preserving the key information. And finally flattening the output characteristics of the global average pooling layer through the full-connection layer to generate probability results of the SEM defect map belonging to each defect type, thereby realizing defect classification. In this embodiment, the number of convolution blocks used by the classification branch is 3, and the defect types include holes, films, particles, image deformation and scratches.

As shown in fig. 3, the STB block includes tile partitioning, layer normalization, multi-head self-attention mechanism for windows (W-MSA), multi-head self-attention mechanism for windows that introduce displacement (SW-MSA), and MLP layers. Firstly, dividing local features of an image into non-overlapping small blocks through block division, inputting the small blocks into W-MSA after performing layer normalization processing, dividing the small blocks after the layer normalization processing into windows, performing self-attention operation in a local small block, and performing residual connection on self-attention results and the small blocks to finish first-stage calculation. Sequentially carrying out layer normalization and MLP layer processing on the first-stage calculation result, and carrying out residual connection on the result and the first-stage calculation to complete second-stage calculation; sequentially carrying out layer normalization and SW-MSA processing on the second-stage calculation result, wherein the SW-MSA introduces displacement operation, carrying out displacement on the divided window to promote information transfer and exchange, reducing deviation of position information, helping to enhance modeling capability of a model on the relationship between local and global characteristics, and carrying out residual connection on the SW-MSA processing result and the second-stage calculation to complete third-stage calculation; sequentially carrying out layer normalization and MLP layer processing on the third-stage calculation result, and carrying out residual connection on the result and the third-stage calculation to complete fourth-stage calculation; and carrying out reshape processing on the fourth-stage calculation to generate the final characteristics of the SEM defect map.

The segmentation branch comprises an encoder, a feature fusion module and a decoder, wherein the feature fusion module is positioned between the encoder and the decoder.

The encoder is composed of N layers of encoding blocks, and sequentially downsampling the input wafer SEM defect map by the encoder to realize layer-by-layer encoding, wherein the input of the first layer of encoding block is the wafer SEM defect map, the input of the i layer of encoding block is the output of the i-1 layer of encoding block, and i is more than or equal to 2 and less than or equal to N-1; the input of the N-layer coding block is the result of the output of the N-1 layer coding block and the output splice of the STB block in the classification branch. By introducing the output of STB blocks in the classification branch into the last layer encoder, the global and local information of the wafer SEM defect map is effectively utilized. In this embodiment, the encoding block adopts a residual block structure in ResNet networks.

The decoder consists of N layers of decoding blocks, the i layer decoding block in the decoder corresponds to the i layer residual block in the encoder, the decoder sequentially carries out up-sampling on the coding result of the wafer SEM defect map to realize layer-by-layer decoding, the resolution of the image is gradually restored, and the coding features of the corresponding layers are introduced through the feature fusion module in the decoding process of each layer, namely, the encoder carries out channel splicing operation by using the feature channels with the same size as the part of the encoder when doubling the image each time, so that the features extracted by the whole network are more refined. The input of the N layer decoding block is the characteristic of the coding characteristic of the N layer coding block processed by the characteristic fusion module, and the input of the N-1 layer decoding block is the result of the combination of the output of the N layer decoding block and the characteristic of the coding characteristic of the N-1 layer coding block processed by the characteristic fusion module. In this embodiment, the decoding block adopts a convolution block structure, and in each layer of convolution block, convolution operation and deconvolution operation are performed on the input feature map, so as to recover twice the resolution. After a number of operations, the image resolution is restored to the original resolution, and the final channel number is compressed to 1. And obtaining the probability of defects of each pixel in the wafer SEM defect map through a sigmoid function by the output of the first layer decoding block.

The feature fusion Module includes a plurality of Attention modules (Attention modules). After the encoder generates the encoding feature map, different portions of the generated encoding feature map are focused. This attention mechanism allows the model to dynamically focus on and understand the different parts of the encoded signature, thereby better capturing the relationship between input and output.

As shown in fig. 4, each AM first reduces the number of channels of the input feature map to 1 using 1×1 convolution, obtains an attention map of position information in the feature map, and obtains an attention coefficient (value of 0 to 1) by a Sigmoid function. The input feature map is modulated by element-wise multiplication of the original input feature map with attention coefficients within the attention map. The process suppresses the irrelevant information by integrating the space constraint in the feature space, enhances the relevant features, namely enhances the information expression of the defect area, suppresses the information expression of the irrelevant background area and generates a modulated feature map. Such element-wise multiplication results in a reduction of the values of the characteristic parameters, since the attention coefficients are in the range of 0 to 1 in the modulation of the input profile. The invention adds an identical mapping branch in the attention module, adds the original input characteristic diagram and the modulated characteristic diagram, can effectively relieve the dilemma, ensures that the addition of the attention module does not influence the accuracy of the network, and finally generates the AM output characteristic diagram.

In this embodiment, the number of AM blocks in the feature fusion module increases with the depth of the coding feature, for example, the i-th layer coding block is connected to the i-th layer decoding block through i AM block combinations connected in series, and the AM blocks are used for inputting the decoding blocks of the corresponding layer after calibrating the coding feature.

S4, training the double-branch network constructed in the step S3.

Inputting the training set images subjected to data enhancement processing into a double-branch network in batches, and training the double-branch network by combining the defect types of the wafer SEM defect map subjected to classified branch prediction, the defective pixel points subjected to divided branch prediction and labels thereof. In this embodiment, the training loss includes a classification loss using a cross entropy loss function and a segmentation loss using a binary cross entropy loss function.

S5, testing the double-branch network trained in the step S4 by using the test set obtained in the step S1, evaluating the obtained model by using the intersection ratio (IoU) of the image classification Accuracy (Accuracy) and the image segmentation, the Recall rate (Recall) and the Accuracy (Accuracy), if the evaluation result meets the requirement, retaining the parameters of the trained double-branch network, otherwise, returning to the step S4 again for continuous training.

S6, inputting the wafer SEM defect map to be detected by utilizing the finally obtained dual-branch network, and realizing defect classification and segmentation of the wafer SEM defect map.

Table 1 comparison with existing classification networks

Table 2 comparison with existing split network

The invention designs a Swin-transform block and a feature fusion module in the dual-branch network, thereby improving the feature extraction capability of the model on defects, realizing the effective classification and accurate segmentation of microscale defect forms, and simultaneously obtaining the classification and segmentation results of the microscale defect forms of the wafer.

In one embodiment of the present invention, in order to optimize the applicability of the method in an IC industrial environment, the present embodiment uses a semi-supervised learning method to predict a new unlabeled SEM defect map through a trained model, uses the prediction result as a label of the data, gives more label data, and improves the performance of the model through continuous expansion of a dataset. The method specifically comprises the following steps:

(1) And constructing a semi-supervised application system from the finally obtained double-branch network, wherein the semi-supervised application system comprises two parts of offline modeling and online testing, as shown in fig. 5.

(2) And inputting the online collected new SEM defect map (without manual classification marking and segmentation marking) into a model for online testing, and obtaining classification and segmentation results.

(3) Saving the classification and segmentation results in a database (the prediction result of the model is considered as the true classification and segmentation label of the image); in order to avoid the influence of noise data, new images stored in a database are manually checked at regular intervals, images with prediction errors are removed, the new images in the database are combined with an original data set to be used as a new training set, and the model is regularly trained and updated.

In this embodiment, a dual-branch wafer SEM defect map classification and segmentation system is also provided, which is used to implement the above embodiment. The terms "module," "unit," and the like, as used below, may be a combination of software and/or hardware that performs a predetermined function. Although the system described in the following embodiments is preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible.

The system for classifying and dividing a wafer SEM defect map with two branches provided in this embodiment includes:

the data acquisition module is used for acquiring the wafer SEM defect map as a training set and marking the wafer SEM defect type and the defect pixel position; and the SEM defect map is used for acquiring the wafer to be processed;

the data enhancement module is used for carrying out data enhancement processing on the wafer SEM defect map in the training set;

The double-branch network training module is used for training the classification and segmentation model of the wafer SEM defect map with double branches by utilizing the training set after the data enhancement processing; the double-branch wafer SEM defect map classifying and dividing model comprises classifying branches and dividing branches, wherein the classifying branches comprise a plurality of convolution blocks and Swin-Transformer blocks, local features of an input wafer SEM defect map are extracted through the convolution blocks, the local features of the images are fused by the Swin-Transformer blocks to generate final features, and the final features are used for defect type classification; the segmentation branch comprises an encoder formed by N layers of encoding blocks, a feature fusion module and a decoder formed by N layers of decoding blocks, wherein the feature fusion module is positioned between each layer of encoding blocks and the decoding blocks, and the final feature in the classification branch is fused into the encoder to participate in calculation;

and the classification-segmentation module is used for completing defect type classification and defect pixel point position segmentation of the wafer SEM defect map to be processed by utilizing the trained double-branch wafer SEM defect map classification and segmentation model.

For the system embodiment, since the system embodiment basically corresponds to the method embodiment, the relevant parts only need to be referred to in the description of the method embodiment, and the implementation methods of the remaining modules are not repeated herein. The system embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purposes of the present invention. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

Embodiments of the system of the present invention may be applied to any device having data processing capabilities, such as a computer or the like. The system embodiment may be implemented by software, or may be implemented by hardware or a combination of hardware and software. Taking software implementation as an example, the device in a logic sense is formed by reading corresponding computer program instructions in a nonvolatile memory into a memory by a processor of any device with data processing capability.

It is obvious that the above-described embodiments and the drawings are only examples of the present application, and that it is possible for a person skilled in the art to apply the present application to other similar situations without the need for inventive work from these drawings. In addition, it should be appreciated that while the development effort might be complex and lengthy, it would nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and thus should not be construed as a departure from the disclosure. Several variations and modifications may be made without departing from the spirit of the application, which fall within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims (10)

1. The method for classifying and dividing the wafer SEM defect map of the double branches is characterized by comprising the following steps of:

step 1, obtaining a wafer SEM defect map as a training set, and marking wafer SEM defect types and defect pixel positions;

step 2, carrying out data enhancement processing on the wafer SEM defect map;

Step 3, training a classification and segmentation model of the wafer SEM defect map with double branches by utilizing the training set after data enhancement processing;

The double-branch wafer SEM defect map classifying and dividing model comprises classifying branches and dividing branches, wherein the classifying branches comprise a plurality of convolution blocks and Swin-Transformer blocks, local features of an input wafer SEM defect map are extracted through the convolution blocks, the local features of the images are fused by the Swin-Transformer blocks to generate final features, and the final features are used for defect type classification; the segmentation branch comprises an encoder formed by N layers of encoding blocks, a feature fusion module and a decoder formed by N layers of decoding blocks, wherein the feature fusion module is positioned between each layer of encoding blocks and the decoding blocks, and the final feature in the classification branch is fused into the encoder to participate in calculation;

and 4, completing defect type classification and defect pixel point position segmentation of the wafer SEM defect map to be processed by using the trained wafer SEM defect map classification and segmentation model.

2. The method of claim 1, wherein the Swin-fransformer block comprises a block division, a layer normalization, a multi-head self-attention mechanism of a window introducing displacement, and an MLP layer;

Firstly, dividing local features of a wafer SEM defect map into non-overlapping small blocks through block division, performing multi-head self-attention mechanism of an input window after layer normalization processing on the small blocks, dividing the small blocks after layer normalization processing into windows, performing self-attention operation in the small blocks, and performing residual connection on self-attention results and the small blocks to finish first-stage calculation; sequentially carrying out layer normalization and MLP layer processing on the first-stage calculation result, and carrying out residual connection on the processing result and the first-stage calculation result to complete second-stage calculation; sequentially carrying out layer normalization and multi-head self-attention mechanism processing of a window for introducing displacement on the second-stage calculation result, and carrying out residual connection on the processing result and the second-stage calculation result to finish third-stage calculation; sequentially carrying out layer normalization and MLP layer processing on the third-stage calculation result, and carrying out residual connection on the processing result and the third-stage calculation result to complete fourth-stage calculation; and converting the data form of the fourth-stage calculation result to generate the final characteristics of the wafer SEM defect map.

3. The method for classifying and dividing the dual-branch wafer SEM defect map according to claim 1, wherein the encoder sequentially downsamples the input wafer SEM defect map to realize layer-by-layer encoding, wherein the input of the first layer encoding block is the wafer SEM defect map, the input of the i layer encoding block is the output of the i-1 layer encoding block, and i is more than or equal to 2 and less than or equal to N-1; the input of the N layer coding block is the result of the output of the N-1 layer coding block and the output of the Swin-transducer block in the classification branch after splicing.

4. The method for classifying and dividing the SEM defect map of the wafer with double branches according to claim 1 or 3, wherein the encoding block adopts a residual connection block.

5. The method for classifying and dividing the wafer SEM defect map with double branches according to claim 1, wherein the ith layer decoding block in the decoder corresponds to the ith layer encoding block in the encoder, the decoder sequentially up-samples the encoding result of the wafer SEM defect map to realize layer-by-layer decoding, gradually restores the resolution of the image, and introduces the encoding features of the corresponding layers through a feature fusion module in the decoding process of each layer; the input of the N layer decoding block is the characteristic of the coding characteristic of the N layer coding block processed by the characteristic fusion module, the input of the N-1 layer decoding block is the result of splicing the characteristic of the coding characteristic of the N-1 layer coding block processed by the characteristic fusion module with the output of the N layer decoding block, and the output of the first layer decoding block is processed by an activation function to obtain the probability of defect of each pixel in the wafer SEM defect map.

6. The method of claim 1, wherein the feature fusion module comprises a plurality of attention blocks, the attention blocks firstly reduce the number of channels of the original input feature map to 1 by using 1 x 1 convolution to obtain an attention map of the position information in the feature map; multiplying the attention coefficient in the attention map with the original input feature map element by element to generate a modulated feature map; and adding the original input characteristic diagram and the modulated characteristic diagram to obtain an output characteristic diagram.

7. The method of claim 6, wherein the number of attention blocks in the feature fusion module increases with depth of the encoded feature.

8. The method of claim 7, wherein the i-th layer of encoded blocks are connected to i-th layer of decoded blocks by i-series combinations of attention blocks, the attention blocks being used to calibrate the encoded features and then input the encoded features to the corresponding layer of decoded blocks.

9. The method for classifying and dividing SEM defect map of dual-branched wafer according to claim 1, wherein said step 4 further comprises:

And taking the classification and segmentation results of the wafer SEM defect map to be processed as labels, storing a new wafer SEM defect map and the labels thereof in a database, manually checking the new image stored in the database periodically, removing the image with the prediction error, combining the new image in the database with an original training set as a new training set, and training and updating the wafer SEM defect map classification and segmentation model periodically.

10. A dual-branched wafer SEM defect map classification and segmentation system, comprising:

the data acquisition module is used for acquiring the wafer SEM defect map as a training set and marking the wafer SEM defect type and the defect pixel position; and the SEM defect map is used for acquiring the wafer to be processed;

the data enhancement module is used for carrying out data enhancement processing on the wafer SEM defect map in the training set;

The double-branch network training module is used for training the classification and segmentation model of the wafer SEM defect map with double branches by utilizing the training set after the data enhancement processing; the double-branch wafer SEM defect map classifying and dividing model comprises classifying branches and dividing branches, wherein the classifying branches comprise a plurality of convolution blocks and Swin-Transformer blocks, local features of an input wafer SEM defect map are extracted through the convolution blocks, the local features of the images are fused by the Swin-Transformer blocks to generate final features, and the final features are used for defect type classification; the segmentation branch comprises an encoder formed by N layers of encoding blocks, a feature fusion module and a decoder formed by N layers of decoding blocks, wherein the feature fusion module is positioned between each layer of encoding blocks and the decoding blocks, and the final feature in the classification branch is fused into the encoder to participate in calculation;

and the classification-segmentation module is used for completing defect type classification and defect pixel point position segmentation of the wafer SEM defect map to be processed by utilizing the trained double-branch wafer SEM defect map classification and segmentation model.