CN118092571B - Portable programmable direct-current linear power supply generating circuit with variable slope - Google Patents

Portable programmable direct-current linear power supply generating circuit with variable slope Download PDF

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CN118092571B
CN118092571B CN202410492567.9A CN202410492567A CN118092571B CN 118092571 B CN118092571 B CN 118092571B CN 202410492567 A CN202410492567 A CN 202410492567A CN 118092571 B CN118092571 B CN 118092571B
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circuit
capacitor
resistor
output end
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CN118092571A (en
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张涛
李雪
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Chengdu Xinzheng Microelectronics Technology Co ltd
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Chengdu Xinzheng Microelectronics Technology Co ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices

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Abstract

The application discloses a portable programmable direct current linear power supply generating circuit with a variable slope, which comprises a high-voltage input end and a waveform output end, wherein the high-voltage input end is connected with the output end of a high-voltage conversion XV circuit, and the output end of the high-voltage conversion XV circuit is respectively connected with a high-voltage conversion-XV circuit, a rising waveform generating circuit, a falling waveform generating circuit, a DAC reference voltage generating circuit, a DAC power supply voltage generating circuit and an output voltage control circuit; the rising slope output end is connected with the first input end of the first analog switch; the descending slope output end is connected with the second input end of the first analog switch; the arbitrary waveform output end is connected with the second input end of the second analog switch; the first analog switch is a single-pole double-throw switch, and the output end of the first analog switch is connected with the first input end of the second analog switch; the second analog switch is a single-pole double-throw switch, and the output end of the second analog switch is connected with an output voltage control circuit; the circuit has clear structure and smaller circuit size, and solves the problem that the ATE of the traditional testing machine cannot be carried.

Description

Portable programmable direct-current linear power supply generating circuit with variable slope
Technical Field
The application relates to the technical field of electronic device testing, in particular to a portable programmable direct current linear power supply generating circuit with variable slope.
Background
Programmable power supplies are widely used in highly integrated automated test systems (ATE) or test measurement applications. In the field of integrated circuit test and measurement, programmable power supplies are mainly used for supplying power to chips or modules, and necessary bias conditions are provided for circuit operation.
The traditional programmable power supply (desk power supply) mainly comprises a high-precision standard power supply consisting of a DSP (digital signal processor), an FPGA (field programmable gate array), a high-speed high-precision DAC (digital-to-analog converter) and a power amplifier, and can be used for externally setting voltage stabilizing equipment for outputting voltage and current. The device adopts advanced microcomputer control technology, realizes whole-course control and full-key operation, and is also provided with corresponding programmable interfaces to facilitate the integration of equipment to realize automatic test. The programmable power supply in automatic test system (ATE) mainly consists of FPGA, DAC, ADC (analog-to-digital converter), power amplifier and the like. The programmable power supply is a voltage and current source output by four quadrants, channels are mutually isolated, and an automatic test system is mainly formed by the programmable power supply in a board card mode and board card equipment of other functional types.
In the integrated circuit testing process, it is often necessary to generate a start-up or shut-down waveform with a response time of 1ms-500ms at the power supply port, so as to simulate various on-off states in the user use environment. Or a power supply state in which a variable waveform is required to be generated, such as a direct current voltage of 5.0V, a sine wave signal with a peak value of 0.5V at 1KHz is superimposed, and a certain load capacity is required. Or a fast voltage jump of 5V-10V-5V needs to be produced, with a transition time of 50us. Conventional programmable power supplies or power supplies in ATE are not capable of satisfying the above-described test requirements.
The main disadvantage of the traditional programmable power supply is that the rising slope is slow (more than 50 ms), the slope is uncontrollable, and the waveform of the output voltage cannot be programmed. The main disadvantage of programmable power supplies in ATE is the poor carrying capacity, typically less than 1A, and the large size, inconvenient to carry around.
In view of the foregoing, there is a need for a portable, variable slope programmable dc linear power generation circuit.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, the present application provides a portable programmable dc linear power supply generating circuit with a variable slope, which is used for solving the problems that the rising slope of the traditional programmable power supply is slow (> 50 ms), the slope is uncontrollable, the waveform of the output voltage cannot be programmed, the loading capacity of the programmable power supply in the ATE is poor, generally less than 1A, the volume is huge, and the programmable power supply is inconvenient to carry.
The application adopts the following technical scheme for realizing the purposes:
A portable, slope-variable, programmable DC linear power supply generating circuit, said power supply generating circuit comprising a high voltage input and a waveform output, wherein:
The high-voltage input end is connected with the input end of a high-voltage conversion XV circuit, the high-voltage conversion XV circuit converts high voltage at the high-voltage input end into XV voltage, and the output end of the high-voltage conversion XV circuit is respectively connected with the high-voltage conversion-XV circuit, the rising waveform generating circuit, the falling waveform generating circuit, the DAC reference voltage generating circuit, the DAC power supply voltage generating circuit and the output voltage control circuit;
The high-voltage conversion-XV circuit converts the (+ -XV voltage at the output end of the high-voltage conversion-XV circuit into-XV voltage, and the output end of the high-voltage conversion-XV circuit is connected with the output voltage control circuit;
the rising waveform generating circuit comprises three triodes, wherein the first triode is configured to: the emitter is connected with the output end of the high-voltage conversion XV circuit and the emitter of the second triode, the base electrode is connected with the emitter of the third triode and the base electrode and the collector electrode of the second triode, and the collector electrode is connected with the base electrode of the third triode and is grounded through the sliding resistor; the third transistor is configured to: the collector electrode is grounded through a capacitor; wherein: the common end of the collector electrode of the third triode and the capacitor is a rising slope output end of the rising waveform generating circuit, and the rising slope output end is connected with a first input end of the first analog switch;
The descending waveform generating circuit comprises a resistor and a sliding resistor, wherein one end of the resistor is connected with the output end of the high-voltage conversion XV circuit, the other end of the resistor is connected with one end of a capacitor through one channel of the two-channel switch unit, and the other end of the capacitor is grounded; one end of the sliding resistor is connected with the output end of the high-voltage XV conversion circuit, and the other end of the sliding resistor is simultaneously connected with the collector electrode of the first triode, the base electrode of the first triode and the base electrode of the second triode; the first transistor is configured to: the emitter is grounded, and the base electrode is connected with the base electrode of the second triode; the second transistor is configured to: the emitter is grounded, the collector is connected with one end of the capacitor through two channels of the two-channel switch unit, the common end of the two-channel switch unit and the capacitor is a descending slope output end of the descending waveform generating circuit, and the descending slope output end is connected with a second input end of the first analog switch;
The DAC reference voltage generation circuit converts XV voltage at the output end of the high-voltage XV conversion circuit into 2.5V voltage, and the output end voltage of the DAC reference voltage generation circuit is used as the reference voltage of the arbitrary waveform generation circuit; the DAC power supply voltage generation circuit converts the voltage at the output end of the high-voltage XV conversion circuit into 3.3V voltage, and the voltage at the output end of the DAC power supply voltage generation circuit is used as the power supply voltage of the arbitrary waveform generation circuit;
The arbitrary waveform generation circuit comprises a control module and a DAC chip, wherein the control module is communicated with the DAC chip, a control quantity 'D' is input to the DAC chip according to a certain time interval, the output end of the DAC chip is grounded through a capacitor, and the common end of the output end of the DAC chip and the capacitor is an arbitrary waveform output end of the arbitrary waveform generation circuit, wherein D is a decimal value of a control output voltage register in the DAC chip; the arbitrary waveform output end is connected with the second input end of the second analog switch;
The first analog switch is a single-pole double-throw switch, and the output end of the first analog switch is connected with the first input end of the second analog switch; the second analog switch is a single-pole double-throw switch, and the output end of the second analog switch is connected with an output voltage control circuit;
The output voltage control circuit comprises a high-voltage operational amplifier, wherein the high-voltage operational amplifier is configured to:
Enabling the common ground;
the enabling end is grounded through a third capacitor and is powered by the high-voltage XV conversion circuit;
the negative input end is simultaneously connected with one end of a second resistor and one end of a third resistor, the other end of the second resistor is connected with the source electrode of the transistor, and the other end of the third resistor is grounded;
The positive input end is connected with the output end of the second analog switch;
the negative power supply end is grounded through a second capacitor and is powered by the high-voltage transfer-XV circuit;
The positive power supply end is connected with the high-voltage input end and the drain electrode of the transistor at the same time, and the common end of the positive power supply end and the high-voltage input end is grounded through a first capacitor;
the output end is connected with the grid electrode of the transistor through a first resistor;
wherein X represents a voltage value, the value range is 4.5-5.5, V represents a voltage unit, and the voltage value range of the high-voltage input end is 12-60V.
As an optional solution, the high-voltage to XV circuit includes a linear voltage regulator configured to: the input end is sequentially connected with one end of the first capacitor and the emitter of the triode, the adjusting end is simultaneously connected with one end of the second resistor and one end of the third resistor, and the output end is sequentially connected with the other end of the second resistor and one end of the second capacitor;
The other end of the second capacitor, the other end of the third resistor and the other end of the first capacitor are connected with the input end of the diode, the output end of the diode is sequentially connected with the base electrode of the triode and one end of the first resistor, the other end of the first resistor is simultaneously connected with the high-voltage input end and the collector electrode of the triode, and the common end of the second resistor and the second capacitor is the output end of the high-voltage XV conversion circuit.
As an alternative solution, the linear voltage regulator uses an LM317T chip.
As an optional solution, the high-voltage conversion-XV circuit includes a DC-DC power chip configured to: the CAP+ pin is connected with the CAP-pin through a second capacitor, the GND pin is grounded, the OUT pin is used as an-XV voltage output end in the high-voltage conversion-XV circuit and is grounded through a third capacitor, the LV pin is grounded, and the V+ pin is grounded through a first capacitor; the common end of the V+ pin and the first capacitor is connected with XV voltage.
As an alternative solution, the DC-DC power chip uses an LM2662 chip.
As an optional technical scheme, the DAC reference voltage generating circuit converts the plus XV voltage at the output end of the high-voltage to XV voltage to 2.5V voltage, and the voltage is realized through an ADR431 chip.
As an optional technical scheme, the DAC supply voltage generating circuit converts the voltage at the output end of the high voltage to the voltage of 3.3V, which is implemented by the LT3045 chip.
As an optional technical scheme, the circuit also comprises a scaling circuit, wherein the input end of the scaling circuit is connected with the output end of the second analog switch, and the output end of the scaling circuit is connected with the positive input end of the high-voltage operational amplifier in the output voltage control circuit.
As an alternative solution, the scaling circuit is powered by a high voltage to XV circuit.
As an optional solution, the scaling circuit includes an operational amplifier, where the operational amplifier is configured to:
The positive power supply is connected with the XV voltage and grounded through the first capacitor;
The negative power supply is grounded;
The negative input end is connected with the arbitrary waveform output end of the arbitrary waveform generating circuit;
The positive input end is connected with the output end and the first resistor;
The output end is sequentially connected with a first resistor, a second resistor and ground in series, and the second resistor is connected with a second capacitor in parallel; and the common end of the second capacitor and the first resistor is used as the output end of the scaling circuit.
The beneficial effects of the application include:
a constant current source is generated by a Wilson current source, and then a voltage rising waveform with controllable slope is generated by utilizing the characteristic that the slope is fixed when the current is fixed when a capacitor is charged.
Generating a constant current source through a mirror current source, and then generating a voltage drop waveform with a controllable slope by utilizing the characteristic that the slope is fixed when the current is fixed when the capacitor discharges;
The variable waveform output voltage waveform is generated by a high precision DAC chip. The control module is communicated with the DAC chip, and inputs a control quantity "D" (D is a decimal value of a control output voltage register in the DAC) into the DAC chip according to a certain time interval, and changes the output voltage according to the continuous change of the "D", so that any waveform is generated.
Finally, the waveform is scaled down to a fixed voltage through a scaling down circuit, and then the control of the output voltage and the output current is realized through a voltage control circuit consisting of an NMOS, a high-voltage operational amplifier and a feedback network; the circuit structure is clear, and the circuit size is smaller, and the problem that the ATE of the traditional testing machine can not be carried is solved.
Other benefits or advantages of the application will be described in detail with reference to specific structures in the detailed description.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the application, and that other drawings can be obtained from these drawings without inventive faculty for a person skilled in the art. Furthermore, it should be understood that the scale of each component in the drawings in this specification is not represented by the scale of actual material selection, but is merely a schematic diagram of structures or positions, in which:
FIG. 1 is a basic functional block diagram of a circuit in the present application;
FIG. 2 is a schematic diagram of the power flow inside the power generation circuit according to the present application;
FIG. 3 is a schematic diagram of a high voltage to 5V circuit in an embodiment;
FIG. 4 is a schematic diagram of a high voltage-to-5V circuit in an embodiment;
FIG. 5 is a schematic diagram of a rising waveform generating circuit according to an embodiment;
FIG. 6 is a schematic diagram of a falling waveform generating circuit according to an embodiment;
FIG. 7 is a schematic diagram of an arbitrary waveform generation circuit according to an embodiment;
FIG. 8 is a schematic diagram of a scaling circuit in an embodiment;
FIG. 9 is a schematic diagram of an output voltage control circuit according to an embodiment;
FIG. 10 is a schematic diagram of a DAC reference voltage generation circuit in an embodiment;
fig. 11 is a schematic diagram of a DAC supply voltage generation circuit in an embodiment.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. The components of the embodiments of the present application generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be noted that terms such as "top" and "bottom" are used to refer to the present application in which the portion near the upper side is the top and the portion near the lower side is the bottom in the use state; the use of terms such as "first" and "second" is for the purpose of distinguishing between similar elements and not necessarily for the purpose of indicating or implying any particular importance or order of such elements; terms such as "inner", "outer" and "inner and outer" are used to refer to specific contours. The above terms are used only for the convenience of clearly and simply describing the technical solution of the present application and are not to be construed as limiting the present application.
Examples:
in order to overcome the defect that the conventional linear power supply cannot meet the requirement of a large voltage range and control output of any waveform, the linear power supply is shown in fig. 1 and 2; the invention designs and manufactures a linear power supply generating circuit with wide voltage (up to 60V) and output arbitrary waveforms based on the technologies of high-voltage operational amplifier, high-withstand-voltage power NMOS (N-channel metal oxide semiconductor) transistor, mirror current source and the like, and is used for solving the control problem of power supply voltage waveforms in the existing equipment.
The power supply generating circuit includes a high voltage input terminal and a waveform output terminal, in this embodiment, preferably X is 5, and the voltage of the high voltage input terminal is 60V, where:
The high-voltage input end is connected with the input end of a high-voltage conversion 5V circuit, the high-voltage conversion 5V circuit converts the high voltage of the high-voltage input end into 5V voltage, and the output end of the high-voltage conversion 5V circuit is respectively connected with the high-voltage conversion 5V circuit, the DAC reference voltage generating circuit, the DAC power supply voltage generating circuit and the output voltage control circuit;
The high-voltage-to-5V circuit converts the 5V voltage at the output end of the high-voltage-to-5V circuit into-5V voltage, and the output end of the high-voltage-to-5V circuit is connected with the output voltage control circuit;
The DAC reference voltage generation circuit converts the 5V voltage at the output end of the high-voltage 5V conversion circuit into 2.5V voltage, and the output end voltage of the DAC reference voltage generation circuit is used as the reference voltage of the arbitrary waveform generation circuit; the DAC power supply voltage generation circuit converts 5V voltage at the output end of the high-voltage 5V-to-3.3V voltage, and the output end voltage of the DAC power supply voltage generation circuit is used as the power supply voltage of the arbitrary waveform generation circuit;
As a possible implementation solution, the main function of the high voltage to 5V circuit is to supply power as part of the internal circuit. The working principle diagram of the high-voltage-to-5V circuit is shown in the circuit in FIG. 3, and the circuit mainly comprises an NPN triode, a voltage stabilizing diode, a linear voltage stabilizer and a resistance-capacitance element;
The method comprises the following steps: the high-voltage to 5V circuit comprises a linear voltage stabilizer, wherein the linear voltage stabilizer adopts an LM317T chip, and the LM317T chip is configured to: the Vin pin 3 is sequentially connected with one end of the first capacitor C1 and the emitter 3 of the triode, the ADJ pin 1 is simultaneously connected with one end of the second resistor R2 and one end of the third resistor R3, and the Vout pin 2 is sequentially connected with the other end of the second resistor R2 and one end of the second capacitor C2;
The other end of the second capacitor C2, the other end of the third resistor R3 and the other end of the first capacitor C1 are connected with the input end of the diode D1, the output end of the diode D1 is sequentially connected with the base electrode 1 of the triode and one end of the first resistor R1, the other end of the first resistor R1 is simultaneously connected with the high-voltage input end and the collector electrode 2 of the triode, and the common end of the second resistor R2 and the second capacitor C2 is the output end of the high-voltage 5V circuit.
The NPN triode and the diode D1 form a voltage reduction network (the diode D1 adopts a voltage stabilizing diode), and the problem of low input voltage range of the linear voltage stabilizer LM317T is solved. And the triode is used for reducing the voltage, so that the heat power consumption can be dispersed, and the junction temperature of the linear voltage stabilizer is prevented from exceeding the range due to overlarge power consumption.
After the circuit stably works, the voltage of the high-voltage input end at the point A is clamped to the regulated voltage V ZT through the first resistor R1 and the diode D1, and the value is the regulated value of the diode D1. A PN junction voltage difference exists between the point B and the point A, so that the voltage of the point B is V ZT-VBE at the moment, and the purpose of reducing the high-voltage input is achieved.
The voltage formed at point B satisfies the input voltage range of the linear regulator. The relation between the output voltage V OUT of the linear regulator LM317T and the feedback resistor (the second resistor R2 and the third resistor R3 are feedback resistors) is:
Where I ADJ is the current at the ADJ pin, which is very small, about 0.2uA, and can be reduced to:
Where V REF is the reference voltage, V REF =1.25v, and the output voltage is about 5V by configuring r3=72Ω, r2=430Ω.
As a possible technical scheme, the working principle diagram of the high-voltage converting-5V circuit is shown in the circuit in fig. 4, and the part is mainly realized by a DC-DC power supply chip LM2662, and converts 5V voltage into-5V voltage; the output end of the power supply is connected with an output voltage control circuit;
The method comprises the following steps: the DC-DC power supply chip LM2662 is configured to: the CAP+ pin 2 is connected with the CAP-pin 4 through a second capacitor C2, the GND pin 3 is grounded, the OUT pin 5 is used as an output end in a high-voltage conversion-5V circuit and is grounded through a third capacitor C3, the LV pin 6 is grounded, and the V+ pin 8 is grounded through a first capacitor C1; the common terminal of the v+ pin 8 and the first capacitor C1 is connected to a voltage of 5V, and the FC pin 1 is not connected in the circuit.
As a possible implementation solution, the main circuit diagram of the rising waveform generating circuit is shown in the circuit in fig. 5, and the part mainly includes a wilson current source and a charging capacitor. The main principle of the part is that when the capacitor is charged, the current flowing through the two ends of the capacitor is in direct proportion to the capacity of the capacitor and the voltage of the two ends of the capacitor;
When the charging current is constant, the capacitance is constant, so the slope of the voltage change on the capacitor is constant. The rising slope of the waveform can be determined by adjusting the charging current and the capacitance value of the capacitor, so that a rising waveform with controllable slope and fixed voltage is generated;
as shown in fig. 5, c-e of the second transistor Q2 is coupled to the emitter of the third transistor, which acts as a feedback resistor in the stabilizing circuit. Since the equivalent resistance between c-e is very large, I OUT can be made highly stable. In fig. 5, the first transistor Q1, the second transistor Q2 and the third transistor Q3 are transistors with completely identical characteristics, so that the current amplification coefficients of the three transistors are the same, and are all represented by β, and the currents of the collectors of the first transistor Q1 and the second transistor Q2 are the same; thus: the relation formula of the current of each point is used for finishing to obtain:
Where I ADJ is a current flowing through the sliding resistor R1 in fig. 5, and I OUT is an output current (indicating a current flowing through the capacitor C1 in fig. 5).
Further, the function of adjusting the voltage slope can be achieved by adjusting the capacitance values of the sliding resistor R1 and the capacitor C1. In an actual circuit, a plurality of capacitor gears are arranged on the capacitor C1, coarse adjustment of the voltage rising slope is achieved, and fine adjustment of the voltage rising slope is achieved through the sliding resistor R1.
The slope formula is:
In the formula, I ADJ is the current flowing through the resistor R1 in fig. 5, U BE is the voltage difference between the base and the emitter of the first triode Q1 or the voltage difference between the base and the emitter of the second triode Q2 or the voltage difference between the base and the emitter of the third triode Q3, Δ represents the difference, Δu is the waveform voltage variation, and Δt is the waveform rise time variation.
Specifically, in the rising waveform generating circuit,
Including three triodes, first triode Q1 is configured to: the emitter is connected with the output end of the high-voltage-to-5V circuit and the emitter of the first triode Q1, the base electrode is connected with the emitter of the third triode Q3 and the base electrode and the collector electrode of the second triode Q2, and the collector electrode is connected with the base electrode of the third triode Q3 and is grounded through the sliding resistor R1; the third transistor Q3 is configured to: the collector electrode is grounded through a capacitor C1; wherein: the common end of the collector of the third triode Q3 and the capacitor C1 is a rising slope output end of the rising waveform generating circuit, and the rising slope output end is connected with the first input end of the first analog switch.
As a possible implementation solution, the main circuit diagram of the falling waveform generating circuit is shown in the circuit in fig. 6, and the part mainly includes a mirror current source and a capacitor C1. The main principle of the part is that when the capacitor C1 discharges, the current flowing through the two ends of the capacitor C1 is in direct proportion to the capacitance of the capacitor and the voltage of the two ends of the capacitor;
When the discharge current is constant, the capacitance is constant, so the slope of the voltage change on the capacitor is constant. The falling slope of the waveform can be determined by adjusting the discharge current and the capacitance of the capacitor C1, so that a falling waveform with controllable slope is generated.
As shown in fig. 6, the left side is a mirror current source circuit, which is composed of two transistors with identical characteristics, and since the voltage drop of the first transistor Q1 in the mirror current source circuit is equal to the voltage between b and e, it is ensured that the second transistor Q2 in the mirror current source circuit cannot enter a saturated state when the first transistor Q1 is operated in an amplified state, and therefore the collector current I C0 =βib.
In the figure, since the characteristics of the two triodes are identical, the current amplification factor of the first triode Q1 is equal to the current amplification factor of the second triode Q2, both are represented by β, the voltages between the two triodes b-e are equal, the base currents are also equal, and the base currents of the two triodes are represented by Ib, so that the collector current I C0 of the first triode Q1 is equal to the collector current I C1 of the second triode Q2. Due to this special connection of the circuit, I C0=IC1 is mirrored.
The relation of the collector current I C1 of the second triode Q2 after finishing is as follows:
Where β is the current amplification factor of the first transistor or the current amplification factor of the second transistor, and Ir is the current flowing through the sliding resistor R2 in fig. 6.
Before the falling waveform is generated, the switch S is placed at a position of '1' (namely, one channel of the two-channel switch unit is conducted) and is connected with 5V voltage through the resistor R1. After the capacitor C1 is fully charged, S is disconnected from "1" (refer to that one channel of the two-channel switch unit is turned off), S is set to "2" (refer to that two channels of the two-channel switch unit are turned on), and the accumulated charge on the capacitor C1 is the discharge amount flowing through the mirror current source.
Further, the function of adjusting the voltage slope can be achieved by adjusting the capacitance values of the sliding resistor R2 and the capacitor C1. In an actual circuit, a plurality of capacitor gears are arranged on the capacitor C1, coarse adjustment of the voltage drop slope is achieved, and fine adjustment of the voltage drop slope is achieved through the sliding resistor R2.
The slope formula is:
In the formula, I C1 is the current flowing through the capacitor C1 in fig. 6, ir is the current flowing through the sliding resistor R2 in fig. 6, U BE is the voltage difference between the base and the emitter of the first triode Q1 or the voltage difference between the base and the emitter of the second triode Q2, Δ represents the difference, Δu is the waveform voltage variation, and Δt is the waveform falling time variation.
Specifically, the falling waveform generating circuit comprises a resistor and a sliding resistor, wherein one end of the resistor is connected with the output end of the high-voltage-to-5V circuit, the other end of the resistor is connected with one end of a capacitor through one channel of the two-channel switch unit, and the other end of the capacitor is grounded; one end of the sliding resistor is connected with the output end of the high-voltage-to-5V circuit, and the other end of the sliding resistor is simultaneously connected with the collector electrode of the first triode, the base electrode of the first triode and the base electrode of the second triode; the first transistor is configured to: the emitter is grounded, and the base electrode is connected with the base electrode of the second triode; the second transistor is configured to: the emitter is grounded, the collector is connected with one end of the capacitor through two channels of the two-channel switch unit, the common end of the two-channel switch unit and the capacitor is a descending slope output end of the descending waveform generating circuit, and the descending slope output end is connected with a second input end of the first analog switch.
As a possible implementation solution, the main circuit diagram of the arbitrary waveform generation circuit is shown in the circuit in fig. 7, and the arbitrary waveform generation circuit is mainly composed of a DAC chip, preferably an AD5541 chip; the principle is that the control module completes the editing function of the waveform through real-time control of the output voltage of the DAC chip, so that the output generates any waveform desired by the program.
The output voltage V OUT of the arbitrary waveform generation circuit is formulated as follows:
wherein V REF is the reference voltage of the AD5541 chip, the value is 2.5V, N is the number of bits of the AD5541 chip, the value is 16, and D is the decimal value of the control output voltage register in the DAC chip.
The above formula is converted into:
the control module is communicated with the DAC chip, and the control quantity 'D' is input into the DAC chip according to a certain time interval, so that the voltage of an output port of the DAC chip is changed in real time, the function of waveform editing is realized, and sine waves, square waves, triangular waves and pulses can be realized or various waveform outputs can be produced according to actual requirements;
Specifically, the arbitrary waveform generation circuit comprises a control module and a DAC chip, wherein the control module is communicated with the DAC chip, a control quantity 'D' is input to the DAC chip according to a certain time interval, the output end of the DAC chip is grounded through a capacitor, and the common end of the output end of the DAC chip and the capacitor is an arbitrary waveform output end of the arbitrary waveform generation circuit, wherein D is a decimal value of a control output voltage register in the DAC chip; the arbitrary waveform output end is connected with the second input end of the second analog switch;
It can be further appreciated that: the first analog switch is a single-pole double-throw switch, and the output end of the first analog switch is connected with the first input end of the second analog switch; the second analog switch is a single-pole double-throw switch, the output end of the second analog switch is connected with an output voltage control circuit, a one-to-one process is actually presented, when a portable programmable direct current linear power supply generating circuit with variable slope works, one selection of ascending, descending or arbitrary waveforms is carried out according to actual requirements, the one-to-one process is firstly carried out through the first analog switch, the result of the first round selection is secondly used as an input signal of the second analog switch, the one-to-one process of the second round is carried out, and finally, a final generating circuit is selected according to instructions received by the analog switch; the first analog switch and the second analog switch in the application can both adopt the chip ADG779 to realize the functions, and the application does not need to be described in detail as the chip is the basic chip of the analog switch chip.
As a possible technical scheme, the high-voltage operational amplifier further comprises a scaling circuit, wherein the input end of the scaling circuit is connected with the arbitrary waveform output end of the arbitrary waveform generating circuit, and the output end of the scaling circuit is connected with the positive input end of the high-voltage operational amplifier in the output voltage control circuit. The main circuit diagram of the scaling circuit is shown in the circuit of fig. 8, and the scaling circuit is mainly composed of an operational amplifier and a resistor. The operational amplifier is configured as a follower and is configured as a unity gain. The formula of the output voltage V OUT and the positive input voltage V IN of the circuit is as follows:
Specifically, the scaling circuit is powered by a high voltage to 5V circuit. The scaling circuit includes an operational amplifier, and in fig. 8, the operational amplifier is configured to:
The pin 7 is used as a positive power end of the operational amplifier, is connected with 5V voltage and is grounded through the first capacitor C1;
Pin 4 is used as the negative power supply end of the operational amplifier and grounded;
the pin 2 is used as a negative input end of the operational amplifier and is connected with an output end of the second analog switch;
pin 3 is used as the positive input end of the operational amplifier, and is connected with pin 6 and the first resistor R1;
The pin 6 is used as an output end of the operational amplifier and is sequentially connected with a first resistor R1, a second resistor R2 and ground in series, and the second resistor R2 is connected with a second capacitor C2 in parallel; and the common terminal of the second capacitor C2 and the first resistor R1 is used as the output terminal of the scaling circuit.
As a possible implementation solution, the output voltage control circuit is shown in the circuit in fig. 9, and the part mainly includes an NMOS power tube, a high voltage operational amplifier, and a feedback network. After the circuit works stably, the operational amplifier works under the deep negative feedback state, and according to the theoretical analysis of 'virtual short and virtual break', the output voltage V OUT of the output voltage control circuit has the following formula:
Wherein V IN is the positive input terminal voltage of the high-voltage operational amplifier;
Therefore, the circuit structure can amplify the output voltage in the equal proportion in fig. 8, and the output slope of the circuit structure is fixed because the slope is fixed, so that the function of adjusting the output slope is realized. By changing the proportional relation of the second resistor R2 and the third resistor R3, the output voltage controls the maximum value of the output voltage V OUT of the electric.
Specifically, as shown in fig. 9: in the output voltage control circuit, a high voltage operational amplifier is included, the high voltage operational amplifier being configured to:
Pin 1 is used as an enabling common end of the high-voltage operational amplifier and is grounded;
Pin 8 is used as the enabling end of the high-voltage operational amplifier, is grounded through a third capacitor C3 and is powered by the high-voltage to 5V circuit;
The pin 2 is used as a negative input end of the high-voltage operational amplifier and is simultaneously connected with one end of a second resistor R2 and one end of a third resistor R3, the other end of the second resistor R2 is connected with a source electrode of a transistor, and the other end of the third resistor R3 is grounded;
The pin 3 is used as a positive input end of the high-voltage operational amplifier and is connected with an output end of the second analog switch;
Pin 4 is used as the negative power supply end of the high-voltage operational amplifier, is grounded through a second capacitor C2 and is powered by the high-voltage-to-5V circuit;
the pin 7 is used as a positive power end of the high-voltage operational amplifier, the positive power end is connected with the high-voltage input end and the drain electrode of the transistor at the same time, and the common end of the positive power end and the high-voltage input end is grounded through a first capacitor;
the pin 6 is used as an output end of the high-voltage operational amplifier and is connected with the grid electrode of the transistor through a first resistor;
As a possible implementation solution, the DAC reference voltage generating circuit converts the voltage at the output end of the high-voltage to 5V circuit into 2.5V voltage, and is implemented by an ADR431 chip, where the main circuit diagram is shown in the circuit in fig. 10, and the ADR431 chip is configured to:
the pin 2 is connected with one end of the first capacitor C1 and is powered by a high-voltage to 5V circuit;
The pin 4 is connected with the other end of the first capacitor C1 and grounded; pin 6 is grounded through the second capacitor C2, and the common end of the output end of the chip ADR431 and the second capacitor C2 is the output end of the DAC reference voltage generating circuit, which is connected with the REF pin (reference voltage pin) in the DAC chip, to provide 2.5V reference voltage for the DAC chip.
As an alternative solution, the DAC supply voltage generating circuit converts the voltage at the output end of the high-voltage to 5V circuit into 3.3V voltage, and is implemented by an LT3045 chip, where the main circuit diagram is shown in the circuit in fig. 11, and the LT3045 chip is configured to:
the pin 1, the pin 2, the pin 4 and the pin 4 are connected with the pin 7 and the 5V voltage and are grounded through a second resistor C2;
pin 6 and pin 9 are grounded;
pin 1, pin 11 and pin 12 are all grounded through a first capacitor C1 and output 3.3V voltage;
pin 8 is grounded through resistor R1, and resistor R1 is connected in parallel with third capacitor C3.
From the above, it can be derived that:
The main principle of the output rising waveform control function is as follows: a constant current source is generated by a Wilson current source, and then a voltage rising waveform with controllable slope is generated by utilizing the characteristic that the slope is fixed when the current is fixed when a capacitor is charged. The rising waveform is scaled down to a fixed voltage by a scaling circuit, and then the control of the output voltage and the output current is realized by a voltage control current consisting of an NMOS, a high-voltage operational amplifier and a feedback network, so that the rising slope of the output waveform is controllable and the output voltage is variable;
The main principle of the output falling waveform control function is as follows: a constant current source is generated by a mirror current source, and then a voltage drop waveform with controllable slope is generated by utilizing the characteristic that the slope is fixed when the current is fixed when the capacitor discharges. The voltage control current consisting of NMOS, high-voltage operational amplifier and feedback network realizes the control of output voltage and output current, thus realizing the controllable falling slope of output waveform and variable output voltage;
the main principle of the output arbitrary waveform control function is as follows: the variable waveform output voltage waveform is generated by a high precision DAC chip. The control module is communicated with the DAC chip, and inputs a control quantity "D" (D is a decimal value of a control output voltage register in the DAC) into the DAC chip according to a certain time interval, and changes the output voltage according to the continuous change of the "D", so that any waveform is generated. The waveform is scaled down to a fixed voltage by a scaling down circuit, and the control of the output voltage and the output current is realized by a voltage control circuit consisting of an NMOS, a high-voltage operational amplifier and a feedback network, so that the power supply waveform with variable output waveform is realized;
Therefore, by the design of the scheme, the portable programmable direct current linear power supply generating circuit with variable slope can be obtained.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (10)

1. The utility model provides a portable, changeable programmable direct current linear power supply generating circuit of slope, its characterized in that, power supply generating circuit includes high voltage input and waveform output, wherein:
The high-voltage input end is connected with the input end of a high-voltage conversion XV circuit, the high-voltage conversion XV circuit converts high voltage at the high-voltage input end into XV voltage, and the output end of the high-voltage conversion XV circuit is respectively connected with the high-voltage conversion-XV circuit, the rising waveform generating circuit, the falling waveform generating circuit, the DAC reference voltage generating circuit, the DAC power supply voltage generating circuit and the output voltage control circuit;
The high-voltage conversion-XV circuit converts the (+ -XV voltage at the output end of the high-voltage conversion-XV circuit into-XV voltage, and the output end of the high-voltage conversion-XV circuit is connected with the output voltage control circuit;
the rising waveform generating circuit comprises three triodes, wherein the first triode is configured to: the emitter is connected with the output end of the high-voltage conversion XV circuit and the emitter of the second triode, the base electrode is connected with the emitter of the third triode and the base electrode and the collector electrode of the second triode, and the collector electrode is connected with the base electrode of the third triode and is grounded through the sliding resistor; the third transistor is configured to: the collector electrode is grounded through a capacitor; wherein: the common end of the collector electrode of the third triode and the capacitor is a rising slope output end of the rising waveform generating circuit, and the rising slope output end is connected with a first input end of the first analog switch;
The descending waveform generating circuit comprises a resistor and a sliding resistor, wherein one end of the resistor is connected with the output end of the high-voltage conversion XV circuit, the other end of the resistor is connected with one end of a capacitor through one channel of the two-channel switch unit, and the other end of the capacitor is grounded; one end of the sliding resistor is connected with the output end of the high-voltage XV conversion circuit, and the other end of the sliding resistor is simultaneously connected with the collector electrode of the first triode, the base electrode of the first triode and the base electrode of the second triode; the first transistor is configured to: the emitter is grounded, and the base electrode is connected with the base electrode of the second triode; the second transistor is configured to: the emitter is grounded, the collector is connected with one end of the capacitor through two channels of the two-channel switch unit, the common end of the two-channel switch unit and the capacitor is a descending slope output end of the descending waveform generating circuit, and the descending slope output end is connected with a second input end of the first analog switch;
The DAC reference voltage generation circuit converts XV voltage at the output end of the high-voltage XV conversion circuit into 2.5V voltage, and the output end voltage of the DAC reference voltage generation circuit is used as the reference voltage of the arbitrary waveform generation circuit; the DAC power supply voltage generation circuit converts the voltage at the output end of the high-voltage XV conversion circuit into 3.3V voltage, and the voltage at the output end of the DAC power supply voltage generation circuit is used as the power supply voltage of the arbitrary waveform generation circuit;
The arbitrary waveform generation circuit comprises a control module and a DAC chip, wherein the control module is communicated with the DAC chip, a control quantity 'D' is input to the DAC chip according to a certain time interval, the output end of the DAC chip is grounded through a capacitor, and the common end of the output end of the DAC chip and the capacitor is an arbitrary waveform output end of the arbitrary waveform generation circuit, wherein D is a decimal value of a control output voltage register in the DAC chip; the arbitrary waveform output end is connected with the second input end of the second analog switch;
The first analog switch is a single-pole double-throw switch, and the output end of the first analog switch is connected with the first input end of the second analog switch; the second analog switch is a single-pole double-throw switch, and the output end of the second analog switch is connected with an output voltage control circuit;
The output voltage control circuit comprises a high-voltage operational amplifier, wherein the high-voltage operational amplifier is configured to:
Enabling the common ground;
the enabling end is grounded through a third capacitor and is powered by the high-voltage XV conversion circuit;
the negative input end is simultaneously connected with one end of a second resistor and one end of a third resistor, the other end of the second resistor is connected with the source electrode of the transistor, and the other end of the third resistor is grounded;
The positive input end is connected with the output end of the second analog switch;
the negative power supply end is grounded through a second capacitor and is powered by the high-voltage transfer-XV circuit;
The positive power supply end is connected with the high-voltage input end and the drain electrode of the transistor at the same time, and the common end of the positive power supply end and the high-voltage input end is grounded through a first capacitor;
the output end is connected with the grid electrode of the transistor through a first resistor;
wherein X represents a voltage value, the value range is 4.5-5.5, V represents a voltage unit, and the voltage value range of the high-voltage input end is 12-60V.
2. The power generation circuit of claim 1, wherein the high voltage to XV circuit comprises a linear regulator configured to: the input end is sequentially connected with one end of the first capacitor and the emitter of the triode, the adjusting end is simultaneously connected with one end of the second resistor and one end of the third resistor, and the output end is sequentially connected with the other end of the second resistor and one end of the second capacitor;
The other end of the second capacitor, the other end of the third resistor and the other end of the first capacitor are connected with the input end of the diode, the output end of the diode is sequentially connected with the base electrode of the triode and one end of the first resistor, the other end of the first resistor is simultaneously connected with the high-voltage input end and the collector electrode of the triode, and the common end of the second resistor and the second capacitor is the output end of the high-voltage XV conversion circuit.
3. The power generation circuit of claim 2, wherein the linear voltage regulator employs an LM317T chip.
4. The power generation circuit of claim 1, wherein the high voltage trans-XV circuit comprises a DC-DC power chip configured to: the CAP+ pin is connected with the CAP-pin through a second capacitor, the GND pin is grounded, the OUT pin is used as an-XV voltage output end in the high-voltage conversion-XV circuit and is grounded through a third capacitor, the LV pin is grounded, and the V+ pin is grounded through a first capacitor; the common end of the V+ pin and the first capacitor is connected with XV voltage.
5. The power generation circuit of claim 4, wherein the DC-DC power chip employs an LM2662 chip.
6. The power generation circuit of claim 4, wherein the DAC reference voltage generation circuit converts the + XV voltage at the output of the high-voltage-to-XV circuit to a voltage of 2.5V, implemented by an ADR431 chip.
7. The power supply generating circuit according to claim 4, wherein the DAC supply voltage generating circuit converts the voltage at the output terminal of the high voltage-to-XV circuit into 3.3V voltage, which is implemented by an LT3045 chip.
8. The power generation circuit of claim 1, further comprising a scaling circuit having an input terminal coupled to an output terminal of the second analog switch and an output terminal coupled to a positive input terminal of a high voltage operational amplifier in the output voltage control circuit.
9. The power generation circuit of claim 8, wherein the scaling circuit is powered by a high voltage to XV circuit.
10. The power generation circuit of claim 8, wherein the scaling circuit comprises an operational amplifier configured to:
The positive power supply is connected with the XV voltage and grounded through the first capacitor;
The negative power supply is grounded;
the negative input end is connected with the output end of the second analog switch;
The positive input end is connected with the output end and the first resistor;
The output end is sequentially connected with a first resistor, a second resistor and ground in series, and the second resistor is connected with a second capacitor in parallel; and the common end of the second capacitor and the first resistor is used as the output end of the scaling circuit.
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