CN118069568A

CN118069568A - External device topology configuration method, data processor, device and program product

Info

Publication number: CN118069568A
Application number: CN202410468141.XA
Authority: CN
Inventors: 刘静涛; 陈安庆; 刘玉雪
Original assignee: Yunbao Chuangxin Nanjing Intelligent Technology Co ltd; Shenzhen Yunbao Intelligent Co ltd
Current assignee: Yunbao Chuangxin Nanjing Intelligent Technology Co ltd; Shenzhen Yunbao Intelligent Co ltd
Priority date: 2024-04-18
Filing date: 2024-04-18
Publication date: 2024-05-24
Anticipated expiration: 2044-04-18
Also published as: CN118069568B

Abstract

The application relates to an external device topology configuration method, a data processor, a computer device and a computer program product. The method comprises the following steps: receiving a topology configuration request; generating a topology configuration file according to the topology configuration request; generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology. By adopting the method, the topology of the external equipment can be dynamically and automatically configured based on the topology configuration request, the adaptability of the data processor is improved, and the requirements of the practical application environment are met. The method can adjust the number of the devices or adjust the allocation condition of resources through the topology configuration request, and ensures the expandability of the data processor and the devices loaded with the data processor. By means of the automatic configuration mode, the configuration efficiency of the external equipment topology can be improved.

Description

External device topology configuration method, data processor, device and program product

Technical Field

The present application relates to the field of data processors, and in particular, to a topology configuration method for an external device, a data processor, a computer device, and a computer program product.

Background

With the development of cloud computing and big data technology, mass data processing and mass data computing become an extremely important problem. To offload the pressure of the CPU (Central Processing Unit ), the DPU (Data Processing Unit, data processor) is created. Currently, a DPU implemented based on an FPGA (Field Programmable GATE ARRAY ) or an ASIC (Application SPECIFIC INTEGRATED Circuit) card can provide both network functions and storage functions. The core of the current system framework is PCIE (Peripheral Component Interconnect Express) management and simulation of equipment, and the current DPU network card can only realize fixed topology, and the adaptability of the DPU network card is poor due to the limitation of PCIE BUS (PCIE BUS) distribution on a HOST (HOST) side server BIOS (Basic Input Output System ).

Disclosure of Invention

In view of the foregoing, it is desirable to provide an external device topology configuration method, a data processor, a computer device, and a computer program product, which can dynamically and automatically configure an external device topology based on a topology configuration request, thereby improving the suitability of the data processor.

In a first aspect, the present application provides a topology configuration method for an external device. The method comprises the following steps:

receiving a topology configuration request;

Generating a topology configuration file according to the topology configuration request;

Generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file;

And configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology.

In one embodiment, the method further comprises:

intercepting a transaction layer data packet containing an external device identifier, wherein the external device identifier is acquired when a device loaded with the data processor scans external devices connected on a PCIE bus;

Binding the external equipment identifier with the generated equipment identifier to obtain mapping information;

and updating the hardware resources according to the mapping information.

In one embodiment, the generating a topology configuration file according to the topology configuration request includes:

Under the condition that a topology model is matched with the topology configuration request in a preset topology resource library, generating a topology configuration file according to the matched topology model.

In one embodiment, the method further comprises:

Under the condition that a topology model is not matched with the topology configuration request in a preset topology resource library, analyzing based on the first performance information of the data processor, the second performance information of the equipment loaded with the data processor and the topology configuration request to obtain a target topology structure;

And generating a topology configuration file according to the target topology structure.

In one embodiment, the analyzing, based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request, to obtain the target topology structure includes:

And generating a target topological structure according to the topological configuration request under the condition that the topological configuration request does not exceed a first resource limit according to the first performance information and the topological configuration request does not exceed a second resource limit according to the second performance information.

In one embodiment, the hardware resources include at least one of register resources, IO resources, or address routing resources.

In one embodiment, after intercepting the transaction layer packet including the external device identifier, the method further includes:

Under the condition that the transaction layer data packet is determined to be used for accessing a configuration space based on the address routing resource, the step of binding the external equipment identifier with the generated equipment identifier to obtain mapping information is executed;

under the condition that the transaction layer data packet is used for accessing a doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the equipment loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external equipment identifier.

In a second aspect, the present application also provides a data processor. The data processor includes:

The dispatching center module is used for receiving a topology configuration request;

the topology generation module is used for generating a topology configuration file according to the topology configuration request;

The firmware implementation module is used for generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology.

In one embodiment, the data processor further comprises a hardware implementation module;

The hardware implementation module is used for intercepting a transaction layer data packet containing an external device identifier, and forwarding the transaction layer data packet to the firmware implementation module, wherein the external device identifier is obtained when the device loaded with the data processor scans external devices connected on a PCIE bus;

The firmware implementation module is further configured to bind the external device identifier with the generated device identifier to obtain mapping information; and updating the hardware resources according to the mapping information.

In one embodiment, the topology generating module is specifically configured to generate a topology configuration file according to the matched topology model when the topology model is matched with the topology configuration request in a preset topology resource library.

In one embodiment, the topology generation module is specifically configured to, when no topology model matches the topology configuration request in a preset topology resource library, analyze based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request, and obtain a target topology structure; and generating a topology configuration file according to the target topology structure.

In one embodiment, the topology generation module is specifically configured to generate a target topology structure according to the topology configuration request when it is determined that the topology configuration request does not exceed a first resource limit according to the first performance information, and when it is determined that the topology configuration request does not exceed a second resource limit according to the second performance information.

In one embodiment, the hardware implementation module is specifically configured to forward the transaction layer packet to the firmware implementation module when the transaction layer packet is determined to be used to access a configuration space based on the address routing resource; under the condition that the transaction layer data packet is used for accessing a doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the equipment loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external equipment identifier.

In a third aspect, the present application also provides a computer device. The computer device comprises a data processor as described above.

In a fourth aspect, the application also provides a computer program product. The computer program product comprises a computer program which, when executed by a processor, implements the steps of the external device topology configuration method as described above.

The external equipment topology configuration method, the data processor, the computer equipment and the computer program product receive a topology configuration request; generating a topology configuration file according to the topology configuration request; generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology. By the method, the topology of the external equipment can be dynamically and automatically configured based on the topology configuration request, the adaptability of the data processor is improved, and the requirements of the practical application environment are met. The method can adjust the number of the devices or adjust the allocation condition of resources through the topology configuration request, and ensures the expandability of the data processor and the devices loaded with the data processor. By means of the automatic configuration mode, the configuration efficiency of the external equipment topology can be improved.

Drawings

FIG. 1 is an application environment diagram of an external device topology configuration method in one embodiment;

FIG. 2 is a flow diagram of a method of external device topology configuration in one embodiment;

FIG. 3 is a flow chart of a topology configuration method of an external device according to another embodiment;

FIG. 4 is a flow diagram of topology verification in one embodiment;

FIG. 5 is a block diagram of a data processor in one embodiment;

FIG. 6 is a block diagram of a data processor in another embodiment;

fig. 7 is an internal structural diagram of a computer device in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

The topology configuration method of the external equipment provided by the embodiment of the application can be applied to the application environment shown in the figure 1. The data processing system includes a data processor 102 and a device 104 loaded with the data processor 102, wherein the data processor 102 enables the device 104 to exert maximum computing power in order to relieve the pressure of the CPU on the device 104. Taking fig. 1 as an example, the data processor 102 manages a plurality of Network interface cards (Network INTERFACE CARD, NIC) and a plurality of Solid state disks (Solid STATE DRIVES, SSD), and these external devices communicate with the device 104 through a PCIE bus (in practical application, also through the PCI bus) to form an external device topology (PCIE topology or PCI topology). Conventional DPU network cards can only implement a fixed topology. While the data processor 102 of the present embodiment can dynamically automatically configure the external device topology based on the topology configuration request, adapting the device 104 for application to different scenarios. Wherein the device 104 may be, but is not limited to, various personal computers, notebook computers, smart phones, servers, etc. In one implementation, the device 104 may be implemented as a stand-alone server or as a cluster of servers.

In one embodiment, as shown in fig. 2, there is provided an external device topology configuration method, which is described by taking as an example that the method is applied to the data processor 102 in fig. 1, and includes the following steps:

step 202, a topology configuration request is received.

Wherein the topology configuration request is a specific set requirement or adjustment requirement set for the external device topology. In one implementation, a configuration interface is preset, through which a topology configuration request input by a user is received. The topology configuration request includes parameters such as the number of devices, the type of device, the resource requirements, and the characteristics of the device. The external device refers to a PCIE device (or PCI device) mounted on a PCIE bus (or PCI bus). It is to be understood that the topology configuration method of the external device in this embodiment may be applied to a PCI bus and other similar buses, and this embodiment is not limited thereto.

In one implementation, the device loaded with the data processor provides a graphical configuration management tool, a user can select a configuration option of an external device topology on an interface operated by the configuration management tool according to configuration requirements, a topology configuration request is generated based on interface operation, and the configuration interface of the data processor is called to transmit the topology configuration request to the data processor.

Alternatively, the recording is performed in the form of a table for the topology configuration request, and referring to table 1 below, a requirement table of the topology configuration request is shown in table 1. Where bar is Base ADDRESS REGISTER, which represents the Base address of the device in the system address space. Sriov is Single Root I/O Virtualization, which is a hardware-based virtualization technology. VF is a Virtual Function, which means that the functions of a device are decomposed in a hardware device through a virtualization technology so that a plurality of Virtual machines or containers can monopolize part of device resources. ARI refers to ALTERNATIVE ROUTING-ID, an alternate route ID, a mechanism that supports replacement of part or all of the Routing ID. DP is a Downstream Port, referring to a Downstream device or Port located in PCIE topology. UP is an Upstream Port, which refers to an Upstream device or Port located in PCIE topology. ACS Access Control Services refers to access control services.

Table 1:

step 204, generating a topology configuration file according to the topology configuration request.

And generating a topology configuration file supporting software reading according to the parameters carried in the topology configuration request. In one implementation, a configuration template is pre-created, the configuration template comprises configuration options and parameters, and the configuration template is modified and supplemented according to the topology configuration request to generate a topology configuration file.

Optionally, integrating the configuration parameters in the topology configuration request, checking and rationality analyzing the configuration parameters, and generating a topology configuration file according to the checked configuration parameters.

Step 206, generating a plurality of device identifiers and resource allocation information corresponding to the device identifiers according to the topology configuration file.

Analyzing a topology configuration file, analyzing the topology intention of a user, simulating a plurality of external devices, generating a device identifier for each simulated external device, and determining resource allocation information of each simulated external device according to the configuration situation. The resource allocation information is specific resource details allocated to each simulated external device, so that each simulated external device can obtain the resources required by the normal operation of the simulated external device, and the allocation of the resources is reasonable and effective and cannot conflict with each other.

In one implementation, the resource allocation information at least includes configuration space information and IO (input/output) resource information, and the data processor is provided with a control plane program and a data plane program. The control plane program is responsible for simulating the configuration space of the external equipment, and the data plane program is responsible for processing IO resources of the external equipment.

And step 208, configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology.

And distributing hardware resources to each simulated external device according to the device identification and the resource allocation information, so that the hardware is abstracted into a plurality of PCIE devices to be mounted on the PCIE bus. And the dynamic configuration of the PCIE topology is realized by means of software defining hardware.

In one implementation, the data processor is configured to implement an Upstream (UP) interface in an external device topology, where at least one PCIE switch (switch) is mounted according to configuration requirements, where each switch includes multiple downstream ports, and the downstream ports of the switches may be connected to the upstream ports of EPs (Endpoint, terminal device, i.e., PCIE device), bridges, or other switches, and the specific topology may be configured according to actual requirements.

It can be understood that the data processor is displayed as a network card on the physical layer, and after the data processor is loaded in the target device through the configuration of the embodiment, the target device identifies the data processor as multiple PCIE devices on the PCIE bus, each PCIE device has at least one function, and the configuration of the PCIE topology structure can be achieved through the configuration of hardware resources.

In the external equipment topology configuration method, a topology configuration request is received; generating a topology configuration file according to the topology configuration request; generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology. By the method, the topology of the external equipment can be dynamically and automatically configured based on the topology configuration request, the adaptability of the data processor is improved, and the requirements of the practical application environment are met. The method can adjust the number of the devices or adjust the allocation condition of resources through the topology configuration request, and ensures the expandability of the data processor and the devices loaded with the data processor. By means of the automatic configuration mode, the configuration efficiency of the external equipment topology can be improved.

In one embodiment, as shown in fig. 3, the method further comprises:

in step 302, a transaction layer packet containing an external device identifier is intercepted, where the external device identifier is obtained when a device loaded with a data processor scans an external device connected to a PCIE bus.

The device (in this embodiment, a server is taken as an example) loaded with the data processor initiates scanning of the PCIE device after power-on, and assigns a device identifier to the scanned PCIE device. The Device identifier is a character string or code for uniquely identifying and identifying the external Device, and on the PCIE Bus, the Device identifier is a BDF (Bus number, device number, function number).

In one implementation, the server performs PCIE device scanning through hardware resources of the data processor, and assigns an external device identifier to each emulated external device.

When the server processes data by using the external device mounted on the PCIE bus, the data processor intercepts and obtains a Transaction layer packet (Transaction LAYER PACKET, TLP).

Step 304, binding the external device identifier with the generated device identifier to obtain mapping information.

Wherein, the control plane program running on the data processor binds the external device identifier distributed by the server with the device identifier simulated by the data processor to obtain the mapping information (MAP).

And 306, updating the hardware resources according to the mapping information.

The external equipment simulated by the data processor can determine the external equipment identifier of the server side based on the mapping relation by updating the mapping information on the hardware resource, so that the consistency of the data processor and the equipment identifier on the server is ensured, and the data transfer between the server and the PCIE equipment is facilitated.

In this embodiment, the external device identifier allocated by the server is bound with the device identifier simulated and generated by the data processor, so that compatibility between the data processor and the server can be improved.

In one embodiment, step 206 includes: under the condition that a topology model is matched with a topology configuration request in a preset topology resource library, generating a topology configuration file according to the matched topology model.

The data processor is provided with a preset topology resource library, at least one topology model is stored in the preset topology resource library, parameters carried in the topology configuration request are compared with each topology model, and whether the topology model is matched with the topology configuration request or not is determined in the preset topology resource library. In one implementation, a topology model corresponding to a plurality of server types is stored in a preset topology resource library, at least one topology model corresponding to the current server type is acquired from the preset topology resource library according to the acquired current server type, parameters carried in a topology configuration request are compared with each acquired topology model, and whether the topology model is matched with the topology configuration request or not is determined in the preset topology resource library.

In one implementation, the matched topology model is parsed, necessary information for generating a configuration file is extracted, the extracted information is modified and supplemented to a configuration template, and the topology configuration file is generated.

In one embodiment, the method further comprises: under the condition that a topology model is not matched with a topology configuration request in a preset topology resource library, analyzing based on first performance information of a data processor, second performance information of equipment loaded with the data processor and the topology configuration request to obtain a target topology structure; and generating a topology configuration file according to the target topology structure.

The first performance information at least includes a Capability (Capability) of the data processor, and the second performance information at least includes a Capability of the server (i.e., a device loaded with the data processor) and a number of loadable devices.

The data processor is provided with an acquisition program through which second performance information is acquired. In one implementation, referring to tables 2 and 3, the second performance information includes HOST BRIGE (host bridge) number, PCI domain number, firmware type, firmware version, and OS (operating system), and details of each host bridge are shown in Table 3.

Table 2:

Table 3:

UEFI/BIOS in Table 2 refers to the Basic Input/Output System (Basic Input/Output System) of a computer based on a unified extensible firmware interface (Unified Extensible FIRMWARE INTERFACE); centos is Community Enterprise Operating System, which is a community enterprise operating system. In Table 3, name refers to the host bridge Name, device-id refers to the Device identification; vendor-id refers to vendor identification number; BUS refers to a BUS; cap refers to Capability (Capability); ACS is an access control service; ATS serves address translation.

The performance information of the data processor is matched with the requirements of the user, the performance information of the server is matched with the requirements of the user, and the generated target topological structure can be supported by the performance of the data processor and the performance of the server while meeting the requirements of the user.

In one implementation, a topology branch is determined according to the number of devices and the second performance information, topology nodes consistent with the number of the devices are generated on the topology branch, and the target topology structure is obtained according to the type of the devices, the resource requirements and the characteristics of the devices as the attribute of each topology node.

In one implementation, the target topology is parsed, necessary information for generating a configuration file is extracted, the extracted information is modified and supplemented to the configuration template, and the topology configuration file is generated.

In one embodiment, analyzing based on first performance information of a data processor, second performance information of a device loaded with the data processor, and a topology configuration request to obtain a target topology includes: and generating a target topological structure according to the topological configuration request under the condition that the topological configuration request is determined to not exceed the first resource limit according to the first performance information and the topological configuration request is determined to not exceed the second resource limit according to the second performance information.

Wherein the first resource limitation refers to a resource limitation of the data processor, and the second resource limitation refers to a resource limitation of the server. Specifically, the first performance information of the data processor, the second performance information of the server and the requirements of the user are integrated and rationalized to determine whether the topology configuration request exceeds a first resource limit and whether the topology configuration request exceeds a second resource limit. In one implementation, a configuration template is pre-created, the configuration template comprises configuration options and parameters, and after passing the rationality check, the configuration template is modified and supplemented according to the topology configuration request to generate a topology configuration file.

In one implementation, referring to FIG. 4, the analysis process specifically includes information integration, rationality verification, and topology analysis. The information integration step comprises the following steps: the total number of devices in the topology configuration request, the total size of BAR space, the total requirement of IO queues, the CAP (Capability) characteristic of the devices, the CAP of the statistical data processor, the upper limit of the devices and the largest CAP range of the server can be borne by the statistical server, wherein the BAR space refers to a register area. The rationality checking step comprises the following steps: determining whether the total BAR space size, the total IO queue requirement and the CAP of the equipment exceed the CAP of the data processor or not respectively; if the total number of the devices is not exceeded, determining whether the total number of the devices is greater than the upper limit of the loadable devices of the server; if the total number of the devices does not exceed the upper limit, judging whether the CAP of the devices is mutually exclusive with the CAP range of the server; if the CAP is matched, performing topology analysis. The topology analysis steps include: judging whether the total number of the devices is more than 32, judging whether the total number of the devices is less than 255, judging whether the devices support sriov, judging whether the devices support ARI, and determining that a single bus (bus) meets the requirement under the conditions that the total number of the devices is more than 32 and less than 255, the devices support sriov and the ARI is supported; in the case where the total number of devices is less than 32, each simulated external Device is marked with a Device (Device number) in the BDF; in the case where the total number of devices is greater than 255, a new switch is added to the topology.

By means of the method, resources of the data processor and the server can be fully utilized, the topological structure of the external equipment simulated by the data processor can be flexibly modified, and the requirements of users are met while hardware limitations are met; the fault caused by unreasonable configuration can be avoided, and the stability of the data processor and the server is improved.

The register resource is used for storing configuration space information of the simulated external device, the IO resource refers to an IO queue of the simulated external device, and the address routing resource is used for marking a routing or addressing mechanism related to the simulated external device.

In one implementation, the data processor is provided with a data plane program and a control plane program, the control plane program receives the topology configuration file, determines a plurality of device identifiers and configuration space resources of each device identifier, configures registers in hardware of the data processor, and completes configuration and initialization of the registers. The control plane program determines the allocation situation of the IO queues based on the topology configuration file, informs the data plane program of the allocation situation of the IO queues through the message queues, allocates ring buffers (ring message buffers) between the firmware and the hardware, and allocates resources in the IO queues of the hardware. The control plane program receives the initialization result of the data plane program, establishes MAP (mapping) relation between the IO queue number and the equipment number, and configures the MAP relation into a register of hardware. The control plane program is also used to configure address routing resources in the data processor hardware.

In one embodiment, after step 302, the method further comprises: in the event that the transaction layer packet is determined to be for access to the configuration space based on the address routing resource, step 304 is performed; under the condition that the transaction layer data packet is used for accessing the doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the device loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external device identifier.

Wherein the data processor determines, via the address routing resource, whether the transaction layer packet is for accessing a configuration space or a doorbell (Doorbell, DB) address. For the case of accessing the configuration space, the control plane program is invoked by the data processor to process the transaction layer packet. And for the situation of accessing the doorbell address, the data processor calls a preset controller, and the data corresponding to the transaction layer data packet on the server is moved to a target IO queue for the next processing.

In one implementation, a TLP queue is provided, and a data processor POLLs (POLL) the TLP queue, receives a message sent to a PCIE device, invokes a control plane procedure to process the message, encapsulates a processing result into a TLP message, and sends the TLP message to a server via the TLP queue.

By means of the method, isolation of access to the configuration space and access to the doorbell address can be achieved, potential conflicts and errors are reduced, and stability of the data processor and the server is improved.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides an external device topology configuration device for realizing the above related external device topology configuration method. The implementation of the solution provided by the apparatus is similar to the implementation described in the above method, so the specific limitation in the embodiments of the external device topology configuration apparatus provided below may refer to the limitation of the external device topology configuration method hereinabove, and will not be repeated herein.

In one embodiment, as shown in FIG. 5, there is provided a data processor comprising:

a dispatch center module 502, configured to receive a topology configuration request.

The topology generation module 504 is configured to generate a topology configuration file according to the topology configuration request.

The firmware implementation module 506 is configured to generate a plurality of device identifiers and resource allocation information corresponding to the device identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology.

In the data processor, a topology configuration request is received; generating a topology configuration file according to the topology configuration request; generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology. By the method, the topology of the external equipment can be dynamically and automatically configured based on the topology configuration request, the adaptability of the data processor is improved, and the requirements of the practical application environment are met. The method can adjust the number of the devices or adjust the allocation condition of resources through the topology configuration request, and ensures the expandability of the data processor and the devices loaded with the data processor. By means of the automatic configuration mode, the configuration efficiency of the external equipment topology can be improved.

The hardware implementation module is configured to intercept a transaction layer data packet including an external device identifier, and forward the transaction layer data packet to the firmware implementation module 506, where the external device identifier is obtained when the device loaded with the data processor scans an external device connected to the PCIE bus;

The firmware implementation module 506 is further configured to bind the external device identifier with the generated device identifier to obtain mapping information; and updating the hardware resources according to the mapping information.

In one embodiment, the topology generation module 504 is specifically configured to generate a topology configuration file according to the matched topology model when there is a match between the topology model and the topology configuration request in the preset topology resource library.

In one embodiment, the topology generation module 504 is specifically configured to, in a case where no topology model matches the topology configuration request in the preset topology resource library, analyze based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request, and obtain a target topology structure; and generating a topology configuration file according to the target topology structure.

In one embodiment, the topology generating module 504 is specifically configured to generate the target topology structure according to the topology configuration request when it is determined that the topology configuration request does not exceed the first resource limit according to the first performance information and the topology configuration request does not exceed the second resource limit according to the second performance information.

In one embodiment, the hardware implementation module is specifically configured to forward the transaction layer packet to the firmware implementation module 506 in a case where it is determined that the transaction layer packet is used to access the configuration space based on the address routing resource; under the condition that the transaction layer data packet is used for accessing the doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the device loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external device identifier.

In one implementation, referring to FIG. 6, a block diagram of another data processor is shown in FIG. 6. The device loaded with the data processor is a server, and the data processor (hereinafter referred to as DPU) includes a dispatch center module, a topology generation module, a firmware implementation module, and a hardware implementation module. Wherein:

1. The dispatch center module includes a user management, resource management, and device dispatch layer.

The user management is responsible for receiving a topology configuration request (comprising the topology requirement of PCIE) of the user and forwarding the topology configuration request of the user to the topology generation module; user management may also be responsible for receiving user selection instructions for topology targets. The resource management module is responsible for managing the resources of the DPU and can provide first performance information of the DPU for topology analysis. The device scheduling layer is used for receiving the topology configuration file and sending the topology configuration file to the firmware implementation module for device creation and external device topology configuration.

2. The topology generation module comprises a BIOS/UEFI acquisition module, a server information acquisition module, a topology resource library, a user topology injection module and a user topology analysis module.

The BIOS/UEFI acquisition module and the server information acquisition module are responsible for processing and analyzing information of PCI BUS resources of the server. Optionally, the Server is pulled up once by using a cloud disk start mode of the DPU, and an acquisition command is executed by an information acquisition Agent (Agent program) in the test cloud disk and output to the Server. For example, the collection script lspci-tv is executed in the Agent, the collection of the current server information is checked, and the collected information is summarized.

The topology resource library stores all topologies supported by the adapted server types. Optionally, the topology generating module sends a topology model supported by a server in the topology resource library to the dispatching center, the dispatching center feeds back the topology model to a user for next operation, the user can firstly inquire from the topology resource library, and if a topology meeting the requirement exists, the topology is directly utilized to generate a topology configuration file; if not, determining a topology meeting the user's needs using user topology injection and user topology analysis.

The user injection module sorts the topology configuration request; the user topology analysis module performs rationality verification on the user demands, the topology generating module determines the topology structure meeting the user demands, generates a topology configuration file and sends the topology configuration file to the dispatching center, and the dispatching center sends the topology configuration file to the firmware implementation module for further processing.

3. The firmware implementation module includes a data plane unit, a control plane unit, and a hardware interface HAL layer (Hardware Abstraction Layer ). The control plane unit includes a register management module, an analog module, a TLP codec module, and a message interface layer. The data plane unit comprises a storage IO management module, a network IO management module and a message interface layer. And the firmware implementation module and the hardware implementation module interact data through an interconnection bus.

The control plane unit is used for receiving the topology configuration file, analyzing the topology configuration situation, determining a plurality of equipment identifiers and configuration space resources of each equipment identifier, calling the register management module to operate the hardware interface HAL layer so as to configure registers in the DPU hardware, and completing the configuration and initialization of the registers.

The control surface unit informs the allocation condition of the IO queues of the data surface unit through the message interface layer, and the storage IO management module and the network IO management module of the data surface unit allocate resources in the IO queues of the DPU hardware through the hardware interface HAL layer based on the received information.

The control plane unit receives the initialization result of the data plane unit, establishes MAP (mapping) relation with the IO queue number and the equipment number, and configures the MAP relation into a register of DPU hardware.

The control plane unit configures an address routing module in the hardware of the DPU through a hardware interface HAL layer.

The TLP encoding and decoding module is used for calling a hardware interface HAL layer, receiving and decoding TLP messages sent by DPU hardware, and sending the decoded messages to the simulation module; the TLP codec module is further configured to send the TLP message assembled by the local message into the external device to the DPU hardware.

The simulation module is used for distributing configuration space resources for each simulated external device, analyzing the message sent by the TLP encoding and decoding module, simulating the local PCIE device (or PCI device), and transmitting the processing result to the TLP encoding and decoding module. In this way, the topology of the external device can be configured based on the control plane unit, and the external device can be simulated to process data.

4. The hardware implementation module includes an UP (upstream) hardware implementation layer, registers, IO queues, TLP queues, an address routing module, DMA (Direct Memory Access) controllers. And the hardware implementation module and the server perform data interaction through a PCIE interface.

The server powers up to initiate scanning of PCIE devices. The UP hardware implementation layer intercepts the TLP message and passes it to the address routing module. The address routing module checks whether the TLP message accesses the configuration space of the PCIE device or the Doorbell (doorbell) address of the PCIE device.

If the address routing module is configured for space access, the address routing module invokes the DMA controller to send the TLP message to the hardware interface HAL layer of the firmware implementation module. The TLP codec module of the DPU firmware implementation module continuously pops the TLP queue of the device, and sends the TLP message to the control plane unit for processing if it is determined that a message arrives, and the control plane unit encapsulates the processing result into the TLP message after processing, and adds the TLP message to the TLP queue. Invoking Doorbell interface of hardware interface HAL layer to inform hardware. The DPU hardware receives the notification and calls the DMA controller to send the TLP data to the server through the UP hardware implementation layer. In this way, the control plane program of the firmware implementation module simulates the PCIE device to perform data processing. In this process, the simulation module binds the BDF allocated by the server for each device with the device number allocated on the DPU firmware implementation module, and updates the bound MAP relationship to the register of the DPU hardware.

If Doorbell addresses are accessed, the address routing module recognizes that the server is receiving and transmitting data, DPU hardware calls a DMA controller, and moves DMA data of PCIE equipment on the server to an IO queue of the PCIE equipment to be processed in the next step.

The above-described respective modules in the external device topology configuration apparatus may be implemented in whole or in part by software, hardware, or a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a server, the internal structure of which may be as shown in fig. 7. The computer device includes a processor, a memory, an Input/Output interface (I/O) and a communication interface. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface is connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The nonvolatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a method of external device topology configuration.

It will be appreciated by those skilled in the art that the structure shown in FIG. 7 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

In one embodiment, a computer device is provided comprising a data processor as in any one of the embodiments above; the data processor includes:

The hardware realization module is used for intercepting a transaction layer data packet containing an external device identifier, forwarding the transaction layer data packet to the firmware realization module, wherein the external device identifier is obtained when the device loaded with the data processor scans external devices connected on the PCIE bus;

the firmware implementation module is also used for binding the external equipment identifier with the generated equipment identifier to obtain mapping information; and updating the hardware resources according to the mapping information.

In one embodiment, the topology generation module is specifically configured to generate a topology configuration file according to the matched topology model when the topology model matches the topology configuration request in the preset topology resource library.

In one embodiment, the topology generation module is specifically configured to, when no topology model matches the topology configuration request in the preset topology resource library, analyze based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request, and obtain a target topology structure; and generating a topology configuration file according to the target topology structure.

In one embodiment, the topology generation module is specifically configured to generate the target topology structure according to the topology configuration request when it is determined that the topology configuration request does not exceed the first resource limit according to the first performance information and when it is determined that the topology configuration request does not exceed the second resource limit according to the second performance information.

In one embodiment, the hardware implementation module is specifically configured to forward the transaction layer packet to the firmware implementation module when it is determined that the transaction layer packet is used to access the configuration space based on the address routing resource; under the condition that the transaction layer data packet is used for accessing the doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the device loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external device identifier.

In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of: receiving a topology configuration request; generating a topology configuration file according to the topology configuration request; generating a plurality of equipment identifiers and resource allocation information corresponding to the equipment identifiers according to the topology configuration file; and configuring hardware resources according to the equipment identification and the resource allocation information to obtain corresponding external equipment topology.

In one embodiment, the computer program when executed by the processor further performs the steps of: intercepting a transaction layer data packet containing an external device identifier, wherein the external device identifier is obtained when a device loaded with a data processor scans external devices connected on a PCIE bus; binding the external equipment identifier with the generated equipment identifier to obtain mapping information; and updating the hardware resources according to the mapping information.

In one embodiment, the computer program when executed by the processor further performs the steps of: under the condition that a topology model is matched with a topology configuration request in a preset topology resource library, generating a topology configuration file according to the matched topology model.

In one embodiment, the computer program when executed by the processor further performs the steps of: under the condition that a topology model is not matched with a topology configuration request in a preset topology resource library, analyzing based on first performance information of a data processor, second performance information of equipment loaded with the data processor and the topology configuration request to obtain a target topology structure; and generating a topology configuration file according to the target topology structure.

In one embodiment, the computer program when executed by the processor further performs the steps of: and generating a target topological structure according to the topological configuration request under the condition that the topological configuration request is determined to not exceed the first resource limit according to the first performance information and the topological configuration request is determined to not exceed the second resource limit according to the second performance information.

In one embodiment, the computer program when executed by the processor further performs the steps of: under the condition that the transaction layer data packet is determined to be used for accessing the configuration space based on the address routing resource, executing the step of binding the external equipment identifier with the generated equipment identifier to obtain mapping information; under the condition that the transaction layer data packet is used for accessing the doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the device loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external device identifier.

It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are both information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data are required to meet the related regulations.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magneto-resistive random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (PHASE CHANGE Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in various forms such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The databases referred to in the embodiments provided herein may include at least one of a relational database and a non-relational database. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processor referred to in the embodiments provided in the present application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, or the like, but is not limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims

1. A method of topology configuration of an external device, the method being applied to a data processor, the method comprising:

receiving a topology configuration request;

2. The method according to claim 1, wherein the method further comprises:

and updating the hardware resources according to the mapping information.

3. The method of claim 1, wherein generating a topology configuration file from the topology configuration request comprises:

4. A method according to claim 3, characterized in that the method further comprises:

5. The method of claim 4, wherein the analyzing based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request to obtain the target topology comprises:

6. The method of claim 2, wherein the hardware resources comprise at least one of register resources, IO resources, or address routing resources.

7. The method of claim 6, wherein after intercepting the transaction layer packet containing the external device identifier, the method further comprises:

8. A data processor, the data processor comprising:

9. The data processor of claim 8, wherein the data processor further comprises a hardware implementation module;

10. The data processor according to claim 8, wherein the topology generation module is specifically configured to generate a topology configuration file according to the matched topology model when there is a match between the topology model and the topology configuration request in a preset topology resource base.

11. The data processor according to claim 10, wherein the topology generation module is specifically configured to, in a case where no topology model matches the topology configuration request in a preset topology resource library, analyze based on the first performance information of the data processor, the second performance information of the device loaded with the data processor, and the topology configuration request to obtain a target topology; and generating a topology configuration file according to the target topology structure.

12. The data processor according to claim 11, wherein the topology generation module is specifically configured to generate a target topology according to the topology configuration request if it is determined that the topology configuration request does not exceed a first resource limit according to the first performance information and the topology configuration request does not exceed a second resource limit according to the second performance information.

13. The data processor of claim 9, wherein the hardware resources comprise at least one of register resources, IO resources, or address routing resources.

14. The data processor according to claim 13, wherein the hardware implementation module is specifically configured to forward the transaction layer data packet to the firmware implementation module if it is determined that the transaction layer data packet is for accessing a configuration space based on the address routing resource; under the condition that the transaction layer data packet is used for accessing a doorbell address based on the address routing resource, moving corresponding data of the transaction layer data packet on the equipment loaded with the data processor to a target IO queue; the target IO queue is IO resource corresponding to the external equipment identifier.

15. A computer device comprising the data processor of any one of claims 8 to 14.

16. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 7.