CN118035017A - Interface bandwidth performance verification method, electronic equipment and storage medium - Google Patents
Interface bandwidth performance verification method, electronic equipment and storage medium Download PDFInfo
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- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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Abstract
The invention provides a verification method of interface bandwidth performance, electronic equipment and a storage medium, and relates to the technical field of chip verification, wherein the method comprises the following steps: aiming at least one test module in the chip, determining the bandwidth performance corresponding to the target interface based on the bandwidth information corresponding to the target interface of the test module; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data; and determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface. By the method, the bandwidth performance is compared with the bandwidth expected performance, the bandwidth performance verification result of the target interface can be directly determined, the bandwidth performance of the target interface is not required to be checked and checked manually repeatedly, the verification efficiency of the bandwidth performance of each module interface in the chip is improved, and the labor cost is reduced.
Description
Technical Field
The present invention relates to the field of chip verification technologies, and in particular, to a method for verifying bandwidth performance of an interface, an electronic device, and a storage medium.
Background
In the related art, when performing performance verification on interfaces of each module in a chip, it is generally necessary to determine whether the performance of the interfaces of each module meets an expectation by using a manual inspection method. For example, performance verification of the interface of the module in the chip requires the following steps to be completed: firstly, generating a full throughput test sequence; then, finishing simulation test in the verified environment frame and generating a waveform file through simulation software; finally, the design verification personnel judges whether the interface performance bandwidth meets the expectations or not through the waveform file.
However, judging whether the interface performance of each module meets the requirement or not by using a manual checking method can increase a great deal of labor cost, consume a great deal of work energy, and cause low verification efficiency on the interface bandwidth performance of each module in the chip.
Therefore, how to reduce the labor cost and further improve the efficiency of verifying the bandwidth performance of each module in the chip is a current urgent problem to be solved.
Disclosure of Invention
Aiming at the problems existing in the related art, the embodiment of the invention provides an interface bandwidth performance verification method, electronic equipment and a storage medium.
The invention provides a method for verifying interface bandwidth performance, which comprises the following steps:
aiming at least one test module in a chip, determining the bandwidth performance corresponding to a target interface of the test module based on the bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data;
And determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
Optionally, the bandwidth information includes at least one of:
The number of data packets received by the target interface;
the data volume of the effective data in each data packet received by the target interface;
the target interface receives a predetermined number of clock cycles required for the data packet.
Optionally, the determining, based on bandwidth information corresponding to a target interface of the test module, bandwidth performance corresponding to the target interface includes:
Determining the total data amount of the effective data of the target interface when receiving the preset number of data packets based on the number of the data packets and the data amount of the effective data in each data packet;
and determining the bandwidth performance based on the total data amount and the clock period required by the preset number of data packets.
Optionally, before determining the bandwidth performance corresponding to the target interface based on the bandwidth information corresponding to the target interface of the test module, the method further includes:
inputting a preset test sequence into the test module; the test sequence is used for simulating the test module;
and acquiring the bandwidth information based on preset configuration parameters in the process of simulating the test module.
Optionally, after the determining the bandwidth performance verification result of the target interface, the method further includes:
Acquiring statistical information corresponding to the target interface of each test module in the chip; the statistical information is information related to the bandwidth performance verification result;
And printing the statistical information of each test module.
Optionally, the statistical information includes at least one of:
the name of the target interface;
the bandwidth information;
The bandwidth performance;
the bandwidth expected performance;
and verifying the bandwidth performance.
Optionally, the printing each piece of statistical information includes:
based on the printing class, acquiring the statistical information of each test module; the printing class is a single-case design mode;
and calling the printing class to uniformly print each piece of statistical information after the simulation is finished.
Optionally, the obtaining, based on the print class, the statistical information of each test module includes:
invoking a monitoring class to store the statistical information of each test module; the monitoring class is constructed by the printing class;
and calling the printing class to traverse the monitoring class to obtain the statistical information of each test module.
The invention also provides a device for verifying the performance of the interface bandwidth, which comprises:
The first determining module is used for determining bandwidth performance corresponding to a target interface of at least one testing module in a chip based on bandwidth information corresponding to the target interface of the testing module; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data;
And the second determining module is used for determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing a method for verifying the bandwidth performance of an interface as described above when executing the program.
The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of verifying the bandwidth performance of an interface as described in any of the above.
The invention also provides a computer program product comprising a computer program which when executed by a processor implements a method of verifying the bandwidth performance of an interface as described in any of the above.
The method, the electronic equipment and the storage medium for verifying the bandwidth performance of the interface, provided by the invention, are used for determining the bandwidth performance corresponding to the target interface based on the bandwidth information corresponding to the target interface of the test module aiming at least one test module in the chip, wherein the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data, and then determining the bandwidth performance verification result of the target interface based on the comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface; by the method, the bandwidth performance is compared with the bandwidth expected performance, the bandwidth performance verification result of the target interface can be directly determined, the bandwidth performance of the target interface is not required to be checked and checked manually repeatedly, the verification efficiency of the bandwidth performance of each module interface in the chip is improved, and the labor cost is reduced.
Drawings
In order to more clearly illustrate the invention or the technical solutions in the related art, the following description will briefly explain the drawings used in the embodiments or the related art description, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for those skilled in the art.
FIG. 1 is a flow chart of a method for verifying interface bandwidth performance according to the present invention;
FIG. 2 is a second flow chart of the method for verifying the bandwidth performance of an interface according to the present invention;
FIG. 3 is a third flow chart of the method for verifying the bandwidth performance of an interface according to the present invention;
FIG. 4 is a schematic structural diagram of an interface bandwidth performance verification device provided by the present invention;
fig. 5 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The method for verifying the performance of the interface bandwidth provided by the present invention is specifically described below with reference to fig. 1 to 3. Fig. 1 is one of the flow diagrams of the method for verifying the performance of the interface bandwidth provided by the present invention, referring to fig. 1, the method includes steps 101 to 102, where:
step 101, determining bandwidth performance corresponding to a target interface of at least one test module in a chip based on bandwidth information corresponding to the target interface of the test module; the bandwidth performance is used to reflect the maximum transmission rate that the target interface can achieve when transmitting data.
It should be noted that the execution body of the present invention may be any electronic device capable of performing performance verification on the interfaces of the modules in the chip, for example, any one of a smart phone, a smart watch, a desktop computer, a laptop computer, and the like.
The invention is based on a verification environment framework of a universal verification methodology (Universal Verification Methodology, UVM) and is applied to a performance test verification scene in a chip verification process. The chip is provided with a plurality of test modules which need to be subjected to simulation test, and the test modules comprise a storage module, a calculation module and the like. In the embodiment of the invention, after each test module is subjected to simulation test, the bandwidth performance of a specified target interface and within a specified simulation time period can be obtained for each test module; the target interface is an output interface of the test module.
In practical application, firstly, the bandwidth information of the target interface of the test module in the appointed simulation time period needs to be collected, and then calculation is carried out based on the bandwidth information, so that the bandwidth performance of the target interface of the test module in the appointed simulation time period can be obtained.
Optionally, the bandwidth information includes at least one of:
a) The number of data packets received by the target interface;
b) The data volume of the effective data in each data packet received by the target interface;
c) The target interface receives a predetermined number of clock cycles required for the data packet.
Step 102, determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
After the bandwidth performance of the target interface is obtained through calculation, comparing the bandwidth performance of the target interface with the bandwidth expected performance of the target interface, and determining a bandwidth performance verification result of the target interface of the test module based on the comparison result. The bandwidth expected performance refers to a maximum data transmission rate which is preset in advance and can be achieved by an expected target interface when data is transmitted.
For example, comparing the bandwidth performance of the target interface of the test module a with the bandwidth expected performance of the target interface, and determining that the bandwidth performance reaches the bandwidth expected performance, determining that the bandwidth performance verification result of the target interface of the test module a is: the target interface is able to reach the expected maximum transmission rate. Correspondingly, if the bandwidth performance does not reach the bandwidth expected performance, determining that the bandwidth performance verification result of the target interface of the test module A is: the target interface is not able to reach the expected maximum transmission rate.
The method for verifying the bandwidth performance of the interface provided by the invention is characterized in that the bandwidth performance corresponding to a target interface is determined based on the bandwidth information corresponding to the target interface of the test module aiming at least one test module in a chip, wherein the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data, and then the bandwidth performance verification result of the target interface is determined based on the comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface; by the method, the bandwidth performance is compared with the bandwidth expected performance, the bandwidth performance verification result of the target interface can be directly determined, the bandwidth performance of the target interface is not required to be checked and checked manually repeatedly, the verification efficiency of the bandwidth performance of each module interface in the chip is improved, and the labor cost is reduced.
Optionally, before determining the bandwidth performance corresponding to the target interface based on the bandwidth information corresponding to the target interface of the test module, the bandwidth information of the target interface needs to be collected, which is specifically implemented through the following steps:
step 1), inputting a preset test sequence into the test module; the test sequence is used for simulating the test module;
And 2) acquiring the bandwidth information based on preset configuration parameters in the process of simulating the test module.
And inputting a preset test sequence to an input interface of the test module to simulate the test module. The requirement of the predetermined test sequence is to maximize the bandwidth of the test module.
In practical application, the preset configuration parameters can be parameterized in the UVM, the parameterized classes provide sufficient configuration parameters, so that each different environment can use different configuration parameters according to the conditions of the environment, and the environment is conveniently integrated and multiplexed in the frame environment of each UVM, namely, multiplexed in different projects. The preset configuration parameters may be user-defined, or default preset configuration parameters may be used, which is not limited in the present invention.
The preset configuration parameters are used for collecting bandwidth information of the target interface, and the preset configuration parameters are for example: the initial sampling time of the acquisition bandwidth information, the end sampling time, the size of the data quantity required to be acquired in the acquisition period, and the like.
For example, when the initial sampling time is reached, starting to sample bandwidth information of a target interface of the test module when data is transmitted, and simultaneously calculating the total amount of the acquired data; and when the sampling time is up, calculating the bandwidth performance corresponding to the target interface based on the total amount of the acquired data, and storing related information.
Optionally, the determining, based on bandwidth information corresponding to a target interface of the test module, bandwidth performance corresponding to the target interface may be specifically implemented by:
step 1), determining the total data amount of the effective data of the target interface when receiving the preset number of data packets based on the number of the data packets and the data amount of the effective data in each data packet.
Specifically, the expression can be represented by the following formula (1):
Packets*bits＝total_data (1)
Wherein packets represent the number of data packets; bits represents the data size of the valid data in each data packet; total_data represents the total amount of valid data received by the target interface when detecting that the number of packets reaches a preset number.
Step 2), determining the bandwidth performance based on the total data amount and the clock period required by the preset number of data packets.
Specifically, the expression can be represented by the following formula (2):
data_rate＝total_data/clks (2)
Wherein, the data_rate represents the bandwidth performance of the target interface; clks represents the clock cycles required for a predetermined number of data packets.
Fig. 2 is a second flow chart of the method for verifying the performance of an interface bandwidth according to the present invention, referring to fig. 2, the method includes steps 201 to 207, wherein:
step 201, inputting a preset test sequence into a target interface of the test module, and simulating the test module.
Step 202, judging whether the target interface receives data. In case the target interface receives data, step 203 is performed.
Step 203, determining whether the initial sampling time is reached. In case the initial sampling time is reached, step 204 is performed.
Step 204, sampling the data packet transmitted by the target interface.
Step 205, calculating the data total amount of the effective data in the collected data packet.
Step 206, judging whether the end sampling time is reached. If the end sampling time is not reached, the routine returns to step 205; in case the end sampling time is reached, step 207 is performed.
It should be noted that, in steps 202 to 206, the initial sampling time and the end sampling time refer to the above-mentioned preset configuration parameters, and the bandwidth information of the target interface is collected by setting the preset configuration parameters.
Step 207, calculating a clock period from the initial sampling time to the end sampling time, and calculating the bandwidth performance corresponding to the target interface based on the clock period and the total data amount of the valid data received by the target interface.
Optionally, after the determining the bandwidth performance verification result of the target interface, the following steps may be further performed:
Step 1), acquiring statistical information corresponding to the target interface of each test module in the chip; the statistical information is information related to the bandwidth performance verification result;
and 2) printing the statistical information of each test module.
In the embodiment of the invention, the statistical information corresponding to each test module target interface needs to be acquired, wherein the statistical information comprises the name, bandwidth information, bandwidth performance, bandwidth expected performance, bandwidth performance verification result and the like of each target interface.
Optionally, the printing the statistical information of each test module may be specifically implemented by the following steps:
Step 1), based on the printing class, acquiring the statistical information of each test module; the print class is a single case design mode.
In the embodiment of the invention, the printing class is used for printing the statistical information of each test module, so that a user can check the statistical information of each target interface in each test module. The single instance design pattern is a software design pattern, i.e. the class created by the single instance design pattern has only one instance in the current process and will provide a global access point to it.
In practical application, the perf_report (a print class) is set to be in a single-case design mode, so that the class can exist only, and when different target interfaces count own statistical information (such as bandwidth performance), the perf_report class is called and the statistical information is stored uniformly.
And 2) calling the printing class to uniformly print the statistical information of each test module after the simulation is finished.
Optionally, based on the print class, the statistical information of each test module is obtained, which may be specifically implemented by the following steps:
step 1), calling a monitoring class to store the statistical information of each test module; the monitoring class is constructed by the printing class;
and step 2), calling the printing class to traverse the monitoring class to obtain the statistical information of each test module.
The monitoring class is used for monitoring statistical information (such as bandwidth performance, bandwidth performance verification results and the like) of each target interface of each test module.
In practical application, the statistical information of each test module is saved by calling a monitoring class, which can be realized in the following manner:
the perf_report constructs a queue of parent class of perf_monitor (monitoring class) to store the corresponding statistical information of each target interface.
The parent class builds a virtual function of get_string, after the child is enabled in the verification environment, the child will put its handle into the parent class queue of the perf_report, and will rewrite the get_string function of the parent class, and store the statistics information of the target interface in the get_string function of the child.
And in the process of finally calling the printing, the perf_report can access the name information and the get_string function of the subclass by traversing the parent class queue of the perf_monitor, so that the statistical information is saved.
In the above embodiment, the statistical information of the target interfaces in each module can be transferred to a special printing class by using a single-case design mode, and the statistical information of the configured target interfaces in the environment can be automatically combined and printed together.
Fig. 3 is a third flow chart of the method for verifying the performance of an interface bandwidth according to the present invention, referring to fig. 3, the method includes steps 301 to 309, where:
Step 301, inputting a preset test sequence into at least one test module in the chip; the test sequence is used for simulating the test module.
Step 302, acquiring bandwidth information based on preset configuration parameters in the process of simulating the test module; wherein the bandwidth information includes at least one of: the number of data packets received by the target interface, the data amount of effective data in each data packet received by the target interface and the clock period required by the target interface to receive the preset number of data packets.
Step 303, determining the total data amount of the valid data of the target interface when receiving the preset number of data packets based on the number of data packets and the data amount of the valid data in each data packet.
Step 304, determining the bandwidth performance corresponding to the target interface based on the total data amount and the clock period required by the preset number of data packets.
Step 305, determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
Step 306, obtaining statistical information corresponding to a target interface of each test module in the chip; wherein the statistical information is information associated with bandwidth performance.
Specifically, the statistical information includes names of the target interfaces, bandwidth information, bandwidth performance, bandwidth expected performance, and a bandwidth performance verification result.
Step 307, calling a monitoring class to store the statistical information of each test module; wherein the monitoring class is constructed by the printing class;
and step 308, calling the printing class to traverse the monitoring class to obtain the statistical information of each test module.
And 309, calling the printing class to uniformly print the statistical information of each test module after the simulation is finished.
The device for verifying the interface bandwidth performance provided by the invention is described below, and the device for verifying the interface bandwidth performance described below and the method for verifying the interface bandwidth performance described above can be referred to correspondingly. Fig. 4 is a schematic structural diagram of an interface bandwidth performance verification apparatus provided by the present invention, and as shown in fig. 4, the interface bandwidth performance verification apparatus 400 includes: a first determination module 401 and a second determination module 402, wherein:
A first determining module 401, configured to determine, for at least one test module in a chip, bandwidth performance corresponding to a target interface of the test module based on bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data;
A second determining module 402, configured to determine a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
The invention provides a verifying device for interface bandwidth performance, which is used for determining the bandwidth performance corresponding to a target interface based on bandwidth information corresponding to the target interface of a testing module aiming at least one testing module in a chip, wherein the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when data is transmitted, and then determining the bandwidth performance verifying result of the target interface based on the comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface; by the method, the bandwidth performance is compared with the bandwidth expected performance, the bandwidth performance verification result of the target interface can be directly determined, the bandwidth performance of the target interface is not required to be checked and checked manually repeatedly, the verification efficiency of the bandwidth performance of each module interface in the chip is improved, and the labor cost is reduced.
Optionally, the bandwidth information includes at least one of:
The number of data packets received by the target interface;
the data volume of the effective data in each data packet received by the target interface;
the target interface receives a predetermined number of clock cycles required for the data packet.
Optionally, the first determining module 401 is further configured to:
Determining the total data amount of the effective data of the target interface when receiving the preset number of data packets based on the number of the data packets and the data amount of the effective data in each data packet;
and determining the bandwidth performance based on the total data amount and the clock period required by the preset number of data packets.
Optionally, the apparatus further comprises:
The input module is used for inputting a preset test sequence into the test module; the test sequence is used for simulating the test module;
And the acquisition module is used for acquiring the bandwidth information based on preset configuration parameters in the process of simulating the test module.
Optionally, the apparatus further comprises:
the acquisition module is used for acquiring the statistical information corresponding to the target interface of each test module in the chip; the statistical information is information related to the bandwidth performance verification result;
And the printing module is used for printing the statistical information of each test module.
Optionally, the statistical information includes at least one of:
the name of the target interface;
the bandwidth information;
The bandwidth performance;
the bandwidth expected performance;
and verifying the bandwidth performance.
Optionally, the printing module is further configured to:
based on the printing class, acquiring the statistical information of each test module; the printing class is a single-case design mode;
And calling the printing class to uniformly print the statistical information of each test module after the simulation is finished.
Optionally, the printing module is further configured to:
invoking a monitoring class to store the statistical information of each test module; the monitoring class is constructed by the printing class;
and calling the printing class to traverse the monitoring class to obtain the statistical information of each test module.
Fig. 5 illustrates a physical schematic diagram of an electronic device, as shown in fig. 5, which may include: processor 510, communication interface (Communications Interface) 520, memory 530, and communication bus 540, wherein processor 510, communication interface 520, memory 530 complete communication with each other through communication bus 540. Processor 510 may invoke logic instructions in memory 530 to perform a method of verifying interface bandwidth performance, the method comprising: aiming at least one test module in a chip, determining the bandwidth performance corresponding to a target interface of the test module based on the bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data; and determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
Further, the logic instructions in the memory 530 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the related art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program, the computer program being storable on a non-transitory computer readable storage medium, the computer program, when executed by a processor, being capable of performing a method of verifying performance of an interface bandwidth provided by the methods described above, the method comprising: aiming at least one test module in a chip, determining the bandwidth performance corresponding to a target interface of the test module based on the bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data; and determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
In yet another aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform a method of verifying performance of an interface bandwidth provided by the above methods, the method comprising: aiming at least one test module in a chip, determining the bandwidth performance corresponding to a target interface of the test module based on the bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data; and determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on such understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the related art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (11)
1. A method for verifying performance of an interface bandwidth, comprising:
aiming at least one test module in a chip, determining the bandwidth performance corresponding to a target interface of the test module based on the bandwidth information corresponding to the target interface; the bandwidth performance is used for reflecting the maximum transmission rate which can be achieved by the target interface when the target interface transmits data;
And determining a bandwidth performance verification result of the target interface based on a comparison result of the bandwidth performance and the bandwidth expected performance corresponding to the target interface.
2. The method for verifying bandwidth performance of an interface of claim 1, wherein the bandwidth information comprises at least one of:
The number of data packets received by the target interface;
the data volume of the effective data in each data packet received by the target interface;
the target interface receives a predetermined number of clock cycles required for the data packet.
3. The method for verifying the bandwidth performance of the interface according to claim 2, wherein the determining the bandwidth performance corresponding to the target interface based on the bandwidth information corresponding to the target interface of the test module includes:
Determining the total data amount of the effective data of the target interface when receiving the preset number of data packets based on the number of the data packets and the data amount of the effective data in each data packet;
and determining the bandwidth performance based on the total data amount and the clock period required by the preset number of data packets.
4. A method of validating bandwidth performance of an interface as defined in any one of claims 1 to 3, wherein prior to said determining the bandwidth performance corresponding to the target interface based on bandwidth information corresponding to the target interface of the test module, the method further comprises:
inputting a preset test sequence into the test module; the test sequence is used for simulating the test module;
and acquiring the bandwidth information based on preset configuration parameters in the process of simulating the test module.
5. A method of validating bandwidth performance of an interface as claimed in any one of claims 1 to 3, wherein after said determining the bandwidth performance validation result of the target interface, the method further comprises:
Acquiring statistical information corresponding to the target interface of each test module in the chip; the statistical information is information related to the bandwidth performance verification result;
And printing the statistical information of each test module.
6. The method of claim 5, wherein the statistical information comprises at least one of:
the name of the target interface;
the bandwidth information;
The bandwidth performance;
the bandwidth expected performance;
and verifying the bandwidth performance.
7. The method for verifying the performance of an interface bandwidth of claim 5, wherein said printing the statistical information of each of the test modules comprises:
based on the printing class, acquiring the statistical information of each test module; the printing class is a single-case design mode;
And calling the printing class to uniformly print the statistical information of each test module after the simulation is finished.
8. The method for verifying the performance of an interface bandwidth according to claim 7, wherein the obtaining the statistical information of each test module based on the print class comprises:
invoking a monitoring class to store the statistical information of each test module; the monitoring class is constructed by the printing class;
and calling the printing class to traverse the monitoring class to obtain the statistical information of each test module.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements a method of verifying the bandwidth performance of an interface as claimed in any one of claims 1 to 8 when the program is executed by the processor.
10. A non-transitory computer readable storage medium having stored thereon a computer program, wherein the computer program when executed by a processor implements a method of verifying the performance of an interface bandwidth as claimed in any one of claims 1 to 8.
11. A computer program product comprising a computer program which, when executed by a processor, implements a method of verifying the performance of an interface bandwidth as claimed in any one of claims 1 to 8.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410211982.2A CN118035017A (en) | 2024-02-26 | 2024-02-26 | Interface bandwidth performance verification method, electronic equipment and storage medium |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410211982.2A CN118035017A (en) | 2024-02-26 | 2024-02-26 | Interface bandwidth performance verification method, electronic equipment and storage medium |
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