CN118019388A

CN118019388A - Display panel and in-vehicle device

Info

Publication number: CN118019388A
Application number: CN202410330950.4A
Authority: CN
Inventors: 项洋; 吴启晓; 樊燕; 关新兴; 李彦松; 韩城; 徐博; 黄志宇; 陈友春
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2024-03-21
Filing date: 2024-03-21
Publication date: 2024-05-10

Abstract

The disclosure provides a display panel and an on-vehicle device, which belong to the technical field of display. The display panel comprises a substrate, a driving layer and a pixel layer which are sequentially stacked; the pixel layer comprises sub-pixels arranged in an array; the sub-pixel comprises a pixel electrode, an auxiliary layer, a light-emitting functional layer and a public electrode layer which are sequentially stacked; the sub-pixels comprise a first sub-pixel and a second sub-pixel; in the first sub-pixel, the optical path between the pixel electrode and the common electrode layer is 0.3-0.7 times of the luminous wavelength of the first sub-pixel; in the second sub-pixel, the optical path between the pixel electrode and the common electrode layer is 0.8-1.2 times of the luminous wavelength of the second sub-pixel, wherein in the device optical loss mode of the sub-pixel, the loss generated by the surface plasma mode is larger than the loss generated by the coupling of visible light to the air mode. The display panel and the vehicle-mounted device using the same can reduce the brightness decay rate.

Description

Display panel and in-vehicle device

Technical Field

The disclosure relates to the field of display technology, and in particular relates to a display panel and an on-vehicle device.

Background

With the increasing demand of the automotive industry for high-end vehicle displays, OLED (organic light emitting diode) light emitting display devices have begun to gradually replace the position of conventional LCDs (liquid crystal displays) in vehicle displays. Because of different requirements of vehicle-mounted application scenes, the requirements of the front brightness of the light-emitting display device are much more severe than those of the common mobile device, the requirements of the current vehicle-mounted display products are required to be met under the premise that the front brightness is 1000 nit in a region B (the direction that the angle between the viewing angle of a user and the vertical direction is 50 degrees), namely, the brightness at the viewing angle of 50 degrees is attenuated to about 26.5 percent at most, and the requirements of the current light-emitting display device are difficult to meet under the same viewing angle. In the related art, the front brightness of the light-emitting display device can be compensated to meet the requirement, but the compensation of the front brightness can influence the service life, power consumption and other performances of the light-emitting display device.

It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

An object of the present disclosure is to overcome the above-mentioned drawbacks of the prior art, and to provide a display panel capable of reducing a brightness attenuation degree of the display panel.

According to a first aspect of the present disclosure, there is provided a display panel including a substrate base, a driving layer, and a pixel layer, which are sequentially stacked; the pixel layer comprises sub-pixels arranged in an array; the sub-pixel comprises a pixel electrode, an auxiliary layer, a light-emitting functional layer and a public electrode layer which are sequentially stacked;

the subpixels include a first subpixel and a second subpixel;

in the first sub-pixel, the optical path between the pixel electrode and the common electrode layer is 0.3-0.7 times of the luminous wavelength of the first sub-pixel;

In the second sub-pixel, the optical path between the pixel electrode and the common electrode layer is 0.8-1.2 times of the luminous wavelength of the second sub-pixel;

Wherein, in the device optical loss mode of the sub-pixel, the loss generated by the surface plasma mode is larger than the loss generated by the coupling of the visible light to the air mode.

According to one embodiment of the present disclosure, the first wavelength is greater than the second wavelength; the auxiliary layer thickness of the second sub-pixel is greater than the auxiliary layer thickness of the first sub-pixel.

According to one embodiment of the present disclosure, the first sub-pixel is any one of a red sub-pixel and a green sub-pixel; the second sub-pixel is a blue sub-pixel.

According to one embodiment of the present disclosure, the auxiliary layer thickness of the first sub-pixel is between 0 and 10 nm; the thickness of the auxiliary layer of the second sub-pixel is between 100 and 110 nm.

According to one embodiment of the present disclosure, the material of the pixel electrode includes an indium oxide layer, an aluminum layer, and an indium oxide layer, which are sequentially stacked.

According to one embodiment of the disclosure, the driving layer is formed with a micro-nano structure on a surface thereof, and the pixel electrode is formed on the surface of the micro-nano structure.

According to one embodiment of the present disclosure, the micro-nano structure has a height between 100 and 150 nm.

According to one embodiment of the present disclosure, the micro-nanostructure duty cycle is between 0.5 and 0.95.

According to one embodiment of the present disclosure, the micro-nano structure has a period between 500 and 600 nm.

According to a second aspect of the present disclosure, there is provided an in-vehicle apparatus including the display panel.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.

Fig. 1 is a schematic diagram of a film structure of a display panel according to an embodiment of the disclosure.

Fig. 2 is a schematic diagram of a film structure of a display panel according to an embodiment of the disclosure.

Fig. 3 is a schematic diagram of a film structure of a display panel according to an embodiment of the disclosure.

Fig. 4 is a schematic diagram of normalized luminance change curves of a display panel according to the present application and a display panel according to the prior art at different viewing angles according to an embodiment of the present disclosure.

Fig. 5 is a schematic diagram illustrating the height and the variation of the light efficiency of the micro-nano structure according to an embodiment of the present disclosure.

Fig. 6 is a schematic diagram of duty cycle variation and varying light efficiency of the micro-nano structure according to an embodiment of the present disclosure.

Fig. 7 is a schematic diagram illustrating the duty cycle of each loss mode of a display panel device according to the prior art in an embodiment of the present disclosure.

Fig. 8 is a schematic diagram illustrating the duty cycle of each loss mode of the display panel device according to an embodiment of the present disclosure.

Fig. 9 is a schematic diagram of a silicon-based template provided in one embodiment of the present disclosure.

Fig. 10 is a schematic illustration of a first structural layer fabricated on a silicon-based template in one embodiment of the present disclosure.

FIG. 11 is a schematic illustration of a template with micro-nano structures obtained by stripping a silicon-based template in one embodiment of the present disclosure.

Fig. 12 is a schematic diagram of coating a photoresist on a glass substrate in one embodiment of the present disclosure.

FIG. 13 is a schematic diagram of transferring a template with micro-nano structures to a photoresist surface in one embodiment of the present disclosure.

FIG. 14 is a schematic illustration of a peel-off template with micro-nano structures in one embodiment of the present disclosure.

Fig. 15 is a schematic view of a glass substrate with micro-nano structures in one embodiment of the present disclosure.

Fig. 16 is a schematic view of an in-vehicle apparatus in one embodiment of the present disclosure.

Fig. 17 is a schematic diagram showing a change of a radiation ratio and a hole transport layer thickness of a display panel according to an embodiment of the present disclosure.

Reference numerals illustrate:

SBT and substrate base plate; BUF, buffer layer; an SCL, a polysilicon semiconductor layer; GI. A gate insulating layer; GT, gate layer; ILD, interlayer dielectric layer; SD, source drain metal layer; PLN, planarization layer; PE, pixel electrode; PEL, pixel electrode layer; PIXL, a pixel layer; CVD1, first inorganic encapsulation layer; IJP, organic encapsulation layer; CVD2, a second inorganic encapsulation layer; TFE, film encapsulation layer; TSL, touch metal layer; DRL, driving layer; PIX, subpixels; PIX1, first subpixel; PIX2, second sub-pixels; an EML and a light-emitting functional layer; a PDL, pixel definition layer; COML, common electrode layer; CFL, color film layer; PL, auxiliary layer; an LD, a light emitting element; an HTL, hole transport layer; HIL, hole injection layer; FSL, first structural layer; ETL, electron transport layer; EIL, electron injection layer; CPL, refractive index buffer layer; MNS, micro-nano structure; GSBT, a glass substrate; PS, photoresist; SISBT, a silicon-based template; an RPL, red pixel auxiliary layer; BPL, blue pixel auxiliary layer; a GPL, green pixel auxiliary layer; REML, red light emitting functional layer; GGML, a green light-emitting functional layer; BGML, a blue light-emitting functional layer; OC, visible light is coupled to air mode; EC. A surface plasmon mode; MM, vehicle-mounted device; WG, waveguide mode; SB, basal mode.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted. Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

The terms "a," "an," "the," "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and do not limit the number of their objects.

The structural layer a is located on the side of the structural layer B facing away from the substrate, it being understood that the structural layer a is formed on the side of the structural layer B facing away from the substrate. When the structural layer B is a patterned structure, a part of the structure of the structural layer a may also be located at the same physical height of the structural layer B or lower than the physical height of the structural layer B, where the substrate is a height reference.

The display brightness of the display panel may affect the user's experience, especially in vehicle-mounted display devices. For example, in the vehicle-mounted display device, to ensure the user experience, the front brightness of the display panel should reach 1000 nits; the brightness of the display panel under the view angle of the A+ region (the view angle of a user is 10 degrees with the horizontal plane of the vehicle-mounted display panel when the side of the vehicle-mounted display panel is seen) is 861 nit; the brightness of the display panel in the area A (the side view of the vehicle-mounted display panel shows that the viewing angle of a user forms an included angle of 40 degrees with the horizontal plane of the vehicle-mounted display panel) should reach 291 nits; and the brightness of the display panel in the B area (the side of the vehicle-mounted display panel is seen, the viewing angle of a user and the horizontal plane of the vehicle-mounted display panel form an included angle of 50 degrees) is required to reach 227 nits.

In the related art, the display panel is divided into two modes of top emission and bottom emission, and in order to improve the efficiency and color purity of the device, the top emission mode is mainly adopted. The top emission mode utilizes an anode and a cathode to respectively form an emission mirror and a half mirror, so that photons between the anode and the cathode vibrate back and forth to generate an interference enhancement effect. The microcavity effect is mainly limited by two factors, namely the reflectivity of the anode and cathode and the thickness of the microcavity. Microcavities generally satisfy the following formula: Wherein L is the optical length between the cathode and the anode, phi is the sum of the emission phase differences of the cathode and the anode, and when m= (1, 2,3 …), the resonant wavelength emitted outside the cavity is lambda, and the following formula is satisfied: /(I) Wherein phi ₁ and phi ₂ are the phase shifts generated at the interface of anode and cathode,/>N _m and K _m are the refractive index and extinction coefficient of the metal, respectively, and N is the refractive index of the organic layer.

Fig. 17 is a schematic diagram showing the radiation ratio of the display panel as a function of the thickness of the hole transport layer HTL. Fig. 17 also shows a schematic diagram of the variation of each light loss pattern with the thickness of the hole transport layer HTL in the display panel. Referring to fig. 17, the internal optical loss is largely divided into three types, a surface plasmon mode EC, a waveguide mode WG, and a substrate mode SB. The surface plasma mode EC mainly causes that photons and a metal interface are oscillated so that the photons cannot emit to the outside of the device in a radiation luminescence mode; waveguide mode WG mainly causes light to be lost to two sides in a form of total reflection due to refractive index mismatch inside the device; the substrate mode SB is that the light cannot exit from the outside due to the mismatch between the substrate and the air interface. The above internal light loss mode can cause a phenomenon that the brightness of the display panel is attenuated when the display panel emits light, and if the display brightness of the display panel under different viewing angles meets the use requirement, the brightness compensation needs to be performed on the display panel. For example, if the front brightness needs to reach 1000 nits, the brightness compensation should reach 1282 nits; if the brightness of the A+ region is to meet 861 nit, the brightness compensation should reach 1105 nit; if the brightness of the area A is required to meet 291 nit, the brightness compensation should reach 374 nit; if the brightness of the B region is to satisfy 227 nits, the brightness compensation should reach 291 nits. In order to optimize the light output efficiency of the display panel, a two-period device stacking method is often adopted (a two-period method refers to increasing the optical length between the pixel electrode PE and the common electrode layer COML by increasing the thickness of the hole transport layer HTL, reducing the loss of the surface plasmon mode EC, and improving the light emitting efficiency of the display panel). However, too thick hole transport layer HTL may cause an increase in waveguide mode WG loss, and eventually cause light with a large viewing angle to dissipate along the interfaces at both sides, so as to accelerate brightness decay of the display panel under a large viewing angle.

Based on this, the embodiment of the present disclosure provides a display panel, referring to fig. 1 and 3, the display panel includes a substrate SBT, a driving layer DRL, and a pixel layer PIXL that are sequentially stacked; the pixel layer PIXL includes sub-pixels PIX arranged in an array; the sub-pixel PIX includes a pixel electrode PE, an auxiliary layer PL, a light emitting functional layer EML, and a common electrode layer COML, which are sequentially stacked; the sub-pixels PIX include pixels for the first sub-pixels PIX1 and the second sub-pixels PIX2; in the first sub-pixel PIX1, an optical path between the pixel electrode PE and the common electrode layer COML is 0.3 to 0.7 times of a light emission wavelength of the first sub-pixel PIX 1; in the second sub-pixel PIX2, the optical path between the pixel electrode PE and the common electrode layer COML is 0.8 to 1.2 times of the emission wavelength of the second sub-pixel PIX2; in the device optical loss mode of the sub-pixel PIX, the loss generated by the surface plasmon mode EC is greater than the loss generated by the coupling of the visible light to the air mode OC.

For example, in the first subpixel PIX1, the optical path between the pixel electrode PE and the common electrode layer COML may be 0.3 times the emission wavelength of the first subpixel PIX 1; the optical path between the pixel electrode PE and the common electrode layer COML may be 0.5 times the emission wavelength of the first subpixel PIX 1; the optical path between the pixel electrode PE and the common electrode layer COML may be 0.7 times the emission wavelength of the first subpixel PIX1, or the like. In the second subpixel PIX2, an optical path between the pixel electrode PE and the common electrode layer COML may be 0.8 times of an emission wavelength of the second subpixel PIX 2; the optical path between the pixel electrode PE and the common electrode layer COML may be 1.0 times the emission wavelength of the second subpixel PIX 2; the optical path between the pixel electrode PE and the common electrode layer COML may be 1.2 times the emission wavelength of the second subpixel PIX2, or the like.

Specifically, in the related art, the duty ratio of the surface plasmon mode EC in the device optical loss mode is about 40%, the duty ratio of the visible light coupling to the air mode OC in the device optical loss mode is about 47%, and the duty ratio of the visible light coupling to the air mode OC is larger than the duty ratio of the surface plasmon mode EC. In the present application, by changing the microcavity thickness of the first subpixel PIX1 and the second subpixel PIX2, the duty ratio of the surface plasmon mode EC in the device optical loss mode is about 52%, the duty ratio of the visible light coupling to the air mode OC in the device optical loss mode is about 40%, and the duty ratio of the visible light coupling to the air mode OC is smaller than the duty ratio of the surface plasmon mode EC. The arrangement helps to reduce the brightness decay rate of the display panel under a large viewing angle and improve the front brightness of the display panel.

In some embodiments of the present disclosure, to improve efficiency and color purity of the display panel, the display panel is set to a top emission mode (it is understood that in other embodiments of the present disclosure, the display panel is also set to a bottom emission mode). The distance between the pixel electrode PE and the common electrode layer COML is regulated through the auxiliary layer PL, so that the microcavity thickness of the first sub-pixel PIX1 is kept in a periodic range, the microcavity thickness of the second sub-pixel PIX2 is kept in a two-period range, the optimization of the light power distribution inside the display panel is realized, the internal loss mode duty ratio in the display panel is redistributed, the outgoing light coupling of the display panel is facilitated, the brightness attenuation rate of the display panel under a large viewing angle is reduced, the front brightness of the display panel is improved (for example, see fig. 5, ref curves in fig. 5 show that the R/G/B of the display panel are two-period devices (which show that the R/G/B is a two-period device), the normalized brightness of the display panel is changed along with the viewing angle, the Split1 in fig. 5 shows that the R/G/B is a one/two-period device (which shows that the R/G/B is a one-period device, the blue sub-pixel is a one-period device), the normalized brightness of the display panel is changed along with the viewing angle, and the front brightness of the display panel is facilitated to be relieved under different viewing angles.

Alternatively, the substrate SBT may be a substrate of an inorganic material or a substrate of an organic material; of course, a composite substrate in which a base substrate of an inorganic material and a base substrate of an organic material are laminated may be used.

For example, in some embodiments of the present disclosure, the material of the substrate base plate SBT may be a glass material such as soda lime glass, quartz glass, sapphire glass, or the like. In further embodiments of the present disclosure, the material of the substrate base SBT may be polymethyl methacrylate, polyvinyl alcohol, polyvinyl phenol, polyethersulfone, polyimide, polyamide, polyacetal, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, or a combination thereof. In other embodiments of the present disclosure, the substrate SBT may also be a flexible substrate, for example the material of the substrate SBT may comprise polyimide.

It is to be understood that the above examples of the substrate SBT are only one possible way of substrate SBT of embodiments of the present disclosure. In other embodiments of the present disclosure, the substrate SBT may also be other structures, for example, the substrate SBT may also be a passive driving glass substrate, a silicon-based driving substrate, or the like.

Alternatively, in the driving layer DRL, any one of the pixel driving circuits may include a thin film transistor and a storage capacitor. Further, the thin film transistor may be selected from a top gate thin film transistor, a bottom gate thin film transistor, or a double gate thin film transistor; the material of the active layer of the thin film transistor may be an amorphous silicon semiconductor material, a low-temperature polysilicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material, a carbon nanotube semiconductor material or other types of semiconductor materials; the thin film transistor may be an N-type thin film transistor or a P-type thin film transistor.

It will be appreciated that the type between any two transistors in the individual transistors in the pixel drive circuit may be the same or different. Illustratively, in some embodiments, in one pixel driving circuit, a portion of the transistors may be N-type transistors and a portion of the transistors may be P-type transistors. Still further exemplary, in other embodiments, in one pixel driving circuit, the material of the active layer of the partial transistor may be a low temperature polysilicon semiconductor material, and the material of the active layer of the partial transistor may be a metal oxide semiconductor material. In some embodiments of the present disclosure, the thin film transistor is a low temperature polysilicon transistor. In other embodiments of the present disclosure, a portion of the thin film transistors are low temperature polysilicon transistors and a portion of the thin film transistors are metal oxide transistors.

Alternatively, referring to fig. 1, the driving layer DRL may include a polysilicon semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source drain metal layer SD, a planarization layer PLN, and the like stacked between the substrate SBT and the pixel layer PIXL. The thin film transistors and the storage capacitors (not specifically shown in the drawings) may be formed of films such as a polysilicon semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, and a source/drain metal layer SD. The positional relationship of each film layer can be determined according to the film layer structure of the thin film transistor.

Further, the polysilicon semiconductor layer SCL may be used to form a channel region of a transistor, and a portion of the wiring may also be formed by conducting if necessary. The gate layer GT may be used to form one or more of the scan lines, the reset control lines, the light emission control lines, and the like, may be used to form a gate of a transistor, and may be used to form part or all of the electrode plates of the storage capacitor. The source drain metal layer SD may be used to form source drain metal layer traces such as data traces and driving power supply voltage traces, and may also be used to form part of electrode plates of the storage capacitor.

Of course, in other embodiments of the present disclosure, the driving layer DRL may further include other film layers as needed, and any one of the film layers including the polysilicon semiconductor layer SCL, the gate layer GT, the source drain metal layer SD may also be multiple layers as needed, for example, the driving layer DRL may include two different polysilicon semiconductor layers SCL, two or three source drain metal layers SD, or two or three gate layers GT; accordingly, the insulating film layer (e.g., gate insulating layer GI, interlayer dielectric layer ILD, planarizing layer PLN, etc.) in the driving layer DRL may be increased or decreased adaptively, or a new insulating film layer may be added as needed.

Optionally, the driving layer DRL may further include a passivation layer (not specifically shown in the present drawing), where the passivation layer may be disposed on a surface of the source drain metal layer SD away from the substrate SBT, so as to protect the source drain metal layer SD.

Further, the display panel may further include a thin film encapsulation layer TFE, and the thin film encapsulation layer TFE may encapsulate and protect the pixel layer PIXL. The thin film encapsulation layer TFE may be provided on a surface of the pixel layer PIXL remote from the substrate SBT, which may include an inorganic encapsulation layer and an organic encapsulation layer alternately stacked. The inorganic packaging layer can effectively block external moisture and oxygen, and avoid aging of materials in the pixel layer PIXL caused by invasion of the moisture and the oxygen into the pixel layer PIXL.

Alternatively, the edges of the inorganic encapsulation layer may be located at the peripheral region. The organic encapsulation layer is located between two adjacent inorganic encapsulation layers in order to achieve planarization and to attenuate stresses between the inorganic encapsulation layers. Wherein an edge of the organic encapsulation layer may be located between an edge of the display region and an edge of the inorganic encapsulation layer.

Illustratively, the thin film encapsulation layer TFE includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2, which are sequentially stacked on a side of the pixel layer PIXL remote from the substrate SBT. Of course, in other embodiments of the present disclosure, the display panel may not be provided with the thin film encapsulation layer TFE, and the pixel layer PIXL may be encapsulated and protected in other manners.

In some embodiments of the present disclosure, referring to fig. 1, the display panel may further include a touch metal layer TSL, and the touch metal layer TSL may be disposed on a side of the thin film encapsulation layer TFE away from the pixel layer PIXL, where the touch metal layer TSL is disposed, so that the display panel has a touch function.

In some embodiments of the present disclosure, referring to fig. 1, the display panel may further include a color film layer CFL, where the color film layer CFL is disposed on a side of the touch metal layer TSL away from the pixel layer PIXL, where the disposed color film layer CFL helps to improve optical characteristics such as brightness and contrast of the display panel.

In the embodiment of the present disclosure, referring to fig. 1 and 2, for process reasons, for example, when an open mask process is used, a common material layer may exist in the light emitting functional layer EML, and the common material layer may cover the area where the adjacent light emitting elements LD are located and the gaps between the light emitting elements LD, which allows the adjacent light emitting elements LD to be connected by the common material layer. For example, a common material layer may cover the display region while being applied to each light emitting functional unit, and a portion of the common material layer in each light emitting functional unit serves as a structural film layer of the light emitting functional unit, and referring to fig. 3, the common material layer may include one of a hole injection layer HIL, a hole transport layer HTL, an auxiliary layer PL, an electron transport layer ETL, an electron injection layer EIL, and the like, which are sequentially disposed.

The main function of the hole injection layer HIL is to adjust the PEL interface barrier of the pixel electrode layer so that the energy levels of the pixel electrode PE and the hole transport layer HTL are more matched, thereby being beneficial to hole injection; the hole transport layer HTL has high hole mobility and is mainly used for transporting holes, so that the hole transport efficiency is improved; the main function of the auxiliary layer RL is to match the highest occupied molecular orbit energy level of the luminous functional layer EML and adjust the cavity length of the microcavity between the pixel electrode PE and the common electrode layer COML; the electron transport layer ETL mainly functions to transport electrons.

In some embodiments of the present disclosure, referring to fig. 3, the display panel may further include a refractive index buffer layer CPL disposed on a side of the common electrode layer COML away from the electron injection layer EIL, the refractive index buffer layer CPL being disposed to act on a gentle cross section of the common electrode layer COML to thereby improve an outgoing light efficiency of the display panel, and optionally, the refractive index buffer layer CPL may have a thickness of 550nm and the refractive index of 1.97. The thickness of the common electrode layer COML may be 550nm, and the refractive index of the common electrode layer COML may be 0.15.

In some embodiments of the present disclosure, the first wavelength is greater than the second wavelength; the auxiliary layer PL of the second subpixel PIX2 has a thickness greater than that of the auxiliary layer PL of the first subpixel PIX 1. For example, the auxiliary layer PL of the first subpixel PIX1 has a thickness between 0 and 10 nm; the auxiliary layer PL of the second subpixel PIX2 has a thickness between 100 and 110nm, and the hole transport layer HTL may have a thickness set to 10nm.

FIG. 4 is a schematic diagram Ref of luminance attenuation curves of a display panel according to the prior art and the present application under different viewing angles, wherein red sub-pixels, green sub-pixels and blue sub-pixels are two-period devices, and the luminance of the display panel varies with the viewing angle; split1 in the embodiment of the present application shows a red sub-pixel, a green sub-pixel, which are periodic devices, and a blue sub-pixel, which is a two-periodic device, and shows a curve of brightness of a display panel according to a viewing angle. The graph shows that compared with the Ref condition, the Split1 is reduced in brightness attenuation and full viewing angle, for example, the brightness is attenuated to 36.2% at the viewing angle of 50 degrees, and the requirement that the brightness of the conventional vehicle-mounted display device reaches 265nit in the B region is met, so that the display brightness of the display panel can be remarkably improved for the arrangement of the device with the B/G/R of two/one period.

In some embodiments of the present disclosure, referring to fig. 3, the first subpixel PIX1 is any one of a red subpixel and a green subpixel; the second subpixel PIX2 is a blue subpixel. In the first subpixel PIX1, the subpixels are different, and the first wavelength is also different.

In one example, when the first subpixel PIX1 is a red subpixel, an optical path between the pixel electrode PE and the common electrode layer COML in the red subpixel may be 324.8nm, a wavelength of light emitted from the red light to the common electrode layer COML may be 624nm, an optical path between the pixel electrode PE and the common electrode layer COML in the blue subpixel may be 273nm, and a wavelength of light emitted from the blue light to the common electrode layer COML may be 458nm.

In one example, when the first subpixel PIX1 is a green subpixel, an optical path between the pixel electrode PE and the common electrode layer COML in the green subpixel is 349nm, a wavelength of green light emitted from the common electrode layer COML is 458nm, an optical path between the pixel electrode PE and the common electrode layer COML in the blue subpixel is 273nm, and a wavelength of blue light emitted from the common electrode layer COML is 458nm.

In one example, when the first subpixel is a green subpixel and a red subpixel, the optical path between the pixel electrode PE and the common electrode layer COML in the red subpixel may be 324.8nm, and the wavelength of the red light emitted from the common electrode layer COML is 624nm; the optical path between the pixel electrode PE and the common electrode layer COML in the green sub-pixel is 349nm, and the wavelength of the emergent light from the green light to the common electrode layer COML is 458nm; the optical path between the pixel electrode PE and the common electrode layer COML in the blue sub-pixel is 273nm, and the wavelength of the blue light emitted from the common electrode layer COML is 458nm.

Correspondingly, when the first subpixel PIX1 is a red subpixel, the corresponding light emitting functional layer EML is a red light emitting functional layer REML, and similarly, the corresponding auxiliary layer PL is a red pixel auxiliary layer RPL; when the first subpixel PIX1 is a green subpixel, the corresponding light emitting functional layer EML is the red light emitting functional layer GEML, and similarly, the corresponding auxiliary layer PL is the green pixel auxiliary layer GPL; the emission functional layer EML corresponding to the blue sub-pixel is the blue emission functional layer BEML, and similarly, the auxiliary layer PL corresponding to the blue sub-pixel is the blue pixel auxiliary layer BPL.

In some embodiments of the present disclosure, the material of the pixel electrode PE may include an indium oxide layer, an aluminum layer, and an indium oxide layer, which are sequentially stacked.

It is understood that in other embodiments of the present disclosure, the pixel electrode PE may include an indium oxide layer, a silver layer, and an indium oxide layer, which are sequentially stacked.

Fig. 4 is a graph showing power loss comparison analysis of devices with different pixel electrode PE structures, see fig. 4, where Split1 is a curve showing a change of viewing angle of a display panel with brightness when an indium oxide layer, an aluminum layer and an indium oxide layer are sequentially stacked in the pixel electrode PE material; ref is a curve of the display panel viewing angle changing along with brightness when the pixel electrode PE material adopts an indium oxide layer, a silver layer and an indium oxide layer which are sequentially stacked. See fig. 4,7 and 8; compared with the Ref light coupling ratio, the Split1 is improved by 6%, and the surface plasma mode is reduced by 12%. The metal phase shift contrast analysis shows that the refractive index of the silver layer at 550nm is 0.14, and the absorption coefficient is 4; the refractive index of the aluminum layer was 0.6, the absorption coefficient was 5.2, and the device equivalent refractive index was 1.75. By calculating the phase shift formula that the metal phase shift of the silver layer is 1.05 and the metal phase shift of the aluminum layer is 0.64, the visible aluminum metal phase shift is far smaller than the metal phase shift of silver, so that the penetration depth of photons in the silver layer in the visible light wave band is larger, and the probability of photons being captured by the metal interface layer is improved. Therefore, when the pixel electrode PE adopts the indium oxide layer, the aluminum layer and the indium oxide layer which are sequentially stacked, the loss of an SPP mode can be reduced, and the light-out coupling efficiency of the device is improved.

Fig. 7 is a schematic view showing the loss ratio of the display device when the pixel electrode PE is an indium oxide layer, a silver layer, and an indium oxide layer which are sequentially stacked; fig. 8 is a schematic diagram of the loss ratio of the display device when the pixel electrode PE has a structure of an indium oxide layer, an aluminum layer, and an indium oxide layer stacked in this order; referring to fig. 7 and 8, visible light is coupled into the air mode OC, the device loss mode is 41% when the pixel electrode PE is of a structure of an indium oxide layer, a silver layer, and an indium oxide layer which are sequentially stacked, and the device loss mode is 47% when the pixel electrode PE is of a structure of an indium oxide layer, an aluminum layer, and an indium oxide layer which are sequentially stacked; from this, it is apparent that when visible light is coupled into the air mode OC, and the pixel electrode PE has a structure in which an indium oxide layer, an aluminum layer, and an indium oxide layer are sequentially stacked, the light-out coupling ratio is improved by 6%. In the surface plasmon mode EC, when the pixel electrode PE has a structure in which an indium oxide layer, a silver layer, and an indium oxide layer are sequentially stacked, the device loss mode ratio is 52%, and when the pixel electrode PE has a structure in which an indium oxide layer, an aluminum layer, and an indium oxide layer are sequentially stacked, the device loss mode ratio is 40%. From this, it is clear that in the surface plasmon mode EC, when the pixel electrode PE has a structure in which an indium oxide layer, an aluminum layer, and an indium oxide layer are sequentially stacked, the light-emitting coupling ratio is improved by 8%. Furthermore, it is known that when the material of the pixel electrode PE includes a layered structure of an indium oxide layer, an aluminum layer and an indium oxide layer, which are sequentially stacked, the brightness of the display panel can be further improved.

It is understood that in the embodiment of the present disclosure, the pixel electrode PE may include an indium oxide layer, an aluminum layer, and an indium oxide layer, which are sequentially stacked. Of course, the pixel electrode PE may include an indium oxide layer, a silver layer, and an indium oxide layer stacked in this order; the embodiments of the present disclosure are not particularly limited thereto.

In some embodiments of the present disclosure, referring to fig. 2, the surface of the driving layer DRL is formed with a micro-nano structure MNS, and the pixel electrode PE is formed on the surface of the micro-nano structure MNS. Through the micro-nano structure MNS arranged on the surface of the driving layer DRL, the micro-nano structure MNS can provide additional momentum for parallel components of incident light on the metal surface, so that the coupling efficiency of the surface plasma mode EC along with the change of angles is changed, and the light out coupling is improved.

Alternatively, the MNSs may be distributed in a stripe shape, or may be distributed in a dot shape, and of course, the MNSs may be distributed in a stripe shape and a dot shape together.

In some embodiments of the present disclosure, the micro-nanostructure MNS has a height between 100 and 150 nm.

Fig. 5 is a schematic diagram showing the contrast of the enhancement of the light effect of the micro-nano structure MNS with high variation. Referring to fig. 5, the MNS height of the micro-nano structure is 50nm, and the light efficiency improvement efficiency is 0.916 at 500nm of visible light; the MNS height of the micro-nano structure is 60nm, and the light efficiency improvement efficiency is 0.921 when the visible light is 500 nm; the MNS height of the micro-nano structure is 70nm, and the light efficiency improvement efficiency is about 0.938 at the visible light 500 nm; the MNS height of the micro-nano structure is 80nm, and the light efficiency improvement efficiency is about 0.957 at the visible light 500 nm; the MNS height of the micro-nano structure is 90nm, and the light efficiency improvement efficiency is 0.968 when the visible light is 500 nm; the MNS height of the micro-nano structure is 100nm, and the light efficiency improvement efficiency is about 1.0 at the visible light 500 nm; the MNS height of the micro-nano structure is 110nm, the light efficiency is improved by 1.019 when the visible light is 500nm, the MNS height of the micro-nano structure is 120nm, the light efficiency is improved by 1.03 when the visible light is 500nm, the MNS height of the micro-nano structure is 130nm, and the light efficiency is improved by 1.04 when the visible light is 500 nm; the MNS height of the micro-nano structure is 140nm, and the light efficiency improvement efficiency is 1.038 when the visible light is 500 nm.

Optionally, in the embodiment of the present disclosure, the MNS height of the micro-nano structure is 130nm, and when visible light is 500nm, the light efficiency is improved by 1.04, and the light efficiency is maximized. However, the height of the micro-nano structure MNS is not limited thereto.

In some embodiments of the present disclosure, the micro-nanostructure MNS duty cycle is between 0.5 and 0.95. Fig. 6 is a schematic diagram of MNS duty cycle light efficiency improvement contrast. Referring to fig. 6, when the duty cycle of the MNS is 0.9, the light efficiency is improved by 1.03 when the period of the MNS is 500 nm; when the period of the micro-nano structure MNS is 510nm, the light efficiency improvement efficiency is 1.0758; when the period of the micro-nano structure MNS is 520nm, the light efficiency improvement efficiency is 1.071; when the period of the micro-nano structure MNS is 530nm, the light efficiency improvement efficiency is 1.074; when the period of the micro-nano structure MNS is 540nm, the luminous efficiency improvement efficiency is 1.075; when the period of the micro-nano structure MNS is 550nm, the light efficiency improvement efficiency is 1.076; when the period of the micro-nano structure MNS is 560nm, the luminous efficiency improvement efficiency is 1.077; when the period of the micro-nano structure MNS is 570nm, the luminous efficiency improvement efficiency is 1.078; when the period of the micro-nano structure MNS is 580nm, the luminous efficiency improvement efficiency is 1.075; when the period of the micro-nano structure MNS is 590nm, the luminous efficiency improvement efficiency is 1.077; when the period of the micro-nano structure MNS is 600nm, the luminous efficiency improvement efficiency is 1.075.

When the MNS duty ratio of the micro-nano structure is 0.7, the luminous efficiency is improved by 1.058 when the cycle of the MNS is 500 nm; when the period of the micro-nano structure MNS is 510nm, the light efficiency improvement efficiency is 1.061; when the period of the micro-nano structure MNS is 520nm, the light efficiency improvement efficiency is 1.061; when the period of the micro-nano structure MNS is 530nm, the light efficiency improvement efficiency is 1.060; when the period of the micro-nano structure MNS is 540nm, the luminous efficiency improvement efficiency is 1.063; when the period of the micro-nano structure MNS is 550nm, the luminous efficiency improvement efficiency is 1.065; when the period of the micro-nano structure MNS is 560nm, the luminous efficiency improvement efficiency is 1.067; when the period of the micro-nano structure MNS is 570nm, the luminous efficiency improvement efficiency is 1.068; when the period of the micro-nano structure MNS is 580nm, the luminous efficiency improvement efficiency is 1.070; when the period of the micro-nano structure MNS is 590nm, the luminous efficiency improvement efficiency is 1.069; when the period of the micro-nano structure MNS is 600nm, the luminous efficiency is improved by 1.068.

When the MNS duty ratio of the micro-nano structure is 0.5, the luminous efficiency is improved by 1.040 when the period of the MNS is 500 nm; when the period of the micro-nano structure MNS is 510nm, the light efficiency improvement efficiency is 1.039; when the period of the micro-nano structure MNS is 520nm, the luminous efficiency improvement efficiency is 1.041; when the period of the micro-nano structure MNS is 530nm, the light efficiency improvement efficiency is 1.051; when the period of the micro-nano structure MNS is 540nm, the luminous efficiency improvement efficiency is 1.055; when the period of the micro-nano structure MNS is 550nm, the luminous efficiency improvement efficiency is 1.05; when the period of the micro-nano structure MNS is 560nm, the luminous efficiency improvement efficiency is 1.049; when the period of the micro-nano structure MNS is 570nm, the luminous efficiency improvement efficiency is 1.050; when the period of the micro-nano structure MNS is 580nm, the luminous efficiency improvement efficiency is 1.048; when the period of the micro-nano structure MNS is 590nm, the luminous efficiency is improved by 1.042; when the period of the micro-nano structure MNS is 600nm, the luminous efficiency is improved by 1.041.

Optionally, in an embodiment of the present disclosure, the duty cycle of the MNS with the micro-nano structure may be selected to be 0.9, and when the duty cycle of the MNS with the micro-nano structure is 0.9, the light efficiency improving efficiency is 1.0758 at the maximum, which is the maximum light efficiency improving efficiency. It should be noted that the duty cycle of the micro-nano MNS in the embodiments of the present disclosure is not limited to 0.9.

In some embodiments of the present disclosure, the micro-nanostructure MNS has a period between 500 and 600 nm. For example, the period of the MNS may be 500nm, the period of the MNS may be 510nm, the period of the MNS may be 550nm, or the period of the MNS may be 600nm, which is not particularly limited in the embodiments of the present disclosure.

In the embodiment of the present disclosure, referring to fig. 16, there is also provided an in-vehicle device MM including a display panel.

Further, in some embodiments of the present disclosure, a method for preparing a MNS with a micro-nano structure is provided:

Fig. 9 to 15 illustrate only one principle and procedure for preparing micro-nano structured MNS by nanoimprinting. It will be appreciated that certain steps may be omitted, modified, or new steps may be added, or the order between steps may be modified, depending on process requirements and needs. In other words, other possible nanoimprinting can be used to prepare micro-nanostructure MNS.

Referring to fig. 9, a silicon-based template SISBT is provided, it being understood that in other embodiments, the material of the template is not limited to silicon, but may be silicon dioxide, silicon nitride, or the like;

Referring to fig. 10 and 11, a first structural layer FSL (made of polydimethylsiloxane) is poured on the silicon-based template SISBT, wherein the first structural layer FSL may be bonded to the silicon-based template SISBT by using a plasma bonding process, and then, referring to fig. 11, the silicon-based template SISBT is removed by annealing under vacuum to obtain the first structural layer FSL with the MNS micro-nano structure. Of course, the silicon-based template SISBT to which the first structural layer FSL is bonded may be immersed in a THF (tetrahydrofuran) solution, and the first structural layer FSL may be peeled off from the silicon-based template SISBT (polydimethylsiloxane is soluble in tetrahydrofuran).

Providing a glass substrate GSBT;

referring to fig. 12, a photoresist PS is coated on the glass substrate GSBT, referring to fig. 13, the first structural layer FSL is transferred onto the photoresist PS by means of nano transfer; in the disclosed embodiment, the photoresist PS is SU-8 photoresist.

Referring to fig. 14 and 15, the first structural layer FSL is irradiated with ultraviolet rays, and the first structural layer FSL is cured and removed to prepare a substrate with a micro-nano structure MNS. In some embodiments of the present disclosure, the micro-nano structure MNS is a stripe. It is understood that the micro-nano structure MNS may also be in other shape forms, for example, the orthographic projection of the micro-nano structure MNS on the glass substrate GSBT may be square, rectangle, pentagon, hexagon, ellipse, or other shapes.

In other embodiments, the top end of the micro-nanostructure MNS is smaller in size than the bottom end (the end near the glass substrate GSBT), e.g., the glass substrate GSBT may be frustoconical (particularly frustoconical with a steep angle) to facilitate demolding in the nanoimprint process.

It should be noted that, although the steps of the preparation method of the micro-nano structure MNS in the present disclosure are depicted in a specific order in the figures, this does not require or imply that the steps must be performed in this specific order or that all of the illustrated steps must be performed in order to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform, etc.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. The display panel is characterized by comprising a substrate base plate, a driving layer and a pixel layer which are sequentially stacked;

the pixel layer comprises sub-pixels arranged in an array; the sub-pixel comprises a pixel electrode, an auxiliary layer, a light-emitting functional layer and a public electrode layer which are sequentially stacked;

the subpixels include a first subpixel and a second subpixel;

2. The display panel of claim 1, wherein the first subpixel has a first wavelength and the second subpixel has a second wavelength; the first wavelength is greater than the second wavelength; the auxiliary layer thickness of the second sub-pixel is greater than the auxiliary layer thickness of the first sub-pixel.

3. The display panel of claim 1, wherein the first subpixel is any one of a red subpixel and a green subpixel; the second sub-pixel is a blue sub-pixel.

4. The display panel of claim 1, wherein the auxiliary layer thickness of the first subpixel is between 0-10 nm; the thickness of the auxiliary layer of the second sub-pixel is between 100 and 110 nm.

5. The display panel according to claim 1, wherein the material of the pixel electrode includes an indium oxide layer, an aluminum layer, and an indium oxide layer which are stacked in this order.

6. The display panel according to claim 1, wherein a micro-nano structure is formed on a surface of the driving layer, and the pixel electrode is formed on a surface of the micro-nano structure.

7. The display panel of claim 6, wherein the micro-nano structure has a height between 100 and 150 nm.

8. The display panel of claim 6, wherein the micro-nano structure duty cycle is between 0.5 and 0.95.

9. The display panel of claim 6, wherein the micro-nano structure has a period between 500 and 600 nm.

10. A vehicle-mounted device comprising the display panel according to any one of claims 1 to 9.