CN118015988A

CN118015988A - Pixel circuit, pixel driving method, display panel and display device

Info

Publication number: CN118015988A
Application number: CN202410232541.0A
Authority: CN
Inventors: 郭双; 郭恩卿; 盖翠丽; 潘康观; 鲁建军; 靳笑阳; 程芸; 李俊峰
Original assignee: Yungu Guan Technology Co Ltd
Current assignee: Yungu Guan Technology Co Ltd
Priority date: 2024-02-29
Filing date: 2024-02-29
Publication date: 2024-05-10

Abstract

The application discloses a pixel circuit, a pixel driving method, a display panel and a display device, wherein the pixel circuit comprises a driving transistor, an initializing module, a resetting module and a light emitting module; a first pole of the driving transistor is connected with a first power line; the initialization module is connected with the initialization signal line, the first grid electrode and the first pole of the driving transistor; the reset module is connected with the reset signal line, the second grid electrode of the driving transistor and the second pole; the light emitting module is connected with the second pole and the second power line of the driving transistor, the data writing stage and the compensation stage can be separated, so that the time of the compensation process is not limited by the data writing time, the compensation is more sufficient, and in the compensation process, the initialization module and the reset module utilize the initialization signal on the initialization signal line and the reset signal on the reset signal line, so that the threshold voltage Vth of the driving transistor can be kept unchanged after drifting to 0, the compensation effect difference under different gray scales is avoided, and the display brightness uniformity of the display panel is improved.

Description

Pixel circuit, pixel driving method, display panel and display device

Technical Field

The application belongs to the technical field of display, and particularly relates to a pixel circuit, a pixel driving method, a display panel and a display device.

Background

Organic LIGHT EMITTING (OLED) and flat display devices based on light emitting Diode (LIGHT EMITTING) technology have been widely used in various consumer electronic products such as mobile phones, televisions, notebook computers, and desktop computers, because of their advantages such as high image quality, power saving, thin body, and wide application range.

However, the service performance of the current OLED display product needs to be improved.

Disclosure of Invention

The embodiment of the application provides a pixel circuit, a pixel driving method, a display panel and a display device, which solve the problem that the pixel driving circuit has poor display brightness uniformity of the display panel due to limited compensation time and difference of compensation effects of threshold voltages Vth under different gray scales.

In a first aspect, an embodiment of the present application provides a pixel circuit, including a driving transistor, an initialization module, a reset module, and a light emitting module;

The driving transistor comprises a first grid electrode, a second grid electrode, a first pole and a second pole;

A first pole of the driving transistor is connected with a first power line;

the initialization module is connected with the initialization signal line, the first grid electrode and the first pole of the driving transistor;

the reset module is connected with the reset signal line, the second grid electrode of the driving transistor and the second pole;

The light emitting module is connected with a second pole of the driving transistor and a second power line;

The initialization module and the reset module are used for adjusting the threshold voltage of the driving transistor by using an initialization signal on an initialization signal line and a reset signal on a reset signal line.

In a possible implementation manner of the first aspect, the initialization module includes a first initialization sub-module and a second initialization sub-module;

the first initialization submodule is connected with an initialization signal line and a first grid electrode of the driving transistor;

The second initialization submodule is connected with the first grid electrode and the first pole of the driving transistor;

preferably, the control terminal of the first initialization sub-module and the control terminal of the second initialization sub-module are connected to the same scanning signal.

In a possible implementation manner of the first aspect, the reset module includes a first reset sub-module and a second reset sub-module;

the first reset submodule is connected with a second grid electrode and a second pole of the driving transistor;

the second reset submodule is connected with a reset signal line and a second grid electrode of the driving transistor;

preferably, the control end of the first reset sub-module and the control end of the second reset sub-module are connected with different scanning signals.

In a possible implementation manner of the first aspect, the control end of the initialization module and the control end of the first reset submodule are both connected with the first scan line;

The control end of the second resetting sub-module is connected with a second scanning line;

preferably, the pixel circuit further includes a data writing module connected to the data line and the first gate of the driving transistor;

preferably, the control end of the data writing module is connected with the third scanning line;

Preferably, the pixel circuit further comprises a light-emitting control module, the light-emitting control module is connected with the first power line and the first electrode of the driving transistor, and the control end of the light-emitting control module is connected with the light-emitting control signal line;

Preferably, the first scanning signal on the first scanning line is a progressive scanning signal, and is used for conducting the initialization module and the first reset sub-module row by row in a frame time;

preferably, the second scan signal on the second scan line is a progressive scan signal for turning on the second reset sub-module row by row in a frame time.

In a possible implementation manner of the first aspect, the driving transistor includes a P-type transistor;

Preferably, the driving transistor includes a P-type low temperature polysilicon transistor;

preferably, the voltage value of the initialization signal is greater than the voltage value of the reset signal;

preferably, the voltage value of the reset signal is less than 0;

Preferably, the initialization signal is greater than a minimum value of the data signal and less than a maximum value of the data signal;

preferably, a difference between the initialization signal and a minimum value of the data signal is greater than or equal to a preset value, and a difference between a maximum value of the data signal and the initialization signal is greater than or equal to the preset value;

preferably, the preset value is 1/2 of the difference between the maximum value of the data signal and the minimum value of the data signal;

preferably, the initialization module and the reset module are used for adjusting the threshold voltage of the driving transistor to a predetermined value;

Preferably, the predetermined value comprises 0;

preferably, the thickness of the second gate of the driving transistor is greater than or equal to the thickness of the first gate thereof.

In a possible implementation manner of the first aspect, the pixel circuit further includes:

A first memory module connected to the second gate of the driving transistor and the first power line;

the second memory module is connected with the first grid electrode and the first pole of the driving transistor;

Preferably, the second storage module is used for storing the data signals transmitted by the data lines;

preferably, the first memory module is used to store a voltage signal that maintains a threshold voltage of the driving transistor at a predetermined value.

In a possible implementation of the first aspect;

The initialization module comprises a first transistor and a second transistor, wherein a first pole of the first transistor is connected with an initialization signal line, a second pole of the first transistor is connected with a first grid electrode of the driving transistor, and a grid electrode of the first transistor is connected with a first scanning line; the first electrode of the second transistor is connected with the first grid electrode of the driving transistor, the second electrode of the second transistor is connected with the first electrode of the driving transistor, and the grid electrode of the second transistor is connected with the first scanning line;

The reset module comprises a third transistor and a fourth transistor, wherein a first pole of the third transistor is connected with a second pole of the driving transistor, a second pole of the third transistor is connected with a second grid electrode of the driving transistor, and a grid electrode of the third transistor is connected with the first scanning line; the first pole of the fourth transistor is connected with the reset signal line, the second pole of the fourth transistor is connected with the second grid electrode of the driving transistor, and the grid electrode of the fourth transistor is connected with the second scanning line.

In a second aspect, an embodiment of the present application further provides a pixel circuit driving method, for driving the pixel circuit according to any one of the embodiments of the first aspect, where the method includes:

the first stage, the initialization module transmits the initialization signal on the initialization signal line to the first grid electrode and the first pole of the driving transistor, and the reset module transmits the reset signal of the reset signal line to the second grid electrode and the second pole of the driving transistor;

In the second stage, the initialization module and the reset module respond to the initialization signal to turn on the driving transistor, and the first storage module stores the voltage of the second grid electrode when the driving transistor is in an off state so as to fix the threshold voltage of the driving transistor to be a preset value;

The third stage, the data write-in module transmits the data signal on the data line to the first grid electrode of the driving transistor;

and in the fourth stage, the light-emitting control module is conducted, and the driving transistor generates driving current according to the data signal so as to drive the light-emitting module to emit light.

In a third aspect, an embodiment of the present application further provides a display panel, where the display panel includes the pixel circuit according to any one of the embodiments of the first aspect.

In a fourth aspect, an embodiment of the present application further provides a display device, where the display device includes the display panel according to the third aspect

The pixel circuit, the pixel driving method, the display panel and the display device provided by the embodiment of the application, wherein the pixel circuit comprises a driving transistor, an initializing module, a resetting module and a light emitting module; the driving transistor comprises a first grid electrode, a second grid electrode, a first pole and a second pole; a first pole of the driving transistor is connected with a first power line; the initialization module is connected with the initialization signal line, the first grid electrode and the first pole of the driving transistor; the reset module is connected with the reset signal line, the second grid electrode of the driving transistor and the second pole; the light emitting module is connected with a second pole of the driving transistor and a second power line; the initialization module and the reset module are used for adjusting the voltage of the second grid electrode of the driving transistor by utilizing an initialization signal on an initialization signal line and a reset signal on a reset signal line so as to adjust the threshold voltage of the driving transistor. The pixel driving circuit provided by the embodiment of the application can separate the data writing stage from the compensation stage, so that the time of the compensation process is not limited by the data writing time, the compensation is more sufficient, meanwhile, in the compensation process, the initialization module and the reset module can adjust the voltage of the second grid electrode of the driving transistor by utilizing the initialization signal on the initialization signal line and the reset signal on the reset signal line so as to adjust the threshold voltage of the driving transistor, for example, the top grid voltage and the source grid voltage of the driving transistor are kept unchanged, the bottom grid voltage is changed, the threshold voltage Vth of the driving transistor can be kept unchanged after drifting to 0, and as the threshold voltage Vth of all the driving transistors of the display panel is 0, the compensation effect difference under different gray scales is avoided, and the display brightness uniformity of the display panel is improved.

Drawings

In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are needed to be used in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort.

Fig. 1 is a schematic diagram of a pixel circuit structure according to an embodiment of the present application;

Fig. 2 is a schematic diagram of an initialization module structure according to an embodiment of the present application;

FIG. 3 is a schematic diagram of another initialization module according to an embodiment of the present application;

Fig. 4 is a schematic structural diagram of a reset module according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a reset module according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a pixel circuit according to an embodiment of the present application;

FIG. 7 is a schematic diagram of a pixel circuit according to an embodiment of the present application;

FIG. 8 is a schematic diagram of a pixel circuit according to an embodiment of the present application;

FIG. 9 is a schematic diagram of another pixel circuit according to an embodiment of the present application;

FIG. 10 is a schematic diagram of a pixel circuit according to an embodiment of the present application;

FIG. 11 is a schematic diagram of a pixel driving method according to an embodiment of the present application;

FIG. 12 is a timing diagram of signals according to an embodiment of the present application;

fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present application.

Wherein:

A 100-pixel circuit; 110-a drive transistor; 120-initializing a module; 121-a first initialization sub-module; 122-a second initialization sub-module; 130-a reset module; 131-a first reset submodule; 132-a second reset submodule; 140-a light emitting module; 150-a data writing module; 160-a light emission control module; 170-a first memory module; 180-a second memory module;

Vini—an initialization signal; vref—reset signal; vdata-data signal; VDD-a first power supply signal; VSS-a second power supply signal; RE-first scan signal; SNR-second scan signal; SNW-a third scan signal; EM-lighting control signal.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail below with reference to the accompanying drawings and the detailed embodiments. It should be understood that the specific embodiments described herein are merely configured to illustrate the application and are not configured to limit the application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the application by showing examples of the application.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, it is intended that the present application covers the modifications and variations of this application provided they come within the scope of the appended claims (the claims) and their equivalents. The embodiments provided by the embodiments of the present application may be combined with each other without contradiction.

Before describing the technical solution provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, the present application firstly specifically describes the problems existing in the related art:

the low-temperature polysilicon transistor (Low Temperature Poly-Silicon Thin Film Transistor, LTPS TFT for short) has the advantages of high mobility, strong driving capability, mature technology and the like, and is widely applied to a pixel driving circuit of a display panel.

In the conventional 7t1c LTPS pixel driving circuit, since the write Data voltage Data and the compensation threshold voltage Vth are the same process, the compensation of the threshold voltage is limited by the Data write time, and meanwhile, the compensation difference of the threshold voltage Vth under different gray scales is generated due to the difference of the Data signals, so that the problem of poor uniformity of display brightness exists. The problem of poor display brightness uniformity is particularly acute with high resolution and high refresh rate usage scenarios, due to the shortened line scan time. Therefore, the conventional pixel driving circuit has a problem that the compensation time is limited, and the compensation effect of the threshold voltage Vth at different gray scales is different, so that the uniformity of the display brightness of the display panel is poor.

Based on this, the embodiment of the application provides a pixel circuit, a pixel driving method, a display panel and a display device, by separating the compensation process from the Data writing process, the time of the compensation process is not limited by the Data writing time, the compensation is more sufficient, meanwhile, in the compensation process, the top gate and source voltages of the driving transistor are kept unchanged, the bottom gate voltage is changed, the threshold voltage Vth of the driving transistor is kept unchanged after drifting to 0V, and as the threshold voltage Vth of all the driving transistors of the display panel is 0V, the compensation effect difference under different gray scales Data is avoided, and the display brightness uniformity of the display panel is improved.

Embodiments of the present application are described in detail below with reference to the attached drawings.

Fig. 1 is a schematic diagram of a pixel circuit according to an embodiment of the present application, and as shown in fig. 1, a pixel circuit 100 may include a driving transistor 110, an initialization module 120, a reset module 130, and a light emitting module 140;

A driving transistor 110 including a first gate G, a second gate BG, a first pole S, and a second pole D;

A first pole of the driving transistor 110 is connected to a first power line;

an initialization module 120 connected to the initialization signal line, the first gate G and the first pole S of the driving transistor 110;

A reset module 130 connected to the reset signal line, the second gate BG of the driving transistor 110, and the second pole D;

The light emitting module 140 connects the second diode D of the driving transistor 110 and the second power line Vss.

Note that the initialization signal line may be referred to as L _ini, and the initialization signal transmitted on the initialization signal line L _ini may be referred to as Vini; the reset signal line may be referred to as L _ref, and the reset signal transmitted on the reset signal line L _ref may be referred to as Vref; the data signal line may be referred to as L _data, and the data signal transmitted on the data signal line L _data may be referred to as Vdata; the first power line may be referred to as L _vdd, and the first power signal transmitted on the first power line L _vdd may be referred to as VDD; the second power line may be referred to as L _vss and the second power signal transmitted on the second power line L _vss may be referred to as VSS.

The driving transistor 110 (DRIVING TFT may be abbreviated as Tdrive) refers to a transistor for driving the light emitting module 140 to emit light, and in the embodiment of the present application, the driving transistor may be turned on in the compensation phase to raise the voltage of the second diode D and the second gate BG of the driving transistor 110.

Specifically, as shown in fig. 1, the pixel circuit 100 may include a driving transistor 110, an initializing module 120, a resetting module 130, and a light emitting module 140.

The reset module 130, which is connected to the reset signal line, the second gate BG of the driving transistor 110, and the second pole D, may be used to write the reset signal on the reset signal line into the second gate BG and the second pole D of the driving transistor Tdrive in the initialization stage.

The initialization module 120, which is connected to the initialization signal line, the first gate G and the first pole S of the driving transistor 110, may be used to write the initialization signal on the initialization signal line into the first gate G and the first pole S of the driving transistor Tdrive during the initialization phase, and may be used to raise the voltages of the second pole D and the second gate BG of the driving transistor 110 together with the driving transistor Tdrive during the compensation phase to adjust the threshold voltage Vth of the driving transistor 110.

The driving transistor 110, including a first gate G, a second gate BG, a first pole S, and a second pole D, may be used to adjust voltages of the second pole D and the second gate BG of the driving transistor 110 together with the initialization module in the compensation phase, and may also be used to generate a driving current according to the data signal and the first power signal VDD in the light emitting phase.

The light emitting module 140 is connected to the second pole D of the driving transistor 110 and the second power line, and is used for emitting light according to the driving current in the light emitting stage.

The initialization module 120 and the reset module 130 may be configured to adjust the voltage of the second gate BG of the driving transistor 110 to adjust the threshold voltage Vth of the driving transistor 110 using the initialization signal Vini on the initialization signal line and the reset signal Vref on the reset signal line.

The pixel driving circuit provided by the embodiment of the application can separate the data writing stage from the compensation stage, so that the time of the compensation process is not limited by the data writing time, the compensation is more sufficient, meanwhile, in the compensation process, the initialization module and the reset module can adjust the voltage of the second grid electrode of the driving transistor by utilizing the initialization signal on the initialization signal line and the reset signal on the reset signal line so as to adjust the threshold voltage of the driving transistor, for example, the top grid voltage and the source grid voltage of the driving transistor are kept unchanged, the bottom grid voltage is changed, the threshold voltage Vth of the driving transistor can be kept unchanged after drifting to 0, and as the threshold voltage Vth of all the driving transistors of the display panel is 0, the compensation effect difference under different gray scales is avoided, and the display brightness uniformity of the display panel is improved.

In some embodiments, as shown in fig. 2, the initialization module 120 may include a first initialization sub-module 121 and a second initialization sub-module 122;

A first initialization submodule 121, which may connect an initialization signal line and a first gate of the driving transistor;

a second initialization submodule 122, which can be connected with the first gate and the first pole of the driving transistor;

Preferably, the control terminal of the first initialization sub-module and the control terminal of the second initialization sub-module may be connected to the same scan signal.

The first initialization submodule 121 may be connected to the initialization signal line and the first gate G of the driving transistor Tdrive, that is, the first initialization submodule 121 may write the initialization signal Vini on the initialization signal line to the first gate G of the driving transistor Tdrive in the initialization phase.

The second initialization submodule 122 may be connected to the first gate G and the first pole S of the driving transistor Tdrive, that is, during the initialization phase, the second initialization submodule 122 may write the voltage of the first gate G of the driving transistor Tdrive into the first pole S of the driving transistor Tdrive.

As can be seen from the above, in the initialization stage, the initialization signal Vini can be written into the first gate G and the first pole S of the driving transistor Tdrive by the first initialization sub-module 121 and the second initialization sub-module 122, that is, V _G = Vs = Vini of the driving transistor Tdrive can be realized in the initialization stage.

Specifically, as shown in fig. 2, the initialization module 120 may include a first initialization sub-module 121 and a second initialization sub-module 122; the first initialization submodule 121 may connect the initialization signal line and the first gate of the driving transistor; the second initialization submodule 122 may be connected to a first gate and a first pole of the drive transistor. In the initialization stage, the first gate G and the first pole S of the driving transistor Tdrive may be written with the initialization signal Vini by controlling the switching transistors in the first initialization sub-module 121 and the second initialization sub-module 122 to be turned on, i.e., the first gate G and the first pole S of the driving transistor Tdrive are initialized.

In one embodiment, as shown in fig. 3, the control terminal of the first initialization sub-module 121 and the control terminal of the second initialization sub-module 122 may be connected to the same scan line, and receive the scan signal RE. By dividing the initialization module into two, the initialization module can be divided into two initialization sub-modules, and the inventor researches and discovers that the two initialization sub-modules are active in the initialization stage and the compensation stage and are not active in the data writing stage and the light emitting stage, so that the control ends of the two initialization sub-modules have the same time sequence, the same scanning line can be used, the wiring quantity can be reduced, and the resolution of the display panel is improved.

In some embodiments, as shown in fig. 4, the reset module 130 may include a first reset sub-module 131 and a second reset sub-module 132;

the first reset submodule 131 is connected with the second grid electrode and the second pole of the driving transistor;

the second reset sub-module 132 connects the reset signal line and the second gate of the driving transistor;

Preferably, the control terminal of the first reset sub-module 131 and the control terminal of the second reset sub-module 132 are connected to different scan signals.

Specifically, as shown in fig. 4, the second reset sub-module 132 may connect the reset signal line and the second gate BG of the driving transistor Tdrive, and may be used to write the reset signal Vref on the reset signal line to the second gate BG of the driving transistor Tdrive in the initialization stage.

The first reset sub-module 131 may be connected to the second gate BG and the second pole D of the driving transistor Tdrive, and may be used to write the voltage of the second gate BG of the driving transistor Tdrive into the second pole D of the driving transistor Tdrive in the initialization stage.

The reset signal Vref on the reset signal line can thus be written to the second gate BG and the second pole D of the driving transistor Tdrive by the second reset sub-module 132 and the first reset sub-module 131.

In one embodiment, the inventors have found that the first reset sub-module 131 may be active during an initialization phase and a compensation phase, inactive during a data writing phase and a light emitting phase, and the second reset sub-module 132 may be active during the initialization phase, inactive during the compensation phase, the data writing phase and the light emitting phase. Therefore, the timing sequences of the two reset sub-modules are different, that is, the control end of the first reset sub-module 131 and the control end of the second reset sub-module 132 can be connected with different scan lines, which is beneficial to controlling the two reset sub-modules to function in different stages.

In some embodiments, as shown in fig. 5, the control end of the initialization module and the control end of the first reset sub-module are both connected to the first scan line;

preferably, as shown in fig. 6, the pixel circuit further includes a data writing module 150, the data writing module connecting the data line and the first gate of the driving transistor;

Preferably, as shown in fig. 7, the pixel circuit further includes a light emitting control module 160, the light emitting control module is connected to the first power line and the first electrode of the driving transistor, and a control terminal of the light emitting control module is connected to the light emitting control signal line; preferably, the first scanning signal on the first scanning line is a progressive scanning signal, and is used for conducting the initialization module and the first reset sub-module row by row in a frame time;

The Data writing module 150 is connected to the Data line and the first gate G of the driving transistor 110, and may be used to write the Data signal Data on the Data line into the first gate G of the driving transistor Tdrive in the Data writing stage.

It should be noted that, the first scan line may be referred to as L _RE, and the first scan signal transmitted on the first scan line L _RE may be referred to as RE; the second scan line may be referred to as L _SNR and the second scan signal transmitted on the second scan line L _SNR may be referred to as SNR; the third scan line may be referred to as L _SNW, the third scan signal transmitted on the third scan line L _SNW may be referred to as SNW, the light emission control signal line may be referred to as L _EM, and the light emission control signal transmitted on the light emission control signal line L _EM may be referred to as EM.

In particular, as can be seen from fig. 3 and 5, the inventors have found that, since the first initialization sub-module, the second initialization sub-module and the first reset sub-module are all active in the initialization phase and the compensation phase, they are inactive in the data writing phase and the light emitting phase, i.e., they are the same, and the second reset sub-module is active only in the initialization phase. Therefore, the control end of the second resetting sub-module can be connected with the second scanning line L _SNR, the control end of the initializing module and the control end of the first resetting sub-module can be connected with the same first scanning line L _RE, the wiring quantity is further reduced, and the resolution of the display panel is further improved.

In one embodiment, as shown in fig. 6, the data writing module 150 is connected to the data line and the first gate of the driving transistor, and the control terminal of the data writing module 150 may be connected to the third scan line L _SNW, and may be used to control the switch tube in the data writing module to be turned on during the data writing stage, so as to write the data signal into the first gate G of the driving transistor Tdrive.

In another embodiment, as shown in fig. 7, a control terminal of the light emitting control module 160 may be connected to a light emitting control signal line L _EM, and may be used to control a switch tube in the light emitting control module to be turned on in a light emitting stage, and write a voltage VDD on a first power signal line into a first electrode S of the driving transistor Tdrive, so that the driving transistor Tdrive generates a driving current to drive the light emitting module to emit light.

In yet another embodiment, the first scan signal RE on the first scan line is a progressive scan signal for conducting the initialization module and the first reset sub-module row by row in a frame time, and the second scan signal SNR on the second scan line is a progressive scan signal for conducting the second reset sub-module row by row in a frame time. In one frame time, the pixel circuits of all rows can be initialized and threshold compensated through progressive scanning of the first scanning signal RE and the second scanning signal SNR, and then the data is written in one row by one row, so that the compensation stage and the data writing stage can be separated, the time of the compensation process is not limited by the data writing time, and the compensation is more sufficient.

In some embodiments, the drive transistor may comprise a P-type transistor;

preferably, the voltage value of the reset signal is less than 0;

Preferably, the predetermined value comprises 0;

Specifically, the driving transistor Tdrive may include a P-type transistor. For example, when the driving transistor is a double gate P-type transistor, the magnitude of the threshold voltage Vth of the driving transistor Tdrive is related to the bottom gate-source voltage difference Vbs, vth > 0 when the bottom gate-source voltage difference Vbs is large, vth negatively shifts when the bottom gate-source voltage difference Vbs gradually decreases, and Vth negatively shifts to 0 in the course of decreasing the bottom gate-source voltage difference Vbs.

The initialization module may be configured to keep the voltages of the first gate G and the first pole S of the driving transistor Tdrive equal and unchanged, and the initialization module, the reset module, and the first storage module are configured to gradually raise the voltages of the second gate BG and the second pole D thereof after the driving transistor Tdrive is turned on.

In one embodiment, the voltage value of the initialization signal Vini > the voltage value of the reset signal Vref, the voltage value of the reset signal Vref may be less than 0, i.e., vref < 0 and Vref < Vini. Since Vini has been written to the first gate G and the first pole S of the driving transistor Tdrive in the initialization phase, and Vref has been written to the second gate BG and the second pole D of the driving transistor Tdrive, i.e. V _G＝V_s = Vini, vbs = Vref-Vini, vbs has a large value, vth > 0. In the compensation stage, V _G-V_s =0 < Vth, so that the conduction condition of the driving transistor Tdrive is satisfied, after the driving transistor Tdrive is turned on, the voltages of the second pole D and the second gate BG of the driving transistor Tdrive are raised, the voltage difference Vbs between Vb and Vs is gradually reduced, the threshold voltage Vth of the driving transistor is kept unchanged after drifting to 0, and the threshold voltages Vth of all the driving transistors of the display panel are all 0, so that the compensation effect difference under different gray scales is avoided, and the display brightness uniformity of the display panel is improved.

In yet another embodiment, the minimum value Vdatamin of the data signal Vdata < the initialization signal Vini < the maximum value Vdatamax of the data signal Vdata, i.e. between the ranges of the data signal Vdata. The initialization signal Vini is between the range of the data signal Vdata, for example, the minimum value Vdatamin =0.5V of the data signal Vdata and the maximum value Vdatamax =7v of the data signal Vdata, and 0.5V < the initialization signal Vini < 7V.

In one example, (the initialization signal Vini) — (the minimum value Vdatamin of the data signal Vdata) > preset value, (the maximum value Vdatamax of the data signal Vdata) > preset value, (the initialization signal Vini) > preset value, i.e., (Vdatamin + preset value) +.ltoreq.Vini.ltoreq. Vdatamax-preset value). The preset value may be a preset value that defines that the initialization signal Vini is in a certain portion of the range of the data signal Vdata. For example, the minimum value Vdatamin =0.5v of the data signal Vdata, the maximum value Vdatamax =7v of the data signal Vdata may be 2V, the value range of the initialization signal Vini may be 2.5V to 5V, or the value of the initialization signal Vini may be 3.5V to 4V, and the power consumption of charging and discharging the capacitor corresponding to the value of 3V compared with the value of 2V of the value of the initialization signal Vini is lower.

It should be noted that, through the research of the inventor, the initialization signal Vini needs to be evaluated in various ways. Firstly, as long as Vini > Vref can realize the conduction of Tdrive, and the voltage difference exists, the effect of compensation stage can be realized, in addition, the larger the voltage difference is, the larger the current flowing through Tdrive is, the faster the compensation speed is, the higher the compensation rate is, so the initialization signal Vini needs to take a larger voltage value. Second, but the initialization signal Vini cannot be infinitely large, it is necessary to match the output supply value of the IC chip, for example, the voltage supply value range of the IC is 0.2V to 7V, and the initialization signal Vini cannot be greater than 7V. Thirdly, in view of the above, if the initialization signal Vini takes 7V, it will cause a storage capacitor, such as the capacitor C2 in the second storage module, to store the voltage Vini at the end of the compensation phase, and in the following data writing phase, vdata needs to be written, the difference between Vini and Vdata becomes large, for example, when vdata=0.5V is low gray scale, the voltage difference between Vini and Vdata is 6.5V, which will increase the power consumption of charging and discharging the capacitor C2, and therefore, the initialization signal Vini cannot take the maximum value of 7V. The three points are considered, so that the conduction of the compensation stage Tdrive is guaranteed, the compensation speed is guaranteed, the compensation rate is improved, the output supply value of the IC chip is matched, the power consumption of capacitor charging and discharging is reduced, namely the power consumption of capacitor charging and discharging in each pixel circuit, namely the power consumption of the whole display panel is reduced, and therefore the initialization signal Vini can take a voltage value between Vdatamin and Vdatamax, the compensation speed is improved, the compensation rate is improved, the output supply value of the IC chip is matched, the power consumption of capacitor charging and discharging is reduced, and the power consumption is reduced while the uniformity of the display panel is improved.

For example, the preset value may be 1/2 of the difference between the maximum value of the data signal and the minimum value of the data signal, i.e., the preset value may be 1/2× (7V-0.5V) =3.25, at which time the initialization signal Vini-0.5V is not less than 3.25, and the initialization signal 7V-Vini is not less than 3.25, i.e., vini=3.75, i.e., vini is the middle value of the range of the data signal Vdata, so that when Vdata takes a value between 0.5 and 7V, the change of the pressure difference between Vdata and Vini is smaller, reducing the power consumption of the capacitor charging and discharging.

In yet another embodiment, the initialization module and the reset module are configured to adjust the threshold voltage of the driving transistor to a predetermined value, where the predetermined value refers to the threshold voltage vth=predetermined value of the driving transistor Tdrive at the end of the compensation phase, for example, the predetermined value may be 0, i.e. the threshold voltage vth=0 of the driving transistor Tdrive at the end of the compensation phase. By keeping the threshold voltage Vth of all the driving transistors of the display panel unchanged after drifting to 0, the compensation effect difference under different gray scales can be avoided, and the display brightness uniformity of the display panel is improved.

In still another embodiment, the thickness of the second gate BG of the driving transistor Tdrive may be equal to or greater than the thickness of the first gate G thereof. As the inventors have studied, since Vth is adjusted by changing the bottom gate voltage V _BG by fixing the source voltage in the embodiment of the present application, the change speed Δv1 of the bottom gate voltage V _BG affects the change speed Δv2 of the threshold voltage Vth of the driving transistor Tdrive. In the case where the thickness of the bottom gate BG < the thickness of the top gate G, the change speed Δv2 of the threshold voltage Vth is faster than the change speed Δv1 of the bottom gate voltage V _BG, i.e., the control capability of the bottom gate is too strong and the line scanning time is short, so that the control capability of the bottom gate is too strong to generate a large error in compensation. For example, when the bottom gate thickness is 1000 μm and the top gate thickness is 2000 μm, (the change speed Δv2 of the threshold voltage Vth) =2× (the change speed Δv1 of the bottom gate voltage V _BG), it is indicated that the control capability of the bottom gate is too strong, the change speed of the threshold voltage Vth is too fast, and the line scanning time is short, resulting in a large compensation error. In the embodiment of the application, the thickness of the second grid BG of the driving transistor Tdrive is larger than or equal to that of the first grid G of the driving transistor Tdrive, namely, the thickness of the bottom grid is larger than or equal to that of the top grid, so that errors caused by too high Vth change speed during compensation can be reduced, the compensation rate is further improved, the compensation degree is high, and the compensation effect is good.

In one example, the bottom gate thickness of the driving transistor Tdrive may be equal to the top gate thickness, and then the change speed Δv1 of the bottom gate voltage V _BG =the change speed Δv2 of the threshold voltage Vth of the driving transistor Tdrive, which may avoid a compensation error due to an excessively strong control capability of the bottom gate, and may also avoid a compensation deficiency due to an excessively weak control capability of the bottom gate, which may improve the compensation rate while improving the compensation speed, and the compensation effect is good. For example, when the bottom gate thickness is 1000 μm and the top gate thickness is 1000 μm, the change speed Δv2 of the threshold voltage vth=the change speed Δv1 of the bottom gate voltage V _BG, which means that the voltage change speed of the bottom gate is the same as the change speed of Vth, the compensation process can be better controlled, and the compensation effect can be improved while the compensation speed is improved.

In some embodiments, as shown in fig. 8, the pixel circuit 100 may further include a first storage module 170, a second storage module 180:

A first memory module 170 connected to the second gate of the driving transistor and the first power line;

A second memory module 180 connected to the first gate and the first pole of the driving transistor;

Preferably, the first storage module 170 is used for storing a voltage signal for maintaining a threshold voltage of the driving transistor at a predetermined value;

preferably, the second storage module 180 is used to store the data signals transmitted by the data lines.

Specifically, the second memory module 180 may be connected to the first gate and the first electrode S of the driving transistor Tdrive, and the second memory module 180 may store the data signal transmitted by the data line.

The first storage module 170 may be configured to store a voltage signal for maintaining the threshold voltage of the driving transistor at a predetermined value, for example, the predetermined value may be 0, that is, store the second gate voltage V _BG of the driving transistor at the end time of the compensation phase, so that Vth is kept unchanged after drifting to 0, and the threshold voltages Vth of all driving transistors of the display panel may be 0, thereby avoiding the difference of compensation effects under different gray scales Vdata, and improving the uniformity of display brightness of the display panel.

In some embodiments, as shown in fig. 9, the initialization module includes a first transistor and a second transistor, a first pole of the first transistor is connected to the initialization signal line, a second pole of the first transistor is connected to a first gate of the driving transistor, and a gate of the first transistor is connected to the first scan line; the first electrode of the second transistor is connected with the first grid electrode of the driving transistor, the second electrode of the second transistor is connected with the first electrode of the driving transistor, and the grid electrode of the second transistor is connected with the first scanning line;

Specifically, as shown in FIG. 9,

The initialization module 120 may include a first transistor T1 and a second transistor T2, wherein a first pole of the first transistor T1 is connected to an initialization signal line, a second pole of the first transistor T1 is connected to a first gate of the driving transistor, a gate of the first transistor T1 is connected to a first scan line L _RE, and the first transistor T1 may be used to control the Vini signal to be written to the first gate of the driving transistor; the first electrode of the second transistor T2 is connected with the first gate of the driving transistor, the second electrode of the second transistor T2 is connected with the first electrode of the driving transistor, the gate of the second transistor T2 is connected with the first scanning line L _RE, and then the first transistor T1 and the second transistor T2 can jointly control the Vini signal to be written into the first electrode S of the driving transistor;

The reset module 130 may include a third transistor T3 and a fourth transistor T4, a first pole of the fourth transistor T4 is connected to the reset signal line, a second pole of the fourth transistor T4 is connected to the second gate BG of the driving transistor, a gate of the fourth transistor T4 is connected to the first scan line L _RE, and the fourth transistor T4 may control Vref to be written into the second gate BG of the driving transistor; the first pole of the third transistor T3 is connected to the second pole D of the driving transistor, the second pole of the third transistor T3 is connected to the second gate BG of the driving transistor, the gate of the third transistor T3 is connected to the first scan line L _RE, and the third transistor T3 and the fourth transistor T4 can jointly control Vref to be written into the second pole D of the driving transistor.

In one example, as shown in fig. 10, the pixel circuit may include 7 transistors and 2 capacitors, i.e., a 7T2C structure, in which the driving transistor Tdrive is a double gate P-type transistor.

Specifically, the pixel circuit 100 may include a driving transistor 110, an initialization module 120, a reset module 130, a light emitting module 140, a data writing module 150, a light emitting control module 160, a first storage module 170, and a second storage module 180.

The initialization module 120 may include a first initialization sub-module 121 and a second initialization sub-module 122, and the reset module 130 may include a first reset sub-module 131 and a second reset sub-module 132. The light-emitting control module 160 may include a sixth transistor T6, a first pole of the sixth transistor T6 is connected to the first power line VDD, a second pole of the sixth transistor T6 is connected to the first pole S of the driving transistor, and the sixth transistor T6 may be used to control the pixel circuit to enter the light-emitting stage.

The data writing module 150 may include a fifth transistor T5, wherein a first pole of the fifth transistor T5 is connected to the data line, a second pole of the fifth transistor T5 is connected to the first gate G of the driving transistor, and a gate of the fifth transistor T5 is connected to the third scanning line L _SNW, so that the third scanning signal SNW transmitted by the fifth transistor T5 through the third scanning line L _SNW is turned on to control the data signal to be directly written into the first gate G of the driving transistor;

The first memory module 170 includes a first capacitor C1, a first pole of the first capacitor C1 is connected to the first power line L _Vdd, and a second pole of the first capacitor C1 is connected to the second gate BG of the driving transistor C1.

The light emitting control module 160, the light emitting control module 160 may include a sixth transistor T6, a first electrode of the sixth transistor T6 is connected to the first power line VDD, a second electrode of the sixth transistor T6 is connected to the first electrode S of the driving transistor, a gate electrode of the sixth transistor T6 is connected to the light emitting control line L _EM, and the sixth transistor T6 may be used to control the pixel circuit to enter the light emitting stage.

Based on the same inventive concept, the embodiment of the present application also provides a pixel circuit driving method, which can be used for driving the pixel circuit described in any one of the above embodiments.

As shown in fig. 11, the pixel circuit driving method provided by the embodiment of the application may further include a first stage S210 to a fourth stage S240 sequentially executed:

The first stage S210, the initialization module transmits the initialization signal on the initialization signal line to the first gate and the first pole of the driving transistor, and the reset module transmits the reset signal of the reset signal line to the second gate and the second pole of the driving transistor;

In the second stage S220, the initialization module and the reset module turn on the driving transistor in response to the initialization signal, and the first storage module stores the voltage of the second gate when the driving transistor is turned off, so as to fix the threshold voltage of the driving transistor to a predetermined value;

the third stage S230, the data writing module transmits the data signal on the data line to the first gate of the driving transistor;

In the fourth stage S240, the light emitting control module is turned on, and the driving transistor generates a driving current according to the data signal to drive the light emitting module to emit light.

The first stage S210 may be understood as an initialization stage; the second stage S220, which can be understood as a compensation stage; the third stage S230, which can be understood as a data writing stage; the fourth stage S240 may be understood as a light emitting stage.

Specifically, in the first stage S210, the initialization module 120 may be controlled to be turned on by the scan signal, the initialization module 120 may transmit the initialization signal Vini on the initialization signal line Lini to the first gate G and the first pole S of the driving transistor Tdrive after being turned on, and the reset module 130 may transmit the reset signal Vref of the reset signal line Lref to the second gate BG and the second pole D of the driving transistor Tdrive. The potential voltages of the first gate G and the first pole S of the driving transistor Tdrive can be initialized to Vini, i.e., V _G＝V_S =vini by the initialization module.

The reset module resets the potential voltages of the second gate BG and the second pole D of the driving transistor Tdrive to Vref, that is, V _BG＝V_D = Vref, where Vref may be smaller than 0, vini > Vref, and the driving transistor Tdrive is a dual-gate P-type transistor, and because the voltage difference Vbs between the bottom gate and the first pole S is very large, the threshold voltage Vth of the driving transistor Tdrive is greater than 0. Meanwhile, the anode of the light emitting module 140 is reset through the reset module, so that the afterimage is avoided.

At the start time of the second stage S220, the driving transistor Tdrive satisfies "V _G＝V_S＝Vini,V_GS＝V_G—V_S =0, vth > 0, so V _GS < Vth, and the driving transistor Tdrive is turned on. After the driving transistor Tdrive is turned on, the second electrode D potential voltage of the driving transistor Tdrive is raised, and the potential voltage of the second gate BG can be raised by raising the second electrode D potential voltage. As the potential voltage of the second gate BG is raised, vbs gradually decreases, and the threshold voltage Vth of the driving transistor Tdrive shifts from a positive value to 0. When the threshold voltage vth=0, at this time V _GS＝V_G—V_S =0=vth, the driving transistor Tdrive is turned off. After the driving transistor Tdrive is turned off, the voltage V _BG,V_S stored by the capacitor C1 in the first storage module is continuously fixed by the second storage module 180, so as to maintain vth=0 unchanged. The second memory module stores a differential pressure of V _G-V_S = Vini-Vini = 0V.

In the third stage S230, vth=0, the driving transistor Tdrive is turned off, the data writing module is turned on, and the data writing module can write the data signal Vdata transmitted on the data signal line into the first gate G of the driving transistor. Because the light-emitting control module is in an off state, the second storage module is not connected with a loop, namely one end of the second storage module is in a suspended state, V _S can change along with V _G jump according to the coupling effect of the second storage module, and because the pressure difference stored by the second storage module is 0V, V _G＝V_S is formed.

Then, the light emitting control module 160 is turned from the off state to the on state, and the light emitting control module 160 transmits the first power signal VDD to the second electrode S, and the data writing module is still turned on at this time, so that the two ends of the second storage module are respectively connected with VDD and Vdata voltage source signals, and the two ends are not in a floating state, and have no coupling effect, i.e. the voltage at one end will not change along with the jump of the voltage at the other end, so vs=vdd, V _G =vdata. Meanwhile, since the reset module 130 is turned off, the voltage jump between the setting of the first memory module 170 and the connection terminal of the second gate BG maintains the previous state vth=0.

It should be noted that 1) when both ends of the capacitor are connected to the voltage source, there is no coupling effect, i.e. the voltage at one end of the capacitor will not change along with the jump of the voltage at the other end; 2) When one end of the capacitor is connected with a voltage source and the other end is suspended, the capacitor has a coupling effect, namely, the voltage difference is stored by the coupling effect, namely, the voltage at one end can change along with the jump of the voltage at the other end.

In the fourth stage S240, the light-emitting control module is turned on, the fifth transistor T5 of the data writing module is turned off, and the capacitor C2 in the second memory module may store the voltage difference Δu _C2 =vdata-VDD between the two ends. According to the current formula "i=k (V _GS-Vth)², where k is a constant), after" vth=0, V _GS =vdata-VDD "is brought into the current formula, it is possible to obtain the current i related to Vdata-VDD only and independent of Vth of the driving transistor Tdrive, so that not only Vth of all driving transistors can be kept unchanged while separating the compensation phase from the data writing phase, so as to improve uniformity of display brightness, but also compensation of Vth can be realized, and further, display effect is improved.

In the embodiment of the application, the data writing module is directly connected with the data line and the first grid electrode of the driving transistor, and the data signal can be directly written into the first grid electrode of the driving transistor without flowing through any module in the data writing stage, so that the data writing stage and the compensation stage can be separated, the time of the compensation process is not limited by the data writing time, the compensation is more sufficient, meanwhile, in the compensation process, the initialization module and the reset module can utilize the initialization signal on the initialization signal line and the reset signal on the reset signal line, the voltage of the second grid electrode of the driving transistor can be adjusted to adjust the threshold voltage of the driving transistor, for example, the top grid voltage and the source voltage of the driving transistor are kept unchanged, the bottom grid voltage is changed, and the threshold voltage Vth of the driving transistor is kept unchanged after drifting to 0. In addition, in the light emitting stage, the current i flowing through the OLED is only related to Vdata-VDD and is irrelevant to the threshold voltage Vth of the driving transistor, so that the Vth of all the driving transistors can be kept unchanged to improve the uniformity of display brightness while the compensation stage is separated from the data writing stage, the compensation of VDD can be realized, and the display effect is further improved.

In one embodiment, as shown in fig. 12, fig. 12 is a signal timing diagram for driving the pixel circuit according to any of the above embodiments.

In the signal timing diagram, two types of signals, one being a scan signal, i.e., a switching signal, for controlling the transistors to be turned on and off, and the other being a data signal Vdata, i.e., a gray scale signal, for writing Vdata to the first gate G of the driving transistor Tdrive during the data writing stage, for controlling the light emitting diode OLED to emit light, may be included.

The scan signal may include: the first scan signal "RE" transmitted on the first scan line L _RE, the second scan signal "SNR" transmitted on the second scan line L _SNR, the third scan signal "SNW" transmitted on the third scan line L _SNW, and the emission control signal "EM" transmitted on the emission control signal line L _EM.

The data signal Vdata is selectively allowed to be written into the first gate G of Tdrive by the third scan signal "SNW" transmitted on the third scan line L _SNW.

Note that, the specific connection manner between the scan signal RE, SNR, SNW, EM and the data signal Vdata and each device in the driving circuit can be seen in fig. 10, and the scan signal RE, SNR, SNW, EM and the data signal Vdata are not shown in the timing chart because VDD, VSS, vini and Vref are fixed voltage signals.

It should be noted that the scan signal may be active low, e.g., the controlled transistor is a P-type transistor, and the scan signal may be active high, e.g., the controlled transistor is an N-type transistor. The high level of the scanning signal is valid, which means that the transistor can be controlled to be turned on when the scanning signal is high, and the low level of the scanning signal is valid, which means that the transistor can be controlled to be turned on when the scanning signal is low.

In the embodiment of the present application, the transistor controlled by the scan signal is exemplified as a P-type transistor, that is, the transistor can be controlled to be turned on when the scan signal is at a low level. Specifically, as shown in fig. 11, the phase of the pixel driving may be divided into four phases, namely, an initialization phase ①, a compensation phase ②, a data writing phase ③, and a light-emitting phase ④, respectively, i.e., one frame time is divided into four phases that are sequentially performed.

1) In the initialization stage ①, in the scan signal RE, SNR, SNW, EM, only RE and SNR are low, for example, as shown in fig. 10, the RE low level can control the turn-on of T1, T2, and T3, the initialization signal Vini can write the G pole and S pole of Tdrive, the SNR low level can control the turn-on of T4, and the reset signal Vref can write the D pole and BG pole of Tdrive. For example vref= -3V, vini=3.7v, then the bottom gate voltage V _BG＝Vref＝-3V,V_G-V_S of tdrive=vini-vini=0v. Besides initializing G, S, D and BG poles of Tdrive, the initialization stage can also initialize the voltages at two ends of the capacitor C2, so that the capacitor C2 is prevented from being suspended, the capacitor C1 is prevented from being suspended, and in addition, the anode of the light-emitting transistor can be reset.

2) At the end of the initialization stage ①, i.e. the start of the compensation stage ②, the state of the pixel circuit is: since Tdrive is a double-gate P-type transistor, when the bottom gate voltage V _BG =vref= -3V < 0, the threshold voltage Vth > 0, V _G-V_S =vini-vini=0v < Vth, tdrive is in on state.

3) In the compensation stage ②, in the scan signal RE, SNR, SNW, EM, only RE is low, compared with the initialization stage, the SNR is not active, i.e. the reset signal Vref is not continuously supplied to the D-pole and the BG-pole, i.e. the voltages of the D-pole and the BG-pole may be changed from the original Vref. For example, as shown in fig. 10, the RE low level may control the conduction of T1, T2, and T3, and thus Tdrive is also in a conducting state, so that a conducting loop is formed along T1, T2, tdrive, and T3, vini may be filled from the S pole into the D pole and then into the BG pole, so as to raise the voltages of the D pole and the BG pole.

It should be noted that, through the research of the inventor, it is also possible to control only T3 to be turned on and T1 and T2 to be turned off in the compensation phase, and although this scheme can also write the S-pole voltage into the D-pole and then write the BG-pole, the S-pole voltage may decrease, which may cause a shortage of the compensation rate, so in the embodiment of the present application, by controlling T1 and T2 to be turned on in the compensation phase ②, the initialization signal Vini on the initialization signal line may be continuously supplied to the S-pole of Tdrive, and the compensation rate may be improved.

After the BG pole voltage of Tdrive is raised, the threshold voltage Vth starts to be negatively biased from the original positive value until vth=0, and Tdrive just changes from the on state to the off state. After Tdrive is turned off, the path between the S pole and the D pole is cut off, and the voltages of the D pole and the BG pole remain unchanged, and at this time, the capacitor C1 can store V _BG when the threshold voltage vth=0 is maintained.

Note that, since the time of the compensation process is not limited by the write data time, the compensation time is long and the compensation is more sufficient as shown in fig. 12.

It should be noted that, in one frame time, since the compensation stage and the data writing stage can be independent of each other, the threshold voltage Vth of Tdrive in all pixel circuits can be compensated first, so that the threshold voltage Vth of Tdrive in all pixel circuits on the display panel is 0, and then the data writing is performed. Therefore, the data writing stage and the compensation stage can be separated, the time of the compensation process is not limited by the data writing time, the compensation is more sufficient, meanwhile, in the compensation process, the initialization module and the reset module can adjust the voltage of the second grid electrode of the driving transistor by utilizing the initialization signal on the initialization signal line and the reset signal on the reset signal line so as to adjust the threshold voltage of the driving transistor, for example, the top grid voltage and the source voltage of the driving transistor are kept unchanged, the bottom grid voltage is changed, the threshold voltage Vth of the driving transistor can be kept unchanged after drifting to 0, and as the threshold voltage Vth of all the driving transistors of the display panel is 0, the compensation effect difference under different gray scales is avoided, and the display brightness uniformity of the display panel is improved.

4) At the end of the compensation phase ②, i.e., the beginning of the data write phase ③, the state of the pixel circuit is: tdrive is turned off and the capacitor C1 stores V _BG which maintains the threshold voltage vth=0. Capacitor C2 stores a voltage differential V _G-V_S =0v.

5) In the early stage of the data writing stage ③, in the scan signal RE, SNR, SNW, EM, only SNW is low, for example, as shown in fig. 10, the SNW low may control T5 to be turned on, and the data signal Vdata may be written into the first gate G of the driving transistor Tdrive. Because the light-emitting control module is in an off state, the capacitor C2 has no conduction loop, namely one end is in a suspended state, so V _S can change along with V _G jump according to the coupling effect of the capacitor C2, and because the voltage difference stored by the capacitor C2 is 0V, V _G＝V_S is generated.

Then, the EM transitions from high level to low level, the light emitting control module 160 changes from off state to on state, and the light emitting control module 160 transmits the first power signal VDD to the second electrode S, and since the data writing module is still in on state at this time, two ends of the capacitor C2 are respectively connected with VDD and Vdata signals, and the capacitor C is not in a suspended state, and has no coupling effect, i.e. the voltage at one end does not change along with the transition of the voltage at the other end, so vs=vdd, V _G =vdata. Meanwhile, since the reset module 130 is turned off, the voltage jump between the setting of the first memory module 170 and the connection terminal of the second gate BG maintains the previous state vth=0.

6) At the end of the data write phase ③, i.e., the beginning of the light-emitting phase ④, the state of the pixel circuit is: capacitor C2 stores the voltage difference V _G—V_S =vdata-VDD, and capacitor C1 stores V _BG maintaining the threshold voltage vth=0.

7) In the light emitting stage ④, only EM is low in the scan signal RE, SNR, SNW, EM, for example, as shown in fig. 10, EM is still low, T6 is turned on and T5 is turned off, the first power signal VDD can be written into the S pole of Tdrive through T6, where vs=vdd is unchanged, the capacitor C2 stores the voltage difference V _G—V_S =vdata-VDD is unchanged, and V _G =vdata is unchanged. At this time, in the on-loop formed by VDD, T6, tdrive, OLED, VSS, a driving current may be generated to drive the OLED to emit light. The current formula for controlling the OLED to emit light is 'i=k' (V _GS-Vth)², wherein k is a constant), and 'Vth=0, V _GS =Vdata-VDD' can be brought into the current formula to obtain the current i which is only related to Vdata-VDD and is irrelevant to Vth, so that the Vth of all driving transistors can be kept unchanged while the compensation stage is separated from the data writing stage, the uniformity of display brightness is improved, the compensation of Vth can be realized, and the display effect is further improved.

Referring to fig. 13, fig. 13 is a schematic view of a display device provided by the present application, where the display device may include a display panel, and the display device may be at least one of a wearable device, a camera, a mobile phone, a tablet computer, a display screen, a television, and a vehicle-mounted display terminal.

The display panel comprises the pixel circuit provided by any one of the embodiments, and the display device comprises the display panel, so that the display device and the display panel have all the beneficial effects of the display panel.

In addition, the term "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

It should be understood that in embodiments of the present application, "B corresponding to a" means that B is associated with a, from which B may be determined. It should also be understood that determining B from a does not mean determining B from a alone, but may also determine B from a and/or other information.

The present application is not limited to the above embodiments, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the present application, and these modifications and substitutions are intended to be included in the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims

1. The pixel circuit is characterized by comprising a driving transistor, an initialization module, a reset module and a light emitting module;

the driving transistor includes a first gate, a second gate, a first pole and a second pole;

A first pole of the driving transistor is connected with a first power line;

the initialization module is connected with an initialization signal line, a first grid electrode and a first pole of the driving transistor;

The reset module is connected with a reset signal line, a second grid electrode of the driving transistor and a second pole;

The initialization module and the reset module are used for adjusting the threshold voltage of the driving transistor by using an initialization signal on the initialization signal line and a reset signal on the reset signal line.

2. The pixel circuit according to claim 1, wherein,

The initialization module comprises a first initialization sub-module and a second initialization sub-module;

the first initialization submodule is connected with the initialization signal line and the first grid electrode of the driving transistor;

Preferably, the control end of the first initialization sub-module and the control end of the second initialization sub-module are connected with the same scanning signal.

3. A pixel circuit according to claim 1 or 2, wherein,

The reset module comprises a first reset sub-module and a second reset sub-module;

the second reset submodule is connected with the reset signal line and a second grid electrode of the driving transistor;

4. A pixel circuit according to claim 3, wherein,

The control end of the initialization module and the control end of the first reset sub-module are both connected with a first scanning line;

Preferably, the pixel circuit further includes a data writing module, the data writing module connecting a data line and a first gate of the driving transistor;

Preferably, the control end of the data writing module is connected with a third scanning line;

Preferably, the pixel circuit further comprises a light-emitting control module, the light-emitting control module is connected with a first power line and a first pole of the driving transistor, and a control end of the light-emitting control module is connected with a light-emitting control signal line;

preferably, the first scan signal on the first scan line is a progressive scan signal, which is used for conducting the initialization module and the first reset sub-module row by row in a frame time;

Preferably, the second scan signal on the second scan line is a progressive scan signal, and is used for conducting the second reset submodule row by row in a frame time.

5. The pixel circuit according to claim 1, wherein,

The driving transistor includes a P-type transistor;

preferably, the voltage of the initialization signal is greater than the voltage of the reset signal;

preferably, the voltage of the reset signal is less than 0;

Preferably, the predetermined value comprises 0.

6. The pixel circuit of claim 1, wherein the pixel circuit further comprises:

A second memory module connected to the first gate and the first pole of the driving transistor;

preferably, the first storage module is configured to store a voltage signal for maintaining a threshold voltage of the driving transistor at the predetermined value;

Preferably, the second storage module is used for storing the data signals transmitted by the data lines.

7. The pixel circuit according to claim 1, wherein,

The initialization module comprises a first transistor and a second transistor, wherein a first pole of the first transistor is connected with the initialization signal line, a second pole of the first transistor is connected with a first grid electrode of the driving transistor, and a grid electrode of the first transistor is connected with a first scanning line; the first electrode of the second transistor is connected with the first grid electrode of the driving transistor, the second electrode of the second transistor is connected with the first electrode of the driving transistor, and the grid electrode of the second transistor is connected with the first scanning line;

The reset module comprises a third transistor and a fourth transistor, wherein a first pole of the third transistor is connected with a second pole of the driving transistor, a second pole of the third transistor is connected with a second grid electrode of the driving transistor, and a grid electrode of the third transistor is connected with a first scanning line; the first electrode of the fourth transistor is connected with the reset signal line, the second electrode of the fourth transistor is connected with the second grid electrode of the driving transistor, and the grid electrode of the fourth transistor is connected with the second scanning line.

8. A driving method of a pixel circuit, characterized in that it is applied to the pixel circuit according to any one of claims 1 to 7, the method comprising:

The second stage, the initialization module and the reset module respond to the initialization signal to turn on the driving transistor, and the first storage module stores the voltage of the second grid electrode when the driving transistor is in an off state so as to fix the threshold voltage of the driving transistor to be a preset value;

A third stage, the data writing module transmits the data signal on the data line to the first grid electrode of the driving transistor;

9. A display panel comprising the pixel circuit according to any one of claims 1 to 7.

10. A display device comprising the display panel according to claim 9.