CN118011098A - Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal - Google Patents
Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal Download PDFInfo
- Publication number
- CN118011098A CN118011098A CN202410177542.XA CN202410177542A CN118011098A CN 118011098 A CN118011098 A CN 118011098A CN 202410177542 A CN202410177542 A CN 202410177542A CN 118011098 A CN118011098 A CN 118011098A
- Authority
- CN
- China
- Prior art keywords
- line
- zero sequence
- outgoing
- impedance
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 54
- 238000003860 storage Methods 0.000 title claims abstract description 26
- 238000004364 calculation method Methods 0.000 title claims abstract description 21
- 238000005259 measurement Methods 0.000 claims abstract description 40
- 230000007935 neutral effect Effects 0.000 claims abstract description 17
- 238000004590 computer program Methods 0.000 claims description 15
- 239000002243 precursor Substances 0.000 claims description 6
- 238000009826 distribution Methods 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 16
- 230000006870 function Effects 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000003993 interaction Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000000750 progressive effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Landscapes
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The embodiment of the invention discloses a circuit interval zero sequence impedance calculation circuit, a method, a storage medium and a terminal. The circuit comprises a three-phase power supply, a plurality of circuit intervals, a three-phase power supply and a control circuit, wherein the three-phase power supply is used for providing current, and any one single-phase ground of a bus side connected with the three-phase power supply is arranged for increasing the voltage amplitude of a neutral point to a preset value; and the circuit intervals are used for receiving current under the condition of a preset value, and acquiring zero sequence impedance of the circuit intervals through the current. According to the invention, by arranging any one-phase single-phase grounding at the bus side, the neutral point voltage amplitude is increased to a preset value, and under the condition of the preset value, the zero sequence impedance of each line interval is obtained through calculation, so that the accurate measurement of the power distribution network line to the ground parameter is realized.
Description
Technical Field
The invention relates to the technical field of power distribution networks, in particular to a circuit interval zero sequence impedance calculation circuit, a method, a storage medium and a terminal.
Background
A large amount of distributed new energy and multiple loads are connected into a power grid, the power grid is required to realize multidirectional cooperation and flexible interaction, the traditional power grid has the problems of insufficient transparency and digitization, and particularly, the power distribution network has a complex structure and various devices, and the digital twin power grid can be realized in a real sense only when the power grid topology and the electrical and physical parameters are required to be transparent.
In the prior art, the current technical means only can obtain the overall ground impedance of all outgoing lines of the whole bus section, an online measurement method is not available at present, the test can be performed only by a power failure and high voltage method, and the implementation is difficult under the current requirements of power supply reliability and the like.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a circuit interval zero sequence impedance calculation circuit, a method, a storage medium, and a terminal.
A circuit interval zero sequence impedance calculation circuit comprises a three-phase power supply and a plurality of circuit intervals,
And the three-phase power supply is used for providing current, and is provided with any one single-phase grounding at the bus side connected with the three-phase power supply and used for increasing the voltage amplitude of the neutral point to a preset value.
And the circuit intervals are used for receiving the current under the preset value condition and acquiring zero sequence impedance of the circuit intervals through the current.
Wherein the plurality of line intervals comprise line measuring points and three-phase circuit impedance,
The line measuring point is used for receiving the current flowing into the current line interval under the preset value condition, and acquiring the zero sequence voltage and the zero sequence current of the current line interval through the current.
And the three-phase circuit impedance is used for determining the zero sequence impedance of the current three-phase circuit impedance through the zero sequence voltage and the zero sequence current of the current line interval.
A method for calculating zero sequence impedance of a line interval, the method comprising:
providing current, setting any one single-phase grounding at the bus side connected with the three-phase power supply, and increasing the voltage amplitude of the neutral point to a preset value.
And under the preset value condition, receiving the current, and acquiring the zero sequence impedance of the plurality of line intervals through the current.
Receiving the current under the preset value condition, and acquiring zero sequence impedance of the plurality of line intervals through the current, wherein the method specifically comprises the following steps of:
and under the preset value condition, acquiring the zero sequence voltage and zero sequence current of the bus outgoing positions of all outgoing lines and the line intervals respectively through the current.
And respectively determining the zero sequence impedance of the three-phase circuit impedance between the outlet of each outlet line bus and the first line measuring point under the preset value condition according to the zero sequence voltage and the zero sequence current of each outlet line bus and the plurality of line intervals.
And respectively determining the zero sequence impedance of the three-phase circuit impedance between the adjacent line measuring points of each outgoing line under the preset value according to the outgoing line of each outgoing line bus and the zero sequence voltages and the zero sequence currents of the plurality of line intervals.
And respectively determining the zero sequence impedance of the three-phase circuit impedance in the line interval at the tail end of each outgoing line under the preset value according to the zero sequence voltage and the zero sequence current of the bus outgoing line of each outgoing line and the line intervals.
And stopping the bus-side grounding phase single-phase grounding of the three-phase power supply, and recovering the neutral point voltage amplitude to a normal level.
The method specifically includes the steps of determining zero sequence impedance of the three-phase circuit impedance between the outlet of each outlet line bus and a first line measurement point under the preset value condition according to the zero sequence voltage and zero sequence current of each outlet line bus outlet and the plurality of line intervals, wherein the zero sequence impedance comprises the following specific steps:
And respectively determining the zero sequence voltage amplitude average value of the bus outgoing position of each outgoing line and the first line measuring point according to the zero sequence voltage and the zero sequence current of each outgoing line bus outgoing position and the plurality of line intervals.
And respectively determining absolute values of zero sequence current amplitude differences of the bus outgoing positions of the outgoing lines and the first line measuring point according to the zero sequence voltages and zero sequence currents of the bus outgoing positions of the outgoing lines and the line intervals.
And respectively determining zero sequence impedance of three-phase circuit impedance of the outgoing line bus outgoing position and the first line measuring point under the preset value condition according to the zero sequence voltage amplitude average value of the outgoing line bus outgoing position and the first line measuring point and the absolute value of the zero sequence current amplitude difference value of the outgoing line bus outgoing position and the first line measuring point.
The method specifically comprises the steps of respectively determining zero sequence impedance of three-phase circuit impedance of each outgoing line bus outgoing position and each first line measuring point under the preset value condition according to the zero sequence voltage amplitude average value of each outgoing line bus outgoing position and each first line measuring point and the absolute value of zero sequence current amplitude difference value of each outgoing line bus outgoing position and each first line measuring point, wherein the zero sequence impedance comprises the following steps:
According to Determining zero sequence impedance of three-phase circuit impedance of bus outgoing line positions in each outgoing line and the first line measuring point, wherein U 0n is zero sequence voltage of the bus outgoing line positions of each outgoing line,/>For the zero sequence voltage of the first line measuring point of each outgoing line,/>For the zero sequence current of the first line measuring point of each outgoing line, I 0n is the zero sequence voltage of the outgoing line of each outgoing line bus, and n is the outgoing line number.
The method specifically includes the steps of determining zero sequence impedance of the three-phase circuit impedance between adjacent line measurement points of each outgoing line under the preset value condition according to zero sequence voltage and zero sequence current at the outgoing line of each outgoing line bus and among the line intervals, wherein the zero sequence impedance of the three-phase circuit impedance between adjacent line measurement points of each outgoing line specifically includes:
And respectively determining the zero sequence voltage amplitude average value between the adjacent line measurement points of each outgoing line according to the outgoing line of each outgoing line bus and the zero sequence voltages and the zero sequence currents of the plurality of line intervals.
And respectively determining absolute values of zero sequence current amplitude differences between adjacent line measuring points in each outgoing line according to the outgoing line of each outgoing line bus and the zero sequence voltages and zero sequence currents in the plurality of line intervals.
And respectively determining the zero sequence impedance of the three-phase circuit impedance of each outgoing line adjacent to the line measuring point under the preset value condition according to the zero sequence voltage amplitude average value between the adjacent line measuring points and the absolute value of the zero sequence current amplitude difference value between the adjacent line measuring points.
The method specifically includes the steps of respectively determining zero sequence impedance of three-phase circuit impedance of each outgoing line adjacent to the line measuring point under the preset value condition according to an average value of zero sequence voltage amplitude between the adjacent line measuring points and an absolute value of zero sequence current amplitude difference between the adjacent line measuring points:
According to Determining zero sequence impedance of three-phase circuit impedance of each outgoing line adjacent to the line measuring point, wherein i is the number of line measuring points, i is more than or equal to 2,/>For the zero sequence voltage of the line measuring point in the line interval of the precursor line of each outgoing line,/>For the zero sequence voltage of the line measuring point in the subsequent line interval of each outgoing line,/>For the zero sequence current of the line measuring point in the line interval of the precursor line of each outgoing line,/>And (3) the zero sequence current of the line measuring point in the subsequent line interval of each outgoing line is obtained, and n is the number of the outgoing line.
The method specifically includes the steps of determining zero sequence impedance of the three-phase circuit impedance in the line section at the tail end of each outgoing line under the preset value condition according to the zero sequence voltage and zero sequence current of the bus outgoing line of each outgoing line and the line sections, wherein the zero sequence impedance of the three-phase circuit impedance in the line section at the tail end of each outgoing line specifically includes:
And respectively determining the zero sequence voltage of the line section at the tail end of each outgoing line according to the bus outgoing line of each outgoing line and the zero sequence voltages and the zero sequence currents of the line sections.
And respectively determining the zero sequence current of the line section at the tail end of each outgoing line according to the bus outgoing line of each outgoing line and the zero sequence voltages and the zero sequence currents of the line sections.
And respectively determining the zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line terminal under the preset value condition according to the zero sequence voltage of the line interval of each outgoing line terminal and the zero sequence current of the line interval of each outgoing line terminal.
The determining, according to the zero sequence voltage of the line interval at the tail end of each outgoing line and the zero sequence current of the line interval at the tail end of each outgoing line, the zero sequence impedance of the three-phase circuit impedance in the line interval at the tail end of each outgoing line under the preset value condition specifically includes:
According to Respectively determining zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line end under the preset value condition, wherein/>For the zero sequence voltage of the line measuring point in the line interval of each outgoing line end,/>And n is the number of the outgoing line, and is the zero sequence current of the line measuring point in the line interval at the tail end of each outgoing line.
A storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of the method as described above.
A terminal comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of the method as described above.
The embodiment of the invention has the following beneficial effects:
According to the invention, any single-phase grounding is arranged on the bus side, so that the neutral point voltage amplitude is increased to a preset value, under the condition of the preset value, zero sequence impedance of each line interval is calculated and obtained, accurate measurement of the power distribution network line to the ground parameter is realized, accurate line parameter and topology information are provided for real-time setting of a power grid protection fixed value and real-time tide calculation, and the power grid planning, scheduling, operation control, source network load storage interaction and other applications are supported, so that the novel power system is assisted.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Wherein:
Fig. 1 is a schematic structural diagram of an embodiment of a circuit interval zero sequence impedance calculation circuit provided by the present invention;
FIG. 2 is a schematic diagram of a circuit section according to one embodiment of the present invention;
Fig. 3 is a schematic structural diagram of another embodiment of a circuit interval zero sequence impedance calculation circuit provided by the present invention;
Fig. 4 is a schematic flow chart of an embodiment of a method for calculating zero sequence impedance between lines according to the present invention;
fig. 5 is a schematic flow chart of another embodiment of a line interval zero sequence impedance calculation method provided by the invention;
FIG. 6 is a schematic structural diagram of an embodiment of a terminal provided by the present invention;
fig. 7 is a schematic structural diagram of an embodiment of a storage medium according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
As shown in fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a circuit interval zero sequence impedance calculation circuit provided by the present invention. A circuit interval zero sequence impedance calculation circuit comprises a three-phase power supply 1, a plurality of circuit intervals 2,
The three-phase power supply 1 is used for providing current, and any one single-phase grounding at the bus side connected with the three-phase power supply 1 is arranged for increasing the voltage amplitude of the neutral point N to a preset value.
In a specific implementation scenario, the three-phase power supply 1 includes an a-phase power supply, a B-phase power supply, and a C-phase power supply, is connected to a three-phase bus side, and provides current to a plurality of line sections 2 of the a-phase, B-phase, and C-phase lines through the three-phase power supply, and sets the bus side a-phase connected to the three-phase power supply to be grounded, so as to raise the voltage amplitude of the neutral point to a preset value, which is limited to 15% -100% of the rated phase voltage amplitude of the system, and simultaneously measures zero sequence voltage and zero sequence current at the outlet of each outlet line bus and zero sequence voltage and zero sequence current of the plurality of line sections 2 through a bus outlet switch (not shown) and line measurement points located in each line section. When the same-direction zero-sequence current flows in the three-phase circuit, the circuit generates zero-sequence impedance, and the zero-sequence impedance of a plurality of line intervals 2 is obtained under the condition of a preset value.
It should be noted that a phase a single-phase grounding or B phase single-phase grounding or C phase single-phase grounding may be provided on the system bus side.
And the circuit sections 2 are used for receiving current under the condition of a preset value and acquiring zero sequence impedance of the circuit sections through the current.
In a specific implementation scenario, the three-phase power supply 1 supplies current to several line intervals 2 of each outgoing line. Specifically, the line interval zero sequence parameter calculation circuit has n outgoing lines, a line interval 21 is connected to a bus outgoing line position of the outgoing line 1, a line interval 22 is connected to a bus outgoing line position of the outgoing line 2, and a line interval 2n is connected to a bus outgoing line position of the outgoing line n. And the line intervals respectively receive the current, and the zero sequence impedance of the current line interval is obtained through the current.
Preferably, each line interval comprises a line measurement point and a three-phase circuit impedance. Under the condition of a preset value, the line measuring point receives the measuring current flowing into the current line interval, the zero-sequence voltage and the zero-sequence current of the current line interval are obtained through the measuring current, and the zero-sequence impedance of the current three-phase circuit impedance is determined through the zero-sequence voltage and the zero-sequence current of the current line interval.
According to the invention, by arranging any single-phase grounding on the bus, the neutral point voltage amplitude is increased to a preset value, the zero sequence impedance of each line interval is calculated and obtained under the condition of the preset value, the accurate measurement of the ground parameters of the power distribution network line is realized, the accurate line parameters and topology information are provided for the real-time setting of the protection fixed value of the power grid and the real-time power flow calculation, the application of power grid planning, scheduling, operation control, source network load storage interaction and the like is supported, and the construction of a novel power system is assisted.
Fig. 2 is a schematic structural diagram of an embodiment of a plurality of line intervals according to the present invention. The circuit interval zero sequence parameter calculation circuit comprises a plurality of circuit intervals 2, wherein each circuit interval 2 comprises a circuit measurement point 3 and three-phase circuit impedance 4, and the circuit measurement points 3 are used for receiving current flowing into a current circuit interval under the condition of a preset value and obtaining zero sequence voltage and zero sequence current of the current circuit interval through the current; and the three-phase circuit impedance 4 is used for determining the zero-sequence impedance of the current three-phase circuit impedance through the zero-sequence voltage and the zero-sequence current of the current line interval.
In a specific implementation scenario, as shown in fig. 2 and fig. 3, fig. 3 is a schematic structural diagram of another embodiment of a line interval zero sequence impedance calculation circuit provided by the present invention. The circuit interval zero sequence impedance calculation circuit comprises n outgoing lines, four line intervals exist on the outgoing line 1, and the four line intervals are respectively as follows: the first line section 211, the second line section 212, the third line section 213, and the fourth line section 214. Wherein the first line section 211 of the outgoing line 1 includes a first line measurement point 311 and a first three-phase circuit impedance 411, the second line section 212 of the outgoing line 1 includes a second line measurement point 312 and a second three-phase circuit impedance 412, the third line section 213 of the outgoing line 1 includes a first line measurement point 313 and a first three-phase circuit impedance 413, and the fourth line section 214 of the outgoing line 1 includes a fourth line measurement point 314 and a fourth three-phase circuit impedance 414;
four line intervals exist on the outgoing line 2, and the line intervals are respectively: a first line section 221, a second line section 222, a third line section 223, and a fourth line section 224. Wherein the first line section 221 of the outgoing line 2 includes a first line measurement point 321 and a first three-phase circuit impedance 421, the second line section 222 of the outgoing line 2 includes a second line measurement point 322 and a second three-phase circuit impedance 422, the third line section 223 of the outgoing line 2 includes a third line measurement point 323 and a third three-phase circuit impedance 423, and the fourth line section 224 of the outgoing line 2 includes a fourth line measurement point 324 and a fourth three-phase circuit impedance 424;
Four line intervals exist on the outgoing line n, and the line intervals are respectively as follows: a first line section 2n1, a second line section 2n2, a third line section 2n3, and a fourth line section 2n4. The first line section 2n1 of the outgoing line n includes a first line measurement point 3n1 and a first three-phase circuit impedance 4n1, the second line section 2n2 of the outgoing line n includes a second line measurement point 3n2 and a second three-phase circuit impedance 4n2, the third line section 2n3 of the outgoing line n includes a third line measurement point 3n3 and a third three-phase circuit impedance 4n3, and the fourth line section 2n4 of the outgoing line n includes a fourth line measurement point 3n4 and a fourth three-phase circuit impedance 4n4.
The method comprises the steps that line measurement points of each line interval receive current flowing into the current line interval under the condition of a preset value, and zero sequence voltage and zero sequence current of the current line interval are obtained through the current; further, the zero-sequence impedance of the current three-phase circuit impedance is determined through the zero-sequence voltage and the zero-sequence current of the current line interval.
It should be noted that the line measurement points may be distribution automation switches, fault indicators, or distributed measurement points of each outgoing line, where the line positions of the zero sequence voltage and the zero sequence current of the system may be measured, and the present invention is not limited in particular.
As shown in fig. 4, fig. 4 is a schematic flow chart of an embodiment of a line interval zero sequence impedance calculation method provided by the present invention. A method for calculating zero sequence impedance of a line interval comprises the following steps:
s101: providing current, setting any single-phase earth on the bus side connected with the three-phase power supply, and increasing the voltage amplitude of the neutral point to a preset value.
In one specific implementation scenario, the current is provided by a three-phase power supply, and the current is grounded at the bus side a of the three-phase power supply connection, so that the voltage amplitude of the neutral point is raised to a preset value. And under the condition of a preset value, calculating a plurality of line interval 2 zero sequence parameters.
S102: under the condition of a preset value, receiving current, and obtaining zero sequence impedance of a plurality of line intervals through the current.
In a specific implementation scenario, under the condition of a preset value, acquiring zero sequence voltages and zero sequence currents of the bus outgoing positions of all outgoing lines and a plurality of line intervals respectively through currents; respectively determining zero sequence impedance of three-phase circuit impedance between the bus outgoing position of each outgoing line and a first line measuring point under the condition of a preset value according to zero sequence voltage and zero sequence current of each outgoing line bus outgoing position and a plurality of line intervals; respectively determining zero sequence impedance of three-phase circuit impedance between adjacent line measuring points of each outgoing line under the condition of a preset value according to zero sequence voltage and zero sequence current of each outgoing line bus and a plurality of line intervals; respectively determining zero sequence impedance of three-phase circuit impedance in a line interval at the tail end of each outgoing line under the condition of a preset value according to zero sequence voltage and zero sequence current of each outgoing line bus and a plurality of line intervals; and stopping the bus-side grounding phase single-phase grounding of the three-phase power supply, and recovering the neutral point voltage amplitude to the normal level.
As shown in fig. 5, fig. 5 is a schematic flow chart of another embodiment of the line interval zero sequence impedance calculation method provided by the present invention. A method for calculating zero sequence impedance of a line interval comprises the following steps:
s201: providing current, setting any single-phase earth on the bus side connected with the three-phase power supply, and increasing the voltage amplitude of the neutral point to a preset value.
S202: under the condition of a preset value, the zero sequence voltage and the zero sequence current of the bus outgoing position of each outgoing line and a plurality of line intervals are respectively obtained through the current.
It should be noted that, the steps S201 to S202 are already discussed in detail in the implementation scenario shown in fig. 4, and are not described herein again.
S203: and respectively determining the zero sequence impedance of the three-phase circuit impedance between the bus outgoing position of each outgoing line and the first line measuring point under the condition of a preset value according to the zero sequence voltage and the zero sequence current of each outgoing line bus outgoing position and a plurality of line intervals.
In a specific implementation scenario, referring to fig. 3 in combination, the average value of the zero sequence voltage amplitude of the outgoing line position and the first line measurement point of each outgoing line bus is determined according to the zero sequence voltage and zero sequence current of the outgoing line position of each outgoing line bus and a plurality of line intervals; respectively determining absolute values of zero sequence current amplitude differences of bus outgoing positions of all outgoing lines and first line measuring points according to zero sequence voltages and zero sequence currents of all outgoing lines and a plurality of line intervals; and respectively determining zero sequence impedance of three-phase circuit impedance of the outgoing line bus outgoing line position and the first line measuring point under the condition of a preset value according to the zero sequence voltage amplitude average value of the outgoing line bus position and the first line measuring point of each outgoing line and the absolute value of the zero sequence current amplitude difference value of the outgoing line bus position and the first line measuring point of each outgoing line.
Preferably, the zero sequence impedance of the three-phase circuit impedance at the bus line outlet and at the first line measurement point in each outlet line is determined according to the formula:
Wherein U 0n is zero sequence voltage at the outlet of each outlet line bus, For the zero sequence voltage of the first line measuring point of each outgoing line,/>For the zero sequence current of the first line measuring point of each outgoing line, I 0n is the zero sequence voltage of the outgoing line of each outgoing line bus, and n is the outgoing line number.
S204: and respectively determining the zero sequence impedance of the three-phase circuit impedance between adjacent line measuring points of each outgoing line under the condition of a preset value according to the zero sequence voltage and the zero sequence current of each outgoing line bus and a plurality of line intervals.
In a specific implementation scenario, referring to fig. 3 in combination, a zero sequence voltage amplitude average value between adjacent line measurement points of each outgoing line is determined according to zero sequence voltages and zero sequence currents of each outgoing line busbar outgoing line and a plurality of line intervals 2; respectively determining absolute values of zero sequence current amplitude differences between adjacent line measuring points in each outgoing line according to the outgoing line position of each outgoing line bus and the zero sequence voltages and zero sequence currents of a plurality of line intervals 2; and respectively determining the zero sequence impedance of the three-phase circuit impedance of the adjacent line measuring points of each outgoing line under the preset value condition according to the zero sequence voltage amplitude average value between the adjacent line measuring points and the absolute value of the zero sequence current amplitude difference value between the adjacent line measuring points.
Preferably, under the condition of a preset value, the zero sequence impedance of the three-phase circuit impedance of the adjacent line interval of each outgoing line is determined according to the following formula:
Wherein i is the number of line measurement points, i is more than or equal to 2, For the zero sequence voltage of the line measuring point in the line interval of the precursor line of each outgoing line,/>For the zero sequence voltage of the line measuring point in the subsequent line interval of each outgoing line,/>For the zero sequence current of the line measuring point in the line interval of the precursor line of each outgoing line,/>And (3) the zero sequence current of the line measuring point in the subsequent line interval of each outgoing line is obtained, and n is the number of the outgoing line.
S205: and respectively determining the zero sequence impedance of the three-phase circuit impedance in the line interval at the tail end of each outgoing line under the condition of a preset value according to the zero sequence voltage and the zero sequence current of each outgoing line bus and a plurality of line intervals.
In a specific implementation scenario, referring to fig. 3 in combination, the zero sequence voltage of the line section at the tail end of each outgoing line is determined according to the zero sequence voltage and the zero sequence current of each outgoing line bus outgoing line and a plurality of line sections 2; respectively determining the zero sequence current of the line section at the tail end of each outgoing line according to the outgoing line position of each outgoing line bus and the zero sequence voltages and the zero sequence currents of a plurality of line sections 2; and respectively determining the zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line terminal under the condition of a preset value according to the zero sequence voltage of the line interval of each outgoing line terminal and the zero sequence current of the line interval of each outgoing line terminal.
Preferably, under the condition of a preset value, the zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line end is determined according to the following formula:
Wherein, For the zero sequence voltage of the line measuring point in the line interval of each outgoing line end,/>And n is the number of the outgoing line, and is the zero sequence current of the line measuring point in the line interval at the tail end of each outgoing line.
S206: and stopping the bus-side grounding phase single-phase grounding of the three-phase power supply, and recovering the neutral point voltage amplitude to the normal level.
Fig. 6 is a schematic structural diagram of an embodiment of a terminal according to the present invention, as shown in fig. 6. The terminal 20 comprises a memory 21 and a processor 22. The memory 21 stores a computer program which is executed by the processor 22 in operation to implement the method as shown in fig. 3 and 4.
The specific technical details of a method for calculating the zero sequence impedance between lines implemented when the terminal 20 executes the computer program are discussed in detail in the foregoing method steps, and thus are not described in detail.
Fig. 7 is a schematic structural diagram of an embodiment of a storage medium according to the present invention, as shown in fig. 7. The storage medium 30 stores at least one computer program 31, and the computer program 31 is executed by the processor 22 to implement the method shown in fig. 3 and 4, and the detailed method is referred to above and will not be described herein. In one embodiment, the storage medium 30 may be a memory chip, a hard disk, a removable hard disk, a flash disk, an optical disk, a server, or the like.
The foregoing describes certain embodiments of the present disclosure, other embodiments being within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. Furthermore, the processes depicted in the accompanying drawings do not necessarily have to be in the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for apparatus, devices, non-transitory computer readable storage medium embodiments, the description is relatively simple, as it is substantially similar to method embodiments, with reference to portions of the description of method embodiments being relevant.
The apparatus, the device, the nonvolatile computer readable storage medium and the method provided in the embodiments of the present disclosure correspond to each other, and therefore, the apparatus, the device, and the nonvolatile computer storage medium also have similar advantageous technical effects as those of the corresponding method, and since the advantageous technical effects of the method have been described in detail above, the advantageous technical effects of the corresponding apparatus, device, and nonvolatile computer storage medium are not described herein again.
The system, apparatus, module or unit set forth in the above embodiments may be implemented in particular by a computer chip or entity, or by a product having a certain function. One typical implementation is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being functionally divided into various units, respectively. Of course, the functions of each element may be implemented in one or more software and/or hardware elements when implemented in the present specification. It will be appreciated by those skilled in the art that the present description may be provided as a method, system, or computer program product. Accordingly, the present specification embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present description embodiments may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
The present description is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the specification. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
The description may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.
The foregoing disclosure is illustrative of the present invention and is not to be construed as limiting the scope of the invention, which is defined by the appended claims.
Claims (12)
1. A circuit interval zero sequence impedance calculation circuit is characterized by comprising a three-phase power supply and a plurality of circuit intervals,
The three-phase power supply is used for providing current, and is provided with any one phase of single-phase grounding at the bus side connected with the three-phase power supply, and is used for increasing the voltage amplitude of the neutral point to a preset value;
and the circuit intervals are used for receiving the current under the preset value condition and acquiring zero sequence impedance of the circuit intervals through the current.
2. The circuit for calculating zero sequence impedance of line intervals according to claim 1, wherein the line intervals comprise line measuring points and three-phase circuit impedances,
The line measuring point is used for receiving the current flowing into the current line interval under the preset value condition, and acquiring the zero sequence voltage and the zero sequence current of the current line interval through the current;
and the three-phase circuit impedance is used for determining the zero sequence impedance of the current three-phase circuit impedance through the zero sequence voltage and the zero sequence current of the current line interval.
3. A method for calculating zero sequence impedance of a line interval, the method comprising:
Providing current, setting any one phase of single-phase grounding at the bus side connected with the three-phase power supply, and increasing the voltage amplitude of a neutral point to a preset value;
and under the preset value condition, receiving the current, and acquiring the zero sequence impedance of the plurality of line intervals through the current.
4. A method for calculating zero sequence impedance of line intervals according to claim 3, wherein said receiving said current under said preset value condition, obtaining zero sequence impedance of said plurality of line intervals by said current, specifically comprises:
under the preset value condition, acquiring zero sequence voltage and zero sequence current at the bus outgoing positions of all outgoing lines and among the plurality of line intervals through the current respectively;
respectively determining zero sequence impedance of the three-phase circuit impedance between the bus outgoing position of each outgoing line and the first line measurement point under the preset value according to the zero sequence voltage and zero sequence current of the bus outgoing position of each outgoing line and the plurality of line intervals;
Respectively determining zero sequence impedance of the three-phase circuit impedance between adjacent line measuring points of each outgoing line under the preset value according to the outgoing line of each outgoing line bus and the zero sequence voltages and zero sequence currents of the plurality of line intervals;
Respectively determining zero sequence impedance of the three-phase circuit impedance in the line interval at the tail end of each outgoing line under the preset value according to the bus outgoing position of each outgoing line and the zero sequence voltages and zero sequence currents of the line intervals;
and stopping the bus-side grounding phase single-phase grounding of the three-phase power supply, and recovering the neutral point voltage amplitude to a normal level.
5. The method according to claim 4, wherein the determining the zero-sequence impedance of the three-phase circuit impedance between the outgoing line bus and the first line measurement point under the preset value according to the zero-sequence voltage and the zero-sequence current of the outgoing line bus and the line intervals respectively comprises:
respectively determining zero sequence voltage amplitude average values of the bus outgoing positions of the outgoing lines and the first line measuring point according to the zero sequence voltages and zero sequence currents of the bus outgoing positions of the outgoing lines and the line intervals;
Respectively determining absolute values of zero sequence current amplitude differences of the bus outgoing positions of the outgoing lines and the first line measuring point according to the zero sequence voltages and zero sequence currents of the bus outgoing positions of the outgoing lines and the line intervals;
And respectively determining zero sequence impedance of three-phase circuit impedance of the outgoing line bus outgoing position and the first line measuring point under the preset value condition according to the zero sequence voltage amplitude average value of the outgoing line bus outgoing position and the first line measuring point and the absolute value of the zero sequence current amplitude difference value of the outgoing line bus outgoing position and the first line measuring point.
6. The method according to claim 5, wherein the determining the zero sequence impedance of the three-phase circuit impedance of the outgoing line bus-out position and the first line measurement point under the preset value condition according to the average value of the zero sequence voltage amplitudes of the outgoing line bus-out position and the first line measurement point and the absolute value of the zero sequence current amplitude difference of the outgoing line bus-out position and the first line measurement point respectively specifically includes:
According to Determining zero sequence impedance of three-phase circuit impedance of bus outgoing line positions in each outgoing line and the first line measuring point, wherein U 0n is zero sequence voltage of the bus outgoing line positions of each outgoing line,/>For the zero sequence voltage of the first line measuring point of each outgoing line,/>For the zero sequence current of the first line measuring point of each outgoing line, I 0n is the zero sequence voltage of the outgoing line of each outgoing line bus, and n is the outgoing line number.
7. The method according to claim 4, wherein the determining the zero-sequence impedance of the three-phase circuit impedance between the adjacent line measurement points of each outgoing line under the preset value according to the zero-sequence voltage and the zero-sequence current of the outgoing line bus and the line intervals respectively comprises:
Respectively determining a zero sequence voltage amplitude average value between adjacent line measurement points of each outgoing line according to the outgoing line of each outgoing line bus and the zero sequence voltages and zero sequence currents of the plurality of line intervals;
respectively determining absolute values of zero sequence current amplitude differences between adjacent line measuring points in each outgoing line according to the outgoing line of each outgoing line bus and the zero sequence voltages and zero sequence currents in the plurality of line intervals;
And respectively determining the zero sequence impedance of the three-phase circuit impedance of each outgoing line adjacent to the line measuring point under the preset value condition according to the zero sequence voltage amplitude average value between the adjacent line measuring points and the absolute value of the zero sequence current amplitude difference value between the adjacent line measuring points.
8. The method according to claim 7, wherein the determining the zero sequence impedance of the three-phase circuit impedance of each outgoing line adjacent to the line measurement point under the preset value condition according to the average value of the zero sequence voltage amplitude between the adjacent line measurement points and the absolute value of the zero sequence current amplitude difference between the adjacent line measurement points comprises:
According to Determining zero sequence impedance of three-phase circuit impedance of each outgoing line adjacent to the line measuring point, wherein i is the number of line measuring points, i is more than or equal to 2,/>For the zero sequence voltage of the line measuring point in the line interval of the precursor line of each outgoing line,/>For the zero sequence voltage of the line measuring point in the subsequent line interval of each outgoing line,/>For the zero sequence current of the line measuring point in the line interval of the precursor line of each outgoing line,/>And (3) the zero sequence current of the line measuring point in the subsequent line interval of each outgoing line is obtained, and n is the number of the outgoing line.
9. The method according to claim 4, wherein the determining the zero-sequence impedance of the three-phase circuit impedance in the line section at the end of each outgoing line according to the zero-sequence voltage and zero-sequence current of the outgoing line bus and the line sections respectively includes:
Respectively determining the zero sequence voltage of the line section at the tail end of each outgoing line according to the bus outgoing line of each outgoing line and the zero sequence voltages and the zero sequence currents of the line sections;
Respectively determining the zero sequence current of the line section at the tail end of each outgoing line according to the bus outgoing line of each outgoing line and the zero sequence voltages and the zero sequence currents of the line sections;
And respectively determining the zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line terminal under the preset value condition according to the zero sequence voltage of the line interval of each outgoing line terminal and the zero sequence current of the line interval of each outgoing line terminal.
10. The method according to claim 9, wherein the determining the zero-sequence impedance of the three-phase circuit impedance in the line section of each outgoing line terminal under the preset value according to the zero-sequence voltage of the line section of each outgoing line terminal and the zero-sequence current of the line section of each outgoing line terminal includes:
According to Respectively determining zero sequence impedance of the three-phase circuit impedance in the line interval of each outgoing line end under the preset value condition, wherein/>For the zero sequence voltage of the line measuring point in the line interval of each outgoing line end,/>And n is the number of the outgoing line, and is the zero sequence current of the line measuring point in the line interval at the tail end of each outgoing line.
11. A storage medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of the method according to any one of claims 3 to 10.
12. A terminal comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of the method of any of claims 3 to 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410177542.XA CN118011098A (en) | 2024-02-08 | 2024-02-08 | Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410177542.XA CN118011098A (en) | 2024-02-08 | 2024-02-08 | Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN118011098A true CN118011098A (en) | 2024-05-10 |
Family
ID=90947451
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410177542.XA Pending CN118011098A (en) | 2024-02-08 | 2024-02-08 | Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN118011098A (en) |
-
2024
- 2024-02-08 CN CN202410177542.XA patent/CN118011098A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Ouali et al. | An improved backward/forward sweep power flow method based on a new network information organization for radial distribution systems | |
| CN110736899B (en) | Small current grounding fault positioning method and system, monitoring device, equipment and medium | |
| Fonseca et al. | Extended fast decoupled power flow for reconfiguration networks in distribution systems | |
| CN111523245A (en) | Method, device and equipment for establishing high-voltage distribution network short-circuit current calculation model | |
| Hsieh et al. | Matrix decompositions-based approach to Z-bus matrix building process for radial distribution systems | |
| Leite et al. | Development of a smart grid simulation environment, Part I: Project of the electrical devices simulator | |
| Zebardast et al. | Technique for online tracking of a utility harmonic impedance using by synchronising the measured samples | |
| De Oliveira-De Jesus et al. | A detailed network model for distribution systems with high penetration of renewable generation sources | |
| Babu et al. | Weak bus-oriented installation of phasor measurement unit for power network observability | |
| CN114142512A (en) | Flexible direct current system control method and device based on multi-direct current feed-in receiving-end power grid | |
| Truong et al. | A novel fault location technique for transmission lines of a power system based on a language of an optimization problem | |
| CN118011098A (en) | Circuit interval zero sequence impedance calculation circuit, method, storage medium and terminal | |
| CN115051912A (en) | Method, device, equipment and medium for positioning power failure user | |
| CN118011099A (en) | Interval zero sequence impedance parameter calculation circuit, method, storage medium and terminal | |
| CN109557398B (en) | Power distribution network fault diagnosis method and device | |
| CN118011097A (en) | Circuit interval zero sequence parameter calculation circuit, method, storage medium and terminal | |
| CN114137360B (en) | Power distribution network fault positioning method, device and storage medium | |
| Sardari et al. | Fast & adaptive fault location technique for three-terminal lines | |
| Sarada Devi et al. | Comparison of State Estimation Process on Transmission and Distribution Systems | |
| CN112380711A (en) | Three-phase unbalance calculation method and device based on consideration of zero line loss | |
| CN112749465A (en) | Method, processor, storage medium, and detection system for detecting electricity theft | |
| CN112183955A (en) | Power grid element real-time risk early warning method based on network topology tracking technology | |
| Džafić | Graph theory as an engine for real-time advanced distribution management system enhancements | |
| CN112015953A (en) | Power grid element real-time risk early warning method based on network topology tracking technology | |
| CN111859585A (en) | Transmission and distribution cooperative equipment bearing capacity calculation method and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination |