CN117995673A - Wafer etching method - Google Patents
Wafer etching method Download PDFInfo
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- CN117995673A CN117995673A CN202410070867.8A CN202410070867A CN117995673A CN 117995673 A CN117995673 A CN 117995673A CN 202410070867 A CN202410070867 A CN 202410070867A CN 117995673 A CN117995673 A CN 117995673A
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- wafer
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- gas
- bombardment
- edge region
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- 238000005530 etching Methods 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 21
- 229920000642 polymer Polymers 0.000 claims abstract description 40
- 238000004140 cleaning Methods 0.000 claims abstract description 36
- 230000001681 protective effect Effects 0.000 claims abstract description 28
- 239000007789 gas Substances 0.000 claims description 98
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 238000009826 distribution Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
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Abstract
The application relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a wafer etching method. The method comprises the following steps: and (3) introducing protective gas into the working cavity, so that the ratio of source power to bias power is 4:1 to 3:1, so that the plasma is distributed towards the edge area of the wafer to bombard, and the protective gas is distributed towards the edge area of the wafer to generate polymer under the bombardment of the plasma distributed towards the edge area of the wafer, wherein the polymer slows down the etching rate of the edge area of the wafer by the bombardment of the plasma; stopping introducing protective gas into the working cavity, and introducing cleaning gas into the working cavity to change the ratio of the source power to the bias power into 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute bombardment, the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
Description
Technical Field
The application relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a wafer etching method.
Background
Etching processes are critical to semiconductor integrated circuit fabrication. For example, single damascene processes require higher step variation on the wafer surface and thus, require higher radial etch uniformity in the wafer middle and edge regions during wafer etching.
However, in the related art, the radial etching uniformity of the wafer middle area and the wafer edge area is poor, that is, the etching rate of the wafer edge area is faster than that of the wafer middle area, so that when the metal interconnection layer is manufactured on the etched wafer by the single damascene process, the problem that the chip in the wafer edge area is burnt and the wafer fails due to the fact that the distance between the metal interconnection layer and the grid electrode in the wafer edge area is too close is easily caused.
Disclosure of Invention
The application provides a wafer etching method which can solve the problem of poor radial etching uniformity of a wafer middle area and a wafer edge area in the related technology.
In order to solve the technical problems described in the background art, the present application provides a wafer etching method, which includes the following steps:
And (3) introducing protective gas into the working cavity, so that the ratio of source power to bias power is 4:1 to 3:1, so that the plasma is distributed towards the edge area of the wafer to bombard, and the protective gas is distributed towards the edge area of the wafer to generate polymer under the bombardment of the plasma distributed towards the edge area of the wafer, wherein the polymer slows down the etching rate of the edge area of the wafer by the bombardment of the plasma;
Stopping introducing protective gas into the working cavity, and introducing cleaning gas into the working cavity to change the ratio of the source power to the bias power into 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute bombardment, the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
Optionally, the protective gas is introduced into the working cavity, so that the ratio of the source power to the bias power is 4:1 to 3:1 such that the plasma is distributed toward the edge region of the wafer, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma distributed toward the edge region of the wafer to produce a polymer, the polymer slowing the rate of etching of the edge region of the wafer by the plasma bombardment, the shielding gas comprising a fluorocarbon gas.
Optionally, the protective gas is introduced into the working cavity, so that the ratio of the source power to the bias power is 4:1 to 3:1 such that the plasma is biased toward the edge region of the wafer to distribute bombardment, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma distributed toward the edge region of the wafer to produce a polymer that slows the rate at which the edge region of the wafer is etched by the plasma bombardment, comprising the steps of:
And (3) introducing protective gas with the flow of 5sccm to 10sccm into the working cavity, so that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is distributed towards the edge region of the wafer, said shielding gas being biased towards said edge region of the wafer under the bombardment of the plasma distributed towards the edge region of the wafer to produce a polymer which slows the rate at which said edge region of the wafer is etched by said plasma bombardment.
Optionally, the protection gas is stopped from being introduced into the working cavity, and the cleaning gas is introduced into the working cavity, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, said cleaning gas removing polymer generated by said shielding gas being biased toward the edge region of said wafer, said cleaning gas comprising: oxygen.
Optionally, the protection gas is stopped from being introduced into the working cavity, and the cleaning gas is introduced into the working cavity, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, said cleaning gas removing polymer generated by said shielding gas being biased toward the edge region of said wafer, said cleaning gas comprising: nitrogen gas.
Optionally, the protection gas is stopped from being introduced into the working cavity, and the cleaning gas is introduced into the working cavity, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the middle region of the wafer, said cleaning gas removing polymer generated by said shielding gas toward the edge region of said wafer, comprising:
Stopping introducing protective gas into the working cavity, and introducing cleaning gas with the flow of 5-10 sccm into the working cavity to enable the ratio of the source power to the bias power to be 4:3 to 3:2 such that the plasma is biased toward the middle region of the wafer to distribute bombardment, and the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
Optionally, the protective gas is introduced into the working cavity, so that the ratio of the source power to the bias power is 4:1 to 3:1, so that the plasma is biased towards the edge area of the wafer to distribute bombardment, the protective gas is biased towards the edge area of the wafer to generate polymer under the bombardment of the plasma distributed towards the edge area of the wafer, the polymer slows down the time period of the step of etching the edge area of the wafer by the plasma bombardment, and the protective gas is stopped from being introduced into the working cavity, and the cleaning gas is introduced into the working cavity, so that the ratio of the source power to the bias power is changed to 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, and the step of removing polymer generated by the shielding gas toward the edge region of the wafer is performed for a uniform duration.
The technical scheme of the application at least comprises the following advantages: the plasma is distributed and bombarded towards the edge area of the wafer by the aid of the low-ratio power and the bias power, meanwhile, protective gas is introduced to protect the edge area of the wafer, and then the plasma is distributed and bombarded towards the middle area of the wafer by the aid of the high-ratio power and the bias power, and meanwhile, cleaning gas is introduced to remove polymers formed in the previous step, so that etching uniformity of the edge area of the wafer and the middle area of the wafer can be improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 illustrates a wafer etching method according to an embodiment of the present application;
FIG. 2 shows a schematic diagram of the distribution of the plasma when step S1 is performed;
fig. 3 shows a schematic diagram of plasma distribution when step S2 is performed.
Detailed Description
The following description of the embodiments of the present application will be made more apparent and fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments of the application are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, or can be communicated inside the two components, or can be connected wirelessly or in a wired way. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present application described below may be combined with each other as long as they do not collide with each other.
Fig. 1 shows a wafer etching method according to an embodiment of the present application, and as can be seen from fig. 1, the wafer etching method includes the following steps:
step S1: introducing protective gas into the edge area of the wafer, so that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is biased toward the edge region of the wafer to distribute bombardment, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma to produce a polymer that slows the rate at which the edge region of the wafer is etched by the plasma bombardment.
Referring to fig. 2, which shows a schematic diagram of the distribution of the plasma when step S1 is performed, it can be seen from fig. 2 that the ratio of the source power to the bias power is 4:1 to 3: at any value between 1, the plasma distributes bombardment toward the wafer edge zone 110. At this time, a protective gas is introduced into the wafer edge area, and under the bombardment of the plasma distributed toward the wafer edge area 110, the protective gas is biased toward the wafer edge area 110 to generate polymer, so that the polymer is distributed in more wafer edge areas 110, and the polymer is distributed in more wafer edge areas 110 to slow down the etching rate of the wafer edge areas 110 due to the bombardment of the plasma.
As can be seen in fig. 2, the wafer 100 includes, from outside to inside, a wafer edge region 110, a wafer ring region 130, and a wafer middle region 120. Optionally, the wafer edge region 110 and the wafer middle region 130 are concentric circles, and the wafer middle region 120 is circular, and the wafer edge region 110, the wafer middle region 130, and the wafer middle region 120 are centered around the center of the wafer middle region 120. Illustratively, for a wafer 100 having a diameter of 300mm, the wafer edge region 110 is a ring within 3mm from the edge of the wafer edge 100.
Step S2: stopping introducing protective gas into the edge area of the wafer, and introducing cleaning gas into the working cavity, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute bombardment, the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
Referring to fig. 3, which shows a schematic diagram of plasma distribution when step S2 is performed, as can be seen from fig. 3, the supply of the shielding gas to the wafer edge area is stopped, so that the ratio of the source power to the bias power becomes 4:3 to 3: at any value between 2, the plasma is biased toward the wafer middle region 120 to distribute the bombardment. At this point, a cleaning gas is introduced into the working chamber, which removes polymer generated by the bias of the shielding gas toward the wafer edge area 110.
At a ratio of source power to bias power becomes 4:3 to 3:2, the plasma distribution is changed by utilizing the adjustment of the harmonic impedance of the low-frequency power to the high-frequency power, the downward initial speed of the plasma is higher under the effect of the configuration of higher bias power, and the plasma is more distributed towards the middle area of the wafer.
Optionally, the shielding gas comprises a fluorocarbon gas. Illustratively, a flow of 5sccm to 10sccm of a shielding gas may be introduced into the wafer edge region such that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is distributed towards the edge region of the wafer, said shielding gas being biased towards said edge region of the wafer under the bombardment of the plasma distributed towards the edge region of the wafer to produce a polymer which slows the rate at which said edge region of the wafer is etched by said plasma bombardment.
Optionally, the cleaning gas includes oxygen and nitrogen. Illustratively, the supply of the shielding gas to the wafer edge region is stopped, and a cleaning gas is supplied to the working chamber at a flow rate of 5sccm to 10sccm, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the middle region of the wafer to distribute bombardment, and the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
Optionally, the duration of performing the step S1 is identical to the duration of performing the step S2. In other embodiments, the duration of performing the step S1 and the duration of performing the step S2 may not be identical.
According to the application, the plasma is distributed and bombarded towards the edge area of the wafer by the matching of the power with the bias power with the lower ratio, and the protective gas is introduced to protect the edge area of the wafer, and then the plasma is distributed and bombarded towards the middle area of the wafer by the matching of the power with the bias power with the higher ratio, and the cleaning gas is introduced to remove the polymer formed in the last step, so that the etching uniformity of the edge area of the wafer and the middle area of the wafer can be improved.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the application.
Claims (7)
1. A wafer etching method, characterized in that the wafer etching method comprises the steps of:
Introducing protective gas into the edge area of the wafer, so that the ratio of source power to bias power is 4:1 to 3:1, so that the plasma is biased towards the edge region of the wafer to distribute bombardment, the shielding gas is biased towards the edge region of the wafer under the bombardment of the plasma to generate polymer, and the polymer slows down the etching rate of the edge region of the wafer under the bombardment of the plasma;
Stopping introducing protective gas into the edge area of the wafer, and introducing cleaning gas into the working cavity, so that the ratio of the source power to the bias power is changed to 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute bombardment, the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
2. The wafer etching method of claim 1, wherein the shielding gas is introduced into the edge region of the wafer such that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is biased toward the edge region of the wafer to distribute bombardment, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma to produce a polymer that slows the rate at which the edge region of the wafer is etched by the plasma bombardment, the shielding gas comprising a fluorocarbon gas.
3. The wafer etching method of claim 1, wherein the shielding gas is introduced into the edge region of the wafer such that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is biased toward the edge region of the wafer to distribute bombardment, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma to produce a polymer that slows the rate at which the edge region of the wafer is etched by the plasma bombardment, comprising the steps of:
And (3) introducing a protective gas with a flow of 5-10 sccm to the edge area of the wafer, so that the ratio of source power to bias power is 4:1 to 3:1 such that the plasma is biased toward the edge region of the wafer to distribute bombardment, the shielding gas being biased toward the edge region of the wafer under the bombardment of the plasma to produce a polymer that slows the rate at which the edge region of the wafer is etched by the plasma bombardment.
4. The wafer etching method of claim 1, wherein the stopping of the supply of the protective gas to the wafer edge region and the supply of the cleaning gas to the working chamber causes the ratio of the source power to the bias power to become 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, said cleaning gas removing polymer generated by said shielding gas being biased toward the edge region of said wafer, said cleaning gas comprising: oxygen.
5. The wafer etching method of claim 1, wherein the stopping of the supply of the protective gas to the wafer edge region and the supply of the cleaning gas to the working chamber are performed such that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, said cleaning gas removing polymer generated by said shielding gas being biased toward the edge region of said wafer, said cleaning gas comprising: nitrogen gas.
6. The wafer etching method of claim 1, wherein the stopping of the supply of the protective gas to the wafer edge region and the supply of the cleaning gas to the working chamber are performed such that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer, said cleaning gas removing polymer generated by said shielding gas being biased toward the edge region of the wafer, comprising:
Stopping introducing protective gas into the edge area of the wafer, and introducing cleaning gas with the flow of 5-10 sccm into the working cavity, so that the ratio of the source power to the bias power becomes 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute bombardment, the cleaning gas removes polymer generated by the shielding gas being biased toward the edge region of the wafer.
7. The wafer etching method of claim 1, wherein the shielding gas is introduced into the edge region of the wafer such that the ratio of source power to bias power is 4:1 to 3:1, so that the plasma is biased to the edge area of the wafer to distribute bombardment, the protective gas is biased to the edge area of the wafer to generate polymer under the bombardment of the plasma, the polymer slows down the time period of the step of etching the edge area of the wafer by the plasma bombardment, and the protective gas is stopped from being introduced into the edge area of the wafer, and the cleaning gas is introduced into the working cavity, so that the ratio of the source power to the bias power is changed to 4:3 to 3:2 such that the plasma is biased toward the central region of the wafer to distribute the bombardment, the step of removing polymer generated by the shielding gas toward the edge region of the wafer is performed for a consistent duration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410070867.8A CN117995673A (en) | 2024-01-17 | 2024-01-17 | Wafer etching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410070867.8A CN117995673A (en) | 2024-01-17 | 2024-01-17 | Wafer etching method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117995673A true CN117995673A (en) | 2024-05-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410070867.8A Pending CN117995673A (en) | 2024-01-17 | 2024-01-17 | Wafer etching method |
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|---|---|
| CN (1) | CN117995673A (en) |
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- 2024-01-17 CN CN202410070867.8A patent/CN117995673A/en active Pending
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