CN117992392A - Data transmission system, method, device, electronic equipment and storage medium - Google Patents
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Abstract
The invention provides a data transmission system, a data transmission method, a data transmission device, electronic equipment and a storage medium, which are applied to the technical field of electronics. The system comprises: a master device and a slave device; the master device is connected with a second pin of the slave device through a first pin; the master device is configured to switch, when a single byte is transmitted, a level state of the first pin from a high level state to a low level state, and switch, when transmission of the single byte is completed, the level state of the first pin from the low level state to the high level state; the slave device is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when the level state of the second pin is detected to be a low level state; and the slave device is further configured to receive data sent by the master device according to the current number of received bytes of the external interrupt processing function when the duration that the level state of the second pin is in the high level state is greater than a first threshold.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a data transmission system, a method, an apparatus, an electronic device, and a storage medium.
Background
With the continuous development and progress of modern electronic technology, integrated circuit bus (Inter-INTEGRATED CIRCUIT, IIC) communication protocols are becoming more and more widely used in the fields of embedded systems, sensors, memories, digital signal processors, and the like.
In the IIC communication protocol, devices are divided into a Master device (Master) and a Slave device (Slave). The master device is responsible for controlling the entire communication process, while the slave device is responsible for receiving control of the master device and providing data as needed. In practical communication applications, since transmission data protocol types are various, there are not only fixed-length data frames but also indefinite-length data frames for receiving data from a device.
In the prior art, the microcontroller can firstly analyze the length field according to different transmission data protocol frame types, and then control the slave device to receive data according to the length field. However, this method needs to adopt different parsing methods for different transmission data protocols, so that not only is the parsing process complicated, but also the flexibility is poor.
Disclosure of Invention
The invention provides a data transmission system, a method, a device, electronic equipment and a storage medium, which are used for solving the problems of complex analysis process and poor flexibility in the prior art.
The present invention provides a data transmission system comprising: a master device and a slave device; the master device is connected with a second pin of the slave device through a first pin; the master device is configured to switch, when a single byte is transmitted, a level state of the first pin from a high level state to a low level state, and switch, when transmission of the single byte is completed, the level state of the first pin from the low level state to the high level state; the slave device is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when the level state of the second pin is detected to be a low level state; and the slave device is further configured to receive data sent by the master device according to the current number of received bytes of the external interrupt processing function when the duration that the level state of the second pin is in the high level state is greater than a first threshold.
According to the data transmission system provided by the invention, the main device is further used for initializing the first pin and the second pin so that the initial level states of the first pin and the second pin are both high level states.
According to the data transmission system provided by the invention, the main device is further configured to output indication information of abnormal communication when the duration of the high-level state of the first pin is greater than the second threshold.
According to the data transmission system provided by the invention, a clock line and a data line are further arranged between the master device and the slave device; the clock line is used for generating a clock signal under the control of the master device; the data line is used for realizing bidirectional data transmission between the master device and the slave device.
The invention provides a data transmission method, which is applied to a main device in a data transmission system and comprises the following steps: when a single byte is transmitted, the level state of the first pin is switched from a high level state to a low level state; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state.
The invention provides a data transmission method, which is applied to slave equipment in a data transmission system and comprises the following steps: controlling the number of received bytes of the external interrupt handling function to be increased by 1 when the level state of the second pin is detected to be a low level state; and under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value, receiving data sent by the main device according to the current received byte number of the external interrupt processing function.
The invention also provides a data transmission device, comprising: a first processing module; the first processing module is used for switching the level state of the first pin from a high level state to a low level state when a single byte is transmitted; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state.
The invention also provides a data transmission device, comprising: the second processing module and the data receiving module; the second processing module is used for controlling the number of the received bytes of the external interrupt processing function to be increased by 1 under the condition that the level state of the second pin is detected to be a low level state; and the data receiving module is used for receiving the data sent by the main equipment according to the current received byte number of the external interrupt processing function under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the data transmission method as described in any of the above when executing the program.
The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of a data transmission method as described in any of the above.
The invention provides a data transmission system, a method, a device, electronic equipment and a storage medium, wherein the system comprises a master device and a slave device; the master device is connected with a second pin of the slave device through a first pin; the master device is configured to switch, when a single byte is transmitted, a level state of the first pin from a high level state to a low level state, and switch, when transmission of the single byte is completed, the level state of the first pin from the low level state to the high level state; the slave device is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when the level state of the second pin is detected to be a low level state; and the slave device is further configured to receive data sent by the master device according to the current number of received bytes of the external interrupt processing function when the duration that the level state of the second pin is in the high level state is greater than a first threshold. According to the scheme, the master device can change the level state of the first pin after transmitting single bytes and completing transmission, and the slave device can sense byte transmission signals of the master device according to the level change of the second pin because the master device is connected with the second pin of the slave device through the first pin, so that the number of received bytes of the external interrupt processing function is controlled to be increased by 1.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a data transmission system provided by the present invention;
fig. 2 is a schematic diagram of a processing flow of the data transmission system provided by the present invention;
FIG. 3 is a second flowchart of a data transmission method according to the present invention;
fig. 4 is a schematic flow chart of a data transmission method according to the present invention;
FIG. 5 is a second flow chart of the data transmission method according to the present invention;
Fig. 6 is a schematic structural diagram of a data transmission device according to the present invention;
FIG. 7 is a second schematic diagram of a data transmission device according to the present invention;
Fig. 8 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, in the embodiments of the present invention, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. Furthermore, it should be noted that the scope of the methods and apparatus in the embodiments of the present invention is not limited to performing the functions in the order shown or discussed, but may also include performing the functions in a substantially simultaneous manner or in an opposite order depending on the functions involved, e.g., the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
In order to clearly describe the technical solution of the embodiment of the present invention, in the embodiment of the present invention, the words "first", "second", etc. are used to distinguish identical items or similar items having substantially the same function and effect, and those skilled in the art will understand that the words "first", "second", etc. are not limited in number and execution order.
Embodiments of the invention some exemplary embodiments have been described for illustrative purposes, it being understood that the invention may be practiced otherwise than as specifically shown in the accompanying drawings.
The foregoing implementations are described in detail below with reference to specific embodiments and accompanying drawings.
As shown in fig. 1, an embodiment of the present invention provides a data transmission system including a master device 101 and a slave device 102.
Alternatively, the master device 101 may connect to the second pin of the slave device 102 via the first pin. Also included between the master device 101 and the slave device 102 are a clock line (SCL) and a data line (SDA); the clock line is used for generating a clock signal under the control of the master device; the data line is used for realizing bidirectional data transmission between the master device and the slave device.
Specifically, the master device 101 and the slave device 102 may be connected to each other through an IIC bus and a general purpose input/output port (general porpose intput output, GPIO) external interrupt INT pin. The IIC bus includes a clock line and a data line, and the INT pin includes a first pin INT1 of the master device 101 and a second pin INT2 of the slave device 102, i.e., the master device 101 may be connected to the second pin INT2 of the slave device 102 through the first pin INT 1.
The master device 101 is configured to switch the level state of the first pin INT1 from a high level state to a low level state when a single byte is transmitted, and switch the level state of the first pin INT1 from the low level state to the high level state when the single byte is transmitted.
The slave device 102 is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when detecting that the level state of the second pin INT2 is a low level state.
The slave device 102 is further configured to receive, when the duration of the high state of the level state of the second pin INT2 is greater than the first threshold, data sent by the master device 101 according to the current number of received bytes of the external interrupt handling function.
Specifically, as shown in fig. 2, when the master device 101 transmits data to the slave device 102, the level states of the first pin INT1 and the second pin INT2 are both high level states. The master device 101 may switch the level state of the first pin INT1 from the high level state to the low level state each time a single byte is transmitted, i.e., the falling edges of the first pin INT1 and the second pin INT2 trigger. After the transmission of one byte is completed, the level state of the first pin INT1 is switched from the low level state to the high level state. The level states of the first pin INT1 and the second pin INT2 are circularly adjusted in this way until all bytes in the data to be transmitted are sent. The slave device 102 may detect the level state of the second pin INT2, and in the case where it is detected that the level state of the second pin INT2 is the low level state, the slave device 102 may control the number of received bytes of the external interrupt processing function to be increased by 1; in the case where it is detected that the level state of the second pin INT2 is in the high level state and the duration of the high level state is greater than the first threshold, this indicates that the master device 101 has already transmitted all bytes in the data to be transmitted, and therefore the slave device 102 can receive the data transmitted by the master device 101 according to the current number of received bytes of the external interrupt processing function.
Illustratively, the data to be transmitted includes bytes 1 and 2. When the master device 101 transmits byte 1, the level state of the first pin INT1 may be switched from the high level state to the low level state, and the slave device 102 may detect that the level state of the second pin INT2 is the low level state at this time, and thus the slave device 102 may add 1 to the number of received bytes of the external interrupt processing function, that is, update from 0 to 1. After completing the transmission of byte 1, the master device 101 may switch the level state of the first pin INT1 from the low level state to the high level state. When the master device 101 transmits byte 2, the level state of the first pin INT1 may be switched from the high level state to the low level state again, and similarly, the slave device 102 may add 1 to the number of received bytes of the external interrupt processing function, that is, update from 1 to 2. Thereafter, since the master device 101 no longer transmits bytes, the level state of the first pin INT1 will continue to remain in the high level state, and the slave device 102 may determine that the number of received bytes is 2 and receive bytes 1 and 2 transmitted by the master device 101 in the case where it is detected that the duration of the high level state of the second pin INT2 is greater than the first threshold.
In the embodiment of the invention, the master device can change the level state of the first pin after transmitting a single byte and completing transmission, and the slave device can sense the byte transmission signal of the master device according to the level change of the second pin because the master device is connected with the second pin of the slave device through the first pin, thereby controlling the number of the received bytes of the external interrupt processing function to be increased by 1.
Optionally, the above master device 101 is further configured to perform an initialization process on the first pin INT1 and the second pin INT2, so that initial level states of the first pin INT1 and the second pin INT2 are both high level states.
Specifically, as shown in fig. 3, when the master device 101 transmits data to the slave device 102, the master device 101 may first initialize the IIC pin and the GPIO pin. After initialization, the level states of the first pin INT1 and the second pin INT2 are both high.
Alternatively, the master device 101 may be further configured to output indication information of abnormal communication when the duration of the high level state of the first pin INT1 is greater than the second threshold.
Specifically, as shown in fig. 3, after the initialization of the IIC pin and the GPIO pin is performed by the master device 101, if the slave device 102 does not detect the falling edge of the second pin INT2 all the time, the slave device 102 enters a waiting timeout state, and if the duration is greater than the second threshold, it indicates that the communication is abnormal, and the master device 101 may output indication information of the communication abnormality.
As shown in fig. 4, an embodiment of the present invention provides a data transmission method, which can be applied to a master device 101 in a data transmission system. The data transmission method may include S401 to S402:
s401, when a single byte is transmitted, the master device switches the level state of the first pin from a high level state to a low level state.
And S402, when the transmission of the single byte is completed, the master device switches the level state of the first pin from a low level state to a high level state.
As shown in fig. 5, an embodiment of the present invention provides a data transmission method, which may be applied to a slave device 102 in a data transmission system. The data transmission method may include S501-S502:
S501, in a case where the level state of the second pin is detected to be a low level state, the slave device controls the number of received bytes of the external interrupt processing function to be increased by 1.
S502, when the duration time of the level state of the second pin in the high level state is larger than a first threshold value, the slave device receives data sent by the master device according to the current received byte number of the external interrupt processing function.
In the embodiment of the invention, the master device can change the level state of the first pin after transmitting a single byte and completing transmission, and the slave device can sense the byte transmission signal of the master device according to the level change of the second pin because the master device is connected with the second pin of the slave device through the first pin, thereby controlling the number of the received bytes of the external interrupt processing function to be increased by 1.
The foregoing description of the solution provided by the embodiments of the present invention has been mainly presented in terms of a method. To achieve the above functions, it includes corresponding hardware structures and/or software modules that perform the respective functions. Those of skill in the art will readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
According to the data transmission method provided by the embodiment of the invention, the execution main body can be a data transmission device or a control module for data transmission in the data transmission device. In the embodiment of the present invention, a data transmission device executes a data transmission method as an example, which describes the data transmission device provided in the embodiment of the present invention.
It should be noted that, in the embodiment of the present invention, the data transmission device may be divided into functional modules according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules may be implemented in hardware or in software functional modules. Optionally, the division of the modules in the embodiment of the present invention is schematic, which is merely a logic function division, and other division manners may be implemented in practice.
As shown in fig. 6, an embodiment of the present invention provides a data transmission apparatus 600. The data transmission apparatus 600 includes: a first processing module 601; the first processing module 601 is configured to switch, when a single byte is sent, a level state of the first pin from a high level state to a low level state; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state.
As shown in fig. 7, an embodiment of the present invention provides a data transmission apparatus 700. The data transmission apparatus 700 includes: a second processing module 701 and a data receiving module 702; the second processing module 701 is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when the level state of the second pin is detected to be a low level state; the data receiving module 702 is configured to receive data sent by the host device according to the current number of received bytes of the external interrupt handling function when the duration of the level state of the second pin in the high level state is greater than a first threshold.
In the embodiment of the invention, the master device can change the level state of the first pin after transmitting a single byte and completing transmission, and the slave device can sense the byte transmission signal of the master device according to the level change of the second pin because the master device is connected with the second pin of the slave device through the first pin, thereby controlling the number of the received bytes of the external interrupt processing function to be increased by 1.
Fig. 8 illustrates a physical structure diagram of an electronic device, as shown in fig. 8, which may include: processor 810, communication interface (Communications Interface) 820, memory 830, and communication bus 840, wherein processor 810, communication interface 820, memory 830 accomplish communication with each other through communication bus 840. The processor 810 may invoke logic instructions in the memory 830 to perform a data transfer method that includes, when the electronic device is the master device: when a single byte is transmitted, the level state of the first pin is switched from a high level state to a low level state; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state. When the electronic device is a slave device, the method includes: controlling the number of received bytes of the external interrupt handling function to be increased by 1 when the level state of the second pin is detected to be a low level state; and under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value, receiving data sent by the main device according to the current received byte number of the external interrupt processing function.
Further, the logic instructions in the memory 830 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform the data transmission method provided by the methods described above, the method comprising, when the computer program product is the host device: when a single byte is transmitted, the level state of the first pin is switched from a high level state to a low level state; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state. When the computer program product is a slave device, the method comprises: controlling the number of received bytes of the external interrupt handling function to be increased by 1 when the level state of the second pin is detected to be a low level state; and under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value, receiving data sent by the main device according to the current received byte number of the external interrupt processing function.
In yet another aspect, the present invention further provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the above-provided data transmission methods, and when the electronic device is a master device, the method includes: when a single byte is transmitted, the level state of the first pin is switched from a high level state to a low level state; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state. When the electronic device is a slave device, the method includes: controlling the number of received bytes of the external interrupt handling function to be increased by 1 when the level state of the second pin is detected to be a low level state; and under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value, receiving data sent by the main device according to the current received byte number of the external interrupt processing function.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A data transmission system, comprising: a master device and a slave device; the master device is connected with a second pin of the slave device through a first pin;
The master device is configured to switch, when a single byte is transmitted, a level state of the first pin from a high level state to a low level state, and switch, when transmission of the single byte is completed, the level state of the first pin from the low level state to the high level state;
The slave device is configured to control the number of received bytes of the external interrupt processing function to be increased by 1 when the level state of the second pin is detected to be a low level state;
And the slave device is further configured to receive data sent by the master device according to the current number of received bytes of the external interrupt processing function when the duration that the level state of the second pin is in the high level state is greater than a first threshold.
2. The data transmission system of claim 1, wherein the master device is further configured to initialize the first pin and the second pin such that initial level states of the first pin and the second pin are both high level states.
3. The data transmission system according to claim 2, wherein the master device is further configured to output the indication of the communication abnormality in a case where a duration of the state of the first pin being in the high state is greater than a second threshold.
4. The data transmission system of claim 1, further comprising a clock line and a data line between the master device and the slave device;
the clock line is used for generating a clock signal under the control of the master device;
the data line is used for realizing bidirectional data transmission between the master device and the slave device.
5. A data transmission method, applied to the master device of claims 1-4, comprising:
when a single byte is transmitted, the level state of the first pin is switched from a high level state to a low level state;
and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state.
6. A data transmission method, applied to the slave device of claims 1-4, comprising:
Controlling the number of received bytes of the external interrupt handling function to be increased by 1 when the level state of the second pin is detected to be a low level state;
and under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value, receiving data sent by the main device according to the current received byte number of the external interrupt processing function.
7. A data transmission apparatus, comprising: a first processing module; the first processing module is used for switching the level state of the first pin from a high level state to a low level state when a single byte is transmitted; and when the transmission of the single byte is completed, the level state of the first pin is switched from a low level state to a high level state.
8. A data transmission apparatus, comprising: the second processing module and the data receiving module;
The second processing module is used for controlling the number of the received bytes of the external interrupt processing function to be increased by 1 under the condition that the level state of the second pin is detected to be a low level state;
and the data receiving module is used for receiving the data sent by the main equipment according to the current received byte number of the external interrupt processing function under the condition that the duration time of the level state of the second pin in the high level state is larger than a first threshold value.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the data transmission method according to claim 5 or 6 when the program is executed.
10. A non-transitory computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps in the data transmission method according to any one of claims 5 or 6.
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| CN202410068698.4A CN117992392A (en) | 2024-01-17 | 2024-01-17 | Data transmission system, method, device, electronic equipment and storage medium |
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| CN202410068698.4A CN117992392A (en) | 2024-01-17 | 2024-01-17 | Data transmission system, method, device, electronic equipment and storage medium |
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