CN117979811A - Package structure and method for forming the same - Google Patents

Abstract

The application provides a packaging structure and a forming method thereof, wherein the packaging structure comprises: a substrate; at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate; the first magnetic core is positioned at one side of the Hall chip far away from the substrate, and is isolated from the Hall chip in an insulating way; and the plastic package body is used for supporting the first magnetic core and wrapping the chipset and the first magnetic core. Above-mentioned technical scheme, through with first magnetic core integrated in inside the packaging structure, can reduce offset voltage to hall device's influence, improve the accuracy of product and improved the integrated level of product, reduce hall device's volume, complied with hall sensor chip high integration level, miniaturized development trend.

Description

Package structure and method for forming the same

Technical Field

The present disclosure relates to electronic technology, and more particularly, to a package structure and a method for forming the same.

Background

With the advent of the 21 st electronic informatization age, the external information acquisition technology has gradually penetrated to the aspects of human life, the sensor technology is one of the main technologies of the external information acquisition technology, and is an important channel for human perception of external information, and the hall sensor is widely applied to the fields of industry, automobiles, consumer electronics and the like. In order to reduce interference caused by offset voltage, the conventional product generally needs to additionally install a magnetic core to resist interference in a mode of externally applying a magnetic field, and the product is not high in integration level because only one Hall chip is arranged in one product.

Therefore, providing a package structure capable of reducing the influence of offset voltage on the hall device and a forming method thereof is a technical problem to be solved.

Disclosure of Invention

The application aims to provide a packaging structure and a forming method thereof, so as to reduce the influence of offset voltage on a Hall device.

In order to solve the above-mentioned problems, the present application provides a package structure including: a substrate; at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate; the first magnetic core is positioned at one side of the Hall chip far away from the substrate, and is isolated from the Hall chip in an insulating way; and the plastic package body is used for supporting the first magnetic core and wrapping the chipset and the first magnetic core.

In some embodiments, the package structure further comprises: the projection of the four sides of the Hall chip in the horizontal direction completely falls on the corresponding side of the second magnetic core, and the plastic package body also wraps the second magnetic core.

In some embodiments, the first magnetic core is located directly above the hall chip, and the package structure further includes: the first radiating fin is contacted with one side of the first magnetic core, which is far away from the substrate, the plastic package body wraps the first radiating fin, and the surface, which is far away from the substrate, of the first radiating fin is exposed outside the plastic package body.

In some embodiments, the package structure further comprises: the first radiating fins are provided with extension parts at two ends, the extension parts extend towards the substrate and contact with the second magnetic core or cover part of the surface of the second magnetic core, the plastic package body wraps the first radiating fins, and the surface, away from the substrate, of the first radiating fins is exposed out of the plastic package body.

In some embodiments, the package structure further comprises: the second radiating fin is contacted with the second magnetic core, the plastic package body wraps the second radiating fin, and part of the surface of the second radiating fin is exposed to the side face of the plastic package body.

In some embodiments, the extension of the first heat sink has a through hole, and the plastic package is embedded in the through hole.

In some embodiments, the second heat sink has a through hole, and the plastic package is embedded in the through hole.

In some embodiments, the substrate is a nonmagnetic substrate.

In some embodiments, the chipset further comprises a through silicon via chip electrically connected to the substrate, the hall chip connected to the through silicon via chip by a bonding wire, the through silicon via chip located between the substrate and the hall chip to electrically connect the hall chip to the substrate.

The application also provides a forming method of the packaging structure, which comprises the following steps: providing a substrate; forming at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate; forming a first magnetic core which is positioned at one side of the Hall chip far away from the substrate, wherein the first magnetic core is insulated and isolated from the Hall chip; and forming a plastic package body which supports the first magnetic core and wraps the chipset and the first magnetic core.

In some embodiments, the step of forming at least one chipset disposed over the first surface of the substrate, the chipset including a hall chip located on a side of the chipset remote from the substrate further comprises: soldering one or more through-silicon via chips to a surface of the substrate; forming a first sub-plastic package body exposing the metal functional area of the through silicon via chip; and mounting the Hall chip on the metal functional area of the through silicon via chip, wherein the Hall chip is electrically connected to the substrate through the through silicon via chip.

In some embodiments, the step of forming a first magnetic core on a side of the hall chip remote from the substrate, and the first magnetic core is insulated from the hall chip further comprises: covering plastic packaging materials on the surfaces of the through silicon via chip, the Hall chip and the substrate which are not covered by the initial plastic packaging body to form a second sub-plastic packaging body with a stepped surface at one end far away from the substrate; and a first magnetic core is attached to one side, far away from the substrate, of the second sub-plastic package body, and the first magnetic core is positioned right above the Hall chip.

In some embodiments, before the step of attaching the first magnetic core to the side of the second sub-plastic package body away from the substrate, the method further includes: forming a via hole in the edge area of the second sub-plastic package body; and forming a second radiating fin in the via hole.

In some embodiments, after the step of attaching the first magnetic core to the side, away from the substrate, of the second sub-plastic package, the method further includes attaching a second magnetic core to a side surface of the hall chip, where projections of four side surfaces of the hall chip in respective horizontal directions completely fall on respective corresponding side surfaces of the second magnetic core.

In some embodiments, after the step of forming a first magnetic core on a side of the hall chip remote from the substrate, and the first magnetic core is insulated from the hall chip, the method further comprises: covering the plastic package material to form a third plastic package body.

Above-mentioned technical scheme, through with first magnetic core integrated in inside the packaging structure, can reduce offset voltage to hall device's influence, improve the accuracy of product and improved the integrated level of product, reduce hall device's volume, complied with hall sensor chip high integration level, miniaturized development trend.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application as claimed. Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic view of a package structure according to a first embodiment of the present application;

FIG. 2 is a schematic diagram of a package structure according to a second embodiment of the present application;

FIG. 3 is a schematic view of a package structure according to a third embodiment of the present application;

FIG. 4 is a schematic diagram of a method for forming a package structure according to a third embodiment of the present application;

Fig. 5 to 13 are schematic views of a device structure formed by main steps in a third embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

In order to solve the problems of coupling among a plurality of Hall chips and reducing temperature deviation of a Hall disk caused by temperature rise in the prior art, the embodiment of the application provides a packaging structure and a forming method thereof.

The following first describes a package structure provided by an embodiment of the present application.

Fig. 1 is a schematic diagram of a package structure according to a first embodiment of the application. As shown in fig. 1, the package structure of this embodiment includes: substrate 11, chipset 21, first magnetic core 31, and plastic package 41. In this embodiment, the package structure has at least one chipset 21 disposed above the first surface 111 of the substrate 11, and the chipset 21 includes a hall chip 211 located on a side of the chipset 21 away from the substrate 11; the first magnetic core 31 is located at one side of the hall chip 211 away from the substrate 11, and the first magnetic core 31 is insulated from the hall chip 211; the plastic package 41 supports the first magnetic core 31 and encapsulates the chipset 21 and the first magnetic core 31.

With continued reference to fig. 1, in this embodiment, the chipset 21 further includes a through-silicon via chip 212, the through-silicon via chip 212 is electrically connected to the substrate 11, the hall chip 211 is connected to the through-silicon via chip 212 through a bonding wire 71, and the through-silicon via chip 212 is located between the substrate 11 and the hall chip 211 to electrically connect the hall chip 211 to the substrate 11. In other embodiments, the chipset 21 may include other functional chips, and the hall chip 211 and the substrate 11 may be interconnected by soldering or flip-chip bonding.

Referring to fig. 1, in this embodiment, the chipset 21 includes a plurality of hall chips 211 located on the same plane, so that coupling between the hall chips 211 can be achieved, the frequency of the product is improved, the product volume is reduced, and the interference caused by the offset voltage of the product can be reduced and the integration level of the product is improved by integrating the first magnetic core 31 inside the package structure.

With continued reference to fig. 1, in this embodiment, the package structure further includes: and the solder balls 81 are positioned on the surface opposite to the first surface 111 of the substrate 11, and the solder balls 81 are used for mounting subsequent products and realizing the electrical connection between the products and the outside.

Fig. 2 is a schematic diagram of a package structure according to a second embodiment of the application. As shown in fig. 2, in this embodiment, the first magnetic core 31 is located directly above the hall chip 211, and the package structure further includes: the first heat sink 51 contacts the first magnetic core 31 at a side far away from the substrate 11, the plastic package 41 wraps the first heat sink 51, and a surface of the first heat sink 51 far away from the substrate 11 is exposed outside the plastic package 41. The first heat sink 51 may be made of a metal material, such as copper, and by embedding a copper sheet, the heat dissipation performance of the whole product is improved, the temperature deviation of the hall chip 211 caused by the temperature rise is reduced, and the sensitivity of the hall chip 211 is improved.

Fig. 3 is a schematic diagram of a package structure according to a third embodiment of the application. As shown in fig. 3, in this embodiment, the package structure further includes: the second magnetic core 32 is located on the side surface of the hall chip 211, the projections of the four side surfaces of the hall chip 211 in the respective horizontal directions completely fall on the corresponding side surfaces of the second magnetic core 32, and the plastic package 41 also wraps the second magnetic core 32. In this embodiment, the second magnetic cores 32 are disposed on four sides of the hall chip 211, and the second magnetic cores 32 are located on the same plane, so as to balance the influence of the magnetic field generated by the second magnetic cores 32 on two sides of the hall chip 211 on the hall chip 211.

With continued reference to fig. 3, in this embodiment, the package structure further includes: the first heat sink 51 having the extension portion 511 at both ends, the extension portion 511 extends toward the substrate 11 and contacts the second magnetic core 32 or covers a portion of the surface of the second magnetic core 32, the plastic package 41 wraps the first heat sink 51, and the surface of the first heat sink 51 away from the substrate 11 is exposed outside the plastic package 41. The extension 511 contacts the second magnetic core 32 inside the package structure to further conduct heat inside the package structure to the surface of the first heat sink 51 exposed to the outside of the plastic package body 41, so as to reduce the temperature inside the package structure.

With continued reference to fig. 3, in this embodiment, the package structure further includes: the second heat sink 52 contacts the second magnetic core 32, the plastic package 41 wraps the second heat sink 52, and a portion of the surface of the second heat sink 52 is exposed to the side of the plastic package 41. In this embodiment, the second heat sink 52 is suspended on one side of the substrate 11, and in other embodiments, the second heat sink 52 directly contacts the surface of the substrate 11. In this embodiment, the second heat sink 52 is a columnar metal sheet perpendicular to the first surface 111 of the substrate, and the side wall of the second heat sink 52 contacts the side wall of the second magnetic core 32, and in other embodiments, the second heat sink 52 may be configured in another shape or placed in another position in the plastic package 41 that contacts the second magnetic core 32, so as to increase the area of the second heat sink 52 exposed outside the plastic package 41 and further transfer the heat of the package structure to the outside.

In this embodiment, the extension 511 of the first heat sink 51 has a through hole (not shown), and the plastic package 41 is embedded in the through hole. The through holes are perpendicular to the first surface 111 of the substrate 11, so as to ensure that the plastic package body 41 can be completely filled in the subsequent plastic package. In other embodiments, the second heat sink 52 has a through hole perpendicular to the surface of the substrate 11, so as to further ensure that the plastic package 41 can be completely filled.

In some embodiments, the substrate 11 is a non-magnetic substrate, for example, the substrate 11 is fabricated with non-magnetic or low magnetic materials that do not contain iron-nickel to reduce electromagnetic interference to the product.

According to the technical scheme, the first magnetic core 31 and the second magnetic core 32 are integrated in the packaging structure, so that the influence of offset voltage on a Hall device can be reduced, the accuracy of a product is improved, the integration level of the product is improved, the volume of the Hall device is reduced, a plurality of Hall chips 211 can be coupled and packaged, and the development trend of high integration level and microminiaturization of the Hall sensor chips is complied; through the mounting of the radiating fins on the top and the side surface of the packaging structure, the heat dissipation of the product is enhanced, the temperature deviation of the Hall chip 211 caused by the temperature rise is reduced, and the sensitivity of the Hall chip 211 is improved.

Based on the same inventive concept, the application also provides a method for forming the packaging structure. The method comprises the following steps: providing a substrate; forming at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate; forming a first magnetic core which is positioned at one side of the Hall chip far away from the substrate, wherein the first magnetic core is insulated and isolated from the Hall chip; and forming a plastic package body which supports the first magnetic core and wraps the chipset and the first magnetic core. Referring now to fig. 4, a schematic diagram illustrating a method for forming a package structure according to a third embodiment of the present application is shown in fig. 5 to 13, which are schematic diagrams illustrating a device structure formed by main steps in the third embodiment of the present application. Since the method for forming the package structure in the first embodiment and the second embodiment is similar to the method for forming the package structure in the third embodiment of the present application, only some steps need to be omitted, and therefore, description thereof will not be repeated.

As shown in fig. 4, the method for forming the package structure includes: step S41, providing a substrate; step S42, forming at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate, and the chip set is electrically connected to the substrate; step S43, forming a first magnetic core positioned at one side of the Hall chip far away from the substrate and a second magnetic core positioned at four sides of the Hall chip; step S44, forming a first heat sink which covers the first magnetic core away from the surface of the substrate and contacts the second magnetic core; step S45, forming a second radiating fin which is positioned on one side of the substrate and is contacted with the second magnetic core; step S46, forming a plastic package body which supports the first magnetic core and wraps the chip set and the first magnetic core. In this embodiment, the second heat sink 52 is suspended on one side of the substrate 11, and in other embodiments, the second heat sink 52 directly contacts the surface of the substrate 11. The substrate 11 is made of non-magnetic or low-magnetic materials without iron and nickel, so as to reduce electromagnetic interference to products.

In this embodiment, the step S42 of forming at least one chipset 21 disposed above the first surface of the substrate 11, the chipset 21 including a hall chip 211 located on a side of the chipset 21 away from the substrate 11, the step of electrically connecting the chipset 21 to the substrate 11 further includes: one or more through silicon via chips 212 are soldered to the surface of the substrate 11 using flip chip technology, as shown in fig. 5; forming a first sub-plastic package 411 exposing the metal functional area of the through-silicon via chip 212, as shown in fig. 6; mounting the hall chip 211 on the metal functional region of the through-silicon via chip 212, as shown in fig. 7; the hall chip 211 is connected to the through-silicon via chip 212 using bonding wires 71 as shown in fig. 8.

In this embodiment, the step of forming the first sub-plastic package 411 exposing the metal functional area of the through-silicon via chip 212 includes: filling plastic packaging material on the upper surface of the substrate 11, and wrapping the through-silicon via chip 212 with the plastic packaging material to protect the through-silicon via chip 212 and the connection area between the through-silicon via chip 212 and the substrate 11; the plastic package material on the surface of the through-silicon via chip 212 is polished to expose the metal functional area of the through-silicon via chip 212. In other embodiments, the chipset 21 may comprise other functional chips.

In this embodiment, the step of forming the first magnetic core 31 located at the side of the hall chip 211 away from the substrate 11 and the second magnetic core 32 located at the two sides of the hall chip 211 in step S43 further includes: covering plastic packaging materials on the through-silicon via chip 212, the hall chip 211 and the surface of the substrate 11 not covered by the initial plastic packaging body 411 to form a second sub-plastic packaging body 412 with a stepped surface at one end far away from the substrate 11, as shown in fig. 9; forming a via hole 91 in an edge region of the second sub-plastic package 412, as shown in fig. 10; a first magnetic core 31 is mounted on a side of the second sub-plastic package 412 away from the substrate 11 and above the hall chip 211, and a second magnetic core 32 is mounted on a side of the second sub-plastic package 412 away from the substrate 11 and on four sides of the hall chip 21, as shown in fig. 11. In this embodiment, the projections of the four sides of the hall chip 211 in the respective horizontal directions completely fall on the sides of the respective corresponding second magnetic cores 32.

In this embodiment, step S44 is to form a first heat sink 51 covering the surface of the first magnetic core 31 away from the substrate 11 and contacting the second magnetic core 32, as shown in fig. 12. The first heat sink 51 has extension portions 511 at two ends, and the extension portions 511 extend toward the substrate 11 and contact the second magnetic core 32 or cover a portion of the surface of the second magnetic core 32, so as to further conduct heat inside the package structure to the surface of the first heat sink 51 exposed outside the plastic package 41, so as to reduce the temperature inside the package structure.

In this embodiment, the step of forming the second heat sink 52 located at one side of the substrate 11 and in contact with the second magnetic core 32 in step S45 further includes: a second heat sink 52 is formed in the via 91, the second heat sink 52 being connected to the second magnetic core 32, as shown in fig. 13. In this embodiment, the via 91 is a blind hole, and the second heat sink 52 formed later is suspended on one side of the substrate 11, and in other embodiments, the via 91 may also be a through hole, and the second heat sink 52 formed later directly contacts the first surface 111 of the substrate 11. In this embodiment, the via 91 is perpendicular to the substrate 11, the second heat sink 52 is a columnar metal sheet perpendicular to the first surface 111 of the substrate, and the sidewall of the second heat sink 52 contacts the sidewall of the second magnetic core 32. In other embodiments, the second heat sink 52 may be configured in other shapes or placed in other positions in the molding compound 41 that contact the second magnetic core 32, so as to increase the area of the second heat sink 52 exposed outside the molding compound 41 and further transfer the heat of the package structure to the outside. In the present embodiment, the first heat sink 51 and the second heat sink 52 have through holes (not shown) perpendicular to the first surface 111 of the substrate 11. The through hole is perpendicular to the first surface 111 of the substrate 11, so as to ensure that the plastic package 41 can be completely filled when the plastic package material is filled on the surface of the structure.

In this embodiment, the step S46 of forming the molding body 41 supporting the first magnetic core 31 and wrapping the chipset 21 and the first magnetic core 31 further includes covering the surfaces of the second molding body 412, the second heat sink 52, the first magnetic core 31 and the first heat sink 51 away from the substrate 11 with a molding material to form the third sub-molding body. It should be noted that the first plastic package 411, the second plastic package 412, and the third plastic package described herein are used together as the plastic package 41.

The method for forming the packaging structure further comprises the following steps: grinding and cutting the plastic packaging material to form a plastic packaging body 41 exposing part of the surfaces of the first radiating fins 51 and the second radiating fins 52; and ball mounting is performed on the lower surface of the substrate 11 to form solder balls 81 for mounting the subsequent product and electrically connecting the product with the outside, as shown in fig. 1.

Above-mentioned technical scheme, through with first magnetic core 31 and second magnetic core 32 integrate in inside the packaging structure, can reduce offset voltage to hall device's influence, improve the accuracy of product and improved the integrated level of product, reduce hall device's volume, but also can be to a plurality of hall chip 211 coupling encapsulation has complied with hall sensor chip high integration, miniaturized development trend.

It should be noted that in this document, relational terms such as "first" and "second" are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the statement "comprises" and "comprises" does not exclude the presence of other elements than those listed in any process, method, article, or apparatus that comprises the element.

In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for the embodiment of the method of forming the package structure, since it is substantially similar to the embodiment of the package structure, the description is relatively simple, and the relevant points are referred to in the description of the embodiment of the package structure.

The foregoing is merely a preferred embodiment of the present application and is not intended to limit the scope of the present application. It should be noted that modifications and adaptations to the present application may occur to one skilled in the art without departing from the principles of the present application and are intended to be comprehended within the scope of the present application.

Claims (15)

1. A package structure, the package structure comprising:

a substrate;

at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate;

The first magnetic core is positioned at one side of the Hall chip far away from the substrate, and is isolated from the Hall chip in an insulating way;

and the plastic package body is used for supporting the first magnetic core and wrapping the chipset and the first magnetic core.

2. The package structure of claim 1, further comprising: the projection of the four sides of the Hall chip in the horizontal direction completely falls on the corresponding side of the second magnetic core, and the plastic package body also wraps the second magnetic core.

3. The package structure according to claim 1 or 2, wherein the first magnetic core is located directly above the hall chip, the package structure further comprising: the first radiating fin is contacted with one side of the first magnetic core, which is far away from the substrate, the plastic package body wraps the first radiating fin, and the surface, which is far away from the substrate, of the first radiating fin is exposed outside the plastic package body.

4. The package structure of claim 2, further comprising: the first radiating fins are provided with extension parts at two ends, the extension parts extend towards the substrate and contact with the second magnetic core or cover part of the surface of the second magnetic core, the plastic package body wraps the first radiating fins, and the surface, away from the substrate, of the first radiating fins is exposed out of the plastic package body.

5. The package structure of claim 2, further comprising: the second radiating fin is contacted with the second magnetic core, the plastic package body wraps the second radiating fin, and part of the surface of the second radiating fin is exposed to the side face of the plastic package body.

6. The package structure of claim 4, wherein the extension portion of the first heat sink has a through hole, and the molding compound is embedded in the through hole.

7. The package structure of claim 5, wherein the second heat sink has a through hole, and the molding compound is embedded in the through hole.

8. The package structure of claim 1, wherein the substrate is a nonmagnetic substrate.

9. The package structure of claim 1, wherein the chipset further comprises a through silicon via chip electrically connected to the substrate, the hall chip connected to the through silicon via chip by a bond wire, the through silicon via chip located between the substrate and the hall chip to electrically connect the hall chip to the substrate.

10. A method of forming a package structure, the method comprising:

Providing a substrate;

forming at least one chip set arranged above the first surface of the substrate, wherein the chip set comprises a Hall chip positioned on one side of the chip set away from the substrate;

Forming a first magnetic core which is positioned at one side of the Hall chip far away from the substrate, wherein the first magnetic core is insulated and isolated from the Hall chip;

and forming a plastic package body which supports the first magnetic core and wraps the chipset and the first magnetic core.

11. The method of claim 10, wherein the step of forming at least one chip set disposed over the first surface of the substrate, the chip set including a hall chip on a side of the chip set remote from the substrate, further comprises:

Soldering one or more through-silicon via chips to a surface of the substrate;

forming a first sub-plastic package body exposing the metal functional area of the through silicon via chip;

And mounting the Hall chip on the metal functional area of the through silicon via chip, wherein the Hall chip is electrically connected to the substrate through the through silicon via chip.

12. The method of claim 11, wherein the step of forming a first magnetic core on a side of the hall chip away from the substrate, and wherein the first magnetic core is insulated from the hall chip further comprises:

Covering plastic packaging materials on the surfaces of the through silicon via chip, the Hall chip and the substrate which are not covered by the initial plastic packaging body to form a second sub-plastic packaging body with a stepped surface at one end far away from the substrate;

And a first magnetic core is attached to one side, far away from the substrate, of the second sub-plastic package body, and the first magnetic core is positioned right above the Hall chip.

13. The method of claim 12, wherein before the step of attaching the first magnetic core to the side of the second sub-plastic package body away from the substrate, the method further comprises:

forming a via hole in the edge area of the second sub-plastic package body;

And forming a second radiating fin in the via hole.

14. The method of claim 12, further comprising, after the step of attaching a first magnetic core to a side of the second sub-plastic package body away from the substrate:

And a second magnetic core is attached to the side surface of the Hall chip, and projections of the four side surfaces of the Hall chip in the horizontal directions completely fall on the corresponding side surfaces of the second magnetic core.

15. The method of claim 12, wherein forming a first magnetic core on a side of the hall chip away from the substrate, and wherein the first magnetic core is insulated from the hall chip, the method further comprises: covering the plastic package material to form a third sub-plastic package body.