CN117978284A - Lock point adjustment method, electronic device, and computer-readable storage medium - Google Patents
Lock point adjustment method, electronic device, and computer-readable storage medium Download PDFInfo
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- 238000001514 detection method Methods 0.000 claims abstract description 40
- 230000008569 process Effects 0.000 claims abstract description 31
- 238000005457 optimization Methods 0.000 claims description 20
- 238000006243 chemical reaction Methods 0.000 claims description 12
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- 230000010354 integration Effects 0.000 claims description 7
- 238000004590 computer program Methods 0.000 claims description 5
- 238000012544 monitoring process Methods 0.000 abstract description 25
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- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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Abstract
The application provides a locking point adjusting method, electronic equipment and a computer readable storage medium. The locking point adjusting method comprises the following steps: acquiring a first static bias point of the in-phase quadrature IQ modulator in a first locking state; replacing the first static bias point with an initial static bias point; the initial static bias points are used for representing static bias points corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum; detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detection integral value; adjusting the detection integral value according to a preset strategy; and locking the IQ modulator according to the adjusted detection integral value. According to the scheme provided by the embodiment of the application, the locking point adjusting process can be realized under the condition of monitoring the complementary monitoring photodiode so as to eliminate the carrier wave.
Description
Technical Field
Embodiments of the present application relate to, but are not limited to, the field of communications technologies, and in particular, to a lock point adjustment method, an electronic device, and a computer readable storage medium.
Background
In-phase Quadrature (IQ) modulators are an important component of the conversion of the electrical signals at the originating end of coherent optical communications; the thin film lithium niobate modulator has the characteristics of high bandwidth and low loss, but due to the limitation of an etching process, a spectral monitoring photodiode cannot be manufactured for monitoring, an IQ modulator in coherent application can only monitor by using a complementary monitoring photodiode, extinction ratio of the modulator is low, so that offset error of an IQ center is large, and carrier cancellation effect is poor.
Disclosure of Invention
The embodiment of the application provides a locking point adjusting method, electronic equipment and a computer readable storage medium, which can realize locking point adjusting processing under the condition of monitoring a complementary monitoring photodiode so as to eliminate carrier waves and achieve the effect of automatically locking and being usable under the condition of higher requirements of a constellation diagram and a spectrum.
In a first aspect, an embodiment of the present application provides a method for adjusting a lock point, including:
acquiring a first static bias point of the in-phase quadrature IQ modulator in a first locking state;
Replacing the first static bias point with an initial static bias point; the initial static bias point is used for representing a static bias point corresponding to the condition that the light output of an in-phase branch and a quadrature branch of the IQ modulator is minimum;
Detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detection integral value;
adjusting the detection integral value according to a preset strategy;
and locking the IQ modulator according to the adjusted detection integral value.
In a second aspect, an embodiment of the present application further provides an electronic device, including:
The lock point adjustment device comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor realizes the lock point adjustment method when executing the computer program.
In a third aspect, an embodiment of the present application further provides a computer-readable storage medium storing computer-executable instructions for performing the lock point adjustment method as described above.
The embodiment of the application comprises the following steps: acquiring a first static bias point of the in-phase quadrature IQ modulator in a first locking state; then replacing the first static bias point with the initial static bias point; the initial static bias points are used for representing static bias points corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum; then, detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detected integral value; then adjusting the detection integral value according to a preset strategy; and finally locking the IQ modulator according to the adjusted detection integral value. According to the technical scheme provided by the embodiment of the application, the locking point adjusting process can be realized under the condition of monitoring the complementary monitoring photodiode so as to eliminate the carrier wave, and the effect of automatically locking the available carrier wave under the condition of higher requirements of a constellation diagram and a spectrum is achieved.
Drawings
FIG. 1 is a schematic diagram of an apparatus architecture for performing a lock point adjustment method according to one embodiment of the present application;
FIG. 2 is a flow chart of a method for lock point adjustment provided by one embodiment of the present application;
FIG. 3 is a flow chart of a method for obtaining an initial static bias point according to an embodiment of the present application;
FIG. 4 is a flow chart of a first iterative optimization process for a first initial bias point provided by one embodiment of the present application;
FIG. 5 is a flow chart of a second iterative optimization process for a second initial bias point provided by one embodiment of the present application;
FIG. 6 is a flow chart of a process for adjusting a first initial bias point according to one embodiment of the present application;
FIG. 7 is a flow chart of a process for adjusting a second initial bias point according to one embodiment of the present application;
FIG. 8 is a flow chart of determining a first static bias point provided by one embodiment of the present application;
FIG. 9 is a flow chart of a lock process for an IQ modulator according to one embodiment of the present application;
FIG. 10 is a flow chart of adjusting the detected integration value provided by one embodiment of the application;
FIG. 11 is a flowchart for adjusting the detected integration value according to another embodiment of the present application;
FIG. 12 is a constellation diagram corresponding to a particular non-ideal extinction ratio provided by an embodiment of the application;
FIG. 13 is a spectral diagram corresponding to a particular non-ideal extinction ratio provided by one embodiment of the application;
FIG. 14 is a constellation diagram of detection locking by using complementary monitor photodiodes to monitor optical power, provided by an embodiment of the present application, for loading dither signals at certain non-ideal extinction ratios;
FIG. 15 is a spectral diagram of a detection lock by using a complementary monitor photodiode to monitor optical power, provided by one embodiment of the present application, to load a dither signal with a particular non-ideal extinction ratio;
FIG. 16 is a constellation diagram after monitoring optical power with a complementary monitor photodiode and using the above-described lock point adjustment method for a specific non-ideal extinction ratio, according to an embodiment of the application;
FIG. 17 is a spectral diagram of the monitoring of optical power with a complementary monitor photodiode, with the above-described lock-in adjustment method, for a particular non-ideal extinction ratio, in accordance with one embodiment of the application;
Fig. 18 is a schematic view of the configuration of an electronic device according to an embodiment of the present application.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
The application provides a locking point adjusting method, electronic equipment and a computer readable storage medium, wherein a first static bias point of an in-phase quadrature IQ modulator in a first locking state is obtained; then replacing the first static bias point with the initial static bias point; the initial static bias points are used for representing static bias points corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum; then, detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detected integral value; then adjusting the detection integral value according to a preset strategy; and finally locking the IQ modulator according to the adjusted detection integral value. According to the technical scheme provided by the embodiment of the application, the locking point adjusting process can be realized under the condition of monitoring the complementary monitoring photodiode so as to eliminate the carrier wave, and the effect of automatically locking the available carrier wave under the condition of higher requirements of a constellation diagram and a spectrum is achieved.
Embodiments of the present application will be further described below with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of an apparatus architecture for performing a lock point adjustment method according to an embodiment of the present application. In the example of fig. 1, the device architecture includes an IQ modulator and a complementary monitor photodiode; the IQ modulator comprises an in-phase branch and a quadrature branch, the two branches modulate carriers respectively, the two paths of carriers are mutually orthogonal, I represents the in-phase branch, and Q represents the quadrature branch; the orthogonal signals are two paths of carriers with the same frequency and 90-degree phase difference; the control circuit for complementarily monitoring the photocurrent signal input of the photodiode comprises a first control branch, a second control branch and a third control branch, wherein the first control branch is used for controlling the bias point of the in-phase branch, the second control branch is used for controlling the bias point of the quadrature branch, and the third control branch is used for controlling the bias point of the phase branch between the in-phase branch and the quadrature branch. The "complementary" refers to two outlets for outputting light after the I-path and the Q-path are combined and interfered by the 2 x 2 optical coupler, one is used for outputting signal light, and the other is used for monitoring the detection light signal of the photodiode. Under the condition that the extinction ratio of the IQ modulator is infinitely high, locking processing is carried out according to a traditional locking scheme, the locking point of the in-phase branch is 180 degrees, the locking point of the quadrature branch is also 180 degrees, the locking point of the phase branch between the in-phase branch and the quadrature branch is 90 degrees, and at the moment, the light-emitting carrier of the IQ modulator can be eliminated completely.
The device architecture and the application scenario described in the embodiments of the present application are for more clearly describing the technical solution of the embodiments of the present application, and do not constitute a limitation on the technical solution provided in the embodiments of the present application, and those skilled in the art can know that, with the evolution of the device architecture and the appearance of the new application scenario, the technical solution provided in the embodiments of the present application is applicable to similar technical problems.
It will be appreciated by those skilled in the art that the apparatus architecture shown in fig. 1 is not limiting of the embodiments of the application and may include more or fewer components than shown, or certain components may be combined, or a different arrangement of components.
Based on the structure of the device architecture, various embodiments of the lock point adjustment method of the present application are presented.
As shown in fig. 2, fig. 2 is a flowchart of a method for adjusting a lock point according to an embodiment of the present application. The method includes, but is not limited to, step S100, step S200, step S300, step S400, and step S500:
Step S100, a first static bias point of the in-phase quadrature IQ modulator in a first locking state is obtained;
step S200, replacing the first static bias point with an initial static bias point; the initial static bias points are used for representing static bias points corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum;
Step S300, detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detected integral value;
Step S400, adjusting the detection integral value according to a preset strategy;
And S500, locking the IQ modulator according to the adjusted detection integral value.
In the embodiment of the application, a first static bias point of an in-phase quadrature IQ modulator in a first locking state is firstly obtained; then replacing the first static bias point with the initial static bias point; the initial static bias points are used for representing static bias points corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum; then, detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detected integral value; then adjusting the detection integral value according to a preset strategy; and finally locking the IQ modulator according to the adjusted detection integral value. According to the technical scheme provided by the embodiment of the application, the locking point adjusting process can be realized under the condition of monitoring the complementary monitoring photodiode so as to eliminate the carrier wave, and the effect of automatically locking the available carrier wave under the condition of higher requirements of a constellation diagram and a spectrum is achieved.
Notably, the IQ modulator can be placed in the first locked state by existing conventional locking schemes; illustratively, dither signals are loaded on an in-phase branch and a quadrature branch of the IQ modulator, and by performing detection processing on photocurrents of the complementary monitoring photodiodes, bias points of the IQ modulator are close to a first static bias point based on the detection signals; and under the condition that the bias point is adjusted to the first static bias point, the IQ modulator is in a first locking state. Typically, in the first locked state of an IQ modulator using a complementary monitor photodiode, the outgoing carrier of the IQ modulator is large and cannot be used directly.
It is noted that the initial static bias point is used for representing a static bias point corresponding to the condition that the light output of the in-phase branch and the quadrature branch of the IQ modulator is minimum; specifically, the bias points of the in-phase branch and the quadrature branch are adjusted according to the light intensity monitored by the complementary monitoring photodiode, so that the light output intensity of the in-phase branch and the quadrature branch is weakened after each adjustment, and finally, the corresponding static bias point is determined as the initial static bias point under the condition that the light output of the in-phase branch and the quadrature branch is minimum.
It can be appreciated that, based on the first lock state and the initial static bias point, the dither signal of the IQ modulator is subjected to a detection process to obtain a detection integrated value; and loading dither signals on an in-phase branch and a quadrature branch of the IQ modulator to perform detection processing, and finally obtaining corresponding detection integral values.
It can be understood that the adjustment processing is performed on the detected integral value according to a preset strategy, that is, the adjustment processing is performed on the detected integral value obtained in the above step according to the preset strategy; for example, the preset strategy is that the detected integral value is multiplied by 2, and then the detected integral value obtained in the above step is multiplied by 2 to be used as the basis for the subsequent lock point adjustment.
It is noted that the locking process of the IQ modulator according to the adjusted detection integrated value may be performed by an existing conventional locking scheme, which is not described herein.
As shown in fig. 3, the initial static bias points include a first in-phase leg bias point and a first quadrature leg bias point, where the initial static bias points may be obtained by, but are not limited to, step S210, step S220, and step S230:
step S210, setting a first initial bias point of an in-phase branch and a second initial bias point of a quadrature branch;
Step S220, performing first iterative optimization processing on the first initial bias points to obtain second in-phase branch bias points; performing second iterative optimization processing on the second initial bias points to obtain second orthogonal branch bias points;
step S230, determining the second in-phase branch bias point as the first in-phase branch bias point and determining the second quadrature branch bias point as the first quadrature branch bias point when the second in-phase branch bias point and the second quadrature branch bias point are both less than the preset threshold.
In the embodiment of the application, in the process of acquiring an initial static bias point, a first initial bias point of an in-phase branch and a second initial bias point of a quadrature branch are set firstly; then, performing first iterative optimization processing on the first initial bias point to obtain a second in-phase branch bias point; performing second iterative optimization processing on the second initial bias point to obtain a second orthogonal branch bias point; and finally, under the condition that the bias points of the second in-phase branch and the second quadrature branch are smaller than a preset threshold value, determining the bias point of the second in-phase branch as the bias point of the first in-phase branch, and determining the bias point of the second quadrature branch as the bias point of the first quadrature branch.
It should be noted that, in the embodiment of the present application, the first in-phase branch bias point and the second in-phase branch bias point are only used to distinguish and illustrate bias points in different states, so that the specific working principle of the embodiment of the present application is better explained, and the two should not be considered as objects belonging to different properties. The first and second orthogonal branch bias points are the same.
It can be understood that the first iterative optimization process is performed on the first initial bias point, that is, the iterative optimization adjustment process is performed on the first initial bias point. And similarly, performing a second iterative optimization process on the second initial bias point, namely performing an iterative optimization adjustment process on the second initial bias point.
As shown in fig. 4, the step S220 may include, but is not limited to, step S221, step S222, step S223, and step S224:
step S221, performing a first phase scanning process on the IQ modulator, and recording a first photoelectric current value;
Step S222, adding a preset first phase transformation value to the first initial bias point to obtain a first adjustment bias point;
step S223, based on the first adjustment bias point, performing a second phase scanning process on the IQ modulator, and recording a second photoelectric current value;
step S224, performing adjustment processing on the first initial bias point according to the first photoelectric current value and the second photoelectric current value.
In the embodiment of the application, in the process of performing first iterative optimization processing on a first initial bias point, first phase scanning processing is performed on an IQ modulator, so that a first photoelectric current value is obtained; adding a preset first phase transformation value to the first initial bias point to obtain a first adjustment bias point; then, based on the first adjustment bias point, performing second phase scanning processing on the IQ modulator to obtain a second photoelectric current value; and finally, adjusting the first initial bias point according to the first photoelectric current value and the second photoelectric current value.
It is noted that the first adjustment bias point can be obtained by adding a preset first phase transformation value to the first initial bias point; then, carrying out second phase scanning processing on the IQ modulator again based on the first adjustment bias point, so as to obtain a second photoelectric current value; and comparing the first photoelectric current value with the second photoelectric current value, so as to know whether the adjustment direction of the first initial bias point is correct.
As shown in fig. 5, the step S220 may include, but is not limited to, step S225, step S226, step S227, and step S228:
step S225, performing third phase scanning processing on the IQ modulator, and recording a third photoelectric current value;
Step S226, adding a preset second phase transformation value to the second initial bias point to obtain a second adjustment bias point;
step S227, based on the second adjustment bias point, performing a fourth phase scanning process on the IQ modulator, and recording a fourth photoelectric current value;
Step S228, the second initial bias point is adjusted according to the third photoelectric current value and the fourth photoelectric current value.
In the embodiment of the application, in the process of performing the second iterative optimization processing on the second initial bias point, first, performing the third phase scanning processing on the IQ modulator so as to obtain a third photoelectric current value; adding a preset second phase transformation value to the second initial bias point to obtain a second adjustment bias point; then, based on the second adjustment bias point, performing fourth phase scanning processing on the IQ modulator to obtain a fourth photoelectric current value; and finally, adjusting the second initial bias point according to the third photoelectric current value and the fourth photoelectric current value.
It is noted that the second adjustment bias point can be obtained by adding a preset second phase transformation value to the second initial bias point; then, carrying out fourth phase scanning processing on the IQ modulator again based on the second adjustment bias point, so as to obtain a fourth photoelectric current value; and comparing the third photoelectric current value with the fourth photoelectric current value so as to know whether the adjustment direction of the second initial bias point is correct.
As shown in fig. 6, the step S224 may include, but is not limited to, step S2241 and step S2242:
Step S2241, in the case that the second photo-current value is smaller than the first photo-current value, determining the first adjustment bias point as a new first initial bias point;
In step S2242, in the case where the second photoelectric current value is greater than or equal to the first photoelectric current value, the first initial bias point is determined as a new first initial bias point, and the first phase conversion value takes a negative sign as a new first phase conversion value.
In an embodiment of the present application, in the case that the second photo-current value is smaller than the first photo-current value, the first adjustment bias point is determined as a new first initial bias point; when the second photoelectric current value is greater than or equal to the first photoelectric current value, the first initial bias point is determined as a new first initial bias point, the first phase conversion value is taken as a new first phase conversion value, and the first initial bias point is subjected to adjustment processing again based on the new first phase conversion value.
It can be understood that when the second photo current value is greater than or equal to the first photo current value, it represents that the adjustment direction of the first initial bias point is opposite, so that the first phase transformation value needs to be subjected to the inverse adjustment process again by taking the negative sign, so that the first initial bias point is subjected to the first iterative optimization process, and the second in-phase branch bias point is obtained.
As shown in fig. 7, the step S228 may include, but is not limited to, step S2281 and step S2282:
Step S2281 of determining the second adjustment bias point as a new second initial bias point in the case where the fourth photoelectric current value is smaller than the third photoelectric current value;
In step S2282, in the case where the fourth photoelectric current value is greater than or equal to the third photoelectric current value, the second initial bias point is determined as a new second initial bias point, and the second phase conversion value is taken as a negative sign.
In an embodiment of the present application, in the case that the fourth photo-current value is smaller than the third photo-current value, the second adjustment bias point is determined as a new second initial bias point; when the fourth photoelectric current value is greater than or equal to the third photoelectric current value, the second initial bias point is determined as a new second initial bias point, the second phase conversion value is taken as a new second phase conversion value, and the second initial bias point is subjected to adjustment processing again based on the new second phase conversion value.
It can be understood that when the fourth photo current value is greater than or equal to the third photo current value, it represents that the adjustment direction of the second initial bias point is opposite, so that the second phase transformation value needs to be subjected to the inverse adjustment process again to perform the second iterative optimization process on the second initial bias point, so as to obtain the second orthogonal branch bias point.
As shown in fig. 8, the step S100 may include, but is not limited to, step S110 and step S120:
Step S110, inputting a jitter adjusting signal to an IQ modulator and performing bias point adjusting processing on the IQ modulator to enable the IQ modulator to be in a first locking state, wherein in the first locking state, detection integral values of an in-phase branch, a quadrature branch and a phase branch between the in-phase branch and the quadrature branch are all 0;
Step S120, determining the bias point of the IQ modulator in the first locked state as a first static bias point.
In the embodiment of the application, in the process of acquiring a first static bias point of an IQ modulator in a first locking state, firstly, a jitter adjusting signal is input to the IQ modulator and bias point adjusting processing is carried out on the IQ modulator so that the IQ modulator is in the first locking state, wherein in the first locking state, detection integral values of an in-phase branch, a quadrature branch and a phase branch between the in-phase branch and the quadrature branch are all 0; the bias point of the IQ-modulator in the first locked state is then determined as a first static bias point.
As shown in fig. 9, the above step S500 may include, but is not limited to, step S510 and step S520:
step S510, determining the adjusted detection integral value as a target locking value;
in step S520, the IQ modulator is locked according to the target locking value.
In the embodiment of the application, the adjusted detected integration value is determined as the target lock value; the IQ modulator is then lock processed based on the target lock value. The process of locking the IQ modulator based on the target locking value can be based on the existing traditional locking scheme; illustratively, dither signals are loaded on an in-phase branch and a quadrature branch of the IQ modulator, detection is carried out through complementary monitoring photodiodes, detection processing is carried out, and the bias point of the IQ modulator is closed to a target locking value based on the detection signals; under the condition that the detection integral reaches the target locking value, the IQ modulator is considered to finish the operation of locking point adjustment, and the light-emitting carrier wave of the IQ modulator is eliminated.
As shown in fig. 10 and 11, the above step S400 may include, but is not limited to, one of the following steps:
step S410, carrying out preset multiple amplification processing on the detection integral value;
Step S420 adds a preset integration value to the detected integration value.
In the embodiment of the application, the adjustment processing is performed on the detected integral value according to a preset strategy, the amplification processing of a preset multiple can be performed on the detected integral value, and the preset integral value can be added to the detected integral value to complete the adjustment processing of the detected integral value, so that preparation is made for subsequent lock point adjustment.
For example, under the condition that the extinction ratio of the in-phase branch of the IQ modulator is only 20dB, in the process of locking according to the conventional locking scheme, the complementary monitoring photodiode is used for receiving optical signals, the quadrature branch is automatically locked to 170 °, the quadrature branch is deviated by-10 °, the carrier wave which is not eliminated and the carrier wave which leaks out of the in-phase branch because of the insufficient extinction ratio interfere with each other in the complementary path, but interfere with each other in the light outlet, and the rest carrier waves are all in the light outlet path and cannot be used; under the above conditions, the detection integral value needs to be adjusted so that the lock point is automatically locked to 190 °, so that the outgoing light carrier is eliminated and can be used. Since the quadrature branch is locked in a state where 170 ° is the detected integral value of the quadrature branch of 0, the detected integral value is obtained in the above step S300, and the detected integral value and the phase change amount are linear in a small range, the obtained detected integral value is multiplied by 2, and the quadrature branch is locked to 190 °, thereby achieving the adjustment target.
In order to more clearly illustrate the effects of the lock point adjustment method provided by the embodiment of the present application, a specific embodiment is described below.
As shown in fig. 12 and 13, the embodiment of the present application is a constellation diagram and a spectrogram corresponding to offset points at 180 °, 180 ° and 90 ° under the specific non-ideal extinction ratio; at this time, the I-path and the Q-path are both set to 180 °, and the Phase between the two is set to 90 °, which indicates that the carrier wave cannot be eliminated and the spectral peak exists at-25 dB because the I-path and the Q-path do not deviate from 180 ° to compensate the insufficient extinction ratio of the other path.
As shown in fig. 14 and 15, the embodiment of the present application is a constellation diagram and a spectrogram obtained by performing monitoring processing with a complementary monitoring photodiode under the condition of specific non-ideal extinction ratio; at this time, because the complementary monitoring photodiode is used, the phase difference of the increase of the I path and the Q path in the 2×2 beam combiner is opposite to the output path, the locking result is that the locking value of the bias points of the I path and the Q path is close to the magnitude and opposite direction of the bias point locking value far away from 180 ° of the beam splitting monitoring photodiode of the output path, so that the carrier wave which is not eliminated is increased, the serious spectrum side peak-19 dB exists, and the locking result cannot be used.
As shown in fig. 16 and 17, the embodiment of the present application is a constellation diagram and a spectrogram obtained after optimization adjustment processing performed by the lock point adjustment method of the above embodiment under the condition of specific non-ideal extinction ratio; based on the locking point adjusting method of the embodiment, carrier elimination of the locking point is obviously optimized, spectrum side peaks reach-51 dB from-19 dB optimization, and a phase path is still automatically adjusted to be close to 90 degrees.
In addition, as shown in fig. 18, an embodiment of the present application further provides an electronic device 700, the electronic device 700 including:
Memory 720, processor 710, and computer programs stored on memory 720 and executable on processor 710.
Processor 710 and memory 720 may be connected by a bus or other means.
It should be noted that, the electronic device 700 in the present embodiment and the method for adjusting the locking point in the above embodiment belong to the same inventive concept, so that these embodiments have the same implementation principle and technical effect, and will not be described in detail herein.
The non-transitory software programs and instructions required to implement the lock point adjustment method of the above-described embodiments are stored in the memory 720, and when executed by the processor 710, the lock point adjustment method of the above-described embodiments is performed, for example, the method steps S100 to S500 in fig. 2, the method steps S210 to S230 in fig. 3, the method steps S221 to S224 in fig. 4, the method steps S225 to S228 in fig. 5, the method steps S2241 to S2242 in fig. 6, the method steps S2281 to S2282 in fig. 7, the method steps S110 to S120 in fig. 8, the method steps S510 to S520 in fig. 9, the method step S410 in fig. 10, and the method step S420 in fig. 11 described above are performed.
Furthermore, an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor 710, for example, by a processor 710 in the embodiment of the electronic device 700, and that cause the processor 710 to perform the lock point adjustment method in the embodiment described above, for example, the method steps S100 to S500 in fig. 2, the method steps S210 to S230 in fig. 3, the method steps S221 to S224 in fig. 4, the method steps S225 to S228 in fig. 5, the method steps S2241 to S2242 in fig. 6, the method steps S2281 to S2282 in fig. 7, the method steps S110 to S120 in fig. 8, the method steps S510 to S520 in fig. 9, the method step S410 in fig. 10, and the method step S420 in fig. 11 described above.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Claims (11)
1. A lock point adjustment method, comprising:
acquiring a first static bias point of the in-phase quadrature IQ modulator in a first locking state;
Replacing the first static bias point with an initial static bias point; the initial static bias point is used for representing a static bias point corresponding to the condition that the light output of an in-phase branch and a quadrature branch of the IQ modulator is minimum;
Detecting the jitter signal of the IQ modulator based on the first locking state and the initial static bias point to obtain a detection integral value;
adjusting the detection integral value according to a preset strategy;
and locking the IQ modulator according to the adjusted detection integral value.
2. The lock point adjustment method of claim 1, wherein the initial static bias point comprises a first in-phase leg bias point and a first quadrature leg bias point; the initial static bias point is obtained by:
setting a first initial bias point of the in-phase branch and a second initial bias point of the quadrature branch;
Performing first iterative optimization processing on the first initial bias point to obtain a second in-phase branch bias point; performing second iterative optimization processing on the second initial bias points to obtain second orthogonal branch bias points;
And under the condition that the second in-phase branch offset point and the second quadrature branch offset point are smaller than a preset threshold value, determining the second in-phase branch offset point as the first in-phase branch offset point and determining the second quadrature branch offset point as the first quadrature branch offset point.
3. The method of claim 2, wherein performing a first iterative optimization process on the first initial bias point comprises:
performing first phase scanning processing on the IQ modulator and recording a first photoelectric current value;
adding a preset first phase transformation value to the first initial bias point to obtain a first adjustment bias point;
based on the first adjustment bias point, performing second phase scanning processing on the IQ modulator, and recording a second photoelectric current value;
and adjusting the first initial bias point according to the first photoelectric value and the second photoelectric value.
4. The method of claim 2, wherein performing a second iterative optimization process on the second initial bias point comprises:
Performing third phase scanning processing on the IQ modulator, and recording a third photoelectric current value;
adding a preset second phase transformation value to the second initial bias point to obtain a second adjustment bias point;
based on the second adjustment bias point, performing fourth phase scanning processing on the IQ modulator, and recording a fourth photoelectric current value;
and adjusting the second initial bias point according to the third photoelectric value and the fourth photoelectric value.
5. The method of claim 3, wherein said adjusting said first initial bias point according to said first and second photoelectric values comprises at least one of:
Determining the first adjustment bias point as the new first initial bias point if the second photo current value is less than the first photo current value;
in the case where the second photoelectric current value is greater than or equal to the first photoelectric current value, the first initial bias point is determined as a new first initial bias point, and the first phase conversion value is taken as a negative sign.
6. The method according to claim 4, wherein the adjusting the second initial bias point according to the third photoelectric value and the fourth photoelectric value includes at least one of:
determining the second adjustment bias point as the new second initial bias point if the fourth photo current value is less than the third photo current value;
In the case where the fourth photoelectric current value is greater than or equal to the third photoelectric current value, the second initial bias point is determined as the new second initial bias point, and the second phase conversion value is taken as a negative sign.
7. The lock point adjustment method of claim 1, wherein the obtaining a first static bias point of the IQ modulator in a first locked state comprises:
Inputting a jitter adjusting signal to the IQ modulator and performing bias point adjustment processing on the IQ modulator so that the IQ modulator is in the first locking state, wherein in the first locking state, detection integral values of the in-phase branch, the quadrature branch and a phase branch between the in-phase branch and the quadrature branch are all 0;
Determining a bias point of the IQ modulator in the first locked state as the first static bias point.
8. The lock point adjustment method according to claim 1, characterized in that the lock processing of the IQ modulator according to the adjusted detected integration value includes:
determining the adjusted detection integral value as a target locking value;
and locking the IQ modulator according to the target locking value.
9. The lock point adjustment method according to claim 1, wherein the adjustment of the detected integration value according to a preset strategy includes one of:
amplifying the detection integral value by a preset multiple;
and adding a preset integral value to the detection integral value.
10. An electronic device, comprising:
Memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the lock point adjustment method according to any one of claims 1 to 9 when the computer program is executed.
11. A computer-readable storage medium storing computer-executable instructions for performing the lock point adjustment method according to any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211301291.9A CN117978284A (en) | 2022-10-24 | 2022-10-24 | Lock point adjustment method, electronic device, and computer-readable storage medium |
| PCT/CN2023/110570 WO2024087775A1 (en) | 2022-10-24 | 2023-08-01 | Locking point adjustment method, electronic device and computer-readable storage medium |
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| CN202211301291.9A CN117978284A (en) | 2022-10-24 | 2022-10-24 | Lock point adjustment method, electronic device, and computer-readable storage medium |
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| JP2011232553A (en) * | 2010-04-28 | 2011-11-17 | Mitsubishi Electric Corp | Optical transmitter, optical communication system and modulation method |
| CN106936746B (en) * | 2015-12-31 | 2020-01-31 | 海思光电子有限公司 | method and device for locking phase bias point of DP-QPSK modulator |
| US10509243B2 (en) * | 2017-03-15 | 2019-12-17 | Elenion Technologies, Llc | Bias control of optical modulators |
| CN114137744A (en) * | 2021-11-29 | 2022-03-04 | 武汉光迅科技股份有限公司 | Method and device for controlling bias working point of modulator |
| CN114745060B (en) * | 2022-04-15 | 2023-09-22 | 烽火通信科技股份有限公司 | Bias control method and system for optical modulator |
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