CN117976650A - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN117976650A CN117976650A CN202211296375.8A CN202211296375A CN117976650A CN 117976650 A CN117976650 A CN 117976650A CN 202211296375 A CN202211296375 A CN 202211296375A CN 117976650 A CN117976650 A CN 117976650A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 230000000630 rising effect Effects 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims description 111
- 239000002184 metal Substances 0.000 claims description 111
- 239000000463 material Substances 0.000 claims description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000010941 cobalt Substances 0.000 claims description 3
- 229910017052 cobalt Inorganic materials 0.000 claims description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 3
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 description 22
- 230000001965 increasing effect Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000001174 ascending effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Abstract
A semiconductor structure and a method of forming the same, the structure comprising: a substrate; the inductance structure is located on the substrate and comprises a plurality of coils which are spirally distributed in a rising mode, wherein the coils comprise a first coil and a second coil, the first coil surrounds the second coil, and the width of the second coil is smaller than that of the first coil. The quality factor of the semiconductor structure is improved.
Description
Technical Field
The present disclosure relates to semiconductor manufacturing, and more particularly, to a semiconductor structure and a method for forming the semiconductor structure.
Background
The self-resonant frequency (SRF) is one of the key factors reflecting the inductive mass. The higher the self-resonant frequency, the wider the effective operating frequency. Currently, the self-resonant frequency of spiral inductors is mainly affected by the coupling capacitance between coils and the substrate.
Reducing the coupling capacitance helps to increase the self-resonant frequency of the inductor, thereby increasing the quality factor of the inductor.
Disclosure of Invention
The invention provides a method for forming a semiconductor structure to improve the quality factor of an inductor.
In order to solve the above technical problems, the present invention provides a semiconductor structure, including: a substrate; the inductance structure is positioned on the substrate and comprises a plurality of coils which are spirally distributed in a rising mode, the coils comprise a first coil and a second coil, the first coil surrounds the second coil, and the width of the second coil is smaller than that of the first coil.
Optionally, the second type of coil has a width less than 18% of the width of the first type of coil.
Optionally, the number of coils of the second type of coils is at least 1 coil.
Optionally, the number of coils of the second type of coils is greater than the number of coils of the first type of coils.
Optionally, the coil structure includes a first end and a second end, the first end is a port of an outermost coil of the first type coil, and the second end is a port of an innermost coil of the second type coil; the semiconductor structure further includes: a first conductive structure connected to the first end; a second conductive structure connected to the second end, the second conductive structure comprising: the first metal layer and the second metal layer are arranged on the first metal layer, the second metal layer and the first conductive structure are of the same layer of metal, and the first metal layer and the innermost coil are of the same layer of metal.
Optionally, the method further comprises: a dielectric layer located between the first metal layer and the second metal layer; and a connecting plug in the dielectric layer, wherein the first metal layer and the second metal layer are electrically connected through the connecting plug.
Optionally, the first conductive structure and the second conductive structure are of the same material as the coil.
Optionally, the material of the coil comprises a metal or metal nitride; the metal comprises: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel, and tantalum; the metal nitride comprises a combination of one or more of tantalum nitride and titanium nitride.
Optionally, the method further comprises: an insulating layer between the coil structure and the substrate.
Correspondingly, the technical scheme of the invention also provides a method for forming the semiconductor structure, which comprises the following steps: providing a substrate; an inductance structure is formed on the substrate and comprises a plurality of coils which are spirally distributed in a rising mode, the coils comprise a first coil and a second coil, the first coil surrounds the second coil, and the width of the second coil is smaller than that of the first coil.
Optionally, the second type of coil has a width less than 18% of the width of the first type of coil.
Optionally, the number of coils of the second type of coils is at least 1 coil.
Optionally, the number of coils of the second type of coils is greater than the number of coils of the first type of coils.
Optionally, the coil structure includes a first end and a second end, the first end is a port of an outermost coil of the first type coil, and the second end is a port of an inner coil of the second type coil; further comprises: forming a first conductive structure connected with the first end; forming a second conductive structure connected to the second end, the second conductive structure comprising: the first metal layer and the second metal layer are arranged on the first metal layer, the second metal layer and the first conductive structure are of the same layer of metal, and the first metal layer and the innermost coil are of the same layer of metal.
Optionally, the method further comprises: forming a dielectric layer between the first metal layer and the second metal layer; a connecting plug is formed in the dielectric layer, and the first metal layer and the second metal layer are electrically connected through the connecting plug.
Optionally, before forming the coil structure on the substrate, the method further includes: an insulating layer is formed between the coil structure and the substrate.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
according to the technical scheme, the width of the second coil positioned at the inner ring is smaller than that of the first coil positioned at the outer ring, so that on one hand, the distance between adjacent coils of the second coil is increased, and parasitic capacitance generated between the adjacent coils of the second coil is reduced; on the other hand, the area of the second type coil on the substrate is reduced, so that the parasitic capacitance between the second type coil and the substrate is also reduced, the parasitic capacitance generated by the second type coil is reduced as a whole, and the self-resonance frequency of the inductance structure is improved.
Further, the second conductive structure connected to the second end includes a first metal layer and a second metal layer on the first metal layer, a dielectric layer is disposed between the first metal layer and the second metal layer, and a parasitic capacitance is also disposed between the first metal layer and the second metal layer. Therefore, the reduced parasitic capacitance of the second coil can be offset to the greatest extent, so that the parasitic capacitance finally generated by the first coil and the second coil is relatively balanced, the self-resonance frequency of the first end of the first coil and the second end of the second coil is balanced, and the performances of the first end and the second end of the coil structure are symmetrical, thereby being better applied.
Drawings
FIGS. 1 and 2 are schematic diagrams of a semiconductor structure in one embodiment;
Fig. 3 and 4 are schematic views of a semiconductor structure in an embodiment of the present invention.
Detailed Description
As in the background art, reducing the coupling capacitance helps to increase the self-resonant frequency of the inductor, thereby increasing the quality factor of the inductor. The analysis will now be described with reference to specific examples.
Fig. 1 and 2 are schematic diagrams of a semiconductor structure in an embodiment.
Referring to fig. 1 and 2, fig. 1 is a top view of a semiconductor structure, and fig. 2 is a perspective view of the inductor structure in fig. 1, where the semiconductor structure includes: a substrate 100; an insulating layer (not shown) on the substrate 100; the inductance structure is positioned on the insulating layer and comprises a plurality of coils 101, the coils 101 are spirally distributed in a rising mode, the inductance structure comprises a first end P1 and a second end P2, the first end P1 is a port of the outermost coil, and the second end P2 is a port of the innermost coil; a first conductive structure 103 connected to the first port P1; a second conductive structure connected to the second end P2, the second conductive structure including: the first metal layer 104 and the second metal layer 105 on the first metal layer 104, the second metal layer 105 and the first conductive structure 103 are the same layer of metal, and the first metal layer 104 and the innermost coil are the same layer of metal; a dielectric layer 106 located between the first metal layer 104 and the second metal layer 105; a connection plug (not shown) is located within the dielectric layer 106, through which the first metal layer 104 and the second metal layer 105 are electrically connected.
In the semiconductor structure, the first conductive structure 103 and the second conductive structure are used to electrically connect the inductance structure with an external circuit. Because the coils 101 of the inductance structure are distributed in a spiral rising trend, the innermost coil and the outermost coil are located in different metal layers, so that the second conductive structure needs to be provided with a layer of second metal layer 105 on the first metal layer 104, so as to be connected with the first conductive structure 103 and the metal layers conveniently. Therefore, compared to the first conductive structure 103, the second conductive structure connected to the second end P2 increases the parasitic capacitance between the first metal layer 104 and the second metal layer 105, so that the parasitic capacitance of the first end P1 and the second end P2 of the inductor structure is unbalanced, and the self-resonance frequency of the first end P1 and the second end P2 of the inductor structure is unbalanced, which affects the application of the semiconductor structure.
In order to solve the above problems, the present invention provides a semiconductor structure and a method for forming the semiconductor structure, in which the width of a second coil located in an inner ring is smaller than the width of a first coil located in an outer ring, on the one hand, the distance between adjacent coils of the second coil is increased, and the parasitic capacitance generated between adjacent coils of the first coil is reduced; on the other hand, the area of the second type coil on the substrate is reduced, so that the parasitic capacitance between the second type coil and the substrate is also reduced, the parasitic capacitance generated by the second type coil is reduced as a whole, and the self-resonance frequency of the inductor is improved.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 3 and 4 are schematic views of a semiconductor structure in an embodiment of the present invention.
Referring to fig. 3 and 4, fig. 3 is a top view of fig. 4, fig. 4 is a schematic structural view of fig. 3 along a section line AA1, and the semiconductor structure includes:
A substrate 200;
The inductance structure is located on the substrate 200, and the inductance structure comprises a plurality of coils, the coils are distributed in a spiral ascending mode, the coils comprise a first coil 201 and a second coil 202, the first coil 201 surrounds the second coil 202, and the width of the second coil 202 is smaller than that of the first coil 201.
In the semiconductor structure, by making the width of the second-type coil 202 located at the inner ring smaller than the width of the first-type coil 201 located at the outer ring, on the one hand, the space between adjacent coils of the second-type coil 202 increases, so that parasitic capacitance generated between adjacent coils of the second-type coil 202 decreases; on the other hand, the area of the second type coil 202 on the substrate 200 is reduced, so that the parasitic capacitance between the second type coil 202 and the substrate 200 is also reduced, thereby reducing the parasitic capacitance generated by the second type coil 202 as a whole and improving the self-resonance frequency of the inductance structure.
In this embodiment, the width of the second coil 202 is less than 18% of the width of the first coil 201, so as to ensure that the parasitic capacitance of the second coil 202 is reduced to a degree that can cancel the parasitic capacitance added by the second conductive structure.
The number of turns of the second type of coil 202 is at least 1 coil. In the present embodiment, the number of coils of the first type 201 is 1, and the number of coils of the second type 202 is several, one of which is schematically shown in the figure.
In the present embodiment, the number of coils of the second type coil 202 is larger than the number of coils of the first type coil 201. To ensure that the parasitic capacitance of the second type coil 202 is reduced to the extent that it counteracts the parasitic capacitance added by the second conductive structure.
With continued reference to fig. 3 and 4, in the present embodiment, the coil structure includes a first end P1 and a second end P2, the first end P1 is a port of an outermost coil of the first type coil 201, and the second end P2 is a port of an innermost coil of the second type coil 202.
With continued reference to fig. 3 and fig. 4, in this embodiment, the method further includes: a first conductive structure 203 connected to the first end P1; a second conductive structure connected to the second end P2, the second conductive structure including: the first metal layer 204 and the second metal layer 207 on the first metal layer 204, the second metal layer 207 and the first conductive structure 203 are the same metal, and the first metal layer 204 and the innermost coil are the same metal. Thus, the first metal layer 204 and the innermost coil can be formed by adopting one process flow, and the first conductive structure 203 and the second metal layer 207 can be formed by adopting one process flow, so that the process flow is simplified.
With continued reference to fig. 3 and fig. 4, in this embodiment, the method further includes: a dielectric layer 205 located between the first metal layer 204 and the second metal layer 207; a connection plug 206 located within the dielectric layer 205, the first metal layer 204 and the second metal layer 207 being electrically connected by the connection plug 206.
The second conductive structure connected to the second terminal P2 includes a first metal layer 204 and a second metal layer 207 on the first metal layer 204, with a dielectric layer 205 between the first metal layer 204 and the second metal layer 207, and a parasitic capacitance between the first metal layer 204 and the second metal layer 207. Therefore, the reduced parasitic capacitance of the second coil 202 with reduced width can offset the parasitic capacitance increased by the second conductive structure of the second end P2 to the greatest extent, so that the parasitic capacitances finally generated by the first coil 201 and the second coil 202 are relatively balanced, the self-resonance frequency of the first end P1 of the first coil 201 and the second end P2 of the second coil 202 is balanced, and the performances of the first end P1 and the second end P2 of the coil structure are symmetrical, thereby being better applied.
In this embodiment, the material of the first conductive structure 203 and the second conductive structure is the same as the material of the coil. Therefore, the first conductive structure 203, the second conductive structure and the coil forming process can be combined, and the process flow is simplified.
In this embodiment, the material of the coil includes a metal or a metal nitride; the metal comprises: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel, and tantalum; the metal nitride comprises a combination of one or more of tantalum nitride and titanium nitride.
In this embodiment, further comprising: an insulating layer (not shown) between the coil structure and the substrate 200. The material of the insulating layer comprises an insulating material that enables electrical isolation between the coil structure and the substrate 200.
Correspondingly, the technical scheme of the invention also provides a method for forming the semiconductor structure shown in fig. 3 and 4, which comprises the following steps: providing a substrate 200; an inductance structure is formed on the substrate 200, the inductance structure includes a plurality of coils, the coils are spirally distributed, the coils include a first coil 201 and a second coil 202, the first coil 201 surrounds the second coil 202, and the width of the second coil 202 is smaller than the width of the first coil 201.
In this embodiment, the coil structure includes a first end P1 and a second end P2, where the first end P1 is a port of an outermost coil of the first type coil 201, and the second end P2 is a port of an inner coil of the second type coil 202; further comprises: forming a first conductive structure 203 connected to the first end P1; forming a second conductive structure connected to the second end P2, the second conductive structure including: the first metal layer 204 and the second metal layer 207 on the first metal layer 204, the second metal layer 207 and the first conductive structure 203 are the same metal, and the first metal layer 204 and the innermost coil are the same metal.
In this embodiment, further comprising: forming a dielectric layer 205 between the first metal layer 204 and the second metal layer 207; a connection plug 206 is formed in the dielectric layer 205, and the first metal layer 204 and the second metal layer 207 are electrically connected through the connection plug 206.
In this embodiment, further comprising: an insulating layer (not shown) is formed between the coil structure and the substrate 200.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.
Claims (16)
1. A semiconductor structure, comprising:
A substrate;
The inductance structure is located on the substrate and comprises a plurality of coils which are spirally distributed in a rising mode, wherein the coils comprise a first coil and a second coil, the first coil surrounds the second coil, and the width of the second coil is smaller than that of the first coil.
2. The semiconductor structure of claim 1, wherein a width of the second type of coil is less than 18% of a width of the first type of coil.
3. The semiconductor structure of claim 1, wherein the second type of coil has a coil count of at least 1 coil.
4. The semiconductor structure of claim 3, wherein the number of coils of the second type of coils is greater than the number of coils of the first type of coils.
5. The semiconductor structure of claim 1, wherein the coil structure comprises a first end and a second end, the first end being a port of an outermost coil of the first type of coil and the second end being a port of an innermost coil of the second type of coil; the semiconductor structure further includes: a first conductive structure connected to the first end; a second conductive structure connected to the second end, the second conductive structure comprising: the first metal layer and the second metal layer are arranged on the first metal layer, the second metal layer and the first conductive structure are the same layer of metal, and the first metal layer and the innermost coil are the same layer of metal.
6. The semiconductor structure of claim 5, further comprising: a dielectric layer located between the first metal layer and the second metal layer; and the connecting plug is positioned in the dielectric layer, and the first metal layer and the second metal layer are electrically connected through the connecting plug.
7. The semiconductor structure of claim 5, wherein a material of the first conductive structure and the second conductive structure is the same as a material of the coil.
8. The semiconductor structure of claim 1, wherein the material of the coil comprises a metal or a metal nitride; the metal comprises: a combination of one or more of copper, aluminum, tungsten, cobalt, nickel, and tantalum; the metal nitride includes one or more combinations of tantalum nitride and titanium nitride.
9. The semiconductor structure of claim 1, further comprising: an insulating layer between the coil structure and the substrate.
10. A method of forming a semiconductor structure, comprising:
Providing a substrate;
an inductance structure is formed on a substrate and comprises a plurality of coils which are spirally distributed in a rising mode, wherein the coils comprise a first coil and a second coil, the first coil surrounds the second coil, and the width of the second coil is smaller than that of the first coil.
11. The method of forming a semiconductor structure of claim 10, wherein a width of said second type of coil is less than 18% of a width of said first type of coil.
12. The method of forming a semiconductor structure of claim 10, wherein the second type of coil has a number of turns of at least 1 coil.
13. The method of forming a semiconductor structure of claim 12, wherein the number of coils of the second type of coil is greater than the number of coils of the first type of coil.
14. The method of forming a semiconductor structure of claim 10, wherein the coil structure comprises a first end and a second end, the first end being a port of an outermost coil of a first type of coil, the second end being a port of an inner coil of a second type of coil; further comprises: forming a first conductive structure connected with the first end; forming a second conductive structure connected to the second end, the second conductive structure comprising: the first metal layer and the second metal layer are arranged on the first metal layer, the second metal layer and the first conductive structure are the same layer of metal, and the first metal layer and the innermost coil are the same layer of metal.
15. The method of forming a semiconductor structure of claim 14, further comprising: forming a dielectric layer between the first metal layer and the second metal layer; and forming a connecting plug in the dielectric layer, wherein the first metal layer and the second metal layer are electrically connected through the connecting plug.
16. The method of forming a semiconductor structure of claim 10, further comprising, prior to forming a coil structure on the substrate: an insulating layer is formed between the coil structure and the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211296375.8A CN117976650A (en) | 2022-10-21 | 2022-10-21 | Semiconductor structure and forming method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211296375.8A CN117976650A (en) | 2022-10-21 | 2022-10-21 | Semiconductor structure and forming method thereof |
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| Publication Number | Publication Date |
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| CN117976650A true CN117976650A (en) | 2024-05-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202211296375.8A Pending CN117976650A (en) | 2022-10-21 | 2022-10-21 | Semiconductor structure and forming method thereof |
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| CN (1) | CN117976650A (en) |
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- 2022-10-21 CN CN202211296375.8A patent/CN117976650A/en active Pending
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