CN117971741B

CN117971741B - Interconnection link control method and device, storage medium and electronic equipment

Info

Publication number: CN117971741B
Application number: CN202410376240.5A
Authority: CN
Inventors: 孙秀强; 刘宝俊; 姚藩益
Original assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Current assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Priority date: 2024-03-29
Filing date: 2024-03-29
Publication date: 2024-05-28
Anticipated expiration: 2044-03-29
Also published as: CN117971741A

Abstract

The embodiment of the application provides a control method and device of an interconnection link, a storage medium and electronic equipment, wherein the method comprises the following steps: reading first device information of a target storage device from a designated configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on a server main board through a designated interconnection link, and the first device information is used for indicating a device type of the target storage device; acquiring second device information of the target storage device under the condition that the target storage device is determined to be a storage device of a specified type according to the first device information, wherein the second device information is used for indicating a specified interconnection link used by the connection of the target storage device and a target processor; the volume management device VMD function of the target interconnect link indicated by the second device information is set to an enabled state, wherein the VMD function matches a specified type of storage device.

Description

Interconnection link control method and device, storage medium and electronic equipment

Technical Field

The embodiment of the application relates to the field of computers, in particular to a control method and device of an interconnection link, a storage medium and electronic equipment.

Background

At present, the VMD functions of the interconnection links in the related art are closed by default, and when the VMD functions are used, it is required to determine which interconnection link of the processor uses a storage device of a specific type matched with the VMD functions, and the VMD functions of the corresponding interconnection links are opened in advance, or the VMD functions of the interconnection links are opened by a tool under the interconnection link where the storage device of the specific type is confirmed, however, the opening mode of the VMD functions of the interconnection links set by adopting the method is time-consuming, once the position of the storage device of the specific type of the server is changed, the VMD functions of the corresponding interconnection links need to be reset, and the interconnection link where the storage device of the specific type is not automatically identified, and the corresponding interconnection link is set to enable the VMD functions. As can be seen from this, the control method of the interconnect link in the related art has a problem in that the VMD function setting of the interconnect link is time-consuming.

Disclosure of Invention

The embodiment of the application provides a control method and device of an interconnection link, a storage medium and electronic equipment, which at least solve the problem that the VMD function setting time-consuming of the interconnection link exists in the control method of the interconnection link in the related technology.

According to an embodiment of the present application, there is provided a control method of an interconnection link, applied to a server including a server motherboard, a processor on the server motherboard allowing connection with a storage device of a specified type through a specified interconnection link, including: reading first device information of a target storage device from a designated configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on the server main board through a designated interconnection link, and the first device information is used for indicating a device type of the target storage device; acquiring second device information of the target storage device under the condition that the target storage device is determined to be the storage device of the specified type according to the first device information, wherein the second device information is used for indicating the specified interconnection link used by the connection of the target storage device and the target processor; and setting a Volume Management Device (VMD) function of a target interconnection link indicated by the second device information to an enabled state, wherein the VMD function is matched with the storage device of the specified type.

According to another embodiment of the present application, there is provided a control apparatus of an interconnection link, applied to a server including a server motherboard, a processor on the server motherboard allowing connection with a storage device of a specified type through a specified interconnection link, including: a reading unit, configured to read first device information of a target storage device from a designated configuration space of the target storage device, where the target storage device is a storage device connected to a target processor on the server motherboard through one designated interconnection link, and the first device information is used to indicate a device type of the target storage device; an obtaining unit, configured to obtain second device information of the target storage device, where the second device information is used to indicate the specified interconnection link used by the target storage device to connect to the target processor, where the target storage device is determined to be the storage device of the specified type according to the first device information; a setting unit configured to set a volume management device VMD function of a target interconnect link indicated by the second device information to an enabled state, wherein the VMD function matches the specified type of storage device.

According to a further embodiment of the application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.

According to a further embodiment of the application there is also provided an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.

According to a further embodiment of the application, there is also provided a computer program product comprising a computer program which, when executed by a processor, implements the steps of any of the method embodiments described above.

According to the application, a processor on a server main board is connected with a target storage device through an interconnection link, a basic input output system BIOS (Basic Input Output System ) determines whether the target storage device is a storage device of a specified type based on first device information of the target storage device read from a specified configuration space of the target storage device, and under the condition that the target storage device is determined to be the storage device of the specified type, second device information for indicating the specified interconnection link used by the target storage device connected with the target processor is acquired, and a volume management device VMD function of the target interconnection link indicated by the second device information is enabled to be set to be an enabling state.

Drawings

Fig. 1 is a hardware block diagram of a server apparatus of a control method of an interconnection link according to an embodiment of the present application;

FIG. 2 is a flow chart of a method of controlling an interconnect link according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a method of controlling an interconnect link according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a server motherboard according to an embodiment of the present application;

FIG. 5 is a flow chart of another method of controlling an interconnect link according to an embodiment of the present application;

FIG. 6 is a flow chart of a method of controlling an interconnect link according to an embodiment of the present application;

fig. 7 is a block diagram of an alternative control device for an interconnection link according to an embodiment of the present application.

Detailed Description

Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the application only and is not intended to be limiting of the application.

The method embodiments provided in the embodiments of the present application may be executed in a server apparatus or similar computing device. Taking the operation on the server device as an example, fig. 1 is a block diagram of the hardware structure of the server device of a control method of an interconnection link according to an embodiment of the present application. As shown in fig. 1, the server device may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU, a programmable logic device FPGA, or the like processing means) and a memory 104 for storing data, wherein the server device may further include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those of ordinary skill in the art that the architecture shown in fig. 1 is merely illustrative and is not intended to limit the architecture of the server apparatus described above. For example, the server device may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.

The memory 104 may be used to store a computer program, for example, a software program of application software and a module, such as a computer program corresponding to a method for controlling an interconnection link in an embodiment of the present application, and the processor 102 executes the computer program stored in the memory 104, thereby performing various functional applications and data processing, that is, implementing the method described above. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located with respect to the processor 102, which may be connected to the server device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device 106 is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of a server device. In one example, the transmission device 106 includes a NIC (Network Interface Controller, network adapter) that can communicate with other network devices via a base station to communicate with the internet. In one example, the transmission device 106 may be an RF (Radio Frequency) module for communicating with the internet wirelessly.

In this embodiment, a method for controlling an interconnection link is provided, and fig. 2 is a schematic flow chart of a method for controlling an interconnection link according to an embodiment of the present application, as shown in fig. 2, where the flow chart includes the following steps:

in step S202, first device information of the target storage device is read from a designated configuration space of the target storage device, where the target storage device is a storage device connected to a target processor on a server motherboard through a designated interconnection link, and the first device information is used to indicate a device type of the target storage device.

The control method of the interconnection link in the present embodiment can be applied to a scenario of controlling the VMD function of the interconnection link. The server comprises a server main board, and a processor on the server main board is allowed to be connected with a storage device of a specified type through a specified interconnection link.

The traditional VMD function is closed by default and needs to be clear under which interconnection link of a CPU (Central Processing Unit, processor) is used, the storage device of a specified type is used, and the corresponding VMD function is started in advance, or the VMD function is started under the specified interconnection link where the storage device of the specified type is confirmed to be located by a tool, the starting modes of the VMD function are time-consuming, and once the position of the storage device of the specified type of the server is changed, the specified interconnection link where the storage device of the specified type is located needs to be reset and cannot be intelligently identified, and the VMD function is enabled.

In order to at least partially solve the above-mentioned problem, in this embodiment, by dynamically identifying a storage device of a specified type and turning on a VMD function of a specified interconnect link where the storage device of the specified type is located, it is unnecessary to manually or after confirming that the storage device of the specified type is configured to set the VMD function, thereby meeting the requirement of dynamically setting the VMD function of the specified interconnect link.

In this embodiment, the target storage device is a storage device connected to a target processor on a server motherboard through a specified interconnection link, and the specified configuration space of the target storage device stores all information required by the target storage device during operation, for example, manufacturer, device identifier, device function, resource requirement, processing capability, and the like, and reads first device information of the target storage device from the specified configuration space of the target storage device, where the first device information is used to indicate a device type of the target storage device, and based on this, the specific type of the target storage device can be determined by reading the first device information of the target storage device from the specified configuration space of the target storage device, for example, it is determined that the target storage device is a storage device of the specified type.

In step S204, in the case that the target storage device is determined to be a storage device of a specified type according to the first device information, second device information of the target storage device is acquired, where the second device information is used to indicate a specified interconnection link used by the target storage device to connect to the target processor.

Similar to the previous embodiments, the target storage device is a storage device connected to the target processor on the server motherboard via a specified interconnect link, based on which the specified interconnect link used by the target storage device to connect to the target processor can be determined based on the second device information of the target storage device in the case where the target storage device is connected to the target processor via a specified interconnect link.

In step S206, the volume management device VMD function of the target interconnect link indicated by the second device information is set to an enabled state, wherein the VMD function matches with the specified type of storage device.

Here, the target interconnect link indicated by the second device information is a specified interconnect link used by the target storage device (storage device of the specified type) to connect with the target processor. The VMD function is matched with the storage device of the appointed type, so that the VMD function of the target interconnection link can improve the data reading and writing efficiency of the storage device of the appointed type and reduce the delay time; the hot plug function can be supported, and the reporting of error information caused by the hot plug function is reduced; the disk array backup function of the storage device of the specified type can be supported; the malfunction lighting function of the specified type of storage device can be supported.

Reading first device information of a target storage device from a designated configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on a server motherboard through a designated interconnection link, and the first device information is used for indicating a device type of the target storage device; acquiring second device information of the target storage device under the condition that the target storage device is determined to be a storage device of a specified type according to the first device information, wherein the second device information is used for indicating a specified interconnection link used by the connection of the target storage device and a target processor; the VMD function of the volume management device of the target interconnection link indicated by the second device information is set to an enabled state, wherein the VMD function is matched with the storage device of the specified type, and the problem that the VMD function setting of the interconnection link is long in time consumption in the control method of the interconnection link in the related art is solved.

In one exemplary embodiment, the interconnect link is designated as a Peripheral Component Interconnect (PCI) link, the configuration space is designated as a PCI configuration space, and the device connected to the processor on the server motherboard through the PCI link is a PCI device;

Reading first device information of the target storage device from a designated configuration space of the target storage device, including:

S11, reading configuration information of a designated information type from a PCI configuration space of the target storage device to obtain first device information, wherein the designated information type comprises at least one of the following: type, subtype, message type.

And simultaneously judging three information of the type, the subtype and the device message type of the PCI configuration space of the current PCI device by reading the PCI configuration space of the current device for each PCI (PERIPHERAL COMPONENT INTERCONNECT, peripheral device interconnection standard) device.

The PCI configuration space contains information such as a vendor ID (Identity document, identification) of the PCI device, a device ID, a subsystem vendor ID, a subsystem ID, etc., the vendor ID and the device ID may determine a vendor and a device type of the device, and the subsystem vendor ID and the subsystem ID may determine a specific model and version of the device, i.e., determine a subtype of the PCI device, and the device message type indicates a type of a specific interaction message of the PCI device, for example, by checking whether the current PCI device supports a communication protocol corresponding to a specific type of storage device through the device message type information in the PCI configuration space.

Through the embodiment, by judging three kinds of information of the PCI configuration space type, the subtype and the device message type of the current PCI device at the same time, whether the current PCI device is a storage device of a designated type can be determined, and the accuracy of judging the PCI device can be improved.

In one exemplary embodiment, the specified type of storage device is a nonvolatile memory host controller interface specification NVME hard disk;

After the first device information of the target storage device is read from the designated configuration space of the target storage device, the method further includes:

And S21, matching the first device information with the hard disk information of the NVME hard disk according to the specified information type so as to judge whether the target storage device is the NVME hard disk.

Similar to the previous embodiment, the BIOS reads the PCI configuration space of the PCI device and determines the type, subtype, device type, and confirms whether the current PCI device is an NVME (Non Volatile Memory Host Controller Interface Specification Express, nonvolatile memory host controller interface specification) hard disk device.

And simultaneously judging three types of information of the PCI configuration space, the subtype and the equipment message type of the current PCI equipment, and determining that the PCI equipment at the moment is an NVME hard disk when the information is checked to be consistent with the NVME hard disk.

In one exemplary embodiment, the interconnect link is designated as a Peripheral Component Interconnect (PCI) link, and the device connected to the processor on the server motherboard through the PCI link is a PCI device;

in the case where the target storage device is determined to be a storage device of a specified type based on the first device information, obtaining second device information of the target storage device includes:

S31, acquiring a group of device numbers of the target storage device under the condition that the target storage device is determined to be a storage device of a specified type according to the first device information;

S32, determining the PCI bus number of the target storage device and the PCI device number of the target storage device in the group of device numbers of the target storage device as second device information.

In the case where it is determined that the current PCI device is a storage device of a specified type, a set of device numbers of the current PCI device may be acquired through the PCI protocol, and a specified interconnect link, i.e., a target interconnect link, used by the current PCI device to connect with the target processor may be determined based on the PCI BUS number (i.e., BUS number) in the set of device numbers of the PCI device and the PCI device number (i.e., DEV number) of the target storage device.

In one exemplary embodiment, in a case where it is determined from the first device information that the target storage device is a storage device of a specified type, acquiring a set of device numbers of the target storage device includes:

s41, checking a group of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the group of device numbers comprise a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device and a PCI function number of the target storage device.

The set of device numbers of the target storage device may correspond to the unique identification "Seg" of the PCI device: bus: dev: fun "number, when booted up, checks the unique identifier" Seg "of the PCI device in the PCI device driver: bus: dev: fun ", a Segment number (i.e., segment number) corresponding to a PCI device, a PCI bus number (i.e., bus number) corresponding to a PCI device, a PCI device number (i.e., device number), and a PCI function number (i.e., function number) are determined. And operating the PCI device driver according to the requirement to obtain a group of device numbers corresponding to all the storage devices of the designated types which are connected currently.

In one exemplary embodiment, the designated interconnect link comprises a Peripheral Component Interconnect (PCI) link, the target interconnect link comprises a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus through the first PCI bridge link, the target storage device is connected to the target PCI bus through the second PCI bridge link, and the second device information comprises a PCI bus number of the target storage device and a PCI bus number of the target storage device;

after obtaining the second device information of the target storage device, the method further includes:

S51, determining a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on the PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device is used for indicating a target processor and a processor slot corresponding to a first PCI bridge link on the target processor, and the PCI bus port number corresponding to the target storage device is used for indicating a target PCI bus;

S52, determining bandwidth splitting information of a second PCI bridge link based on the PCI device number of the target storage device, wherein the bandwidth splitting information of the second PCI bridge link is used for indicating the bandwidth split to the second PCI bridge link from the bandwidth of the target PCI bus so as to indicate the position of the target storage device on the target PCI bus;

The target interconnection link is represented by a processor slot number corresponding to the target storage device, a PCI bus port number corresponding to the target storage device, and bandwidth split information of the second PCI bridge link.

In connection with fig. 3, a target interconnect link used by a target storage device to connect with a target processor includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected with the target PCI bus through the first PCI bridge link, the target storage device is connected with the target PCI bus through the second PCI bridge link, and the second device information includes a PCI bus number of the target storage device and a PCI device number of the target storage device.

For example, in this embodiment, starting to mainly read the BUS number of the NVME hard disk, further acquiring the information such as the CPU slot number, the PCI BUS port number, and the like of the current NVME hard disk through the BUS number of the NVME hard disk, and meanwhile, confirming the bandwidth splitting information of the PCI link according to the Dev number of the NVME disk, so as to accurately locate the accurate information of the CPU slot number, the PCI link number, and the PCI link bandwidth splitting condition of the current NVME hard disk.

In one exemplary embodiment, the number range of the PCI bus number of one processor on the server motherboard is set based on the total number of processors on the server motherboard;

The PCI device numbers are used for indicating the bandwidth types of the bandwidths of the PCI links corresponding to the servers, and the PCI device numbers corresponding to different bandwidth types are at least partially different.

For example, in the present embodiment, the total number of BUS of the server system is 256, and when there are two processors on the server motherboard, the number range of the PCI BUS number of one processor is 0 to 80H (hexadecimal), and the number range of the PCI BUS number of the other processor is 80 to 100H (hexadecimal), that is, the BUS number is greater than 80H and is CPU1, and less than 80H is CPU0.

The PCI link defaults to 16-bit bandwidth, and can be split into 4-bit bandwidths or 2-8-bit bandwidths, wherein the 4-bit bandwidths are the PCI device numbers 0,1,2 and 3, and the 8-bit bandwidths are the PCI device numbers 0 and 2.

In an exemplary embodiment, the above method further comprises:

s61, under the condition that the server is powered on and started, sequentially enumerating devices connected with a processor on a server main board through a specified interconnection link through a basic input/output system so as to identify the specified type of storage device in the enumerated devices, and setting the VMD function of the specified interconnection link corresponding to the identified specified type of storage device into an enabling state;

S62, controlling the basic input and output system to start normally and entering an operating system of the server under the condition that the VMD functions of the specified interconnection links corresponding to the identified storage devices of the specified types are set to be in an enabling state and the specified interconnection links corresponding to the storage devices of the specified types are not changed.

For example, in this embodiment, when the server is powered on and started, the BIOS acquires all PCI device information and identifies and determines PCI devices when PCI enumeration is performed, and uses the NVME hard disk identified in the process of identifying and starting three conditions of reading the type, the subtype and the device message type of the PCI configuration space of each device, and when the NVME hard disk is identified, the device number of the current NVME disk is acquired through the PCI protocol, the VMD function of the current PCI link of the current NVME disk is set to be enabled, the VMD function of the PCI links of all the NVME hard disks in the current server is set to be enabled, and when the PCI link corresponding to the NVME hard disk is not changed, the BIOS is normally started and enters the OS or shell or operating system.

In one exemplary embodiment, after sequentially enumerating devices connected to the processor on the server motherboard via the specified interconnect link through the bios, the method further comprises:

s71, combining the set values of VMD functions of all specified interconnection links connected with a processor on a server main board into variables with specified digits to obtain current variables;

S72, determining whether the specified interconnection links corresponding to the storage devices of the specified types are unchanged by comparing the current variable and the historical variable, wherein the historical variable is a variable of a specified bit number formed by combining set values of VMD functions of all the specified interconnection links connected with a processor on a main board of the server when the server is started last time under the condition that the server is not started for the first time, and the historical variable is a default variable under the condition that the server is started for the first time.

Similar to the previous embodiments, the specified number of bits corresponds to the total number of PCI links that are mounted on all processors on the server motherboard.

For example, in this embodiment, the VMD enabled values are combined into a 32-bit current variable B according to a rule, and it is determined whether the history variable a is consistent with the current variable B, that is, whether the PCI links corresponding to the NVME hard disk are unchanged. If the variable B is consistent with the variable A, the current server is not started for the first time, and the PCI link position information of the NVME hard disk is unchanged; if the variable B and the variable A are inconsistent, the current NVME hard disk position information is changed (adding/removing/changing Port) compared with the last start.

When the server is powered on and started, the BIOS defaults to close the VMD functions of all PCI links, when the server is not started for the first time, the history variable is a variable with a specified bit number formed by combining the set values of the VMD functions of all specified interconnection links connected with the processor on the server main board when the server is started for the last time, and when the server is started for the first time, the history variable is a default variable, namely, the default variable corresponds to closing of the VMD functions of all PCI links.

In one exemplary embodiment, a specified interconnect link coupled to a processor on a server motherboard corresponds to one bit in a variable of a specified number of bits;

Combining the set values of VMD functions of all specified interconnection links connected with a processor on a server motherboard into variables of specified digits to obtain a current variable, including:

s81, combining the set values of the VMD functions of the specified interconnection links connected with the processor on the server main board into the current variable according to the bit sequence corresponding to the specified interconnection links in the variables of the specified bit number.

For example, in this embodiment, taking the split PCI links as 4-bit bandwidths, the total number of PCI links as 32 as an example, and the corresponding 32 4-bit bandwidths, the total bandwidth of the PCI links is 128, and taking each PCI bus as a default 16-bit bandwidth as an example, 8 (128 divided by 16) PCI buses are all taken. The set values are combined into a 32-bit current variable according to fixed rules by reading the VMD set values of the PCI links of each CPU.

Here, the set values of the VMD functions of the PCI links connected to the CPU on the server motherboard are combined into the current variable in the order of the corresponding bits of the PCI links in the variables of the specified number of bits.

In one exemplary embodiment, determining whether none of the specified interconnect links corresponding to the specified type of storage device has changed by comparing the current variable to the historical variable comprises:

S91, under the condition that the current variable and the historical variable are the same, determining that the designated interconnection links corresponding to the designated type of storage equipment are unchanged;

S92, determining that the specified interconnection link corresponding to the storage device of the specified type is at least partially changed under the condition that the current variable and the historical variable are different.

For example, in this embodiment, if the current variable B and the history variable a are consistent, it is indicated that the current start is not the first time and the PCI link location information where the NVME hard disk is located is not changed; if the current variable B and the history variable a are inconsistent, it indicates that the current NVME hard disk location information has been at least partially changed compared with the last start, that is, there is a Port that is newly added, removed, and changed, where the Port may be the corresponding NVME hard disk.

S101, restarting the server under the condition that the VMD functions of the specified interconnection links corresponding to the identified storage devices of the specified types are all set to be in an enabling state and the specified interconnection links corresponding to the storage devices of the specified types are changed.

For example, in this embodiment, in a case where the VMD functions of the PCI links corresponding to the identified NVME hard disks are all set to the enabled state and the PCI links corresponding to the NVME hard disks are changed, for example, in a case where there is a new addition, removal, or change of the NVME hard disks, the server is restarted.

In an exemplary embodiment, before restarting the server, the method further includes:

s111, updating the historical variable into the current variable, and storing the updated historical variable.

For example, in the present embodiment, in the case where the history variable is a and the current variable is B, before restarting the server, the history variable a is updated to the current variable B, and the updated history variable B is saved.

As an alternative exemplary embodiment of the present application, an explanation will be given of a method for controlling an interconnection link according to an embodiment of the present application, taking a storage device of a designated type as an NVME hard disk as an example.

Whatever architecture of server, any task that runs needs to be stored in the hard disk, while NVME hard disk is the currently mainstream storage medium. In order to improve the performance of the NVME hard disk, the processor manufacturer provides VMD technology, and after starting the VMD function, the performance of the NVME hard disk is improved by more than 28%. VMD technology is a deployment solution for next generation storage, and can directly control and manage NVMe SSD (Solid STATE DRIVE, solid state disk) from PCIe bus without additional hardware adapter, support thermal upgrade and replacement of NVMe Solid state disk from PCIe bus without closing system, support bootable RAID, and standardized LED management can help to more quickly identify Solid state disk state. This versatility allows NVMe solid state disks to have enterprise reliability, availability, and serviceability (RAS) functionality, while one of the reasons for the faster response speed of NVMe solid state disks is because this type of disk is closer to the PCIe bus on the processor. On-line operation and maintenance of these solid state disks requires interrupt service handling by the system kernel. With the aid of the VMD, the operation and maintenance tasks can be completed online without the need of kernel interrupt service. VMD is a technology employed on the root port to the strongly extensible processor that redirects NVMe solid state disk insertion and removal PCIe bus events to the storage aware driver. These events previously had to be handled by the system BIOS in combination with the operating system. The VMD ensures smooth addition and removal of NVMe drivers from the PCIe bus, thereby ensuring uptime and serviceability.

The traditional VMD function is closed by default and used by determining which PCI link of the CPU is used by the NVME hard disk, and the corresponding VMD function is started in advance, or the VMD function is started by a tool under the PCI link of the NVME hard disk, the starting modes of the VMD function set by the 2 methods are time-consuming, once the position of the NVME hard disk of the server is changed, the PCI link of the NVME hard disk needs to be reset and not be intelligently identified and the VMD function is set to be enabled, and the invention discloses how to dynamically identify the NVME hard disk and start the VMD function of the PCI link of the NVME hard disk, so that the VMD function is not required to be set manually or after the NVME configuration is confirmed, and the requirement of dynamically setting the VMD function is met.

The embodiment of the application provides a control method of an interconnection link, which dynamically controls the setting of a VMD function of the interconnection link, wherein when the interconnection link is started by a server, a BIOS reads the setting of the VMD and combines the setting into a variable A to be stored, a PCI enumeration part when the BIOS is started, a PCI configuration space of PCI equipment is read and the type, the subtype and the equipment type are judged to confirm whether the interconnection link is an NVME hard disk equipment, when the interconnection link is started by Seg number, BUS number, dev number and Fun number information of the NVME hard disk equipment, the position of a CPU slot position and a PCI bridge link to which the BUS number of the current NVME hard disk belongs are confirmed, then the Dev number and the Fun number of the NVME hard disk are confirmed to confirm the accurate position of the NVME equipment, the VMD setting of the PCI link confirmed by the NVME is enabled, and simultaneously, the interconnection link is checked with the VMD setting condition which is started by the BIOS or is stored last time, if the interconnection link is consistent, the interconnection link is represented that no new/removed/changed Port exists, and the interconnection link is continuously started to enter an OS; if the two VMDs are inconsistent, the situation that the Port is newly added/removed/changed currently exists, meanwhile, the current VMD setting variable B is updated to the variable A, the server is restarted, and the steps are repeatedly executed. And when the PCI part BIOS confirms the starting condition of the VMD through accurately positioning the position information of the NVME and combines the starting condition of the VMD into a variable B, the variable B and the variable A are checked and confirmed to be consistent or not so as to confirm the starting condition of the VMD, if the starting condition is inconsistent, the starting is carried out, and if the starting condition is inconsistent, the starting is continued.

In this embodiment, the NVME hard disk is mounted on the PCI link of the CPU, and when the server is powered on, the BIOS defaults to turn off the VMD functions of all the PCI links. Specifically, the overall schematic diagram of the physical design of the server motherboard may be as shown in fig. 4. The server motherboard comprises two processors (CPU 0 and CPU 1), a BIOS, an I2C (Inter-INTEGRATED CIRCUIT, I2C bus), a BMC (Baseboard Management Controller, a board-level management controller, a core component for server out-of-band management), and 6 NVME hard disks, wherein a group of device numbers of each NVME device comprises Seg: BUS: DEV is FUN number, wherein BUS number is greater than 80 and is CPU1, less than 80 is CPU0, BUS number of PCI bridge link is fixed value, DEV is 0,1, 2,3 is 4 bit bandwidth; DEV is 0, 2, then 8 bits of bandwidth. CPU0 and CPU1 are interconnected through UPI/CCIX/GMIX, CPU0 and BIOS are interconnected through SPI/QSPI/ESPI, and CPU0 and BMC are interconnected through LPC/SPI/ESPI.

With reference to fig. 5, the specific implementation procedure is as follows:

Step 1, before the server is started for the first time, namely, the BIOS sets a default value for the VMD of the PCI link, namely, defaults to a closed state or a state set at the last time of starting;

Step 2, when the server is started, the BIOS combines the set values into a 32-bit variable A according to fixed rules by reading VMD set values of PCI links of each CPU and storing the variable A;

step 3, in the starting process of BIOS, the PCI enumeration part reads the PCI configuration space of the current device by each PCI device, simultaneously judges three information of the type, the subtype and the device message type of the PCI configuration space of the current PCI device, when the information is checked to be consistent with the NVME device, the PCI device is the NVME device at the moment, and if the PCI device is not the NVME device, the PCI configuration space of the next PCI device is continuously read;

step 4, when confirming that the current PCI device is the NVME device, acquiring the device number of the current NVME disc through the PCI protocol, wherein the device number comprises Seg: BUS: DEV is FUN number, the BUS number of NVME hard disk is read, and the core key information such as CPU slot number, PCI link port number and the like of the current NVME hard disk is further obtained through the BUS number of the NVME hard disk;

Step 5, confirming the bandwidth splitting information of the PCI link according to the Dev number and the FUN number of the NVME disk, and accurately positioning the accurate information of the bandwidth splitting condition of the PCI link where the current NVME hard disk is positioned;

step 6, repeating the step 4-5, and finishing the identification of NVME hard disk devices in all PCI devices;

step 7, according to step 4-6, confirming that the PCI links where the NVME hard disks are located and the VMDs for splitting the bandwidths of the PCI links are set as enabling, and setting the PCI links where all the identified NVME hard disks are located as 1 variable B with 32 bits;

Step8, comparing the variable B stored in the step 7 with the original variable A in the step 1, if the variable B is inconsistent with the original variable A, updating the numerical value of the variable B to the variable A, and restarting the server to realize VMD enabled setting;

step 9, if the variable B is consistent with the variable A, the current non-first start is indicated, and the PCI link position information of the NVME hard disk is unchanged (Port is added/removed/changed);

Step 10, if the variable B and the variable a are inconsistent, it is indicated that the current NVME hard disk location information has been changed (new/removed/changed Port) compared with the last start, and the current variable B needs to be updated to the variable a, and the server is restarted to ensure that the VMD function setting is effective.

With reference to fig. 6, an execution body corresponding to the steps shown in fig. 5 may be as shown in fig. 6, and the control method of the interconnection link in the present application may be cooperatively implemented by a server, a BIOS, and an OS (Operating System).

According to the embodiment of the application, the set value of the VMD is read and combined into 1 variable A with 32 bits when the server is started, the PCI enumeration part of the BIOS confirms whether the current PCI device is an NVME hard disk or not by reading the type, subtype and device type of the PCI configuration space, and confirms the CPU slot position where the current NVME hard disk is positioned and the PCI link information by the SEG number, the BUS number, the DEV number and the FUN number of the NVME hard disk and sets the VMD enabling function of the PCI link, after all PCI devices are enumerated, and the PCI links of the enabled VMD are combined into 1 variable B with 32 bits, the variables A and B are compared and checked, and according to the checking result, the actual setting condition of the VMD is confirmed and whether the server is required to be restarted is confirmed, so that the method is suitable for X86 architecture intel server products of a data center and the Internet industry, can dynamically identify the NVME hard disk and start the VMD function of the PCI link where the NVME hard disk is positioned, and the VMD function is not required to be set after the NVME is configured, and the VMD function is required to be set dynamically.

From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method of the various embodiments of the present application.

According to another aspect of the embodiments of the present application, there is further provided an apparatus for controlling an interconnection link, which is configured to implement the method for controlling an interconnection link provided in the foregoing embodiments, and will not be described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.

FIG. 7 is a block diagram of an alternative interconnect link control apparatus for a server, including a server motherboard, where a processor allows connection to a specified type of storage device via a specified interconnect link, according to an embodiment of the present application;

As shown in fig. 7, the apparatus includes:

A reading unit 702, configured to read first device information of a target storage device from a designated configuration space of the target storage device, where the target storage device is a storage device connected to a target processor on a server motherboard through a designated interconnection link, and the first device information is used to indicate a device type of the target storage device;

An obtaining unit 704, configured to obtain second device information of the target storage device, where the second device information is used to indicate a specified interconnection link used by the target storage device to connect to the target processor, where the target storage device is determined to be a storage device of a specified type according to the first device information;

A setting unit 706, configured to set a volume management device VMD function of the target interconnect link indicated by the second device information to an enabled state, where the VMD function matches with a specified type of storage device.

It should be noted that, the reading unit 702 in this embodiment may be used to perform the above-described step S202, the obtaining unit 704 in this embodiment may be used to perform the above-described step S204, and the setting unit 706 in this embodiment may be used to perform the above-described step S206.

According to the embodiment of the application, first equipment information of the target storage equipment is read from a designated configuration space of the target storage equipment, wherein the target storage equipment is the storage equipment connected to a target processor on a server main board through a designated interconnection link, and the first equipment information is used for indicating the equipment type of the target storage equipment; acquiring second device information of the target storage device under the condition that the target storage device is determined to be a storage device of a specified type according to the first device information, wherein the second device information is used for indicating a specified interconnection link used by the connection of the target storage device and a target processor; the VMD function of the volume management device of the target interconnection link indicated by the second device information is set to an enabled state, wherein the VMD function is matched with the storage device of the specified type, and the problem that the VMD function setting of the interconnection link is long in time consumption in the control method of the interconnection link in the related art is solved.

The reading unit includes:

The reading module is used for reading configuration information of a designated information type from the PCI configuration space of the target storage device to obtain first device information, wherein the designated information type comprises at least one of the following: type, subtype, message type.

The device further comprises:

And the first execution unit is used for matching the first device information with the hard disk information of the NVME hard disk according to the specified information type after the first device information of the target storage device is read out from the specified configuration space of the target storage device so as to judge whether the target storage device is the NVME hard disk.

the acquisition unit includes:

The acquisition module is used for acquiring a group of device numbers of the target storage device under the condition that the target storage device is determined to be the storage device of the specified type according to the first device information;

And the first determining module is used for determining the PCI bus number of the target storage device in the group of device numbers of the target storage device and the PCI device number of the target storage device as second device information.

In one exemplary embodiment, the acquisition module includes:

And the checking sub-module is used for checking a group of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the group of device numbers comprise a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device and a PCI function number of the target storage device.

In one exemplary embodiment, the designated interconnect link comprises a Peripheral Component Interconnect (PCI) link, the target interconnect link comprises a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus through the first PCI bridge link, the target storage device is connected to the target PCI bus through the second PCI bridge link, and the second device information comprises a PCI bus number of the target storage device and a PCI device number of the target storage device;

The device further comprises:

A first determining unit, configured to determine, after obtaining second device information of the target storage device, a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on a PCI bus number of the target storage device, where the processor slot number corresponding to the target storage device is used to indicate a target processor and a processor slot on the target processor corresponding to the first PCI bridge link, and the PCI bus port number corresponding to the target storage device is used to indicate a target PCI bus;

The second determining unit is used for determining bandwidth splitting information of a second PCI bridge link based on the PCI device number of the target storage device, wherein the bandwidth splitting information of the second PCI bridge link is used for indicating the bandwidth split to the second PCI bridge link from the bandwidth of the target PCI bus so as to indicate the position of the target storage device on the target PCI bus;

In an exemplary embodiment, the above apparatus further includes:

the second execution unit is used for sequentially enumerating devices connected with a processor on a server main board through a specified interconnection link through a basic input/output system under the condition that the server is electrified and started so as to identify the specified type of storage device in the enumerated devices, and setting the VMD function of the specified interconnection link corresponding to the identified specified type of storage device into an enabling state;

And the third execution unit is used for controlling the normal start of the basic input and output system and entering an operating system of the server under the condition that the VMD functions of the specified interconnection links corresponding to the identified storage devices of the specified types are set to be in an enabling state and the specified interconnection links corresponding to the storage devices of the specified types are not changed.

In an exemplary embodiment, the above apparatus further includes:

the fourth execution unit is used for combining the set values of the VMD functions of all the appointed interconnection links connected with the processor on the server main board into variables with appointed digits after the equipment connected with the processor on the server main board through the appointed interconnection links is enumerated in sequence through the basic input and output system, so that the current variables are obtained;

and the third determining unit is used for determining whether the specified interconnection links corresponding to the storage devices of the specified types are unchanged by comparing the current variable with the historical variable, wherein the historical variable is a variable of specified bit number formed by combining the set values of VMD functions of all the specified interconnection links connected with the processor on the main board of the server when the server is started last time under the condition that the server is not started for the first time, and the historical variable is a default variable under the condition that the server is started for the first time.

the fourth execution unit includes:

and the execution module is used for combining the set values of the VMD functions of the specified interconnection links connected with the processor on the server main board into the current variable according to the bit sequence corresponding to the specified interconnection links in the variables of the specified bit number.

In one exemplary embodiment, the third determining unit includes:

The second determining module is used for determining that the designated interconnection links corresponding to the designated type of storage equipment are unchanged under the condition that the current variable and the historical variable are the same;

And the third determining module is used for determining that the specified interconnection link corresponding to the storage device of the specified type is at least partially changed under the condition that the current variable and the historical variable are different.

In an exemplary embodiment, the above apparatus further includes:

And the restarting unit is used for restarting the server under the condition that the VMD function of the appointed interconnection link corresponding to the identified storage device of the appointed type is set to be in an enabled state and the appointed interconnection link corresponding to the storage device of the appointed type is changed after the devices connected with the processor on the server main board through the appointed interconnection link are enumerated in sequence through the basic input output system.

In an exemplary embodiment, the above apparatus further includes:

and the fifth execution unit is used for updating the historical variable into the current variable and saving the updated historical variable before restarting the server.

It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; or the above modules may be located in different processors in any combination.

Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.

In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: various media capable of storing a computer program, such as a usb disk, a ROM (Read-Only Memory), a RAM (Random Access Memory ), a removable hard disk, a magnetic disk, or an optical disk.

An embodiment of the application also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.

In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.

Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.

Embodiments of the application also provide a computer program product comprising a computer program which, when executed by a processor, implements the steps of any of the method embodiments described above.

Embodiments of the present application also provide another computer program product comprising a non-volatile computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of any of the method embodiments described above.

Embodiments of the present application also provide a computer program comprising computer instructions stored in a computer-readable storage medium; the processor of the computer device reads the computer instructions from the computer readable storage medium and executes the computer instructions to cause the computer device to perform the steps of any of the method embodiments described above.

It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.

The above is only a preferred embodiment of the present application, and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.

Claims

1. A control method of an interconnection link is characterized in that,

The method is applied to a server, and the server comprises a server main board, wherein a processor on the server main board is allowed to be connected with a storage device of a specified type through a specified interconnection link;

The method comprises the following steps:

Reading first device information of a target storage device from a designated configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on the server main board through a designated interconnection link, and the first device information is used for indicating a device type of the target storage device;

Acquiring second device information of the target storage device under the condition that the target storage device is determined to be the storage device of the specified type according to the first device information, wherein the second device information is used for indicating the specified interconnection link used by the connection of the target storage device and the target processor;

And setting a Volume Management Device (VMD) function of a target interconnection link indicated by the second device information to an enabled state, wherein the VMD function is matched with the storage device of the specified type.

2. The method of claim 1, wherein the step of determining the position of the substrate comprises,

The specified interconnection link is a peripheral equipment interconnection PCI link, the specified configuration space is a PCI configuration space, and equipment connected with a processor on the server main board through the PCI link is PCI equipment;

The reading the first device information of the target storage device from the designated configuration space of the target storage device includes:

Reading configuration information of a specified information type from the PCI configuration space of the target storage device to obtain the first device information, wherein the specified information type comprises at least one of the following: type, subtype, message type.

3. The method of claim 2, wherein the step of determining the position of the substrate comprises,

The storage equipment of the appointed type is a non-volatile memory host controller interface specification NVME hard disk;

and matching the first equipment information with the hard disk information of the NVME hard disk according to the specified information type so as to judge whether the target storage equipment is the NVME hard disk.

4. The method of claim 1, wherein the step of determining the position of the substrate comprises,

The appointed interconnection link is a peripheral equipment interconnection PCI link, and equipment connected with a processor on the server main board through the PCI link is PCI equipment;

The obtaining second device information of the target storage device under the condition that the target storage device is determined to be the storage device of the specified type according to the first device information includes:

Acquiring a group of device numbers of the target storage device under the condition that the target storage device is determined to be the storage device of the appointed type according to the first device information;

and determining the PCI bus number of the target storage device and the PCI device number of the target storage device in the group of device numbers of the target storage device as the second device information.

5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

The obtaining, in a case where the target storage device is determined to be the storage device of the specified type according to the first device information, a set of device numbers of the target storage device includes:

And checking the group of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the group of device numbers comprise a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device and a PCI function number of the target storage device.

6. The method of claim 1, wherein the step of determining the position of the substrate comprises,

The specified interconnection link comprises a Peripheral Component Interconnect (PCI) link, the target interconnection link comprises a first PCI bridge link, a target PCI bus and a second PCI bridge link, the target processor is connected with the target PCI bus through the first PCI bridge link, the target storage device is connected with the target PCI bus through the second PCI bridge link, and the second device information comprises the PCI bus number of the target storage device and the PCI device number of the target storage device;

after the obtaining the second device information of the target storage device, the method further includes:

Determining a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on the PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device is used for indicating the target processor and a processor slot corresponding to the first PCI bridge link on the target processor, and the PCI bus port number corresponding to the target storage device is used for indicating the target PCI bus;

Determining bandwidth splitting information of the second PCI bridge link based on the PCI device number of the target storage device, wherein the bandwidth splitting information of the second PCI bridge link is used for indicating the bandwidth split to the second PCI bridge link from the bandwidth of the target PCI bus so as to indicate the position of the target storage device on the target PCI bus;

7. The method of claim 6, wherein the step of providing the first layer comprises,

The number range of the PCI bus number of one processor on the server motherboard is set based on the total number of processors on the server motherboard;

8. The method according to any one of claims 1 to 7, wherein,

The method further comprises the steps of:

Under the condition that the server is powered on and started, sequentially enumerating devices connected with a processor on a server main board through the appointed interconnection link through a basic input/output system so as to identify the appointed type of storage devices in the enumerated devices, and setting the VMD function of the appointed interconnection link corresponding to the identified appointed type of storage devices into an enabling state;

And controlling the basic input/output system to be started normally and entering an operating system of the server under the condition that the VMD functions of the specified interconnection links corresponding to the identified storage devices of the specified types are set to be in an enabling state and the specified interconnection links corresponding to the storage devices of the specified types are not changed.

9. The method of claim 8, wherein the step of determining the position of the first electrode is performed,

After sequentially enumerating, by the bios, devices connected to the processor on the server motherboard via the specified interconnect link, the method further comprises:

combining the set values of the VMD functions of all the specified interconnection links connected with the processor on the server motherboard into variables with specified digits to obtain current variables;

and determining whether the specified interconnection links corresponding to the specified type of storage equipment are unchanged by comparing the current variable with a historical variable, wherein the historical variable is a variable with specified bit number, which is combined by set values of the VMD functions of all the specified interconnection links connected with a processor on a server mainboard when the server is started last time under the condition that the server is not started for the first time, and the historical variable is a default variable under the condition that the server is started for the first time.

10. The method of claim 9, wherein the step of determining the position of the substrate comprises,

One of the specified interconnect links coupled to a processor on the server motherboard corresponds to one bit in the variable of the specified number of bits;

Combining the set values of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard into variables with specified digits to obtain a current variable, including:

And combining the set values of the VMD functions of the specified interconnection links connected with the processor on the server motherboard into the current variable according to the bit sequence corresponding to the specified interconnection links in the variable with the specified bit number.

11. The method of claim 9, wherein the step of determining the position of the substrate comprises,

The determining whether the specified interconnection links corresponding to the specified type of storage devices are unchanged by comparing the current variable with the historical variable comprises the following steps:

under the condition that the current variable and the historical variable are the same, determining that the designated interconnection link corresponding to the designated type of storage equipment is unchanged;

And under the condition that the current variable and the historical variable are different, determining that the specified interconnection link corresponding to the storage device of the specified type is at least partially changed.

12. The method of claim 9, wherein the step of determining the position of the substrate comprises,

restarting the server in the case that the VMD functions of the specified interconnect links corresponding to the identified storage devices of the specified type have all been set to an enabled state and the specified interconnect links corresponding to the storage devices of the specified type have changed.

13. The method of claim 12, wherein the step of determining the position of the probe is performed,

Before the restarting the server, the method further includes:

updating the historical variable to the current variable, and storing the updated historical variable.

14. A control device for an interconnection link is characterized in that,

The device comprises:

A reading unit, configured to read first device information of a target storage device from a designated configuration space of the target storage device, where the target storage device is a storage device connected to a target processor on the server motherboard through one designated interconnection link, and the first device information is used to indicate a device type of the target storage device;

An obtaining unit, configured to obtain second device information of the target storage device, where the second device information is used to indicate the specified interconnection link used by the target storage device to connect to the target processor, where the target storage device is determined to be the storage device of the specified type according to the first device information;

a setting unit configured to set a volume management device VMD function of a target interconnect link indicated by the second device information to an enabled state, wherein the VMD function matches the specified type of storage device.

15. A computer-readable storage medium comprising,

The computer readable storage medium having stored therein a computer program, wherein the computer program when executed by a processor implements the steps of the method of any of claims 1 to 13.

16. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that,

The processor, when executing the computer program, implements the steps of the method of any one of claims 1 to 13.

17. A computer program product comprising a computer program, characterized in that,

The computer program implementing the steps of the method of any one of claims 1 to 13 when executed by a processor.