CN117950675A - Binary translation method, binary translation device, electronic equipment and readable storage medium - Google Patents
Binary translation method, binary translation device, electronic equipment and readable storage medium Download PDFInfo
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Abstract
The embodiment of the invention provides a binary translation method, a binary translation device, electronic equipment and a readable storage medium, wherein the binary translation method comprises the following steps: when translating the call instruction of the target function, if the target function is determined to be a leaf function, translating the call instruction of the target function into a first preset instruction of a host platform; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; when translating a return instruction in the objective function, if the objective function is determined to be a leaf function, translating the return instruction of the objective function into a second preset instruction of the host platform; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function. The embodiment of the invention can reduce the consumption of the storage space caused by the partial stack structure, effectively reduce the number of translated target codes and improve the translation efficiency.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a binary translation method, a binary translation device, an electronic device, and a readable storage medium.
Background
Binary translation may translate a source program running on one ISA (Instruction Set Architecture ) platform (referred to as a GUEST platform) into a target program running on another ISA platform (referred to as an HOST platform), e.g., to run the x86 platform program on the LoongArch platform.
The source program generally comprises a call instruction (such as a call instruction) of a function, a return address of the function is pressed into a stack top when the call instruction of the function is executed, the return instruction (such as a ret instruction) of the function is executed when the function is executed, the return address is taken out from the stack top when the return instruction of the function is executed, and the function is continuously executed after being jumped to a called position.
With the increase of function call, more stack structures special for storing function return addresses are needed, so that more storage space is consumed, and larger performance cost is brought, and the translation efficiency is affected.
Disclosure of Invention
In view of the above problems, embodiments of the present invention are provided to provide a binary translation method for overcoming the above problems or at least partially solving the above problems, which can reduce the consumption of storage space caused by a part of stack structure, effectively reduce the number of translated target codes, and improve the translation efficiency.
Correspondingly, the embodiment of the invention also provides a binary translation device, electronic equipment and a computer program product, which are used for ensuring the implementation and application of the method.
In a first aspect, an embodiment of the present invention discloses a binary translation method, applied to a binary translation system, where the binary translation system is configured to translate a source code into a target code, where the source code is a binary code of a client platform, and the target code is a binary code of a host platform, and the method includes:
When translating a call instruction of a target function, if the target function is determined to be a leaf function, translating the call instruction of the target function into a first preset instruction of the host platform; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
When translating the return instruction in the objective function, if the objective function is determined to be a leaf function, translating the return instruction of the objective function into a second preset instruction of the host platform; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
In a second aspect, an embodiment of the present invention discloses a binary translation device, applied to a binary translation system, where the binary translation system is configured to translate a source code into an object code, where the source code is a binary code of a client platform, and the object code is a binary code of a host platform, where the device includes:
the first optimization module is used for translating the calling instruction of the target function into a first preset instruction of the host platform if the target function is determined to be a leaf function during translating the calling instruction of the target function; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
The second optimizing module is used for translating the return instruction of the objective function into a second preset instruction of the host platform if the objective function is determined to be a leaf function during translating the return instruction into the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
In a third aspect, an embodiment of the present invention discloses an electronic device, including: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to store at least one executable instruction that causes the processor to perform the steps of the binary translation method as described in any one of the preceding claims.
In a fourth aspect, embodiments of the present invention disclose a readable storage medium having stored thereon a program or instructions that, when executed by a processor, enable a binary translation method as described in any of the preceding.
In a fifth aspect, embodiments of the present invention disclose a computer program product comprising a computer program which, when executed by a processor, performs the steps of a binary translation method as described in any of the preceding claims.
The embodiment of the invention has the following advantages:
When translating a call instruction (such as a call instruction) of a target function, if the target function is determined to be a leaf function, the call instruction of the target function is translated into a first preset instruction of a host platform; the first preset instruction is used for storing the return address of the target function into a preset register, storing the return address of the target function by using the preset register, and jumping to a calling address corresponding to the target function; and translating the return instruction of the objective function into a second preset instruction of the host platform when translating the return instruction (such as a ret instruction) in the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function. The embodiment of the invention optimizes the translation results of the calling instruction of the leaf function and the return instruction of the function, and uses a register to replace a stack structure to access the return address of the leaf function. Therefore, the operation of partial push and pop and the maintenance of a leaf function call stack can be reduced, the consumption of storage space caused by partial stack structure can be reduced, and the number of translated target codes can be effectively reduced, so that the translation efficiency is improved, the performance of a dynamic binary translator is further improved, and the running efficiency of a translated program is improved.
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FIG. 1 is a flow chart of steps of an embodiment of a binary translation method of the present invention;
FIG. 2 is a flow diagram of dynamic binary translation;
FIG. 3 is a block diagram of a binary translation apparatus embodiment of the present invention;
Fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present invention may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, the term "and/or" as used in the specification and claims to describe an association of associated objects means that there may be three relationships, e.g., a and/or B, may mean: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The term "plurality" in embodiments of the present invention means two or more, and other adjectives are similar.
Binary translation may be used to solve the problem of binary-level applications running across instruction set architectures. In particular, binary translation techniques may translate sequences of instructions in one instruction set architecture into sequences of instructions in another instruction set architecture. For example, binary translation may translate instruction sequences in an x86 instruction set architecture into instruction sequences in an arm instruction set architecture (e.g., arm 64), and vice versa. Binary translations include both static binary translations and dynamic binary translations. Static binary translation is the translation of binary A on the source platform to translate the binary A into binary file B on the target platform prior to its execution. Based on the static translation technology, the translation result obtained by one translation can be used for a plurality of times. Dynamic binary translation is the translation of a piece of code that is executed when a binary is running. The binary translation method of the embodiment of the invention can be applied to dynamic binary translation, and the translation is performed by taking basic blocks (Translation Block, TB) as units. A basic block typically ends with control flow change instructions (e.g., jumps, function calls, etc.).
In the embodiment of the present invention, the source program refers to a program to be binary translated, and the source program may be any type of application program, which is also called a client platform program. A source platform refers to a machine platform that can run a source program. In some embodiments, the source platform is also referred to as a client platform (GUEST platform) or client. The processor of the source platform may be a processor based on a first instruction set architecture. The first instruction set architecture may be, for example, an x86 instruction set architecture or an arm instruction set architecture (e.g., arm 64). The source program is a program developed based on the first instruction set architecture, and thus, the source program can be normally run on the source platform. The target platform is a machine platform where migration of source programs is desired. In some embodiments, the target platform is also referred to as a HOST platform (HOST platform) or HOST machine. The processor of the target platform may be a processor based on a second instruction set architecture. The second instruction set architecture is a different instruction set architecture than the first instruction set architecture. For example, the first instruction set architecture is the x86 instruction set architecture and the second instruction set architecture is the arm instruction set architecture. As another example, the first instruction set architecture is an arm instruction set architecture and the second instruction set architecture is an x86 instruction set architecture. For another example, the first instruction set architecture is the x86 instruction set architecture, the second instruction set architecture is LoongArch (Dragon architecture), and so on. The source program may run on the source platform using source binary code (the binary code of the client platform). The source binary code is code based on a first instruction set architecture. If it is desired to run the source program on the target platform, the source binary needs to be translated into target binary (the binary of the host platform). The target binary is code based on the second instruction set architecture such that the target binary can be run on the target platform.
FIG. 1 shows a flow chart of steps of an embodiment of a binary translation method of the present invention, the method being applicable to a binary translation system for translating source code into target code, the source code being the binary of a client platform and the target code being the binary of a host platform, the method may comprise the steps of:
Step 101, when translating a call instruction of a target function, if the target function is determined to be a leaf function, translating the call instruction of the target function into a first preset instruction of the host platform; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
102, when translating the return instruction in the objective function, if the objective function is determined to be a leaf function, translating the return instruction of the objective function into a second preset instruction of the host platform; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
The binary translation method provided by the embodiment of the invention can be applied to a dynamic binary translation scene. The embodiment of the invention does not limit the types of the client platform and the host platform, and mainly takes the client platform as an x86 platform and the host platform as a LoongArch platform as an example for explanation.
Dynamic binary translation is a technique that increases the portability and adaptability of software at the binary level by modifying and monitoring the software at runtime. Software that uses this technique is called a dynamic binary translator (dynamic binary translator, DBT).
The dynamic binary translator mainly comprises a translation module and an execution module. The translation module is used for reading the source code and translating the source code into the target code; the execution module is used for running the object codes to simulate the execution of the source program. Correspondingly, the running process of the source program is also divided into two parts: translation phase and run phase. In the translation stage, the binary code of the client platform is translated, and after the translation is completed, control is transferred to an execution module to be executed, and the execution stage is entered. When the execution module encounters a code segment which has not been translated, control is passed back to the translation module for continued translation.
Referring to FIG. 2, a flow diagram of dynamic binary translation is shown. Dynamic binary translation translates in units of basic blocks (TBs), which end with branch instructions or jump instructions. The translation module translates the source binary code of the client platform into the target code of the host platform, and the translated target code is stored in a code cache (code cache) in the form of TB. The execution module executes the translated object code. Since the TB ends with a branch instruction or a jump instruction, the next TB can be found according to the branch instruction information or the jump instruction information in the code, the program flows back to the translation module, the found next TB is translated, and the process is repeated until the execution is completed.
Jump instructions in a source program can be classified into direct jump instructions and indirect jump instructions. The jump address of the direct jump instruction can be obtained by translating the instruction, and the jump address is uniquely determined, and the direct jump instruction is like a jump instruction. An indirect jump instruction may have one or more jump addresses, which may be stored in registers or memory, and the particular jump address may be determined only when the program is running on the indirect jump instruction, and may not be obtained by translating the instruction.
The function return instruction is an indirect jump instruction, and because the same function may be called at a plurality of different locations in the source program, the function needs to use an indirect jump to return to the location where it was called for execution.
Each time a function call is made, a call stack may be generated for saving one or more of the following information: parameters of the function call, return address of the function, local variables and return value of the function when the program runs. The return of the function follows the call standard of the function, which is a regular indirect jump, when the function call is executed each time, the return address of the function can be pushed to the stack top of the call stack, and after the function execution is finished, the return address is taken out from the stack top, so that the jump is to the called position to continue the execution.
In order to reduce stack structures generated by function calls in the dynamic binary translation process, the embodiment of the invention optimizes the call instruction of the function and the return instruction of the function. Specifically, in the process of translating the source code by using the dynamic binary translator, if the instruction being translated is a call instruction of an objective function, such as call func_a, func_a is the objective function, and call is the call instruction of the objective function. Judging whether the target function called at this time is a leaf function, if so, using the method of the invention to translate and optimize, using a register to access the return address of the target function instead of using a stack structure to access the return address of the target function.
Specifically, if the target function is a leaf function, translating a call instruction (such as a call instruction) of the target function into a first preset instruction of the host platform when translating the call instruction of the target function; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; i.e. using a preset register to hold the return address of the objective function; translating a return instruction (such as a ret instruction) of the objective function (the objective function is a leaf function) into a second preset instruction of the host platform when translating the return instruction of the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function. Compared with the method for accessing the return address of the objective function by using the stack structure, the method can reduce the operation of partial push-pull and maintenance of the leaf function call stack, can effectively reduce the number of translated objective codes, and effectively improve the translation speed of the instruction, thereby further improving the performance of the dynamic binary translator and the running efficiency of the translated program.
It should be noted that, the specific forms of the first preset instruction and the second preset instruction are not limited in the embodiment of the present invention, and may be different according to different host platforms. In an alternative embodiment of the present invention, the first preset instruction may be a jump instruction with a return function, and the second preset instruction may be an indirect jump instruction.
Taking a host platform as LoongArch platform as an example, the first preset instruction may be a bl instruction, and the second preset instruction may be a jirl instruction.
The bl instruction is a jump instruction with a return function, and can be applied to a scene of function call. The bl instruction has both skip and write register functions, so that the return address of the target function can be saved without using a stack structure. before the bl instruction jumps, the next instruction address of the current instruction is saved in a specific register (preset register), and then the bl instruction jumps to the jump address and is executed from the jump address. Where the next instruction address of the current instruction refers to the return address of the objective function. The jump address refers to a call address of the objective function.
In practical applications, a Program Counter (PC) of the CPU stores the address of the next instruction to be executed. The bl instruction is to store the result of the instruction's own PC value +4 (i.e., the return address) into a register. Thus, when a bl instruction is currently executed, the PC points to the address of the bl instruction. The address pointed to by pc+4 may be stored in a preset register before the bl instruction performs the jump. Since the bl instruction occupies 4 bytes, the address pointed by PC+4 is the address of the next instruction of the current instruction. When the bl instruction points to completion and needs to be returned, the address (the address pointed by PC+4) in the preset register can be directly assigned to the PC, and the original program can be returned to and continuously executed, so that the return from the jump address to the next instruction of the bl instruction is realized.
The preset register may be a specific register that holds a Return Address according to the bl instruction, in particular, a Return Address register (ra register).
Jirl instruction is an indirect jump instruction that can jump to a value in the return address register (ra register). The embodiment of the invention uses jirl instructions to be matched with bl instructions to realize indirect jump when returning after function call. It should be noted that, the jirl instruction may use a custom register for jump, and in the embodiment of the present invention, in order to cooperate with the bl instruction, the register for jump of the jirl instruction is an ra register.
Specifically, when the target function is a leaf function, writing a return address of the target function into the ra register by using a bl instruction when translating a call instruction of the target function; the jirl instruction is used to read the value in the ra register (the return address of the objective function) and jump to that address when the objective function returns.
A leaf function refers to a function that does not call other functions in the function. The interior of the non-leaf function may also call other functions, i.e., there is multi-layer call nesting for the non-leaf function. When there is a multi-level call nesting, if a preset register (e.g., a ra register) is used to hold the return address of the function, then the value stored in the ra register first will be overwritten. For example, the return address of function func_a is stored in the ra register when translated to the call func_a instruction. The function func_a contains a call func_b instruction again, that is, func_a is not a leaf function, and the function func_b is also called inside. When translating to the call func_b instruction, if the return address of the function func_b is stored in the ra register, the return address of the function func_a already stored in the ra register is overwritten.
In order to avoid the problem that the return address of the inner layer function is covered by the return address of the outer layer function when the multi-layer call is nested, when the embodiment of the invention translates to the call instruction of the target function, if the target function is determined not to be a leaf function, the call instruction of the target function is not translated and optimized, and the stack structure is still used for accessing the return address of the target function. Specifically, when the target function is not a leaf function, a layer of call stack is generated when the call instruction of the target function is translated, the return address of the target function is stored in the call stack and is jumped to the call address corresponding to the target function, and when the return is performed, the return address of the target function is read from the call stack and is jumped to the return address of the target function.
It should be noted that, in the embodiment of the present invention, generating a layer of call stack refers to performing operations of pushing a stack once and adjusting a top pointer to the call stack, where the top pointer points to a top element.
For example, the source code includes a call func_a instruction, the func_a instruction includes a call func_b instruction, and the func_b instruction includes a call func_c instruction. When translating to a call Func_A instruction, a layer of call stack is generated because Func_A is not a leaf function, the return address of the function Func_A is pushed to the stack top, and the call stack jumps to the call address corresponding to Func_A, and the processing flow of Func_A is entered. At this point the top of the call stack is the return address of function func_a. When the call Func_B instruction is translated into the call Func_B instruction, a layer of call stack is generated because Func_B is not a leaf function, the return address of the function Func_B is pushed to the stack top, and the return address is jumped to the call address corresponding to Func_B, so that the processing flow of Func_B is entered. At this point the top of the call stack is the return address of function func_b. When the call Func_C instruction is translated into the call Func_C instruction, the return address of the function Func_C can be stored in the ra register and jumped to the call address corresponding to the Func_C to enter the processing flow of the Func_C because the Func_C is a leaf function.
Under the condition that the method is not used for translation optimization, when a call instruction (such as a call instruction) of a target function is translated, firstly, the address (namely a return address) of the next instruction of the call instruction is loaded into a temporary register tmp, then the next instruction address is stored into a function call stack, and finally, an instruction b is used for jumping to the target address (the call address of the target function). After the translation optimization is carried out by using the method of the invention, for the leaf function, the jump to the target address and the return address storage in the preset register (such as ra register) can be completed by using the first preset instruction (such as bl instruction), so that the operation cost can be reduced.
When the execution of the function Func is completed, that is, when the function Func translates to a return instruction in the function Func, since Func is a leaf function, the return address of the function Func can be directly read from the ra register, and the execution can be continued by jumping to the return address of the function Func (that is, the next instruction of the call Func). When translating to the return instruction in function func_b, the return address of function func_b is fetched from the top of the call stack, jumping to the return address of function func_b (i.e. the next instruction of call func_b) for continued execution, since func_b is not a leaf function. Since the return address of function func_b has been fetched from the top of the call stack, the top of the call stack is the return address of function func_a at this time. When translating to the return instruction in function func_a, the return address of function func_a is fetched from the top of the call stack, jumping to the return address of function func_a (i.e. the next instruction of call func_a) for continued execution, since func_a is not a leaf function.
In the case of translation optimization without using the method of the invention, when translating a return instruction (such as a ret instruction) into an objective function, the previously stored return address is first loaded from the function call stack, placed into the register tmp, and then jumped to the return address using the b instruction. After the translation optimization is carried out by using the method of the invention, for the leaf function, the two operations of taking out the return address from the ra register and jumping to the return address can be completed by using a second preset instruction (such as jirl instruction), so that the operation cost can be reduced.
Further, the method may further include:
When translating a call instruction of an objective function, if the objective function is determined not to be a leaf function, translating the call instruction of the objective function into a first instruction sequence of the host platform; the first instruction sequence may include a push instruction (e.g., a push instruction) and a direct jump instruction (e.g., a b instruction); the stack pushing instruction is used for pushing the return address of the target function to the stack top of the call stack, and adjusting the stack top pointer of the call stack; the direct jump instruction is used for jumping to a target address, and the target address is the call address of the target function.
When translating the return instruction in the objective function, if the objective function is determined not to be a leaf function, translating the return instruction of the objective function into a second instruction sequence of the host platform; the second instruction sequence may include a pop instruction (e.g., pop instruction) and an indirect jump instruction (e.g., jirl instruction); the pop instruction is used for taking out the return address of the target function from the stack top of the call stack according to the stack top pointer of the call stack, and storing the taken-out value into a temporary register; the indirect jump instruction is used for fetching the return address of the objective function from the temporary register and jumping to the return address of the objective function.
The embodiment of the invention optimizes the translation of the calling instruction and the returning instruction of the leaf function based on the difference of the function call processing of the client platform (such as an x86 platform) and the host platform (such as a LoongArch platform). In the x86 platform, the function call is implemented by using software, and the return address of the function is temporarily accessed by using a call stack by means of a call instruction (such as a call instruction) of the function and a return instruction (such as a ret instruction) of the function, so that each layer of function call generates a layer of stack structure. Whereas the LoongArch platform may be combined by hardware and software, when the function is called, the bl instruction is used to store the return address of the function in the ra register, and when the function returns, the jirl instruction is used to jump directly to the value in the ra register (i.e. the return address of the target function). In addition, in order to avoid the problem that the data in the ra register is covered due to multi-layer nested calling, the embodiment of the invention stores the return address of the inner layer function (non-leaf function) in the calling stack, and stores the return address of the outermost layer function (leaf function) in the ra register. Therefore, stack top pointer maintenance and stack pushing and popping operations of a return address in the last layer of function call can be canceled, and the instruction number of the target code is reduced. Furthermore, before the optimization of the invention is used, the return instruction of the leaf function is treated as an indirect branch when the return instruction is translated, and context switching is needed; after the invention is used for optimization, the register access return address can be directly used, the context switching process is canceled, the memory access operation is reduced, and the translation efficiency can be improved.
It should be noted that the client platform is an x86 platform, and the host platform is a LoongArch platform, which is merely an exemplary illustration. The embodiment of the invention does not limit the client platform and the host platform. The invention is applicable to a scenario where the host platform has a call instruction with return, and the client platform does not have a call instruction with return. For example, the x86 platform handles all calls in the same way, while the LoongArch platform has call instructions with returns and simpler handling for the last level calls (leaf function calls). Therefore, in the scenario that the host platform has a call instruction with return, and the client platform does not have a call instruction with return, the characteristics of the host platform can be utilized to optimize the translation process. In the RISC architecture, jump and Link (jal) instructions may be used to implement function calls and returns, and ra registers are used to save and restore return addresses. Thus, translations from x86 to RISC can be optimized using the method of the present invention.
In an alternative embodiment of the present invention, the method may further include:
Inquiring whether a function call instruction exists between a call instruction of a target function and a return instruction of the target function when translating the call instruction to the target function; if not, determining that the objective function is a leaf function; if so, it is determined that the objective function is not a leaf function.
The binary translation method of the embodiment of the invention can optimize the calling instruction and the returning instruction of the leaf function, and can firstly identify whether the target instruction is the leaf instruction or not and then determine whether to translate and optimize when translating the calling instruction and the returning instruction of the target function.
The embodiment of the invention does not limit the method for identifying whether the objective function is a leaf function. Illustratively, when a call instruction (such as a call instruction) to an objective function is translated, a jump address of the function call (i.e., a call address of the objective function) may be obtained, at this time, all instructions from the jump address to a return instruction (such as a ret instruction) of the objective function may be traversed, and whether other function call instructions exist therein may be queried, and if the function call instruction exists, it is indicated that the objective function is either a leaf function or a leaf function.
In an alternative embodiment of the present invention, the method may further include:
storing related information of the objective function in a preset array, wherein the related information comprises whether the objective function is a leaf function or not;
and when translating a return instruction in the target function, determining whether the target function is a leaf function or not by inquiring related information of the target function in the preset array.
When translating a call instruction of a target function, the embodiment of the invention firstly identifies whether the target function is a leaf function, and then determines the translation mode of the call instruction of the target function (such as whether translation optimization is performed). After identifying whether the objective function is a leaf function, the relevant information of the objective function may be saved in a preset array. The relevant information includes, but is not limited to, whether the objective function is a leaf function.
In this way, when translating the return instruction in the target function, by querying the related information of the target function in the preset array, whether the target function is a leaf function can be determined, and further whether the return address is read from the ra register or taken from the stack top of the call stack can be determined, so that the operation steps of identifying whether the target function is a leaf function can be reduced.
In summary, when translating a call instruction (such as a call instruction) of a target function, if the target function is determined to be a leaf function, the embodiment of the invention translates the call instruction of the target function into a first preset instruction of the host platform; the first preset instruction is used for storing the return address of the target function into a preset register, storing the return address of the target function by using the preset register, and jumping to a calling address corresponding to the target function; and translating the return instruction of the objective function into a second preset instruction of the host platform when translating the return instruction (such as a ret instruction) in the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function. The embodiment of the invention optimizes the translation results of the calling instruction of the leaf function and the return instruction of the function, and uses a register to replace a stack structure to access the return address of the leaf function. Therefore, the operation of partial push and pop and the maintenance of a leaf function call stack can be reduced, the consumption of storage space caused by partial stack structure can be reduced, and the number of translated target codes can be effectively reduced, so that the translation efficiency is improved, the performance of a dynamic binary translator is further improved, and the running efficiency of a translated program is improved.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Referring to FIG. 3, there is shown a block diagram of an embodiment of a binary translation apparatus of the present invention, the apparatus being applied to a binary translation system for translating source code into target code, the source code being the binary of a client platform, the target code being the binary of a host platform, the apparatus may comprise:
The first optimizing module 301 is configured to translate, when translating a call instruction to an objective function, the call instruction of the objective function into a first preset instruction of the host platform if it is determined that the objective function is a leaf function; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
A second optimizing module 302, configured to translate, when translating the return instruction into the objective function, the return instruction of the objective function into a second preset instruction of the host platform if it is determined that the objective function is a leaf function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
Optionally, the apparatus further comprises:
the first translation module is used for translating the call instruction of the target function into a first instruction sequence of the host platform when the call instruction of the target function is translated into the call instruction of the target function if the target function is not determined to be a leaf function; the first instruction sequence comprises a push instruction and a direct jump instruction; the stack pushing instruction is used for pushing the return address of the target function to the stack top of a call stack, and adjusting a stack top pointer of the call stack; the direct jump instruction is used for jumping to a calling address of the target function;
The second translation module is used for translating the return instruction of the target function into a second instruction sequence of the host platform if the target function is determined not to be a leaf function during translation of the return instruction in the target function; the second instruction sequence comprises a pop instruction and an indirect jump instruction; the pop instruction is used for taking out the return address of the target function from the stack top of the call stack according to the stack top pointer of the call stack, and storing the return address into a temporary register; the indirect jump instruction is used for fetching the return address of the objective function from the temporary register and jumping to the return address of the objective function.
Optionally, the apparatus further comprises:
The function identification module is used for inquiring whether a function call instruction exists between the call instruction of the target function and the return instruction of the target function when translating the call instruction of the target function; if not, determining that the objective function is a leaf function; if so, it is determined that the objective function is not a leaf function.
Optionally, the apparatus further comprises:
The information storage module is used for storing the related information of the objective function in a preset array, wherein the related information comprises whether the objective function is a leaf function or not;
and the information reading module is used for determining whether the target function is a leaf function or not by inquiring the related information of the target function in the preset array when translating the return instruction in the target function.
Optionally, the first preset instruction is a jump instruction with a return function, and the second preset instruction is an indirect jump instruction.
When a call instruction (such as a call instruction) of a target function is translated, if the target function is determined to be a leaf function, the binary translation device translates the call instruction of the target function into a first preset instruction of the host platform; the first preset instruction is used for storing the return address of the target function into a preset register, storing the return address of the target function by using the preset register, and jumping to a calling address corresponding to the target function; and translating the return instruction of the objective function into a second preset instruction of the host platform when translating the return instruction (such as a ret instruction) in the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function. The embodiment of the invention optimizes the translation results of the calling instruction of the leaf function and the return instruction of the function, and uses a register to replace a stack structure to access the return address of the leaf function. Therefore, the operation of partial push and pop and the maintenance of a leaf function call stack can be reduced, the consumption of storage space caused by partial stack structure can be reduced, and the number of translated target codes can be effectively reduced, so that the translation efficiency is improved, the performance of a dynamic binary translator is further improved, and the running efficiency of a translated program is improved.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
Referring to fig. 4, a schematic structural diagram of an electronic device according to an embodiment of the present invention is shown. As shown in fig. 4, the electronic device includes: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to store at least one executable instruction that causes the processor to perform the steps of the binary translation method of the foregoing embodiment.
An embodiment of the present invention provides a non-transitory computer-readable storage medium, which when executed by a program or a processor of a terminal, enables the terminal to perform the steps of the binary translation method of the foregoing embodiment.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or terminal device that comprises the element.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (13)
1. A binary translation method, applied to a binary translation system, the binary translation system configured to translate a source code into an object code, the source code being a binary code of a client platform, the object code being a binary code of a host platform, the method comprising:
When translating a call instruction of a target function, if the target function is determined to be a leaf function, translating the call instruction of the target function into a first preset instruction of the host platform; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
When translating the return instruction in the objective function, if the objective function is determined to be a leaf function, translating the return instruction of the objective function into a second preset instruction of the host platform; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
2. The method according to claim 1, wherein the method further comprises:
When translating a call instruction of an objective function, if the objective function is determined not to be a leaf function, translating the call instruction of the objective function into a first instruction sequence of the host platform; the first instruction sequence comprises a push instruction and a direct jump instruction; the stack pushing instruction is used for pushing the return address of the target function to the stack top of a call stack, and adjusting a stack top pointer of the call stack; the direct jump instruction is used for jumping to a calling address of the target function;
When translating the return instruction in the objective function, if the objective function is determined not to be a leaf function, translating the return instruction of the objective function into a second instruction sequence of the host platform; the second instruction sequence comprises a pop instruction and an indirect jump instruction; the pop instruction is used for taking out the return address of the target function from the stack top of the call stack according to the stack top pointer of the call stack, and storing the return address into a temporary register; the indirect jump instruction is used for fetching the return address of the objective function from the temporary register and jumping to the return address of the objective function.
3. The method according to claim 1, wherein the method further comprises:
Inquiring whether a function call instruction exists between a call instruction of a target function and a return instruction of the target function when translating the call instruction to the target function; if not, determining that the objective function is a leaf function; if so, it is determined that the objective function is not a leaf function.
4. The method according to claim 1, wherein the method further comprises:
storing related information of the objective function in a preset array, wherein the related information comprises whether the objective function is a leaf function or not;
and when translating a return instruction in the target function, determining whether the target function is a leaf function or not by inquiring related information of the target function in the preset array.
5. The method of claim 1, wherein the first preset instruction is a jump instruction with a return function and the second preset instruction is an indirect jump instruction.
6. A binary translation apparatus for use in a binary translation system for translating source code into object code, the source code being the binary code of a client platform and the object code being the binary code of a host platform, the apparatus comprising:
the first optimization module is used for translating the calling instruction of the target function into a first preset instruction of the host platform if the target function is determined to be a leaf function during translating the calling instruction of the target function; the first preset instruction is used for storing the return address of the target function into a preset register and jumping to a calling address corresponding to the target function; the objective function is any function in the source code;
The second optimizing module is used for translating the return instruction of the objective function into a second preset instruction of the host platform if the objective function is determined to be a leaf function during translating the return instruction into the objective function; the second preset instruction is used for reading the return address of the target function from the preset register and jumping to the return address of the target function.
7. The apparatus of claim 6, wherein the apparatus further comprises:
the first translation module is used for translating the call instruction of the target function into a first instruction sequence of the host platform when the call instruction of the target function is translated into the call instruction of the target function if the target function is not determined to be a leaf function; the first instruction sequence comprises a push instruction and a direct jump instruction; the stack pushing instruction is used for pushing the return address of the target function to the stack top of a call stack, and adjusting a stack top pointer of the call stack; the direct jump instruction is used for jumping to a calling address of the target function;
The second translation module is used for translating the return instruction of the target function into a second instruction sequence of the host platform if the target function is determined not to be a leaf function during translation of the return instruction in the target function; the second instruction sequence comprises a pop instruction and an indirect jump instruction; the pop instruction is used for taking out the return address of the target function from the stack top of the call stack according to the stack top pointer of the call stack, and storing the return address into a temporary register; the indirect jump instruction is used for fetching the return address of the objective function from the temporary register and jumping to the return address of the objective function.
8. The apparatus of claim 6, wherein the apparatus further comprises:
The function identification module is used for inquiring whether a function call instruction exists between the call instruction of the target function and the return instruction of the target function when translating the call instruction of the target function; if not, determining that the objective function is a leaf function; if so, it is determined that the objective function is not a leaf function.
9. The apparatus of claim 6, wherein the apparatus further comprises:
The information storage module is used for storing the related information of the objective function in a preset array, wherein the related information comprises whether the objective function is a leaf function or not;
and the information reading module is used for determining whether the target function is a leaf function or not by inquiring the related information of the target function in the preset array when translating the return instruction in the target function.
10. The apparatus of claim 6, wherein the first preset instruction is a jump instruction with a return function and the second preset instruction is an indirect jump instruction.
11. An electronic device, comprising: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to hold at least one executable instruction that causes the processor to perform the steps of the binary translation method according to any one of claims 1 to 5.
12. A readable storage medium, characterized in that the readable storage medium has stored thereon a program or instructions which, when executed by a processor, implement the steps of the binary translation method according to any of claims 1 to 5.
13. A computer program product comprising a computer program, characterized in that the computer program, when executed by a processor, is adapted to carry out the steps of the binary translation method according to any one of claims 1 to 5.
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