CN117908825A - Chip data sequential processing method, device, computer equipment and storage medium - Google Patents

Chip data sequential processing method, device, computer equipment and storage medium Download PDF

Info

Publication number
CN117908825A
CN117908825A CN202311838878.8A CN202311838878A CN117908825A CN 117908825 A CN117908825 A CN 117908825A CN 202311838878 A CN202311838878 A CN 202311838878A CN 117908825 A CN117908825 A CN 117908825A
Authority
CN
China
Prior art keywords
data
processing
information processing
processed
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311838878.8A
Other languages
Chinese (zh)
Inventor
陈军健
习伟
陶伟
向柏澄
张巧惠
关志华
董飞龙
谢心昊
孙沁
张泽林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Southern Power Grid Digital Grid Research Institute Co Ltd
Original Assignee
Southern Power Grid Digital Grid Research Institute Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Southern Power Grid Digital Grid Research Institute Co Ltd filed Critical Southern Power Grid Digital Grid Research Institute Co Ltd
Priority to CN202311838878.8A priority Critical patent/CN117908825A/en
Publication of CN117908825A publication Critical patent/CN117908825A/en
Pending legal-status Critical Current

Links

Landscapes

  • Stored Programmes (AREA)

Abstract

The application relates to a sequential processing method, a sequential processing device, computer equipment and a storage medium for chip data, and relates to the technical field of information processing. The method comprises the following steps: determining data to be processed corresponding to at least one information processing interface; sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface; and carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces. The application can reasonably allocate and set the data to be processed corresponding to the information processing interfaces and the initial processing sequence corresponding to each information processing interface, thereby improving the data processing efficiency without increasing the resource cost of data processing and ensuring the smooth proceeding of the data processing flow of the data to be processed.

Description

Chip data sequential processing method, device, computer equipment and storage medium
Technical Field
The present application relates to the field of information processing technologies, and in particular, to a method, an apparatus, a computer device, and a storage medium for sequentially processing chip data.
Background
With the development of the chip technology of the internet of things, the data transmission quantity of the internet of things is increased. Due to the limitation of the processing speed of the Internet of things server and the size of the Internet of things database, when the data volume exceeds the upper limits of the server and the database, the data processing efficiency of different processing ports in the Internet of things chip is greatly attenuated.
The traditional data processing efficiency improving method improves the overall data processing efficiency by optimizing the processing speed of a server and increasing the memory of a database, but the method consumes a great deal of resource cost and cannot improve the data processing efficiency with low cost.
Disclosure of Invention
In view of the foregoing, it is desirable to provide an in-order processing method, apparatus, computer device, and storage medium for chip data that can ensure data processing efficiency.
In a first aspect, the present application provides a method for processing chip data in sequence. The method comprises the following steps:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
In one embodiment, after performing data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface, the method further includes:
determining the corresponding processing saturation of each information processing interface;
And carrying out data processing on the data to be processed according to the processing saturation, the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
In one embodiment, the data processing for the data to be processed according to each processing saturation, each information processing interface, and the initial processing sequence corresponding to each information processing interface includes:
updating the initial processing sequence corresponding to each information processing interface to obtain a target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold;
And carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment, the determining the data to be processed corresponding to the at least one information processing interface includes:
Acquiring data task information of data to be processed;
and determining the data to be processed corresponding to at least one information processing interface according to the data task information of the data to be processed.
In one embodiment, the sorting processing is performed on the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface, including:
determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface;
and according to the data processing aging, sequencing the data to be processed of the information processing interfaces to obtain an initial processing sequence corresponding to each information processing interface.
In one embodiment, the sorting processing is performed on the data to be processed of the information processing interfaces according to the data processing aging, to obtain an initial processing sequence corresponding to each information processing interface, including:
And sequencing the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, so as to obtain the initial processing sequence corresponding to each information processing interface.
In a second aspect, the application further provides a device for processing chip data in sequence. The device comprises:
the determining module is used for determining data to be processed corresponding to at least one information processing interface;
The first processing module is used for sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
And the second processing module is used for carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
In a third aspect, the present application also provides a computer device. The computer device comprises a memory storing a computer program and a processor which when executing the computer program performs the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
In a fourth aspect, the present application also provides a computer-readable storage medium. The computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
In a fifth aspect, the present application also provides a computer program product. The computer program product comprises a computer program which, when executed by a processor, implements the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
The method, the device, the computer equipment and the storage medium for sequentially processing the chip data realize the data processing of the data to be processed according to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces by determining the data to be processed corresponding to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces. According to the above, the application ensures that each information processing interface can effectively process the corresponding data to be processed by determining the data to be processed corresponding to at least one information processing interface, ensures that the processing flow of the data to be processed is smoothly performed, realizes reasonable arrangement of the processing sequence of each information processing interface for the data to be processed according to the initial processing sequence corresponding to each information processing interface, further ensures that the processing flow of the data to be processed is smoothly performed, and improves the processing efficiency of each information processing interface for the data to be processed; compared with the method for improving the data processing efficiency by optimizing the processing speed of the server and increasing the memory of the database in the prior art, the method can reasonably allocate and set the data to be processed corresponding to the information processing interfaces and the initial processing sequence corresponding to each information processing interface, so that the data processing efficiency is improved on the premise of not increasing the resource cost of data processing, and the smooth proceeding of the data processing flow of the data to be processed is ensured.
Drawings
Fig. 1 is a flow chart of a first method for sequentially processing chip data according to an embodiment of the present application;
FIG. 2 is a flow chart of a second method for sequentially processing chip data according to an embodiment of the present application;
FIG. 3 is a schematic flow chart of determining an initial processing sequence corresponding to each information processing interface according to an embodiment of the present application;
Fig. 4 is a flow chart of a third method for sequentially processing chip data according to an embodiment of the present application;
FIG. 5 is a block diagram of a first chip data sequential processing apparatus according to an embodiment of the present application;
FIG. 6 is a block diagram of a second chip data sequential processing apparatus according to an embodiment of the present application;
FIG. 7 is a block diagram illustrating a third apparatus for sequentially processing chip data according to an embodiment of the present application;
fig. 8 is an internal structural diagram of a computer device in one embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application. In the description of the present application, a description of the terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
In one embodiment, as shown in fig. 1, a method for sequentially processing chip data is provided, where the method is applied to a terminal for illustration, it is understood that the method may also be applied to a server, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. The terminal can be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, internet of things equipment and portable wearable equipment, and the internet of things equipment can be smart speakers, smart televisions, smart air conditioners, smart vehicle-mounted equipment and the like. The portable wearable device may be a smart watch, smart bracelet, headset, or the like. The server may be implemented as a stand-alone server or as a server cluster composed of a plurality of servers. In this embodiment, the method includes the steps of:
s101, determining data to be processed corresponding to at least one information processing interface.
It should be noted that, in order to ensure that each information processing interface can effectively perform data processing on corresponding data to be processed, and ensure that the processing flow of the data to be processed is performed smoothly, when it is required to determine the data to be processed corresponding to at least one information processing interface, the following contents may be included: acquiring data task information of data to be processed; and determining the data to be processed corresponding to the at least one information processing interface according to the data task information of the data to be processed.
Wherein, the data task information of the data to be processed can include, but is not limited to: data age information and processing task information. Further, the data aging information is used for representing the aging range of the data to be processed, wherein the aging range needs to be subjected to data processing; the processing task information is used for representing the corresponding task processing type when the task to be processed performs task processing.
Further, when the data to be processed corresponding to the at least one information processing interface needs to be determined, the data aging information and the processing task information of each data to be processed can be obtained, and each data to be processed is distributed to the at least one information processing interface according to the data aging information and the processing task information, so that the data to be processed corresponding to the at least one information processing interface is determined.
In one embodiment of the present application, when an information processing interface corresponding to certain data to be processed needs to be determined, a first filtering is performed on at least one candidate processing interface according to the data aging information of the data to be processed, and a first processing interface conforming to the data aging information is determined from the candidate processing interfaces; further, according to the processing task information of the data to be processed, performing second screening on the first processing interface, and determining an information processing interface which accords with the data aging information from the first processing interface; therefore, the information processing interface corresponding to each piece of data to be processed can be determined through the flow, so that the data to be processed corresponding to at least one information processing interface can be determined.
If at least two information processing interfaces satisfy the data aging information and the processing task information of a certain data to be processed, predicting the prediction processing aging of each information processing interface for processing the data to be processed, and using the information processing interface with the shortest prediction processing aging as the information processing interface actually corresponding to the data to be processed.
S102, sorting the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface.
It should be noted that, the processing sequence of the data to be processed can be reasonably arranged for each information processing interface, so that the data processing timeliness of each data to be processed in each information processing interface needs to be determined; and further, according to the data processing time of each piece of data to be processed in each information processing interface, sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface.
In one embodiment of the present application, when an initial processing sequence corresponding to each information processing interface needs to be determined, the following may be specifically included: determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface; and according to the time effect of data processing, sequencing the data to be processed of the information processing interfaces to obtain the initial processing sequence corresponding to each information processing interface.
S103, carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
It should be noted that, in order to ensure continuous and stable operation of each information processing interface, it is necessary to detect the processing saturation of each information processing interface, so as to prevent the processing saturation of a certain information processing interface from exceeding a saturation threshold, thereby affecting the data processing efficiency of the data to be processed.
Further, if it is detected that the processing saturation of a certain information processing interface exceeds the saturation threshold, it indicates that the data processing efficiency of the data to be processed is affected, so that unprocessed data which is not processed yet can be determined from the data to be processed corresponding to each information processing interface; updating the initial processing sequence corresponding to each information processing interface according to the unprocessed data to obtain the target processing sequence corresponding to each information processing interface; and further, according to each information processing interface and the corresponding target processing sequence of each information processing interface, carrying out data processing on the data to be processed.
According to the sequential processing method of the chip data, the data to be processed is processed according to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces by determining the data to be processed corresponding to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces. According to the above, the application ensures that each information processing interface can effectively process the corresponding data to be processed by determining the data to be processed corresponding to at least one information processing interface, ensures that the processing flow of the data to be processed is smoothly performed, realizes reasonable arrangement of the processing sequence of each information processing interface for the data to be processed according to the initial processing sequence corresponding to each information processing interface, further ensures that the processing flow of the data to be processed is smoothly performed, and improves the processing efficiency of each information processing interface for the data to be processed; compared with the method for improving the data processing efficiency by optimizing the processing speed of the server and increasing the memory of the database in the prior art, the method can reasonably allocate and set the data to be processed corresponding to the information processing interfaces and the initial processing sequence corresponding to each information processing interface, so that the data processing efficiency is improved on the premise of not increasing the resource cost of data processing, and the smooth proceeding of the data processing flow of the data to be processed is ensured.
In one embodiment, as shown in fig. 2, due to the limitation of the processing rate of the server of the internet of things and the size of the database of the internet of things, when the data volume exceeds the upper limits of the server and the database, the data processing efficiency of different processing ports in the chip of the internet of things will be greatly attenuated, so as to solve the above technical problem, after the data processing is performed on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface, the method specifically may include the following steps:
s201, determining the processing saturation corresponding to each information processing interface.
Further, when the processing saturation of each information processing interface needs to be determined, the data processing efficiency and/or the data processing time efficiency when each information processing interface performs data processing can be obtained, and then the processing saturation of each information processing interface is determined according to the data processing efficiency and/or the data processing time efficiency.
In one embodiment of the present application, when it is required to determine the processing saturation of at least one information processing interface, the following may be specifically included: presetting data processing efficiency and/or data processing timeliness corresponding to different processing saturation teams; furthermore, when the processing saturation of each information processing interface needs to be determined, the processing saturation of each information processing interface can be determined by reading the data processing efficiency and/or the data processing time efficiency of each data processing port and according to the data processing efficiency and/or the data processing time efficiency corresponding to different processing saturation.
In another embodiment of the present application, when it is required to determine the processing saturation of at least one information processing interface, the following may be further included: and (3) training a saturation analysis model in advance, and inputting the data processing efficiency and/or the data processing time efficiency of each information processing interface into the saturation analysis model to obtain an output result of the saturation analysis model, wherein the output result is the processing saturation of each information processing interface.
The training process of the saturation analysis model comprises the following steps: obtaining at least one sample treatment efficiency and/or sample treatment aging, comparing the sample treatment efficiency and/or sample treatment aging, and determining sample saturation of each sample treatment efficiency and/or sample treatment aging through a manual analysis mode; and training the saturation analysis model according to the sample processing efficiency and/or sample processing timeliness and the sample saturation of the sample processing efficiency and/or sample processing timeliness to obtain the trained saturation analysis model.
S202, data processing is carried out on the data to be processed according to the processing saturation degree, the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
It should be noted that, when data processing needs to be performed on the data to be processed, the following may be specifically included: updating the initial processing sequence corresponding to each information processing interface to obtain the target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold; and carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment of the present application, if it is detected that the processing saturation of a certain information processing interface exceeds a saturation threshold, it indicates that the data processing efficiency of the data to be processed is affected, so that unprocessed data that is not processed yet can be determined from the data to be processed corresponding to each information processing interface; updating the initial processing sequence corresponding to each information processing interface according to the unprocessed data to obtain the target processing sequence corresponding to each information processing interface; and further, according to each information processing interface and the corresponding target processing sequence of each information processing interface, carrying out data processing on the data to be processed.
Specifically, when the initial processing sequence corresponding to each information processing interface is updated according to the unprocessed data, the unprocessed data can be reassigned to each information processing interface to obtain new to-be-processed data corresponding to each information processing interface, and the new to-be-processed data of each information processing interface is subjected to sorting processing to obtain the target processing sequence corresponding to each information processing interface.
According to the method for sequentially processing the chip data, the target processing sequence corresponding to each information processing interface is determined, and the data to be processed is processed, so that reasonable arrangement of the processing sequence of each information processing interface for the data to be processed is realized, smooth processing of the processing flow of the data to be processed is further ensured, the processing efficiency of each information processing interface for the data to be processed is improved, the data processing efficiency is improved on the premise that the resource cost of data processing is not increased, and smooth processing of the data processing flow of the data to be processed is ensured.
In one embodiment, as shown in fig. 3, when it is required to determine the initial processing sequence corresponding to each information processing interface, the following may be specifically included:
S301, determining the data processing time effect of the data to be processed of each information processing interface.
The time of data processing of the data to be processed refers to the time period required by the information processing interface when the data to be processed is processed.
In one embodiment of the present application, when it is required to determine the data processing timeliness of the data to be processed of the information processing interface, if the information processing interface performs data processing on the data to be processed, a history processing record of the information processing interface for the data to be processed may be obtained, and further, a time period required by the information processing interface when performing data processing on the data to be processed is obtained from the history processing record, so as to obtain the data processing timeliness of the data to be processed.
In another embodiment of the present application, when the data processing aging of the data to be processed of the information processing interface needs to be determined, an aging prediction model may be obtained through training, and the interface parameter of the information processing interface and the data task information of the data to be processed are input into the aging prediction model to obtain an output result of the aging prediction model, where the output result is the data processing aging of the data to be processed of the information processing interface.
S302, sorting the data to be processed of the information processing interfaces according to the time of data processing, and obtaining the initial processing sequence corresponding to each information processing interface.
It should be noted that, for each information processing interface, when an initial processing sequence corresponding to each information processing interface needs to be determined, the to-be-processed data of the information processing interface may be sequenced according to the sequence from short to long to obtain the initial processing sequence corresponding to each information processing interface.
Specifically, according to the aging of data processing, the arrangement position of each piece of data to be processed in the initial processing sequence is determined, and further, according to the arrangement position of each piece of data to be processed in the initial processing sequence, the initial processing sequence corresponding to each information processing interface is determined.
According to the method for sequentially processing the chip data, the initial processing sequence corresponding to each information processing interface is determined by determining the data processing timeliness of the data to be processed of the information processing interfaces, so that the reasonable arrangement of the processing sequence of each information processing interface for the data to be processed is realized, and the smooth processing flow of the data to be processed is further ensured.
In one embodiment, as shown in fig. 4, when data processing is required, the following may be specifically included:
s401, acquiring data task information of data to be processed.
S402, determining the data to be processed corresponding to at least one information processing interface according to the data task information of the data to be processed.
S403, determining the data processing time effect of the data to be processed of each information processing interface.
S404, sorting the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, and obtaining the initial processing sequence corresponding to each information processing interface.
S405, according to each information processing interface and the initial processing sequence corresponding to each information processing interface, data processing is carried out on the data to be processed.
S406, determining the processing saturation corresponding to each information processing interface.
And S407, when the processing saturation of the information processing interfaces is larger than the saturation threshold, updating the initial processing sequence corresponding to each information processing interface to obtain the target processing sequence corresponding to each information processing interface.
S408, carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
According to the sequential processing method of the chip data, the data to be processed is processed according to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces by determining the data to be processed corresponding to the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces. According to the above, the application ensures that each information processing interface can effectively process the corresponding data to be processed by determining the data to be processed corresponding to at least one information processing interface, ensures that the processing flow of the data to be processed is smoothly performed, realizes reasonable arrangement of the processing sequence of each information processing interface for the data to be processed according to the initial processing sequence corresponding to each information processing interface, further ensures that the processing flow of the data to be processed is smoothly performed, and improves the processing efficiency of each information processing interface for the data to be processed; compared with the method for improving the data processing efficiency by optimizing the processing speed of the server and increasing the memory of the database in the prior art, the method can reasonably allocate and set the data to be processed corresponding to the information processing interfaces and the initial processing sequence corresponding to each information processing interface, so that the data processing efficiency is improved on the premise of not increasing the resource cost of data processing, and the smooth proceeding of the data processing flow of the data to be processed is ensured.
It should be understood that, although the steps in the flowcharts related to the above embodiments are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
Based on the same inventive concept, the embodiment of the application also provides a sequential processing device for chip data, which is used for realizing the sequential processing method of the related chip data. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the following embodiments of the device for processing chip data in sequence may be referred to the limitation of the method for processing chip data in sequence, which is not described herein.
In one embodiment, as shown in fig. 5, there is provided an in-order processing apparatus of chip data, including: a determination module 10, a first processing module 20 and a second processing module 30, wherein:
The determining module 10 is configured to determine data to be processed corresponding to at least one information processing interface.
The determining module is specifically used for acquiring data task information of the data to be processed; and determining the data to be processed corresponding to the at least one information processing interface according to the data task information of the data to be processed.
The first processing module 20 is configured to perform sorting processing on data to be processed of each information processing interface, so as to obtain an initial processing sequence corresponding to each information processing interface.
The second processing module 30 is configured to perform data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
The chip data sequential processing device performs data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface by determining the data to be processed corresponding to each information processing interface and the initial processing sequence corresponding to each information processing interface. According to the above, the application ensures that each information processing interface can effectively process the corresponding data to be processed by determining the data to be processed corresponding to at least one information processing interface, ensures that the processing flow of the data to be processed is smoothly performed, realizes reasonable arrangement of the processing sequence of each information processing interface for the data to be processed according to the initial processing sequence corresponding to each information processing interface, further ensures that the processing flow of the data to be processed is smoothly performed, and improves the processing efficiency of each information processing interface for the data to be processed; compared with the method for improving the data processing efficiency by optimizing the processing speed of the server and increasing the memory of the database in the prior art, the method can reasonably allocate and set the data to be processed corresponding to the information processing interfaces and the initial processing sequence corresponding to each information processing interface, so that the data processing efficiency is improved on the premise of not increasing the resource cost of data processing, and the smooth proceeding of the data processing flow of the data to be processed is ensured.
In one embodiment, as shown in fig. 6, there is provided an in-order processing apparatus of chip data, in which a first processing module 20 includes: a first determination unit 21 and a first processing unit 22, wherein:
a first determining unit 21, configured to determine a processing saturation corresponding to each information processing interface;
The first processing unit 22 is configured to perform data processing on the data to be processed according to each processing saturation level, each information processing interface, and an initial processing sequence corresponding to each information processing interface.
The processing unit is specifically configured to update an initial processing sequence corresponding to each information processing interface to obtain a target processing sequence corresponding to each information processing interface when there is a processing saturation of the information processing interface greater than a saturation threshold; and carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment, as shown in fig. 7, there is provided an in-order processing apparatus of chip data, in which the second processing module 30 includes: a second determination unit 31 and a second processing unit 32, wherein:
A second determining unit 31, configured to determine, for each information processing interface, a data processing age of data to be processed of the information processing interface;
And the second processing unit 32 is configured to perform ordering processing on the data to be processed of the information processing interfaces according to the aging of data processing, so as to obtain an initial processing sequence corresponding to each information processing interface.
The second processing unit is specifically configured to perform sorting processing on the data to be processed of the information processing interfaces according to the order of the data to be processed from short to long, so as to obtain an initial processing order corresponding to each information processing interface.
The above-described modules in the chip data in-order processing apparatus may be implemented in whole or in part by software, hardware, and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer device is provided, which may be a terminal, and the internal structure thereof may be as shown in fig. 8. The computer device includes a processor, a memory, an input/output interface, a communication interface, a display unit, and an input means. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a method for in-order processing of chip data. The display unit of the computer device is used for forming a visual picture, and can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be a key, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.
It will be appreciated by those skilled in the art that the structure shown in FIG. 8 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.
In one embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
In one embodiment, the processor when executing the computer program further performs the steps of: after data processing is performed on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces, the method further comprises the following steps:
determining the corresponding processing saturation of each information processing interface;
And carrying out data processing on the data to be processed according to the processing saturation, the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces.
In one embodiment, the processor when executing the computer program further performs the steps of: according to each processing saturation degree, each information processing interface and the corresponding initial processing sequence of each information processing interface, carrying out data processing on the data to be processed, wherein the data processing method comprises the following steps:
Updating the initial processing sequence corresponding to each information processing interface to obtain the target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold;
And carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment, the processor when executing the computer program further performs the steps of: determining data to be processed corresponding to at least one information processing interface, including:
Acquiring data task information of data to be processed;
And determining the data to be processed corresponding to the at least one information processing interface according to the data task information of the data to be processed.
In one embodiment, the processor when executing the computer program further performs the steps of: sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface, wherein the method comprises the following steps:
determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface;
and according to the time effect of data processing, sequencing the data to be processed of the information processing interfaces to obtain the initial processing sequence corresponding to each information processing interface.
In one embodiment, the processor when executing the computer program further performs the steps of: according to the time effect of data processing, the data to be processed of the information processing interfaces are subjected to sorting processing to obtain an initial processing sequence corresponding to each information processing interface, and the method comprises the following steps:
And sequencing the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, so as to obtain the initial processing sequence corresponding to each information processing interface.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
In one embodiment, the computer program when executed by the processor further performs the steps of: after data processing is performed on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces, the method further comprises the following steps:
determining the corresponding processing saturation of each information processing interface;
And carrying out data processing on the data to be processed according to the processing saturation, the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces.
In one embodiment, the computer program when executed by the processor further performs the steps of: according to each processing saturation degree, each information processing interface and the corresponding initial processing sequence of each information processing interface, carrying out data processing on the data to be processed, wherein the data processing method comprises the following steps:
Updating the initial processing sequence corresponding to each information processing interface to obtain the target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold;
And carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment, the computer program when executed by the processor further performs the steps of: determining data to be processed corresponding to at least one information processing interface, including:
Acquiring data task information of data to be processed;
And determining the data to be processed corresponding to the at least one information processing interface according to the data task information of the data to be processed.
In one embodiment, the computer program when executed by the processor further performs the steps of: sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface, wherein the method comprises the following steps:
determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface;
and according to the time effect of data processing, sequencing the data to be processed of the information processing interfaces to obtain the initial processing sequence corresponding to each information processing interface.
In one embodiment, the computer program when executed by the processor further performs the steps of: according to the time effect of data processing, the data to be processed of the information processing interfaces are subjected to sorting processing to obtain an initial processing sequence corresponding to each information processing interface, and the method comprises the following steps:
And sequencing the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, so as to obtain the initial processing sequence corresponding to each information processing interface.
In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
In one embodiment, the computer program when executed by the processor further performs the steps of: after data processing is performed on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces, the method further comprises the following steps:
determining the corresponding processing saturation of each information processing interface;
And carrying out data processing on the data to be processed according to the processing saturation, the information processing interfaces and the initial processing sequences corresponding to the information processing interfaces.
In one embodiment, the computer program when executed by the processor further performs the steps of: according to each processing saturation degree, each information processing interface and the corresponding initial processing sequence of each information processing interface, carrying out data processing on the data to be processed, wherein the data processing method comprises the following steps:
Updating the initial processing sequence corresponding to each information processing interface to obtain the target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold;
And carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
In one embodiment, the computer program when executed by the processor further performs the steps of: determining data to be processed corresponding to at least one information processing interface, including:
Acquiring data task information of data to be processed;
And determining the data to be processed corresponding to the at least one information processing interface according to the data task information of the data to be processed.
In one embodiment, the computer program when executed by the processor further performs the steps of: sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface, wherein the method comprises the following steps:
determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface;
and according to the time effect of data processing, sequencing the data to be processed of the information processing interfaces to obtain the initial processing sequence corresponding to each information processing interface.
In one embodiment, the computer program when executed by the processor further performs the steps of: according to the time effect of data processing, the data to be processed of the information processing interfaces are subjected to sorting processing to obtain an initial processing sequence corresponding to each information processing interface, and the method comprises the following steps:
And sequencing the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, so as to obtain the initial processing sequence corresponding to each information processing interface.
It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region.
Those skilled in the art will appreciate that implementing all or part of the above-described methods in accordance with the embodiments may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high density embedded nonvolatile memory, resistive random access memory (ReRAM), magneto-resistive random access memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric memory (Ferroelectric Random Access Memory, FRAM), phase change memory (PHASE CHANGE memory, PCM), graphene memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in various forms such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The databases referred to in the embodiments provided herein may include at least one of a relational database and a non-relational database. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processor referred to in the embodiments provided in the present application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, or the like, but is not limited thereto.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims (10)

1. A method for in-order processing of chip data, the method comprising:
determining data to be processed corresponding to at least one information processing interface;
Sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
and carrying out data processing on the data to be processed according to each information processing interface and the initial processing sequence corresponding to each information processing interface.
2. The method according to claim 1, further comprising, after performing data processing on the data to be processed according to each information processing interface and the initial processing order corresponding to each information processing interface:
determining the corresponding processing saturation of each information processing interface;
And carrying out data processing on the data to be processed according to the processing saturation, the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
3. The method according to claim 2, wherein the performing data processing on the data to be processed according to each processing saturation, each information processing interface, and the initial processing order corresponding to each information processing interface includes:
updating the initial processing sequence corresponding to each information processing interface to obtain a target processing sequence corresponding to each information processing interface when the processing saturation of the information processing interface is larger than the saturation threshold;
And carrying out data processing on the data to be processed according to each information processing interface and the target processing sequence corresponding to each information processing interface.
4. The method of claim 1, wherein determining the data to be processed corresponding to the at least one information processing interface comprises:
Acquiring data task information of data to be processed;
and determining the data to be processed corresponding to at least one information processing interface according to the data task information of the data to be processed.
5. The method of claim 1, wherein the sorting the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface, includes:
determining the data processing time effect of the data to be processed of each information processing interface aiming at each information processing interface;
and according to the data processing aging, sequencing the data to be processed of the information processing interfaces to obtain an initial processing sequence corresponding to each information processing interface.
6. The method according to claim 5, wherein the sorting the data to be processed of the information processing interfaces according to the aging of the data processing to obtain the initial processing sequence corresponding to each information processing interface includes:
And sequencing the data to be processed of the information processing interfaces according to the sequence from short to long of the data to be processed, so as to obtain the initial processing sequence corresponding to each information processing interface.
7. An in-order processing apparatus for chip data, the apparatus comprising:
the determining module is used for determining data to be processed corresponding to at least one information processing interface;
The first processing module is used for sequencing the data to be processed of each information processing interface to obtain an initial processing sequence corresponding to each information processing interface;
And the second processing module is used for carrying out data processing on the data to be processed according to the information processing interfaces and the initial processing sequence corresponding to the information processing interfaces.
8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 6 when the computer program is executed.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 6.
10. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 6.
CN202311838878.8A 2023-12-28 2023-12-28 Chip data sequential processing method, device, computer equipment and storage medium Pending CN117908825A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311838878.8A CN117908825A (en) 2023-12-28 2023-12-28 Chip data sequential processing method, device, computer equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311838878.8A CN117908825A (en) 2023-12-28 2023-12-28 Chip data sequential processing method, device, computer equipment and storage medium

Publications (1)

Publication Number Publication Date
CN117908825A true CN117908825A (en) 2024-04-19

Family

ID=90681123

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311838878.8A Pending CN117908825A (en) 2023-12-28 2023-12-28 Chip data sequential processing method, device, computer equipment and storage medium

Country Status (1)

Country Link
CN (1) CN117908825A (en)

Similar Documents

Publication Publication Date Title
CN116468543A (en) Credit risk assessment method, device, equipment and medium based on federal learning
CN116842307B (en) Data processing method, device, equipment, chip and storage medium
CN111221827B (en) Database table connection method and device based on graphic processor, computer equipment and storage medium
CN116991800A (en) File acquisition system, method, device, computer equipment and storage medium
CN117908825A (en) Chip data sequential processing method, device, computer equipment and storage medium
CN116051345A (en) Image data processing method, device, computer equipment and readable storage medium
CN117909093A (en) Data distribution processing method and device for chip interface
CN113918651A (en) Business data and capital flow processing method, device, equipment and medium
CN117873824A (en) Chip power consumption optimization method, device, computer equipment and storage medium
CN114360426B (en) Gamma adjusting method, gamma adjusting device, computer equipment and storage medium
CN117612192A (en) Electronic drawing information identification method, system, electronic equipment and storage medium
CN116860367A (en) Function entry display method, device, computer equipment and storage medium
CN117992061A (en) Program conversion method, program conversion device, computer device, and computer-readable storage medium
CN117314036A (en) Work order distribution method, apparatus, device, storage medium and program product
CN117407418A (en) Information acquisition method, information acquisition device, computer apparatus, storage medium, and program product
CN117312653A (en) Service policy determination method, device, computer equipment and storage medium
CN117035980A (en) Resource borrowing evaluation method, device, computer equipment and storage medium
CN116627876A (en) Address remapping method, device, equipment and storage medium
CN116128616A (en) Method and device for calculating data processing of resource risk trial calculation and computer equipment
CN116467332A (en) White balance adjustment method, white balance adjustment device, computer equipment and storage medium
CN114138196A (en) Power system data storage method and device, computer equipment and storage medium
CN116204296A (en) Algorithm execution method, device, computer equipment and storage medium of monitoring system
CN116126490A (en) Resource scheduling method, device, computer equipment and storage medium
CN116894721A (en) Index prediction method and device and computer equipment
CN116388388A (en) Power distribution terminal interaction method, device, computer equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination