CN117893638A - Timing diagram generation method, device and equipment of fusion state machine and storage medium - Google Patents
Timing diagram generation method, device and equipment of fusion state machine and storage medium Download PDFInfo
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Abstract
The invention provides a method, a device, equipment and a storage medium for generating a timing diagram of a fusion state machine, wherein the method comprises the following steps: determining a service scene required by a semiconductor simulation platform; determining a state machine involved in a service scene and an interface instruction for describing interaction behavior of a semiconductor simulation platform; the interaction process of at least one state machine influenced by the interface instruction and the interface instruction is drawn in a time sequence diagram mode. The invention fuses the state machines related in the service scene and the interface instructions for describing the interaction behavior of the semiconductor simulation platform in the time sequence diagram for drawing, and not only can the current state, the previous state, the state transition condition and the state duration of each state machine in a certain specific time node be shown by using the time sequence diagram, but also the time sequence of the change of each state machine and the association relation among each state machine can be seen, and the requirements of the service scene in the aspects of integrity and time sequence can be clearly shown in one time sequence diagram.
Description
Technical Field
The present invention relates to the field of computer simulation technologies, and in particular, to a method, an apparatus, a device, and a storage medium for generating a timing chart of a fusion state machine.
Background
The full-digital simulation platform of the wafer production line is manufactured by combining a novel research and development mechanism with a wafer manufacturer to realize the independent controllable requirements of various equipment and industrial software required in the semiconductor manufacturing process, wherein the process technology simulation of the wafer on a semiconductor machine is the most critical one.
In an actual physical environment, the wafer has a plurality of manufacturing processes and complex service on the semiconductor machine. Therefore, at least ten state machines are needed in the semiconductor simulation machine to record various behavior states of the description machine. The number of the state machines involved in the semiconductor simulation machine is huge, the variety is various, and some hidden association relations exist among the state machines, so that the integrity and the time sequence of the state machines cannot be clearly shown by simple text description, the correctness of the state machines is difficult to verify, and the understanding and learning cost is increased. It is a significant challenge for product designers, software developers, and testers.
Disclosure of Invention
The invention provides a method, a device, equipment and a storage medium for generating a timing diagram of a fusion state machine, and aims to solve the problems in the prior art.
The invention adopts the following technical scheme:
in a first aspect, the present invention provides a method for generating a timing diagram of a fusion state machine, including:
determining a service scene required by a semiconductor simulation platform;
Determining a state machine involved in the service scene and an interface instruction for describing the interaction behavior of the semiconductor simulation platform;
and drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a time sequence diagram mode.
According to the timing diagram generating method of the fusion state machine provided by the invention, the step of determining the state machine involved in the service scene and the interface instruction for describing the interaction behavior of the semiconductor simulation platform comprises the following steps:
Determining a virtual machine platform and a virtual host of the semiconductor simulation platform;
Determining the related state machine according to the virtual machine station;
And acquiring the interface instruction for communication interaction between the virtual host and the virtual machine.
According to the method for generating the timing diagram of the fusion state machine provided by the invention, the step of drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a manner of the timing diagram comprises the following steps:
constructing a time sequence diagram, and setting a first area and a second area in the time sequence diagram;
drawing a state machine related to the business scene and an initial state of the state machine in the first area;
And drawing the interface instruction in the second area, and drawing other states of the state machine influenced by the interface instruction and the interaction process of the interface instruction, wherein the other states of the state machine are states after the initial state.
According to the timing diagram generating method of the fusion state machine provided by the invention, the step of drawing the interaction process of the other states of the state machine, which are influenced by the interface instruction, and the interface instruction comprises the following steps:
acquiring other states of the state machine affected by the interface instruction;
Drawing other states of the state machine in the first area, and drawing the other states of the state machine and the initial state of the corresponding state machine into an association relation;
And drawing the interaction process of the state machine with state change according to the occurrence time sequence of the interface instruction.
According to the method for generating the timing diagram of the fusion state machine provided by the invention, the step of drawing the interaction process of the state machine with state change according to the occurrence timing of the interface instruction comprises the following steps:
determining a change time point of the current state of the state machine according to the receiving time of the interface instruction sent by the virtual host machine by the virtual machine station;
determining the state duration of the current state of the state machine according to the time interval of the adjacent interface instructions received by the virtual machine station, or,
And determining the state duration of the current state of the state machine according to the change time point of the current state and the change time point of the next state.
According to the method for generating the timing diagram of the fusion state machine provided by the invention, after the step of interactively drawing the state machine influenced by the interface instruction and the interface instruction, the method further comprises the following steps:
And checking the integrity of the interface instruction according to the interaction information of the time sequence diagram.
According to the method for generating the timing diagram of the fusion state machine provided by the invention, after the step of interactively drawing the state machine influenced by the interface instruction and the interface instruction, the method further comprises the following steps:
and verifying the state change of the state machine according to the interface interaction time point contained in the interaction information.
In a second aspect, the present invention provides a timing chart generating apparatus for a fusion state machine, including:
The first determining module is used for determining a service scene required by the semiconductor simulation platform;
the second determining module is used for determining state machines and interface instructions related to the business scene;
And the timing diagram drawing module is used for drawing the interaction process of the interface instruction and at least one state machine influenced by the interface instruction in a timing diagram mode.
In a third aspect, the present invention provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the timing diagram generation method of a fusion state machine as described in any one of the above when executing the program.
In a fourth aspect, the present invention provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of a timing diagram generation method of a fusion state machine as described in any of the above.
According to the time sequence diagram generation method, the device, the equipment and the storage medium for the fused state machine, the state machines related in the service scene and the interface instructions for describing the interaction behavior of the semiconductor simulation platform are fused in the time sequence diagram to draw, and state change time points, state transition conditions, state duration time and the like of each state machine in the service scene interaction process are drawn. The time sequence diagram can be used for showing the current state, the previous state, the state transition condition and the state duration of each state machine under a certain specific time node, and also can be used for showing the time sequence of the change of each state machine and the association relation among each state machine, and the requirements of business scenes in the aspects of integrity and time sequence can be clearly shown in one time sequence diagram. In addition, for a developer, the time sequence diagram can form a good development specification diagram, and the state change rule, interface interaction time point, each state dependency relationship and the like of a state machine in the diagram can be clearly seen; for testers, test points and test methods different from the traditional test schemes can be formed, and the test method has good reference function and guiding significance for writing the test schemes.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other embodiments may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a state machine diagram taken from a semiconductor machine software manual in the prior art;
FIG. 2 is a timing diagram illustrating the interaction between a semiconductor device and a host in the prior art;
FIG. 3 is a flowchart illustrating a method for generating a timing diagram of a fusion state machine according to an embodiment of the present invention;
FIG. 4 is an illustration of a novel timing diagram for a fusion state machine provided by an embodiment of the present invention;
FIG. 5 is a schematic diagram of a timing diagram generating device of a fusion state machine according to an embodiment of the present invention;
Fig. 6 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention, as well as the preferred embodiments thereof, together with the following detailed description of the invention, given by way of illustration only, together with the accompanying drawings.
It should be noted that those skilled in the art explicitly and implicitly understand that the described embodiments of the invention can be combined with other embodiments without conflict. Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The terms "a," "an," "the," and similar referents in the context of the invention are not to be construed as limiting the quantity, but rather as singular or plural. The terms "comprising," "including," "having," and any variations thereof, are intended to cover a non-exclusive inclusion; the terms "first," "second," "third," and the like, as used herein, are merely distinguishing between similar objects and not representing a particular ordering of objects.
The order illustrated herein represents one exemplary scenario when referring to method steps, but does not represent a limitation on the order.
The applicant found that in the software manual of the existing semiconductor machine, a single state machine is described in detail, and as shown in fig. 1, a state machine diagram is taken from the software manual, and is an Access Mode state machine, for which there are two states: MANUAL and AUTO. The numbers 1,2,3 in the figure represent a state transition, e.g., 2 indicates a switch from the MANUAL state to the AUTO state. The software manual is also accompanied by a detailed description of each state transition of the state machines, and at least ten state machines exist in the manual, and the states of the complex state machines are close to twenty. If these state machines are understood separately, they are costly to develop, inconvenient to maintain, and difficult to hook with business scenarios.
In addition, in the conventional timing chart of the communication between the semiconductor machine and the host, only the interaction instruction of the interface communication is provided, and the internal state machine change is not involved, as shown in fig. 2, which is a part of the interaction details in the scene of establishing connection interaction between the semiconductor machine and the host. It is not difficult to find that the method has a certain guiding significance from the independent view of the diagram describing the state machine and the time sequence diagram describing the interaction behavior, but the whole situation under the service scene cannot be clearly described. Therefore, the invention provides a method, a device, equipment and a storage medium for generating a timing diagram of a fusion state machine, aiming at clearly describing the association relationship between interfaces and the state machine in a timing diagram mode for each service scene.
The following is an explanation of key terms and technical abbreviations in the present invention:
vEQP: english is called virtual equipment, which refers to a semiconductor simulation machine.
Host: the host, which refers to a software system that can communicate with vEQP, communicates with the machine through interface instructions (SF instructions) and can operate the machine to perform a series of actions, such as EAP software.
EAP is an abbreviation for equipment automation programming (Equipment Automation Programming), which is a system used to control the automated production of semiconductor manufacturing equipment.
State machine: generally referred to as finite state machines, are mathematical computational models that represent finite states and actions such as transitions and actions between those states. There are several terms in state machines: state, transition, action, transition condition (transition condition).
State (state): discretizing a system can result in a wide variety of states, which are of course limited. For example: the gate inhibition machine can be divided into an opening state and a closing state; the electric fan can be divided into a state of off, first gear, second gear, third gear and the like.
Transition (transfer): one state receiving an input that certain actions have been performed to another state is a transition. Defining transitions is the process of transitions in defining state machines.
Transition condition (transfer conditions): also called event, in a certain state, only transition condition (transition condition) is reached, the state machine transitions to the next state according to the transition flow, and the corresponding action is executed.
Action (action): there are a number of actions during the operation of the state machine. Such as: entry action [ in entry state ], exit action [ in exit state ], transition action [ in specific transition ].
SF instruction: the SF instruction is an interface instruction for the semiconductor device to communicate with host based on SECS/GEM protocol implementation. For example, the functions represented by the interface instructions S1Fy, S1 are classified as device states, where y is odd and represents a request and y is even and represents a response. The SF instruction is divided into a request instruction and a response instruction, the interface instruction S1F1 represents the request instruction sent by host to vEQP, inquires vEQP whether to be online, and the interface instruction S1F2 represents the response instruction sent by vEQP to host, which indicates that the device status is online.
FOUP: english is called Front Opening Unified Pod. Front opening pods are a type of container used in semiconductor processing to protect, transport, and store wafers.
Example 1
Referring to fig. 3, an embodiment of the present invention provides a method for generating a timing chart of a fusion state machine, where the method includes:
step S1: and determining a service scene required by the semiconductor simulation platform.
In this step, the semiconductor simulation platform includes vEQP and host, which are interactively communicated through SF instruction, and vEQP is controlled through host to realize the simulation of the process of the wafer on the semiconductor machine, and the required service scenario includes: running or moving scenes, etc.
Specifically, the business scenario is illustrated by taking a check-before-shipment scenario as an example, in an actual physical environment, after a wafer is transferred to a semiconductor machine through a wafer cassette, the semiconductor machine reads a FOUP ID number of the wafer cassette and sends the FOUP ID number to a host, and the host queries a Recipe parameter of the semiconductor machine (Recipe is generally used to control the machine to implement an automated production process to complete a manufacturing task of a specific product) according to the FOUP ID number, and a series of other parameters (slotmap parameters or specific machine parameters, such as a space size of a control job, a space size of a process job, etc.) are used to check and confirm whether the batch of wafers should be placed on the semiconductor machine for processing. After the verification is successful, the wafer transfer box can execute a formal goods running scene, namely, the wafers in the wafer transfer box are sent to the semiconductor machine to execute corresponding process, and if the verification is failed, the wafer transfer box is marked to be abnormal and is stopped for goods running.
Step S2: and determining a state machine involved in the service scene and an interface instruction for describing the interaction behavior of the semiconductor simulation platform.
In this embodiment, step S2 specifically includes:
Step S201: determining a virtual machine table and a virtual host of a semiconductor simulation platform;
step S202: determining a related state machine according to the virtual machine station;
step S203: and acquiring an interface instruction for communication interaction between the virtual host and the virtual machine station.
The virtual machine is vEQP, which can simulate any proper semiconductor machine in the semiconductor process, and the virtual host is host. All state machines involved in using the virtual machine in the service scenario are determined, for example, state machines involved in vEQP in a certain service scenario are: SM-A, SM-B, SM-C, and determines interface instructions for communication interaction between vEQP and host, such as SxFy, sxF (y+1), according to the traffic scenario.
Step S3: the interaction process of at least one state machine influenced by the interface instruction and the interface instruction is drawn in a time sequence diagram mode.
In this embodiment, step S3 specifically includes:
step S301: constructing a time sequence diagram, and setting a first area and a second area in the time sequence diagram;
Step S302: drawing the initial state of a state machine related to the business scene in a first area;
Step S303: and drawing the interface instruction in a second area, and drawing other states of the state machine influenced by the interface instruction and the interaction process of the interface instruction, wherein the other states of the state machine are states after the initial state.
In this embodiment, step S303 specifically includes:
Step S3031: acquiring other states of the state machine affected by the interface instruction;
Step S3032: drawing other states of the state machine in a first area, and drawing the other states of the state machine and the initial state of the corresponding state machine into an association relation;
Step S3033: and drawing the interaction process of the state machine with state change according to the occurrence time sequence of the interface instruction.
A preferred example, the interaction process of the state machine with the interface instructions is visually presented in a UML timing diagram through elements such as graphical symbols and arrow lines in a UML modeling language using a UML modeling tool.
Specifically, a timing diagram is constructed, the left half and the right half of the timing diagram are set as a first area and a second area, and the state machines SM-A, SM-B, SM-C and the initial state of each state machine in the traffic scene are drawn in the left half of the timing diagram. All communication interfaces related in the service scene are drawn on the right half part of the time sequence diagram in the form of interface instructions according to the time sequence of the interface instructions, in the interaction process, the state machine influenced by each interface instruction is analyzed and determined, other states with state change of the state machine are drawn on the left half part of the time sequence diagram, and the state machines and the initial states of the corresponding state machines are drawn into an association relation.
In the time sequence diagram, according to the occurrence time sequence of the interface instruction, the interaction process of state change of the state machines is drawn to present the current state, the previous state and the state transition condition of each state machine under a certain specific time node, the time sequence of the change of each state machine and the association relation among each state machine. Specifically, according to vEQP, the receiving time of the interface instruction sent by host is received, and the change time point of the current state of the state machine is determined; and determining the state duration of the current state of the state machine according to the time interval of the adjacent interface instruction received by vEQP, or determining the state duration of the current state of the state machine according to the change time point of the current state and the change time point of the next state.
The timing diagram of the fusion state machine is shown in fig. 4, and graphic symbols and arrow lines in the diagram are described below:
The rectangular box with right-angle solid lines in fig. 4 represents the software body. Wherein vEQP represents a virtual machine, host represents a virtual host capable of communicating with the virtual machine. The two are communicated interactively through interface instructions.
The vertical dashed lines in fig. 4 represent the lifelines in the timing diagram, representing the chronological order within the lifecycle.
In fig. 4, solid arrows represent request commands sent between software entities, arrows represent sending directions, and x, y in SF command SxFy above the solid arrows represent different interfaces after being filled with specific values.
In fig. 4, the dashed arrow represents a response command corresponding to the request, and the value of the response in the SF command under the dashed arrow is increased by 1 again based on the request y, and becomes SxF (y+1).
The right-angled dashed rectangular box in fig. 4 represents the internal actions of the software body, such as material reaching the machine, material entering the machine, etc.
The rounded solid rectangular box in FIG. 4 represents a state machine entity, e.g., 3 state machines (SM-A, SM-B, SM-C) in the virtual machine.
The dot symbols in fig. 4 represent the initial state of the state machine, i.e. the most primitive state after instantiation of the state machine.
The solid rectangular box pointed to by the solid arrow in fig. 4 represents the current state value of the state machine, and the height represents the time period from top to bottom.
The dots plus circles in fig. 4 represent the end state of the state machine, representing the end of a life cycle of the state machine, where the state machine object is destroyed.
The overall description of the specific interaction of the state machine with the interface instructions depicted in fig. 4 is as follows:
1. beforehostissuesafirstrequestinstructiontovEQP,statemachinesSM-A,SM-B,SM-CinvEQPareallinaninitialstate,afterreceivingthefirstrequestinstructionatvEQP,thestatemachinesSM-Cundergostatetransition,stateC1ischangedfromtheinitialstate,statea1ischangedfromtheinitialstate,andthestatemachinesSM-Bhavenochange. When the state machine in vEQP completes state transition, vEQP sends a response instruction with a correct confirmation code to host to indicate that the interaction information is correctly received and transmitted, and then an action is performed in vEQP, such as action1 in the figure;
2. afterhostissuesasecondrequestinstructiontovEQP,statemachineSM-ainvEQPmaintainsa1state; SM-B maintains an initial state; SM-C changed from state C1 to state C2, and after the state transition was successful, vEQP sent a response instruction to host indicating that the request was successful;
3. afterhostissuesathirdrequestinstructiontovEQP,statemachineSM-ainvEQPmaintainsa1state; SM-B maintains an initial state; SM-C has changed from state C2 to the end state, identifying that this state machine is end of life cycle. And vEQP sends a response instruction to host indicating that the request was successful.
Therefore, for the product, the actual production steps and conditions can be combined, and the time sequence diagram can clearly and completely display the current state, the previous state, the state transition conditions and the state duration of each state machine under a certain specific time node in the interaction process, the time sequence of the change of each state machine and the association relation among each state machine.
In this embodiment, after step S3, the method further includes:
and verifying the integrity of the interface instruction according to the interaction information of the time sequence diagram and/or verifying the state change of the state machine according to the interface interaction time point contained in the interaction information.
Specifically, after the service scene required by the vEQP software main body is carded out and the corresponding time sequence diagram is drawn according to a certain service scene, the state change rule, the interface interaction time point, the state dependency relationship and the like of the state machine can be clearly seen through the time sequence diagram, so that the state machine can be used as a development specification diagram for a developer, and corresponding logic is realized in codes through the content in the development specification diagram.
After the test is carried out, test points and test methods different from the traditional test scheme can be formed according to the development specification diagram, and a tester needs to check the state change of the state machine at each interface interaction time point to determine whether the state change of the state machine is correct or not besides checking whether the integrity of each interface instruction is correct or not according to the interaction information of the time sequence diagram. Therefore, the method has good reference function and guiding significance for testers to write test schemes.
In summary, the method for generating the timing diagram of the fusion state machine provided by the embodiment of the invention determines the service scene required by the semiconductor simulation platform; determining a state machine involved in a service scene and an interface instruction for describing interaction behavior of a semiconductor simulation platform; the interaction process of at least one state machine influenced by the interface instruction and the interface instruction is drawn in a time sequence diagram mode. The invention fuses the state machines related in the service scene and the interface instructions for describing the interaction behavior of the semiconductor simulation platform in the time sequence diagram for drawing, and draws the state change time point, state transition condition, state duration and the like of each state machine in the service scene interaction process. The time sequence diagram can be used for showing the current state, the previous state, the state transition condition and the state duration of each state machine under a certain specific time node, and also can be used for showing the time sequence of the change of each state machine and the association relation among each state machine, and the requirements of business scenes in the aspects of integrity and time sequence can be clearly shown in one time sequence diagram.
Example two
Based on the same inventive concept as the method of the first embodiment, referring to fig. 5, the present embodiment provides a timing chart generating device of a fusion state machine, including:
A first determining module 21, configured to determine a service scenario required by the semiconductor simulation platform;
A second determining module 22, configured to determine state machines and interface instructions related to the service scenario;
A timing diagram drawing module 23, configured to draw the interaction process between the at least one state machine affected by the interface instruction and the interface instruction in a timing diagram manner.
In this embodiment, the second determining module 22 is specifically configured to:
determining a virtual machine table and a virtual host of a semiconductor simulation platform;
determining a related state machine according to the virtual machine station;
and acquiring an interface instruction for communication interaction between the virtual host and the virtual machine station.
In this embodiment, the timing chart drawing module 23 is specifically configured to:
Constructing a time sequence diagram, and setting a first area and a second area in the time sequence diagram;
drawing the initial state of a state machine related to the business scene in a first area;
And drawing the interface instruction in a second area, and drawing other states of the state machine influenced by the interface instruction and the interaction process of the interface instruction, wherein the other states of the state machine are states after the initial state.
The timing diagram drawing module 23 is specifically further configured to:
Acquiring other states of the state machine affected by the interface instruction;
drawing other states of the state machine in a first area, and drawing the other states of the state machine and the initial state of the corresponding state machine into an association relation;
And drawing the interaction process of the state machine with state change according to the occurrence time sequence of the interface instruction.
The timing diagram drawing module 23 is specifically further configured to:
determining a change time point of the current state of the state machine according to the receiving time of the interface instruction sent by the virtual host machine by the virtual machine station;
determining the state duration of the current state of the state machine, or,
And determining the state duration of the current state of the state machine according to the change time point of the current state and the change time point of the next state.
In this embodiment, the apparatus further includes a verification module, where the verification module is configured to: and verifying the integrity of the interface instruction according to the interaction information of the time sequence diagram and/or verifying the state change of the state machine according to the interface interaction time point contained in the interaction information.
It should be noted that, in the timing diagram generating method of the fusion state machine provided by the method embodiment of the present invention, the execution body may be a timing diagram generating device of the fusion state machine or a control module in the timing diagram generating device of the fusion state machine for executing the timing diagram generating method of the fusion state machine.
The implementation process of the functions and actions of each module in the above device is specifically detailed in the implementation process of the corresponding steps in the above method, so relevant parts only need to be referred to in the description of the method embodiments, and are not repeated here.
The above-described embodiment of the apparatus is merely illustrative, for example, the division of the modules is merely a logic function division, and there may be another division manner in actual implementation, and each functional module in the embodiment may be all integrated in one processor, or each module may be separately used as one device, or two or more modules may be integrated in one device; the functional modules in the embodiments may be implemented in the form of hardware or in the form of hardware and software functional units.
Example III
Referring to fig. 6, the present embodiment provides an electronic apparatus including: processor 310, communication interface (Communications Interface) 320, memory 330 and communication bus 340, wherein processor 310, communication interface 320 and memory 330 communicate with each other via communication bus 340. The processor 310 may invoke logic instructions in the memory 330, and the processor 310 executes the timing diagram generating method of the fusion state machine provided in the method embodiment, where the method includes:
determining a service scene required by a semiconductor simulation platform;
determining state machine and interface instructions related to the business scene;
and drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a time sequence diagram mode.
Further, the logic instructions in the memory 330 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions to cause a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a read-only memory (ROM), a random access memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program, the computer program being storable on a non-transitory computer readable storage medium, the computer program, when executed by a processor, being capable of performing a timing diagram generation method of a fusion state machine as provided by a method embodiment, the method comprising:
determining a service scene required by a semiconductor simulation platform;
determining state machine and interface instructions related to the business scene;
and drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a time sequence diagram mode.
Example IV
The present embodiment provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the timing chart generation method of the fusion state machine provided by the above method embodiment, the method including:
determining a service scene required by a semiconductor simulation platform;
determining state machine and interface instructions related to the business scene;
and drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a time sequence diagram mode.
The embodiments of the present invention are described in a progressive manner, and the same and similar parts of the embodiments are all referred to each other, and each embodiment is mainly described in the differences from the other embodiments. In particular, for the apparatus and medium embodiments, the description is relatively simple, as it is substantially similar to the method embodiments, with reference to the section of the method embodiments being relevant.
The devices and media provided in the embodiments of the present invention are in one-to-one correspondence with the methods, so that the devices and media also have similar beneficial technical effects as the corresponding methods, and since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media are not repeated here.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (10)
1. A method for generating a timing diagram of a fusion state machine, comprising:
determining a service scene required by a semiconductor simulation platform;
Determining a state machine involved in the service scene and an interface instruction for describing the interaction behavior of the semiconductor simulation platform;
and drawing the interaction process of at least one state machine influenced by the interface instruction and the interface instruction in a time sequence diagram mode.
2. The method of generating a timing diagram for a converged state machine of claim 1, wherein the step of determining the state machine involved in the traffic scenario and the interface instructions for describing the interaction behavior of the semiconductor simulation platform comprises:
Determining a virtual machine platform and a virtual host of the semiconductor simulation platform;
Determining the related state machine according to the virtual machine station;
And acquiring the interface instruction for communication interaction between the virtual host and the virtual machine.
3. The method for generating a timing diagram for a fusion state machine according to claim 1, wherein the step of drawing the interaction process of at least one state machine affected by the interface instruction with the interface instruction in a timing diagram manner comprises:
constructing a time sequence diagram, and setting a first area and a second area in the time sequence diagram;
drawing a state machine related to the business scene and an initial state of the state machine in the first area;
And drawing the interface instruction in the second area, and drawing other states of the state machine influenced by the interface instruction and the interaction process of the interface instruction, wherein the other states of the state machine are states after the initial state.
4. A method of generating a timing diagram for a fusion state machine according to claim 3, wherein the step of drawing the interaction procedure of the other states of the state machine affected by the interface instruction with the interface instruction comprises:
acquiring other states of the state machine affected by the interface instruction;
Drawing other states of the state machine in the first area, and drawing the other states of the state machine and the initial state of the corresponding state machine into an association relation;
And drawing the interaction process of the state machine with state change according to the occurrence time sequence of the interface instruction.
5. The method for generating a timing diagram of a fusion state machine according to claim 4, wherein the step of drawing the interaction process of the state machine with the state change according to the occurrence timing of the interface command comprises:
determining a change time point of the current state of the state machine according to the receiving time of the interface instruction sent by the virtual host machine by the virtual machine station;
determining the state duration of the current state of the state machine according to the time interval of the adjacent interface instructions received by the virtual machine station, or,
And determining the state duration of the current state of the state machine according to the change time point of the current state and the change time point of the next state.
6. The method of generating a timing diagram for a fusion state machine according to claim 1, further comprising, after the step of interactively rendering the state machine affected by the interface instruction with the interface instruction:
And checking the integrity of the interface instruction according to the interaction information of the time sequence diagram.
7. The method of generating a timing diagram for a fusion state machine according to claim 6, further comprising, after the step of interactively rendering the state machine affected by the interface instruction with the interface instruction:
and verifying the state change of the state machine according to the interface interaction time point contained in the interaction information.
8. A timing diagram generation apparatus for a fusion state machine, comprising:
The first determining module is used for determining a service scene required by the semiconductor simulation platform;
the second determining module is used for determining state machines and interface instructions related to the business scene;
And the timing diagram drawing module is used for drawing the interaction process of the interface instruction and at least one state machine influenced by the interface instruction in a timing diagram mode.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the timing diagram generation method of the fusion state machine of any of claims 1-7 when the program is executed by the processor.
10. A non-transitory computer readable storage medium, having stored thereon a computer program, which when executed by a processor, implements the steps of the timing diagram generation method of a fusion state machine according to any of claims 1-7.
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