CN117891645A - Display fault detection method and device, electronic equipment and storage medium - Google Patents
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
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Abstract
The application discloses a display fault detection method, a device, electronic equipment and a storage medium, wherein the method is applied to a multi-core heterogeneous system-level chip, and the chip comprises a security domain and at least one application domain; the second processor of the application domain generates an image to be displayed based on the application program, and when the application program stops generating the image to be displayed within the first target duration, the application program is triggered to issue the image to be displayed generated last time; the image caching module modifies the numerical value of a target area of an image to be displayed to obtain a first image; the display controller of the security domain acquires a first image through an inter-core communication mode and sends the first image to a display screen for display through a verification module; the method comprises the following steps: acquiring at least the value of the target area of the first image through a verification module, and calculating the acquired value to obtain a corresponding verification value; and if the plurality of check values calculated in the second target time period do not change, determining that the display screen has display faults.
Description
Technical Field
The present application relates to the field of system-on-chip technologies, and in particular, to a method and apparatus for detecting a display failure, an electronic device, and a storage medium.
Background
The design of the multimedia product system in the automobile is more and more complex, the functions are more and more, and the stability of the system faces a great challenge. For users, if the screen of the multimedia product in the automobile is blocked and cannot be updated (frozen screen phenomenon), the driving safety and the multimedia experience are affected. There is therefore a need for a method of frozen screen detection.
Disclosure of Invention
In view of the above, embodiments of the present application provide a method, an apparatus, an electronic device, and a storage medium for detecting a display failure, so as to at least solve the above-mentioned technical problems in the prior art.
According to a first aspect of the present application, an embodiment of the present application provides a display fault detection method applied to a multi-core heterogeneous system-on-chip, the chip including a security domain and at least one application domain that are hard isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, and the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on the application program, sends the image to the image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires a first image in the image caching module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module;
The method comprises the following steps:
Acquiring at least the value of the target area of the first image through a verification module, and calculating the acquired value to obtain a corresponding verification value;
and if the plurality of check values calculated in the second target time period do not change, determining that the display screen has display faults.
Optionally, calculating the obtained value to obtain a corresponding check value, including:
And (3) performing Cyclic Redundancy Check (CRC) calculation on the obtained numerical value to obtain a corresponding check value.
Optionally, the display fault detection method further includes:
confirming whether the application domain interrupts the response or not through an inter-core communication mode;
And if the application domain responds to the interrupt, resetting the application domain.
Optionally, confirming whether the application domain interrupts the response by inter-core communication includes:
transmitting a confirmation message of whether the application domain is interrupted to respond to the second processor in an inter-core communication mode;
if a response message returned by the second processor based on the confirmation message is received, confirming that the application domain does not interrupt the response;
and if the response message returned by the second processor based on the confirmation message is not received, confirming the application domain interrupt response.
Optionally, the display fault detection method further includes:
If the application domain does not interrupt the response, acquiring the state information of the heartbeat packet of the application program in an inter-core communication mode;
and if the heartbeat packet of the application program is confirmed to be abnormal based on the state information, resetting the application program.
Optionally, the display fault detection method further includes:
And if the heartbeat packet of the application program is confirmed to be normal based on the state information, returning to the step of determining that the display screen has display faults if the plurality of check values calculated in the second target duration are unchanged.
According to a second aspect of the present application, an embodiment of the present application provides a display fault detection apparatus applied to a multi-core heterogeneous system-on-chip, the chip including a security domain and at least one application domain that are hard-isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, and the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on the application program, sends the image to the image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires a first image in the image caching module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module;
The device comprises:
The acquisition module is used for acquiring the numerical value of the target area of the first image at least through the verification module, and calculating the acquired numerical value to obtain a corresponding verification value;
and the confirmation module is used for determining the display fault of the display screen if the plurality of check values calculated in the second target duration are not changed.
Optionally, the obtaining module is configured to perform Cyclic Redundancy Check (CRC) calculation on the obtained value through the checking module, so as to obtain a corresponding check value.
According to a third aspect of the present application, an embodiment of the present application provides an electronic device, including:
A display screen;
A multi-core heterogeneous system-on-chip, the chip comprising a security domain and at least one application domain, which are hard-isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, and the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on the application program, sends the image to the image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires a first image in the image caching module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module;
The first processor is used for acquiring at least the value of the target area of the first image through the verification module, and calculating the acquired value to obtain a corresponding verification value; and if the plurality of check values calculated in the second target time period do not change, determining that the display screen has display faults.
According to a fourth aspect of the present application, an embodiment of the present application provides a computer-readable storage medium storing computer instructions for causing a computer to perform a display failure detection method as in the first aspect or any implementation manner of the first aspect.
According to the display fault detection method, the device, the electronic equipment and the storage medium provided by the embodiment of the application, when the second processor of the application domain detects that the application program stops generating the image to be displayed in the first target time, the application program is triggered to send the image to be displayed which is generated last time to the image cache module, so that when the display process is not scheduled, for example, when the application program pauses or the display process is occupied by a high-priority process or a thread, the image cache module still has image update, the numerical value of the target area of the image to be displayed is modified in the image cache module, the condition that only the image update exists in the image cache module, the numerical value of the target area of the image is always changed, and therefore, the calculated check value is always changed, and whether the display screen is in display fault or not can be determined based on a plurality of check values calculated in the second target time, and therefore, the situation that whether the fault is displayed when the dynamic image is in display can be detected, the situation that the fault is in display state can be detected, the situation that the fault is displayed when the static image is in display state can be detected, the situation that the fault detection is not caused by the running of the application program, the application domain system is not running, the display fault detection condition can be detected, and the fault detection can be completely detected, and the fault detection can be prevented, and the fault detection can be detected is completely; the display image is processed through the application domain, the display fault is detected through the security domain, the display processing and the detection processing are not in one system, the detection processing is not working due to the abnormality of the display processing system, and the detection reliability is improved; and the first image to be displayed is checked by the checking module, so that the detection result is more reliable.
The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.
Drawings
FIG. 1 is a flow chart illustrating a fault detection method according to an embodiment of the present application;
FIG. 2 is a schematic flow chart of a fault detection method according to an embodiment of the present application;
FIG. 3 is a schematic flow chart of a fault detection method according to an embodiment of the present application;
FIG. 4 is a schematic diagram showing a fault detection device according to an embodiment of the present application;
Fig. 5 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application;
fig. 6 is a schematic diagram of another hardware structure of an electronic device according to an embodiment of the application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
The embodiment of the application provides a display fault detection method which is applied to a multi-core heterogeneous system-level chip, wherein the chip comprises a security domain and at least one application domain which are mutually isolated in a hard way; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, and the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on the application program, sends the image to the image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires a first image in the image caching module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module.
The display fault detection method is shown in fig. 1, and comprises the following steps:
s101, at least acquiring the value of the target area of the first image through a verification module, and calculating the acquired value to obtain a corresponding verification value.
In this embodiment, a multi-core heterogeneous System On Chip (SOC) may be applied to a multimedia product System inside an automobile, as well as other systems. The security domain and the application domain are both hardware sets, and the security domain has higher data processing security than each application domain.
In this embodiment, it is the first processor of the security domain that performs the display failure detection method. The processing process of the display image is executed in the application domain, and the display fault detection is executed in the safety domain, so that the fault of the display image processing system can not cause interruption of the display fault detection, the display fault can be found in time, and the safety is improved.
In some embodiments, as shown in FIG. 2, the application programs may include an image application, an image system, and a system hardware composition module (Hardware Composer HAL, HWC). The second processor may generate the image to be displayed based on the image application, the image system, and the system hardware synthesis module. Wherein the image application generates a second image; the image system generates an image to be displayed according to the second image and the application domain operating system interface image; the system hardware synthesis module confirms whether the image to be displayed matches with the application domain operating system configuration, if so, the image to be displayed is issued to the image cache module, if not, the image system is fed back, and the image system updates the image to be displayed.
The system hardware synthesis module sets an image update timeout period, and the duration of the image update timeout period is a first target duration, for example, 10s shown in fig. 2. When the system hardware synthesis module does not receive the image within 10s, it is determined that there is no image update within 10s, in order to avoid false alarm of display failure when the display process is not scheduled, for example, when the image application is suspended or the display process is occupied by a high priority process or thread, the second processor may trigger the image system to update the image, trigger the image system to issue the image to be displayed which is generated last time to the system hardware synthesis module, and the system hardware synthesis module issues the image to be displayed to the image cache module. Therefore, because the image update timeout time is set in the system hardware synthesis module, when the application program and the application domain system run normally, the display fault detection of displaying the dynamic image and displaying the static image can be normally realized; when the application program and the application domain system are abnormal, the abnormal operation state of the application program and the application domain system can be timely detected.
The image caching module is a module for storing the image to be displayed before the image to be displayed is on the screen. The image caching module can be preset with a preset algorithm, and when the image caching module obtains the image to be displayed, the numerical value of the target area of the image to be displayed can be modified based on the preset algorithm to obtain a first image. For example, as shown in fig. 2, the pixel value of the corresponding screen coordinate (0, 0) point in the image to be displayed (frame buffer) is modified, the pixel value of the coordinate (0, 0) point is added with a random number within 10, the image value of the coordinate area containing the (0, 0) point is ensured to be changed all the time, and the color of the pixel point does not generate larger color shift.
The display controller in the security domain continuously acquires the latest first image from the image cache module in an inter-core communication mode. The display controller is provided with a check module CRC32, and the first image is sent to a display screen for display through the check module. The security domain configures the CRC32 to check the region of the first image that contains the target region at display initialization. Then the CRC32, when acquiring the first image, acquires at least the value of the target area of the first image, such as the pixel value of a small area containing the coordinates (0, 0) point.
In one implementation, as shown in fig. 2, the first processor may calculate the obtained value through a verification module to obtain a corresponding verification value. After obtaining the corresponding check value, the check value may be stored in a register of the check module. The first processor may initiate a CRC detection thread to periodically read the check value in the register.
In another embodiment, the first processor may calculate the obtained value to obtain the corresponding check value.
In some embodiments, calculating the obtained value to obtain the corresponding check value includes:
and performing Cyclic Redundancy Check (CRC) calculation on the obtained numerical value to obtain a corresponding check value.
Specifically, a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm may be used to perform CRC check code calculation on the obtained value to obtain a corresponding check value. The CRC algorithm has extremely strong error detection capability and small cost, and is easy to realize by an encoder and a detection circuit.
In some embodiments, parity check, arithmetic and check modes may be used to calculate the obtained values, and obtain corresponding check values.
And S102, if the plurality of check values calculated in the second target duration are not changed, determining that the display screen has display faults.
In this embodiment, the first processor may determine whether the check value changes within the second target duration, for example, within 30s as shown in fig. 2, and if so, determine that the display screen has failed to display, that is, determine that the screen is frozen. If the target area is not changed, returning to the step S101, continuously acquiring at least the value of the target area of the first image through the verification module, and calculating the acquired value to obtain a corresponding verification value.
In some embodiments, as shown in fig. 3, the multi-core heterogeneous system-on-chip may include a security domain and a plurality of application domains, where each application domain corresponds to a display screen, and each application domain may modify a value of a specific pixel point corresponding to a CRC check area of a check module in an image to be displayed before the image to be displayed is displayed on the screen, that is, before an update image is displayed, to obtain a first image. The display controller of the security domain obtains a first image through an inter-core communication mode, the first image is sent to a corresponding display screen for display through a checking module in the display controller, meanwhile, the checking module detects the value of a checking area pixel point in the first image, and whether the screen is frozen or not is judged based on the value of the checking area pixel point. In this way, display failure detection for a plurality of application domains can be achieved.
According to the display fault detection method provided by the embodiment of the application, when the second processor of the application domain detects that the application program stops generating the image to be displayed in the first target time, the application program is triggered to send the image to be displayed which is generated last time to the image cache module, so that when the display process cannot be scheduled, for example, when the application program is suspended or the display process is occupied by a high-priority process or thread, the image cache module still has image update, the value of the target area of the image to be displayed is modified in the image cache module, the value of the target area of the image can be ensured to be always changed as long as the image update is carried out in the image cache module, the calculated check value is always changed, and therefore, whether the display screen is in display fault or not can be determined based on a plurality of check values calculated in the second target time, and therefore, the situation that whether the display fault is displayed when the dynamic image is in display state can be detected, the situation that the display fault is caused by the fact that the application program and the application domain system are not running normally can be detected, the display fault detection can be carried out, the fault detection can be completely avoided, and the fault detection can be carried out is not completely; the display image is processed through the application domain, the display fault is detected through the security domain, the display processing and the detection processing are not in one system, the detection processing is not working due to the abnormality of the display processing system, and the detection reliability is improved; and the first image to be displayed is checked by the checking module, so that the detection result is more reliable.
In an alternative embodiment, the display fault detection method further comprises:
confirming whether the application domain interrupts the response or not through an inter-core communication mode;
And if the application domain responds to the interrupt, resetting the application domain.
In the specific implementation, as shown in fig. 2, when the display fault is confirmed, the exception handling can be automatically performed, and meanwhile, prompt information can be sent out. When the exception is handled, whether the application domain system operates normally can be judged first, whether the application domain system can respond or not can be judged, namely whether the application domain system is blocked, whether the application domain system is interrupted or not is confirmed, and whether the application domain system operates normally or not is confirmed. Specifically, whether the application domain interrupts the response can be confirmed through an inter-core communication mode.
More specifically, a confirmation message of whether the application domain interrupts the response may be sent to the second processor through an inter-core communication manner; if a response message returned by the second processor based on the confirmation message is received, confirming that the application domain does not interrupt the response; and if the response message returned by the second processor based on the confirmation message is not received, confirming the application domain interrupt response. In this way, it can be quickly determined whether the application domain interrupts the response.
If the application domain interrupt response indicates that the application domain system is blocked, interrupted and the like, the whole application domain system can be reset.
If the application domain does not interrupt the response, whether the application program runs normally or not can be confirmed, and particularly, the state information of the heartbeat package of the application program can be obtained through an inter-core communication mode; if the heartbeat packet of the application program is confirmed to be abnormal based on the state information, the application program is not normally operated, and the application program can be reset. If the heartbeat package of the application program is confirmed to be normal based on the state information, the application program is normally operated and possibly misjudged, and the method returns to the step of determining the display failure of the display screen if the plurality of check values calculated in the second target time period are not changed.
In this embodiment, first, whether the application domain is in interrupt response is determined through the inter-core communication mode, and if the application domain is in interrupt response, the application domain is reset, so that when the application domain system fails, the application domain system can be reset in time.
In this embodiment, when the application domain system operates normally, whether the application program operates normally is continuously confirmed through the inter-core communication mode, so that detection of the state of the application program can be achieved, and when abnormal operation of the application program is detected, the application program is reset in time.
The embodiment of the application also provides a display fault detection device which is applied to the multi-core heterogeneous system level chip, wherein the chip comprises a security domain and at least one application domain which are mutually isolated in a hard way; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, and the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on the application program, sends the image to the image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires a first image in the image caching module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module.
The display failure detection apparatus is shown in fig. 4, and includes:
The obtaining module 41 is configured to obtain, by using the verification module, at least a value of the target area of the first image, and calculate the obtained value, to obtain a corresponding verification value.
And the confirmation module 42 is configured to determine that the display screen fails to display if the plurality of check values calculated in the second target duration do not change.
In some embodiments, the obtaining module 41 is configured to perform Cyclic Redundancy Check (CRC) calculation on the obtained value by using the checking module, so as to obtain a corresponding check value.
According to the display fault detection device provided by the embodiment of the application, when the second processor of the application domain detects that the application program stops generating the image to be displayed in the first target time, the application program is triggered to send the image to be displayed which is generated last time to the image cache module, so that when the display process cannot be scheduled, for example, when the application program is suspended or the display process is occupied by a high-priority process or thread, the image cache module still has image update, the value of the target area of the image to be displayed is modified in the image cache module, the value of the target area of the image can be ensured to be always changed as long as the image update is carried out in the image cache module, the calculated check value is always changed, and therefore, whether the display screen is in fault state or not can be determined based on a plurality of check values calculated in the second target time, and therefore, the situation that whether the display fault is displayed when the dynamic image is displayed can be detected, the situation that the display fault is caused by the fact that the application program and the application domain system are not running normally can be detected, the display fault detection can be carried out, the fault detection can be completely avoided, and the fault detection can be carried out is not completely; the display image is processed through the application domain, the display fault is detected through the security domain, the display processing and the detection processing are not in one system, the detection processing is not working due to the abnormality of the display processing system, and the detection reliability is improved; and the first image to be displayed is checked by the checking module, so that the detection result is more reliable.
The embodiment of the application also provides an electronic device, as shown in fig. 5, including:
A display screen 500;
The multi-core heterogeneous system-on-chip 501, the multi-core heterogeneous system-on-chip 501 comprising a security domain and at least one application domain that are hard isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain includes a display controller 51 and a first processor 52, the display controller 51 including a verification module 511; the application domain includes a second processor 53 and an image cache module 54; the second processor 53 generates an image to be displayed based on the application program, sends the image to the image buffer module 54, and triggers the application program to issue the image to be displayed generated last time to the image buffer module 54 when the application program is detected to stop generating the image to be displayed within the first target duration; the image caching module 54 caches the image to be displayed, and modifies the numerical value of the target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller 51 obtains the first image in the image buffer module 54 through the inter-core communication mode, and sends the first image to the display screen 500 for display through the verification module 511;
The first processor 52 is configured to obtain, through the verification module 511, at least a value of a target area of the first image, and calculate the obtained value, to obtain a corresponding verification value; and if the plurality of check values calculated in the second target time period do not change, determining that the display screen has display faults.
FIG. 6 shows a schematic block diagram of an example electronic device that may be used to implement an embodiment of the application. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the applications described and/or claimed herein.
As shown in fig. 6, the electronic device includes a multi-core heterogeneous system on-chip 501 whose first processor 52 and second processor 53 can perform various appropriate actions and processes according to computer programs stored in a read-only memory (ROM) 802 or computer programs loaded from a storage unit 808 into a Random Access Memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the device 800 can also be stored. The multi-core heterogeneous system-on-chip 501, the ROM 802, and the RAM 803 are connected to each other through a bus 804. An input/output (I/O) interface 805 is also connected to the bus 804.
Various components in the electronic device are connected to the I/O interface 805, including: an input unit 806 such as a keyboard, mouse, etc.; an output unit 807 such as various types of display screen 500, speakers, and the like; a storage unit 808, such as a magnetic disk, optical disk, etc.; and a communication unit 809, such as a network card, modem, wireless communication transceiver, or the like. The communication unit 809 allows the electronic device to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.
The first processor 52 in the multi-core heterogeneous system-on-chip 501 performs the various methods and processes described above, such as displaying a fault detection method. For example, in some embodiments, the display fault detection method may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 808. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device via the ROM802 and/or the communication unit 809. When the computer program is loaded into RAM 803 and executed by first processor 52, one or more steps of the display fault detection method described above may be performed. Alternatively, in other embodiments, the first processor 52 may be configured to perform the display fault detection method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for carrying out methods of the present application may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
The embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium stores computer instructions for causing a computer to execute the display fault detection method in any of the above embodiments.
In the context of the present application, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.
The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present application may be performed in parallel, sequentially, or in a different order, provided that the desired results of the disclosed embodiments are achieved, and are not limited herein.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A display fault detection method, characterized by being applied to a multi-core heterogeneous system-on-chip, the chip comprising a security domain and at least one application domain, which are hard isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, wherein the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on an application program, sends the image to an image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within a first target duration; the image caching module caches an image to be displayed, and modifies the numerical value of a target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires the first image in the image cache module in an inter-core communication mode, and sends the first image to a display screen for display through the verification module;
The method comprises the following steps:
acquiring at least the value of the target area of the first image through the verification module, and calculating the acquired value to obtain a corresponding verification value;
And if a plurality of check values calculated in the second target time length do not change, determining that the display screen displays faults.
2. The display failure detection method according to claim 1, wherein calculating the obtained numerical value to obtain a corresponding check value includes:
and performing Cyclic Redundancy Check (CRC) calculation on the obtained numerical value to obtain a corresponding check value.
3. The display failure detection method according to claim 1, characterized by further comprising:
Confirming whether the application domain interrupts response or not through an inter-core communication mode;
And if the application domain is in response to the interrupt, resetting the application domain.
4. A display failure detection method according to claim 3, wherein said confirming whether the application domain interrupts a response by means of inter-core communication comprises:
Transmitting a confirmation message of whether the application domain is interrupted to respond to the second processor in an inter-core communication mode;
if a response message returned by the second processor based on the confirmation message is received, confirming that the application domain does not interrupt the response;
And if the response message returned by the second processor based on the confirmation message is not received, confirming the application domain interrupt response.
5. The display failure detection method according to claim 3, further comprising:
If the application domain does not interrupt the response, acquiring the state information of the heartbeat packet of the application program in an inter-core communication mode;
And if the heartbeat packet of the application program is confirmed to be abnormal based on the state information, resetting the application program.
6. The display failure detection method according to claim 5, further comprising:
And if the heartbeat packet of the application program is confirmed to be normal based on the state information, returning to the step of determining that the display screen has display faults if the plurality of verification values calculated in the second target duration are not changed.
7. A display fault detection device, characterized by being applied to a multi-core heterogeneous system-on-chip, said chip comprising a security domain and at least one application domain, which are hard isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, wherein the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on an application program, sends the image to an image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within a first target duration; the image caching module caches an image to be displayed, and modifies the numerical value of a target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires the first image in the image cache module in an inter-core communication mode, and sends the first image to a display screen for display through the verification module;
The device comprises:
the acquisition module is used for acquiring at least the numerical value of the target area of the first image through the verification module, and calculating the acquired numerical value to obtain a corresponding verification value;
And the confirmation module is used for determining the display fault of the display screen if the plurality of check values calculated in the second target duration are not changed.
8. The display failure detection apparatus according to claim 7, wherein,
The acquisition module is used for carrying out Cyclic Redundancy Check (CRC) calculation on the acquired numerical value through the check module to obtain a corresponding check value.
9. An electronic device, comprising:
A display screen;
A multi-core heterogeneous system-on-chip, the chip comprising a security domain and at least one application domain that are hard-isolated from each other; the security domain and the application domain are configured to run different operating systems; the security domain comprises a display controller and a first processor, wherein the display controller comprises a verification module; the application domain comprises a second processor and an image cache module; the second processor generates an image to be displayed based on an application program, sends the image to an image cache module, and triggers the application program to send the image to be displayed generated last time to the image cache module when the application program is detected to stop generating the image to be displayed within a first target duration; the image caching module caches an image to be displayed, and modifies the numerical value of a target area of the image to be displayed based on a preset algorithm to obtain a first image; the display controller acquires the first image in the image cache module in an inter-core communication mode, and sends the first image to the display screen for display through the verification module;
The first processor is used for acquiring at least the numerical value of the target area of the first image through the verification module, and calculating the acquired numerical value to obtain a corresponding verification value; and if a plurality of check values calculated in the second target time length do not change, determining that the display screen displays faults.
10. A computer-readable storage medium storing computer instructions for causing a computer to perform the display failure detection method according to any one of claims 1 to 6.
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