CN117891627B - Inter-core communication interaction system applied to energy storage cooperative control device - Google Patents
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Abstract
The invention discloses an inter-core communication interaction system applied to an energy storage cooperative control device, which relates to the technical field of inter-core communication and solves the problems of slower conversion efficiency and longer time consumption of an original processing conversion mode.
Description
Technical Field
The invention relates to the technical field of inter-core communication, in particular to an inter-core communication interaction system applied to an energy storage cooperative control device.
Background
The energy storage cooperative control device plays an increasingly important role in a modern power system, is not only important for the running efficiency of an energy storage power station, but also has important significance for the stability of the whole power grid and the effective utilization of new energy sources; with the continuous progress of technology, the performance of the energy storage auxiliary control device is also continuously improved, so that the requirement of a larger-scale energy storage project is met.
The application with publication number CN104539528B relates to data communication technology; the invention solves the problem that the message between the multi-core communication equipment and the RADIUS server can not be interacted correctly, and provides the multi-core communication equipment and the message interaction method between the multi-core communication equipment and the RADIUS server, and the technical scheme can be summarized as follows: the multi-core communication equipment comprises a forwarding core and a plurality of operation cores, when the operation cores assemble the RADIUS request message, the core number of the operation cores is modified into a field of a mark message sequence number in a message header of the message, and then the RADIUS request message is sent to the forwarding core; the forwarding core is used for forwarding the RADIUS request message sent by the operation core, receiving the corresponding response message, extracting the field of the mark message sequence number in the message header of the response message, acquiring the core number of the corresponding operation core from the field, and forwarding the response message to the operation core corresponding to the core number. The beneficial effects of the invention are as follows: normal communication is guaranteed, and the method is suitable for multi-core communication equipment.
In the process of communication interaction, the core processors of the energy storage cooperative control device have different transmission protocols, so when data conversion is carried out, the data conversion is carried out according to the corresponding transmission protocols one by one to ensure that the data can be normally processed, but the original processing conversion mode has slower conversion efficiency and longer time consumption, and when the data is processed, the load condition of the corresponding core processor is easily caused because the data is not optimized.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides an inter-core communication interaction system applied to an energy storage cooperative control device, which solves the problems of slower conversion efficiency and longer time consumption of an original processing conversion mode.
In order to achieve the above purpose, the invention is realized by the following technical scheme: an inter-core communication interaction system applied to an energy storage cooperative control device comprises:
The communication logic confirming end confirms whether the processing format of the last group of core processors has the same item with the processing format of the next group of core processors based on the communication track among the core processors and the related format data of different core processors, and confirms the processing logic between the two core processors based on the confirmed same item format, if the same item format does not exist, the communication protocols of the two core processors are analyzed and confirmed, and whether the auxiliary communication protocol needs to be added to generate the corresponding processing logic is judged, and the communication logic comprises the following steps:
determining two groups of core processors with data interaction based on the confirmed communication track, confirming the processing format which can be processed by the core processor based on related data, calibrating the core processor at the downstream of the core processor as a secondary processor, confirming the processing format which can be processed by the secondary processor, confirming whether the same format exists between the two core processors, calibrating the format as a logic format if one group exists, randomly extracting one group of formats as the logic format if multiple groups exist, calibrating the two groups of core processors as vacant logic processors if no group exists;
For the vacant logic processor, confirming the communication protocols of the two groups of core processors, marking the communication protocols as an A protocol and a B protocol, extracting N groups of conversion records of the A protocol and the B protocol from a database, confirming the conversion time from the conversion records, carrying out average value processing on the N groups of conversion time, and confirming BD to be compared and the average time;
based on the A protocol and the B protocol, confirming an intermediate protocol from a database, wherein the intermediate protocol can be mutually converted between the A protocol and the B protocol, the intermediate protocol is not more than 10 groups, N groups of past records between the A protocol and a single group of intermediate protocols are extracted from the database to determine conversion time, wherein N is a preset value, after average processing is carried out, the A conversion time length A k is determined, wherein k=1, 2, … … and 10, k represent different intermediate protocols, then the past records of the group of intermediate protocols and the B protocol are determined to determine conversion time, after average processing is carried out, the B conversion time length B k is determined, and the total conversion time length Z k of the different intermediate protocols is confirmed by adopting Z k=Ak+Bk;
Marking the total rotation time length meeting Z k < BD as the time length to be selected, selecting the minimum value from a plurality of groups of time lengths to be selected, confirming that the intermediate protocol corresponding to the minimum value is marked as a logic protocol, and marking the determined logic format and logic protocol between corresponding core processors; if the total rotation time Z k does not meet Z k < BD, no processing is performed;
The data to be processed confirming end confirms the data to be processed which is required to be processed and inputs the data to the corresponding nuclear processor, and the confirming process is executed by an operator;
The data optimizing processing end, based on the data flow direction of the data to be processed, confirms the corresponding core processor, based on the total capacity of the data to be processed, extracts the processing progress of the core processor for processing the data with similar capacity from the database, based on the processing progress, divides the data to be processed into a plurality of processing single data for processing in sequence, and comprises the following steps:
Calibrating the data capacity of the data to be processed as RL, and determining a group of limiting intervals [ RL-Y1, RL+Y1], wherein Y1 is a preset value, and extracting the processing progress of M groups of kernel processors for processing similar capacity data from the database based on the limiting intervals, wherein the capacity of the similar capacity data belongs to the limiting intervals, and M is the preset value;
Confirming initial processing time from M groups of processing processes, sequentially confirming the same time from the initial processing time to the back, carrying out average value processing on a plurality of groups of processing rates corresponding to the same time, determining a rate average value, and generating a processing rate change curve according to the rate average value corresponding to the same time, wherein a time value is a horizontal coordinate axis, and a rate value is a vertical coordinate axis;
And based on the confirmed processing rate change curve, confirming the data capacity which can be processed at each different moment from the beginning moment to the subsequent moment, dividing the data to be processed into a plurality of groups of single data according to the different data capacities, and sequentially processing.
Preferably, the inter-core data obtaining end obtains related format data of a plurality of core processors participating in the communication process, wherein the related format data comprises processing format data of the corresponding core processors.
Preferably, the communication track confirmation end performs communication track confirmation of the core processor by an external operator and transmits the confirmed communication track to the communication logic confirmation end.
Preferably, the present core processor includes a single core processor or a multi-core processor;
the data optimization processing end aims at the single-core processor, and after all data to be processed are transmitted to the single-core processor, the data division is carried out to confirm that the single data are reprocessed;
The data optimizing processing end aims at the multi-core processor, and when the determined single data capacity reaches a specified value in the transmission process of the data to be processed, the data can be directly processed.
The invention provides an inter-core communication interaction system applied to an energy storage cooperative control device. Compared with the prior art, the method has the following beneficial effects:
the invention confirms the communication track of each inter-core processor and the format data which can be processed, confirms the data communication interaction logic between each different inter-core processor, and sequentially converts the communication data between the inter-core processors based on the corresponding interaction logic, so that the data interaction rate between a plurality of inter-core processors is ensured, the faster interaction rate is achieved, the interaction time is shortened, and the interaction effect in the whole communication interaction process is improved;
In the processing process of the data, the processing curves of the corresponding core processors are determined according to the past processing processes of different core processors, the data are sequentially divided into a plurality of single data to be processed according to the corresponding processing curves, and then the single data are sequentially processed, so that the processing speed of the core processors can be ensured, and meanwhile, the situation that the processing load of the corresponding core processors can not occur when the corresponding core processors are processed can be ensured.
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FIG. 1 is a schematic diagram of a principal frame of the present invention;
fig. 2 is a schematic diagram of the same time determination of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1, the application provides an inter-core communication interaction system applied to an energy storage cooperative control device, which comprises an inter-core data acquisition end, a communication track confirmation end, a communication logic confirmation end, a to-be-processed data confirmation end, a database and a data optimization processing end;
The inter-core data acquisition end and the communication track confirmation end are electrically connected with the communication logic confirmation end input node, the communication logic confirmation end is electrically connected with the to-be-processed data confirmation end input node, the to-be-processed data confirmation end is electrically connected with the data optimization processing end input node, and the database is respectively electrically connected with the communication logic confirmation end and the data optimization processing end input node;
The inter-core data obtaining terminal is used for obtaining related data of a plurality of core processors participating in a communication process, wherein the related data comprises processing format data of the corresponding core processor, and a single core processor can process data in a plurality of different formats and generally comprises:
Integer format: this is the most basic data format, including signed and unsigned integers, for basic arithmetic and logical operations;
Floating point number format: for representing real numbers, supporting more complex mathematical calculations such as scientific calculations and engineering simulations;
vector and matrix format: are commonly used in graphics processing and data science for performing parallel operations and accelerating computations;
character and string format: for text processing and information encoding;
Instruction set format: such as the instruction set of the x86 architecture, the processor performs relevant formats of data such as corresponding operations by decoding the instructions;
the communication track confirmation end performs communication track confirmation of the core processor by an external operator and transmits the confirmed communication track to the communication logic confirmation end, and specifically, the communication track can be understood as a data interaction mode corresponding to the core processor, for example, three groups of core processors A, B and C exist, the data interaction mode is A-B-C, the A-B-C is the confirmed communication track, and a specific data process is confirmed in advance by the operator according to own requirements;
the communication logic confirmation end confirms whether the processing format of the last group of core processors has the same item as the processing format of the next group of core processors based on the confirmed communication track and the related data of the different core processors, and confirms the processing logic between the two core processors based on the confirmed same item format, if the same item format does not exist, the communication protocols of the two core processors are analyzed and confirmed, and whether the auxiliary communication protocol is needed to be added to generate the corresponding processing logic is judged, specifically, the processing logic is set to ensure that the data between the different core processors can be quickly converted, the time of the data conversion between the core processors is sufficiently reduced, and the interactive processing efficiency is accelerated;
The substeps of performing specific operations include:
determining two groups of core processors with data interaction based on the confirmed communication track, confirming the processing format which can be processed by the core processor based on related data, calibrating the core processor at the downstream of the core processor as a secondary processor, confirming the processing format which can be processed by the secondary processor, confirming whether the same format exists between the two core processors, calibrating the format as a logic format if one group exists, randomly extracting one group of formats as the logic format if multiple groups exist, calibrating the two groups of core processors as vacant logic processors if no group exists;
For the vacant logic processor, confirming the communication protocols of the two groups of core processors, marking the communication protocols as an A protocol and a B protocol, extracting N groups of conversion records of the A protocol and the B protocol from a database, confirming the conversion time from the conversion records, carrying out average value processing on the N groups of conversion time, and confirming BD to be compared and the average time;
Based on the A protocol and the B protocol, confirming an intermediate protocol from a database, wherein the intermediate protocol can be mutually converted between the A protocol and the B protocol, the intermediate protocol is not more than 10 groups (too much is not suitable for increasing system load and plays a reaction), extracting N groups of past records between the A protocol and the single group of intermediate protocols from the database to determine conversion time, wherein N is a preset value, determining an A conversion time length A k after average processing, wherein k=1, 2, … …,10, k represent different intermediate protocols, determining the conversion time of the past records of the group of intermediate protocols and the B protocol, determining a B conversion time length B k after average processing, and adopting Z k=Ak+Bk to confirm the total conversion time length Z k of the different intermediate protocols;
The total rotation time length meeting Z k < BD is marked as the time length to be selected, the minimum value is selected from a plurality of groups of time lengths to be selected, the middle protocol corresponding to the minimum value is confirmed to be marked as the logic protocol, and the determined logic format and the logic protocol are marked between the corresponding core processors, so that the data interaction conversion is convenient to carry out in the later period;
If the total rotation time length Z k does not meet Z k < BD, no processing is performed (when two adjacent groups of core processors perform data conversion, the original conversion mode is adopted for gradual conversion);
Specifically, it is assumed that five groups of core processors, namely H1, H2, H3 and H4, are respectively provided, and the communication tracks thereof are H1-H2-H3-H4, wherein the corresponding logic formats are determined between H1 and H2, so that when the data interaction is performed between H1 and H2, the data formats of the H1 and H2 can only adopt the designated logic formats, namely, in order to confirm the data interaction rate between H1 and H2, the logic protocols are arranged between H2 and H3, when the data interaction is performed, the data interaction rate between H2 and H3 is ensured by taking the logic protocols as transition, the logic formats and the logic protocols are not determined between H3 and H4, the original data interaction conversion mode is adopted to perform direct conversion, and the faster rate cannot be achieved, but the data interaction rate can be ensured after the whole flow process.
Example two
In the implementation process of the present embodiment, compared to the above-mentioned logic validation of the core processor, the present embodiment is mainly directed to the data processing process, and the above-mentioned embodiment is mainly directed to the core processor;
The data to be processed is confirmed by the data to be processed confirming end and is input into the corresponding core processor, the confirming process is executed by an operator, and the operator can input the data to be processed by himself or input the data to be processed generated by the corresponding core processor into another core processor;
The data optimizing processing end confirms a corresponding core processor (namely the data to be processed needs to be processed through the corresponding core processor, so as to confirm the core processor) based on the data flow direction of the data to be processed, extracts the processing progress of the data to be processed of the core processor for processing the data with similar capacity from the database based on the total capacity of the data to be processed, divides the data to be processed into a plurality of processing single data based on the processing progress, and ensures the processing speed of the core processor, wherein the specific substeps for carrying out specific division processing comprise:
Calibrating the data capacity of the data to be processed as RL, and determining a group of limiting intervals [ RL-Y1, RL+Y1], wherein Y1 is a preset value, the specific value of the Y1 is determined by an operator according to experience, and based on the limiting interval, the processing progress of M groups of kernel processors for processing similar capacity data is extracted from a database, and the capacity of the similar capacity data belongs to the limiting interval, wherein M is the preset value;
Confirming initial processing time from M groups of processing processes, sequentially confirming the same time through the initial processing time (namely, when the processing process starts, the initial processing time is 0, sequentially confirming the subsequent same time, if two groups of processing processes exist, the two groups of processing processes are respectively different time to start processing, if the two groups of processing processes are not clear 0 or are confirmed sequentially, the same time cannot be confirmed, so that the same time needs to be confirmed sequentially, the time difference between the same time and the initial processing time is the same), and carrying out average processing on a plurality of groups of processing rates corresponding to the same time (wherein, a plurality of groups are adopted, namely, the processing rates of the following processing processes are not processed, and the data of the following processing processes are not processed, and the processing rates of the following processing processes are not processed, and the average processing is not carried out), determining a rate average value, generating a processing rate change curve according to the rate average value corresponding to the same time (for example, the same time 1,2 and 3 are all corresponding to different rate averages, and the change curves can be determined according to the different values of the rate average values of the same time, wherein the time values are horizontal coordinate axes, the rate values are vertical coordinate axes (the corresponding to the initial time and the same, and the corresponding to the initial time and the same time is different from the initial time and different from the initial time);
And based on the confirmed processing rate change curve, confirming the data capacity which can be processed at each different moment from the beginning moment to the subsequent moment, dividing the data to be processed into a plurality of groups of single data according to the different data capacities, and sequentially processing.
The processing mode can guarantee the processing speed of the core processor, and meanwhile, the processing load of the corresponding core processor can be avoided when the corresponding core processor is processed.
Example III
In the specific implementation process of this embodiment, a further implementation manner of the second embodiment is:
for a single core processor: when the data optimization processing end aims at the data processing of the core processor, the data to be processed is generally transmitted to the inside of the core processor, then the data dividing processing is carried out, and then the single data after the dividing processing is processed.
For multi-core processors: when the data optimizing processing end aims at the data processing of the core processor, the data to be processed can be directly processed after the determined single data capacity reaches the specified value in the transmission process, and the multi-core processor can achieve the effect of real-time processing.
Example IV
This embodiment includes all of the three embodiments described above in the specific implementation.
Some of the data in the above formulas are numerical calculated by removing their dimensionality, and the contents not described in detail in the present specification are all well known in the prior art.
The above embodiments are only for illustrating the technical method of the present invention and not for limiting the same, and it should be understood by those skilled in the art that the technical method of the present invention may be modified or substituted without departing from the spirit and scope of the technical method of the present invention.
Claims (8)
1. The inter-core communication interaction system applied to the energy storage cooperative control device is characterized by comprising the following components:
The communication logic confirming end confirms whether the processing format of the last group of core processors has the same item with the processing format of the next group of core processors based on the communication track among the core processors and the related format data of different core processors, and confirms the processing logic between the two core processors based on the confirmed same item format, if the same item format does not exist, the communication protocols of the two core processors are analyzed and confirmed, and whether the auxiliary communication protocol needs to be added to generate the corresponding processing logic is judged, and the communication logic comprises the following steps:
determining two groups of core processors with data interaction based on the confirmed communication track, confirming the processing format which can be processed by the core processor based on related data, calibrating the core processor at the downstream of the core processor as a secondary processor, confirming the processing format which can be processed by the secondary processor, confirming whether the same format exists between the two core processors, calibrating the format as a logic format if one group exists, randomly extracting one group of formats as the logic format if multiple groups exist, calibrating the two groups of core processors as vacant logic processors if no group exists;
For the vacant logic processor, confirming the communication protocols of the two groups of core processors, marking the communication protocols as an A protocol and a B protocol, extracting N groups of conversion records of the A protocol and the B protocol from a database, confirming the conversion time from the conversion records, carrying out average value processing on the N groups of conversion time, and confirming BD to be compared and the average time;
based on the A protocol and the B protocol, confirming an intermediate protocol from a database, wherein the intermediate protocol can be mutually converted between the A protocol and the B protocol, the intermediate protocol is not more than 10 groups, N groups of past records between the A protocol and a single group of intermediate protocols are extracted from the database to determine conversion time, wherein N is a preset value, after average processing is carried out, the A conversion time length A k is determined, wherein k=1, 2, … … and 10, k represent different intermediate protocols, then the past records of the group of intermediate protocols and the B protocol are determined to determine conversion time, after average processing is carried out, the B conversion time length B k is determined, and the total conversion time length Z k of the different intermediate protocols is confirmed by adopting Z k=Ak+Bk;
Marking the total rotation time length meeting Z k < BD as the time length to be selected, selecting the minimum value from a plurality of groups of time lengths to be selected, confirming that the intermediate protocol corresponding to the minimum value is marked as a logic protocol, and marking the determined logic format and logic protocol between corresponding core processors;
The data to be processed confirming end confirms the data to be processed which is required to be processed and inputs the data to the corresponding nuclear processor, and the confirming process is executed by an operator;
And the data optimization processing end confirms the corresponding core processor based on the data flow direction of the data to be processed, extracts the processing progress of the core processor for processing the data with similar capacity from the database based on the total capacity of the data to be processed, divides the data to be processed into a plurality of processing single data based on the processing progress of the processing progress, and then sequentially processes the data.
2. The inter-core communication interaction system for an energy storage co-control device according to claim 1, further comprising: and the inter-core data acquisition end is used for acquiring related format data of a plurality of core processors participating in the communication process, wherein the related format data comprise processing format data of the corresponding core processors.
3. The inter-core communication interaction system for an energy storage co-control device according to claim 1, further comprising: and the communication track confirmation end is used for confirming the communication track of the nuclear processor by an external operator and transmitting the confirmed communication track into the communication logic confirmation end.
4. The inter-core communication interaction system applied to an energy storage cooperative control device according to claim 1, wherein when the total rotation duration Z k does not satisfy Z k < BD, no processing is performed.
5. The inter-core communication interaction system applied to an energy storage cooperative control device according to claim 1, wherein the specific sub-steps of performing specific division processing by the data optimization processing end include:
Calibrating the data capacity of the data to be processed as RL, and determining a group of limiting intervals [ RL-Y1, RL+Y1], wherein Y1 is a preset value, and extracting the processing progress of M groups of kernel processors for processing similar capacity data from the database based on the limiting intervals, wherein the capacity of the similar capacity data belongs to the limiting intervals, and M is the preset value;
Confirming initial processing time from M groups of processing processes, sequentially confirming the same time from the initial processing time to the back, carrying out average value processing on a plurality of groups of processing rates corresponding to the same time, determining a rate average value, and generating a processing rate change curve according to the rate average value corresponding to the same time, wherein a time value is a horizontal coordinate axis, and a rate value is a vertical coordinate axis;
And based on the confirmed processing rate change curve, confirming the data capacity which can be processed at each different moment from the beginning moment to the subsequent moment, dividing the data to be processed into a plurality of groups of single data according to the different data capacities, and sequentially processing.
6. The inter-core communication interaction system for an energy storage co-control device according to claim 5, wherein the present core processor comprises a single core processor or a multi-core processor.
7. The inter-core communication interaction system applied to an energy storage cooperative control device according to claim 6, wherein the data optimization processing end aims at a single-core processor, and after all data to be processed are transmitted to the single-core processor, data division is carried out to confirm single data reprocessing.
8. The inter-core communication interaction system applied to an energy storage cooperative control device according to claim 6, wherein the data optimization processing end aims at a multi-core processor, and when the determined single data capacity reaches a specified value in the transmission process of the data to be processed, the data can be directly processed.
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| CN113032166B (en) * | 2021-03-26 | 2024-05-24 | 黑芝麻智能科技(上海)有限公司 | Inter-core communication method, processor, inter-core communication system, and computer-readable storage medium |
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