CN117890888B

CN117890888B - Detecting device based on TCSPC

Info

Publication number: CN117890888B
Application number: CN202410303200.8A
Authority: CN
Inventors: 赵彦; 马伯奕; 赵久烜
Original assignee: Suzhou Zhiguang Xinke Technology Co ltd
Current assignee: Suzhou Zhiguang Xinke Technology Co ltd
Priority date: 2024-03-18
Filing date: 2024-03-18
Publication date: 2024-05-28
Anticipated expiration: 2044-03-18
Also published as: CN117890888A

Abstract

The invention provides a detection device based on TCSPC. Wherein the detection device divides the pixel array into a plurality of macro-pixel sets, and each macro-pixel set comprises at least one pixel. And a plurality of logic operation modules are arranged in the TCSPC circuit and correspond to the macro pixel sets one by one, so that the output values of the pixels gated in the corresponding macro pixel sets are received and operated by the logic operation modules at the same time, and the space occupation of the TCSPC circuit is effectively reduced. And the resolution of the detection device can be flexibly configured by gating different pixels in each macro-pixel set, the adaptation degree of laser emitted by the emission unit is improved, the system adjustment precision can be reduced, and the cost is saved.

Description

Detecting device based on TCSPC

Technical Field

The invention relates to the technical field of sensors, in particular to a detection device based on TCSPC.

Background

A laser radar (LIDAR) generally includes a transmitting unit and a receiving unit, where the transmitting unit is configured to transmit a laser pulse signal toward a target object, and the receiving unit is configured to receive the laser pulse signal reflected by the target object, and acquire a characteristic quantity such as a position, a speed, and the like of the target object according to the laser pulse signal. Among them, time of flight (ToF) is one of the existing ranging methods of lidar. That is, by recording the time of flight t from the laser emission to the detection of the echo signal, the distance r=c·t/2 of the target object is calculated, C being the speed of light. And for the acquisition of the time of flight t, time-dependent single photon counting (time-correlated single photon counting, TCSPC) is generally used in the prior art as a readout circuit. TCSPC circuitry is a set of algorithms and corresponding implementation circuitry for accurately metering the time difference between two physical events.

Referring to fig. 1 to 3, a TCSPC circuit 11 of a single pixel 10 in a receiving unit is taken as an example. TCSPC circuit 11 includes a histogram accumulator 110 and a memory 111. Wherein, in the single measurement process, the emission unit repeatedly shines the target object for multiple times, and the histogram accumulator 110 is used for accumulating the photon number detected by the pixel 10 in the multiple shining process; and, the memory 111 is used for storing the number of photons detected. The memory 111 includes a plurality of storage units 1110, where each storage unit 1110 corresponds to a respective time difference interval one by one, and is configured to store the number of photons detected by the pixel 10 in the corresponding time difference interval. Wherein, the time period of each time difference interval is set to be dt. Specifically, when each time of light is performed, the emission unit emits a laser pulse as a timing zero point, the pixel 10 samples every other time difference interval and outputs the detected photon number to the histogram accumulator 110, and the histogram accumulator 110 reads the data in the corresponding storage unit 1110 in the memory 111 and adds the data to the current output value of the pixel 10 according to the current time difference interval, and stores the added result in the corresponding storage unit 1110 again. As shown in fig. 3, the specific accumulation process is assumed to repeat polishing k times in a measurement process, and N time difference intervals and N corresponding memory units 1110 are provided. When the light is firstly irradiated, the photon quantity of the detection channel in each time difference interval is s ₁₀、s₁₁、s₁₂、s₁₃、s₁₄、s₁₅、……、s_1N-1 respectively; in the second time of polishing, the number of photons detected in each time difference interval is s ₂₀、s₂₁、s₂₂、s₂₃、s₂₄、s₂₅、……、s_2N-1 respectively; in the third time of polishing, the number of photons detected in each time difference interval is s ₃₀、s₃₁、s₃₂、s₃₃、s₃₄、s₃₅、……、s_3N-1 respectively; the number of photons detected in each time difference interval is s _k0、s_k1、s_k2、s_k3、s_k4、s_k5、……、s_kN-1 until the kth time of lighting. After the k times of polishing, the number of photons accumulated in the storage unit 1110 corresponding to each time difference interval is ：S0=s₁₀+s₂₀+……+s_k0、S1=s₁₁+s₂₁+……+s_k1、……、SN-1= s_1N-1+s_2N-1+……+s_kN-1., so that the histogram shown in fig. 4 can be obtained based on the above data. As can be seen from fig. 4, if the number of photons detected in the transit time zone [ Pdt, (p+1) dt ] is the largest, the probability of detecting photons in the transit time zone [ Pdt, (p+1) dt ] is larger than that in other transit time zones. Thus, the time of flight t is most probable in the moveout interval [ Pdt, (p+1) dt ]. Therefore, the flight time t can be determined by a related data processing algorithm, and the distance R of the target object can be calculated.

However, the above description is directed to the detection process of one pixel 10 only, and in the actual measurement process, in order to obtain a higher point cloud density or frame rate, it is generally necessary to perform TCSPC counting on a plurality of pixels in the receiving unit at the same time. Thus, a plurality of TCSPC circuits need to be provided, one for each of the pixels. However, the existing pixel array and its readout circuit are often integrated in a large-scale integrated circuit, resulting in limited TCSPC circuit and its corresponding memory space, so that the maximum value of the number of pixels that can be sampled in parallel is limited, and cannot meet the requirement of high frame rate. In addition, along with the complicacy of application scene, under different application scenes, the system has certain difference to the quantity and the size of pixel, the precision and the scope etc. requirement of range finding, and current TCSPC circuit can't dispose in a flexible way, is difficult to satisfy diversified range finding demand.

Accordingly, a new TCSPC circuit is needed to solve the above technical problems.

Disclosure of Invention

The invention aims to provide a detection device based on TCSPC, which is at least used for solving the problems of how to flexibly configure the resolution, the measurement range, the measurement precision and the frame rate of the detection device.

In order to solve the technical problems, the invention provides a detection device based on TCSPC, which comprises a transmitting unit, a receiving unit and a data processing unit;

The emitting unit comprises a laser for emitting laser to the measured target;

The receiving unit comprises a pixel array and a TCSPC circuit; the pixel array is used for at least receiving laser reflected by the tested object; the TCSPC circuit is connected with the pixel array and is used for receiving and processing the output value of the pixel array;

Wherein the pixel array is divided into a plurality of macro-pixel sets, and each macro-pixel set comprises at least one pixel; the TCSPC circuit comprises a plurality of logic operation modules and a memory, and the logic operation modules are in one-to-one correspondence with the macro pixel sets; the logic operation module is used for receiving and operating the output value of the pixel gated in the corresponding macro-pixel set; the memory is used for storing the accumulated output values of each logic operation module in different time difference intervals;

The data processing unit is used for acquiring the flight time of the laser at least according to the data stored in the memory and calculating the distance of the measured object.

Optionally, in the TCSPC-based detection apparatus, an intersection between each of the macro-pixel sets is an empty set, and/or an intersection between a portion of the macro-pixel sets is a non-empty set.

Optionally, in the TCSPC-based detection device, when the number of pixels in the macro-pixel set is greater than 1, the pixels in the macro-pixel set are spatially adjacent in sequence, and/or a portion of the pixels are spatially separated.

Optionally, in the TCSPC-based detecting device, the TCSPC circuit further includes a first selector, where the first selector is connected to each of the macro-pixel sets, and is configured to configure each of the macro-pixel sets and gates of each of the pixels in each of the macro-pixel sets to configure a pixel resolution; and said first selector is further for alternately gating different ones of said pixels in each of said macropixel sets;

Wherein each of the pixels that are strobed are spatially adjacent in sequence and/or portions of the pixels that are strobed are spatially separated in the pixel array.

Optionally, in the TCSPC-based detection apparatus, the pixel includes at least one sensing device; the sensing device comprises a single photon avalanche diode and is used for acquiring the photon number according to the received reflected laser; and the output value of the pixel includes the number of photons acquired by the pixel.

Optionally, in the TCSPC-based detection device, the logic operation module at least includes one or a combination of two or more of an adder, an and gate, an or gate, and an not gate.

Optionally, in the TCSPC-based detection apparatus, the TCSPC circuit further includes a plurality of accumulation modules; the accumulation modules are in one-to-one correspondence and connected with the logic operation modules, and are used for accumulating the output values of the corresponding logic operation modules in each time difference interval.

Optionally, in the TCSPC-based detection apparatus, the memory includes a plurality of memory blocks, and each of the accumulation modules is connected to at least one of the memory blocks; the storage block comprises a plurality of storage units, and each storage unit is used for storing the output value of the corresponding accumulation module in at least one time difference interval; and

The TCSPC circuit also comprises a second selector which is respectively connected with each accumulation module and each storage block and is used for selecting the storage block correspondingly connected with each accumulation module so as to configure a detection range.

Optionally, in the TCSPC-based detection apparatus, the TCSPC circuit has three operation modes:

in a first working mode, the accumulation modules are in one-to-one correspondence and connected with the storage blocks so as to enable all the macro pixel sets to be sampled in parallel;

In a second working mode, each accumulation module is correspondingly connected with at least two storage blocks, so that at least two accumulation modules alternately use one storage block, and part of macro pixel sets alternately sample in parallel;

in a third mode of operation, each accumulation module is coupled to all of the memory blocks such that each accumulation module alternates between using all of the memory blocks and each of the macropixel sets alternates between sampling.

Optionally, in the TCSPC-based detecting device, the accumulating module includes a shift register, a plurality of adders, and a third selector; wherein,

The shift register comprises a plurality of register units, wherein the register units are used for shifting and registering output values of corresponding macro pixel sets in different time difference intervals, and each register unit stores the output value of the corresponding macro pixel set in one time difference interval;

The adders are respectively used for accumulating the data in at least two register units to form a plurality of output results corresponding to different time difference intervals;

The third selector is configured to gate at least different ones of the output results to configure detection accuracy.

In summary, the present invention provides a TCSPC-based detection device. Compared with the prior art, the detection device provided by the invention divides the pixel array into a plurality of macro-pixel sets, and each macro-pixel set comprises at least one pixel. And a plurality of logic operation modules are arranged in the TCSPC circuit and correspond to the macro pixel sets one by one, so that the output values of the pixels gated in the corresponding macro pixel sets are received and operated by the logic operation modules at the same time, and the space occupation of the TCSPC circuit is effectively reduced. And the resolution of the detection device can be flexibly configured by gating different pixels in each macro-pixel set, the adaptation degree of laser emitted by the emission unit is improved, the system adjustment precision can be reduced, and the cost is saved.

Drawings

Those of ordinary skill in the art will appreciate that the figures are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

Fig. 1 is a schematic diagram of a TCSPC circuit in the prior art.

Fig. 2 is a schematic diagram of a memory cell in a prior art memory.

Fig. 3 is a schematic storage diagram of each memory cell in the k polishing processes in the prior art.

Fig. 4 is a histogram of the number of photons accumulated in each time difference interval in the prior art.

Fig. 5 is a schematic structural diagram of a TCSPC-based detection device according to an embodiment of the present invention.

Fig. 6 is a schematic diagram of a pixel array divided into four macro-pixel sets according to an embodiment of the present invention.

Fig. 7 is a schematic structural diagram of a macro-pixel set with partial pixels spatially arranged at intervals in an embodiment of the present invention.

Fig. 8 is a schematic diagram of a structure in which two macro-pixel sets intersect to form a non-empty set according to an embodiment of the present invention.

Fig. 9 is a schematic diagram of a TCSPC circuit according to an embodiment of the present invention.

Fig. 10 is a schematic diagram of each memory cell in a memory block corresponding to each time difference interval according to an embodiment of the present invention.

Fig. 11 is a schematic structural diagram of an accumulation module according to an embodiment of the invention.

Fig. 12 is a schematic diagram of pixel gating in four macro-pixel sets in a first period of time according to an embodiment of the present invention.

Fig. 13 is a schematic diagram illustrating pixel gating in four macro-pixel sets in a second period of time according to an embodiment of the present invention.

Fig. 14 is a schematic diagram of pixel gating in two macro-pixel sets in a third period of time according to an embodiment of the present invention.

Fig. 15 is a schematic diagram illustrating pixel gating in two macro-pixel sets in a fourth period of time according to an embodiment of the present invention.

Fig. 16 is a schematic diagram illustrating pixel gating in two macro-pixel sets in a fifth time period according to an embodiment of the present invention.

Fig. 17 is a schematic diagram of pixel gating in two macro-pixel sets in a sixth time period according to an embodiment of the present invention.

Fig. 18 is a schematic diagram illustrating the spatial distribution of two macro-pixel sets according to an embodiment of the present invention.

Fig. 19 is a schematic diagram showing the spatial distribution of two other macro-pixel sets according to an embodiment of the present invention.

Fig. 20 is a schematic view illustrating pixel gating in four macro-pixel sets in a seventh period of time according to an embodiment of the present invention.

Fig. 21 is a schematic view illustrating pixel gating in four macro-pixel sets in an eighth time period according to an embodiment of the present invention.

And, in the drawings:

10-pixels; 11-TCSPC circuitry; 110-a histogram accumulator; 111-memory; 1110-a memory cell;

a 20-transmitting unit;

30-a receiving unit;

301-an array of pixels; 3010-a set of macro-pixels; 3010 a-a first set of macro-pixels; 3010 b-a second set of macro-pixels; 3010 c-a third set of macro-pixels; 3010 d-a fourth set of macro-pixels;

302-TCSPC circuitry; 3020-a logic operation module; 3020 a-a first logic operation module; 3020 b-a second logic operation module; 3020 c-a third logical operation module; 3020 d-fourth logic operation module; 3021-an accumulation module; 3021 a-a first accumulation module; 3021 b-a second accumulation module; 3021 c-a third accumulation module; 3021 d-a fourth accumulation module; 30210-a shift register; 30211-adder; 30212-a third selector; 3022-a memory; 30220—a memory block; 30220a—a first memory block; 30220 b-a second memory block; 30220c—a third memory block; 30220 d-fourth memory block;

40-a data processing unit;

M-a measured target; p-pixels; a-intersection; u1-a first registering unit; u2-a second registering unit; u3-a third register unit; u4-fourth register unit; 0-T1-a first time period; T1-T2-a second time period; 0-T3-a third time period; T3-T4-fourth time period; T4-T5-fifth time period; T5-T6-sixth time period; 0 to T7-seventh time period; T7-T8-eighth time period.

Detailed Description

The invention will be described in further detail with reference to the drawings and the specific embodiments thereof in order to make the objects, advantages and features of the invention more apparent. It should be noted that the drawings are in a very simplified form and are not drawn to scale, merely for convenience and clarity in aiding in the description of embodiments of the invention. Furthermore, the structures shown in the drawings are often part of actual structures. In particular, the drawings are shown with different emphasis instead being placed upon illustrating the various embodiments. It should be further understood that the terms "first," "second," "third," and the like in this specification are used merely for distinguishing between various components, elements, steps, etc. in the specification and not for indicating a logical or sequential relationship between the various components, elements, steps, etc., unless otherwise indicated. And, in the present specification, the singular forms "a", "an" and "the" include plural referents, the term "or" is generally used in the sense of "and/or" and the term "several" is generally used in the sense of "at least one" and the term "at least two" is generally used in the sense of "two or more".

Referring to fig. 5 and 6, the present embodiment provides a TCSPC-based detection apparatus, including: a transmitting unit 20, a receiving unit 30, and a data processing unit 40; the emitting unit 20 includes a laser for emitting laser light toward the measured object M; the receiving unit 30 includes a pixel array 301 and a TCSPC circuit; the pixel array 301 is configured to at least receive laser light reflected by the measured object M; the TCSPC circuit is connected to the pixel array 301 and is configured to receive and process the output value of the pixel array 301; wherein the pixel array 301 is divided into a plurality of macro-pixel sets 3010, and each macro-pixel set 3010 includes at least one pixel P; the TCSPC circuit comprises a plurality of logic operation modules and a memory, and the plurality of logic operation modules are in one-to-one correspondence with the plurality of macro pixel sets 3010; the logic operation module is used for receiving and operating the output value of the pixel P gated in the corresponding macro pixel set 3010; the memory is used for storing the accumulated output values of each logic operation module in different time difference intervals; the data processing unit 40 is configured to obtain a time of flight of the laser according to at least the data stored in the memory, and calculate a distance between the measured object M.

Based on this, the TCSPC-based detection apparatus provided in the present embodiment divides the pixel array 301 into a plurality of macro-pixel sets 3010, and each macro-pixel set 3010 includes at least one pixel P. And a plurality of logic operation modules are arranged in the TCSPC circuit and are in one-to-one correspondence with the macro pixel sets 3010, so that the output values of the pixels P gated in the corresponding macro pixel sets 3010 are received and operated by the logic operation modules at the same time, and the space occupation of the TCSPC circuit is effectively reduced. And by gating different pixels P in each macro-pixel set 3010, the resolution of the detection device can be flexibly configured, the adaptation degree of the laser emitted by the emission unit 20 is improved, meanwhile, the system adjustment precision can be reduced, and the cost is saved.

The TCSPC-based detection device provided in this embodiment is specifically described below with reference to fig. 5 to 21.

With continued reference to fig. 5 and 6, the TCSPC-based detection apparatus provided in the present embodiment includes a transmitting unit 20, a receiving unit 30, and a data processing unit 40. Specifically, the emitting unit 20 includes a laser and an emitting-end mirror group. And laser emitted by the laser propagates towards the measured object M after being modulated by the emitting end lens group. The receiving unit 30 comprises a pixel array 301, TCSPC circuitry and a receiving end mirror group. The laser is reflected by the measured object M and enters the receiving end lens group, and modulated by the receiving end lens group and enters the pixel array 301; each pixel P in the pixel array 301 receives the reflected laser light and performs photoelectric conversion to form a plurality of electrical signals; each of the electrical signals is processed by the TCSPC circuit to form information carrying the measured object M, and transmitted to the data processing unit 40. The data processing unit 40 is configured to process the information acquired by the receiving unit 30, and calculate information such as a laser time of flight (ToF) and a target distance according to the information. Alternatively, the pixel array 301 and the TCSPC circuit in the receiving unit 30, and the data processing unit 40 may be integrated on the same semiconductor device (e.g., a chip), or may be implemented using a plurality of independent semiconductor devices.

Further, the pixel array 301 includes a plurality of pixels P for receiving the laser light reflected by the measured object M and the ambient light, and converting the optical signal into an electrical signal for output. The pixel P can be one photosensitive device or can be formed by combining a plurality of photosensitive devices; and the present embodiment does not limit the shape, size, distribution, type, etc. of the photosensitive devices included in each of the pixels P in the pixel array 301. For example, a part of the pixels P in the pixel array 301 includes 3×3 rectangular photosensitive devices distributed in an array, and a part of the pixels P includes 2×5 circular photosensitive devices distributed in an array. Preferably, the photosensitive device is a single photon avalanche diode (Single photon avalanche diode, SPAD) for acquiring the number of photons from the received reflected laser light. Wherein the output value of the pixel P includes the number of photons acquired by the pixel P. In addition, the number, shape, size, and spatial distribution of the pixels P in the pixel array 301 are not limited in this embodiment. As shown in fig. 6, the pixel array 301 includes 8×10 pixels P arranged in an array, and each of the pixels P is rectangular.

To achieve flexible configuration of the resolution of the detection device, the present embodiment divides the pixel array 301 into a plurality of macro-pixel sets 3010. Each macro-pixel set 3010 includes one or more of the pixels P, and the number, spatial distribution, and the like of the pixels P in each macro-pixel set 3010 may be the same or different. Illustratively, as shown in fig. 6, the pixel array 301 is divided into four macro-pixel sets 3010, and each macro-pixel set 3010 includes 4×5 pixels P distributed in an array. The size and shape of each of the macro-pixel sets 3010 are the same, and the respective pixels P belonging to the same macro-pixel set 3010 are spatially adjacent. And a first macro-pixel set 3010a and a second macro-pixel set 3010b shown in fig. 7, and partial pixels P in the two macro-pixel sets 3010 are distributed in a distributed manner. That is, some of the pixels P belonging to the same macro-pixel set 3010 are not spatially adjacent. And the first set 3010a of macro-pixels has four more pixels P than the second set 3010b of macro-pixels. It will be appreciated that each of the macro-pixel sets 3010 illustrated in fig. 6 and 7 intersect as an empty set, i.e., each of the pixels P belongs to one of the macro-pixel sets 3010. While in other examples, each of the macro-pixel sets 3010 may intersect as well as be a non-empty set. In other words, there are portions of the pixels P belonging to two or more of the macropixel sets 3010. As shown in fig. 8, the pixel array 301 includes four macro-pixel sets 3010, respectively: a first set of macro-pixels 3010a, a second set of macro-pixels 3010b, a third set of macro-pixels 3010c, and a fourth set of macro-pixels 3010d. Wherein an intersection a between the first macro-pixel set 3010a and the third macro-pixel set 3010c includes five of the pixels P. These five pixels P belong to both the first macro-pixel set 3010a and the third macro-pixel set 3010c. While intersections between the second set of macro-pixels 3010b and the fourth set of macro-pixels 3010d, and with other sets of macro-pixels 3010, are empty sets. That is, the pixels P belonging to the second and fourth macro-pixel sets 3010b and 3010d do not belong to the other macro-pixel sets 3010.

Based on the foregoing macro-pixel sets 3010, it can be appreciated that by selectively obtaining the output value of one or more pixels P in each macro-pixel set 3010 as the effective output of the macro-pixel set 3010, flexible configuration of pixel resolution can be achieved. As shown in fig. 6 to 8, in the sampling process, 5×1 pixels P in each of the macro-pixel sets 3010 are selected to be output as one macro-pixel, and the pixel resolution is higher than that of 5×2 pixels P in each of the macro-pixel sets 3010. That is, the larger the size of the macro-pixel selected for acquisition, the lower the pixel resolution, whereas the smaller the size of the macro-pixel selected for acquisition, the higher the pixel resolution. Therefore, to achieve flexible configuration of pixel resolution, the TCSPC circuit provided in this embodiment further includes a first selector (not shown). The first selector is connected to each macro-pixel set 3010, and is configured to configure gating of each macro-pixel set 3010, and the size and distribution of the macro-pixels selected to be acquired in the gated macro-pixel set 3010, that is, the number of pixels P included in the macro-pixels and the distribution of each pixel P, so as to flexibly adjust the pixel resolution of the detection device. For example, as shown in fig. 8, the first selector gates the first macro-pixel set 3010a and the second macro-pixel set 3010b, and selects to obtain output values of 5×1 pixels P in the first macro-pixel set 3010a, and output values of 5×2 pixels P in the second macro-pixel set 3010 b.

Therefore, the detection device provided by the embodiment can flexibly adjust the pixel resolution when aiming at different application scenes. When the system has higher requirements on pixel resolution, the first selector can configure that the macro pixels in each macro pixel set 3010 include a smaller number of the pixels P, and when the system has lower requirements on pixel resolution, the first selector can configure that the macro pixels in each macro pixel set 3010 include a larger number of the pixels P, so that flexible configuration on the resolution of the detection device is realized, and the application range is wider. In addition, based on the distribution of each macro-pixel set 3010 and the gating of the first selector, the adaptation degree and flexibility of the receiving unit 30 to the laser light distributed in different shapes sent by the transmitting unit 20 are higher, and at the same time, the system tuning precision can be reduced. Even if the positions of the reflected laser light irradiated on the pixel array 301 are deviated, the reception of the reflected laser light can be achieved by configuring the positions of the macro-pixels.

Referring to fig. 6, 9, 10 and 11, the TCSPC circuit 302 further includes a plurality of logic operation modules 3020, a plurality of accumulation modules 3021 and a memory 3022. The macro pixel sets 3010, the logic operation modules 3020 and the accumulation modules 3021 are respectively connected in a one-to-one correspondence. In other words, each macro-pixel set 3010 is correspondingly connected to one logic operation module 3020, each logic operation module 3020 is correspondingly connected to one accumulation module 3021, and the macro-pixel set 3010, the logic operation module 3020 and the accumulation module 3021 are sequentially connected. For example, as shown in fig. 9, the TCSPC circuit 302 includes four logic operation modules 3020 and four accumulation modules 3021, and respectively: the first logic operation module 3020a, the second logic operation module 3020b, the third logic operation module 3020c, the fourth logic operation module 3020d, the first accumulation module 3021a, the second accumulation module 3021b, the third accumulation module 3021c, and the fourth accumulation module 3021d. The first macro-pixel set 3010a, the first logic operation module 3020a and the first accumulation module 3021a are connected in sequence; the second macro-pixel set 3010b, the second logic operation module 3020b, and the second accumulation module 3021b are connected in sequence; the third macro-pixel set 3010c, the third logic operation module 3020c, and the third accumulation module 3021c are connected in sequence; and, the fourth macro-pixel set 3010d, the fourth logic operation module 3020d, and the fourth accumulation module 3021d are connected in sequence.

It should be noted that, in the prior art, each pixel P is configured with a readout circuit for receiving and storing the electrical signal photoelectrically converted by the pixel P in each time difference interval, and the existing sensor chip strictly defines the setting space and the corresponding storage space of each readout circuit. Therefore, in a limited space, the detecting device provided in this embodiment connects a plurality of pixels P to one accumulation module 3021, which reduces the number of accumulation modules 3021, and performs overall logic operation on the output values of a plurality of pixels P through the logic operation module 3020, so that the output values of a plurality of pixels P are input to the accumulation module 3021 as a whole, which effectively enlarges the number of parallel receiving of the pixels P, and achieves an increase in the receiving range of the receiving unit 30 and/or a reduction in the setting space of the readout circuit.

Further, the logic operation module 3020 includes, but is not limited to, one or a combination of two or more of an adder, an and gate, an or gate, and an not gate. The types of the logic operation modules 3020 corresponding to the macro-pixel sets 3010 in the TCSPC circuit 302 may be the same or different, and the embodiment is not limited specifically. As shown in fig. 8 and 9, the first logic operation module 3020a, the second logic operation module 3020b, the third logic operation module 3020c, and the fourth logic operation module 3020d are adders. The first selector selects all pixels P in each macro-pixel set 3010 to output, and each logic operation module 3020 may synchronously receive output values of all pixels P in the corresponding macro-pixel set 3010 and add the received output values of the pixels P as output values of the corresponding logic operation module 3020. If the first macro-pixel set 3010a includes 5×5 pixels P, the output values of the 5×5 pixels P are input to the first logic operation module 3020a in a time difference interval, and the first logic operation module 3020a accumulates the output values of the 5×5 pixels P. Similarly, the other logic operation modules 3020 synchronously accumulate the output values of the pixels P in the corresponding macro-pixel set 3010 in the same time difference interval.

With continued reference to fig. 9, 10 and 11, the accumulation module 3021 is configured to accumulate the output values of the corresponding logic operation modules 3020 in each time difference interval, and each accumulation module 3021 is connected to the memory 3022 in the TCSPC circuit 302. The memory 3022 is configured to store an output value of each of the accumulation modules 3021. Further, the memory 3022 includes a plurality of memory blocks 30220, and each memory block 30220 includes a plurality of memory units, and each memory unit corresponds to at least one time difference interval, so as to store accumulated data of the corresponding accumulating module 3021 in the corresponding time difference interval. Illustratively, the first selector gates all pixels P within the first set of macro-pixels 3010a for sampling out as macro-pixels. And the first macro-pixel set 3010a is sequentially connected to the first logic operation module 3020a, the first accumulation module 3021a, and the first storage block 30220a in the memory 3022. Each memory location in the first memory block 30220a corresponds to a time difference interval. When the laser emits a laser pulse, the output value of each pixel P in the first macro-pixel set 3010a is input to the first logic operation module 3020a in the first time difference interval [0, dt ] after the laser emits the laser pulse for the first time, and after the logic operation, the first logic operation module 3020a inputs the operation output value M1 to the first accumulation module 3021a. The first accumulation module 3021a first retrieves the value M0 in the first storage unit Bin0 corresponding to the time difference interval [0, dt ] in the first storage block 30220 a. Then, the accumulation module 3021 accumulates M0 and M1, and obtains an accumulated result M2, and the first accumulator 3020a stores the accumulated result M2 into the first storage unit Bin0 corresponding to the time difference interval [0, dt ] in the first storage block 30220a, so as to update the previous value M0. And since the initial value of M0 is 0, the value m2=m1 in the updated first memory cell Bin 0. Similarly, in the second time difference interval [ dt,2dt ], the first accumulation module 3021a accumulates the output value of the first logic operation module 3020a with the value in the second storage unit Bin1 corresponding to the time difference interval [ dt,2dt ] in the first storage block 30220a, and updates the value in the second storage unit Bin1 with the accumulated result. And so on until the N-th storage unit BinN-1 corresponding to the N-th time difference interval [ (N-1) dt, ndt ] is stored.

Further, according to the different emission frequencies of the lasers, polishing for the second time, the third time and the like can be sequentially performed after the first polishing detection is completed; or in the first polishing detection process, polishing is performed for the second time, the third time, etc., which is not limited in this embodiment. For each subsequent lighting, the current lighting time is taken as a timing zero point, and the current data is accumulated and stored. For example, when the detection and storage of the first lighting of the above example have been performed and the second lighting is now performed, the second lighting is started to be counted as a second time zero point, and the output value of the first macro-pixel set 3010a is input to the first logic operation module 3020a through the first time difference interval [0, dt ] in the second time, the first logic operation module 3020a inputs the calculated value M3 to the first accumulation module 3021a, and the first accumulation module 3021a retrieves the value M2 in the first storage unit Bin0 and stores m2+m3 as accumulated data in the first storage unit Bin 0to update the value in the first storage unit Bin 0. From this, after K times of polishing, the first storage unit Bin0 stores the cumulative value of the data detected in the first time difference interval [0, dt ] of each polishing timing, the second storage unit Bin1 stores the cumulative value of the data detected in the second time difference interval [ dt,2dt ] of each polishing timing, … …, and the nth storage unit BinN-1 stores the cumulative data detected in the nth time difference interval [ (N-1) dt, ndt ] of each polishing timing, so as to obtain the histogram shown in fig. 4, calculate the flight time, and further obtain the distance of the measured object M.

It should be noted that, in the above examples, one time period dt is taken as the duration range of each time difference interval, and each accumulation module 3021 corresponds to one storage block 30220, i.e. corresponds to N storage units, so that the observed time difference range of the whole TCSPC circuit 302 is Ndt. It can be seen that the larger the number of memory cells corresponding to each accumulation module 3021, the larger the observation time difference range of the TCSPC circuit 302, i.e. the farther the maximum detection distance. And the smaller the time period dt of the moveout interval corresponding to each storage unit is, the higher the ranging accuracy is. In the prior art, the observation time difference range of the TCSPC circuit 302 and the time period dt of each time difference interval are both fixed, and cannot be flexibly configured according to the needs. In this regard, to achieve the selectivity of the ranging range of the detecting device, the TCSPC circuit 302 provided in this embodiment is further provided with a second selector (not shown). The second selector is connected to each accumulation module 3021 and each storage block 30220, and is configured to configure the storage block 30220 to which each accumulation module 3021 is correspondingly connected. For example, the first accumulation module 3021a corresponding to the first macro-pixel set 3010a is configured via the second selector to: the first memory block 30220a is connected to the second memory block 30220a, where the first memory block 30220a includes N memory units, and the time interval duration of the time difference interval corresponding to each memory unit is a time period dt, and the maximum observed time difference range of the TCSPC circuit 302 is: ndt; if the second selector configures the first accumulation module 3021a to be connected to the first memory block 30220a and the second memory block 30220b, and the first memory block 30220a and the second memory block 30220b each include N memory cells, the maximum observed time difference range of the TCSPC circuit 302 is: 2Ndt, whereby a flexible configuration of the detection distance range can be achieved.

With continued reference to fig. 11, in order to implement flexible configuration of the ranging accuracy of the detecting device, the accumulating module 3021 provided in this embodiment includes a shift register 30210, a plurality of adders 30211, and a third selector 30212. Specifically, the shift register 30210 is connected to the corresponding logic operation module 3020, and the shift register 30210 includes a plurality of register units for shifting and registering output values of the logic operation module 3020 in each time difference interval. For example, the shift register 30210 includes four register units, which are respectively: a first register unit U1, a second register unit U2, a third register unit U3, and a fourth register unit U4. Starting timing when the laser lights for the first time, and after a first time difference interval, the logic operation module 3020 inputs an output value in the first time difference interval to the shift register 30210 and stores the output value in the first register unit U1; after a second time difference interval, the logic operation module 3020 inputs the output value in the second time difference interval to the shift register 30210, the output value in the first time difference interval stored in the first register unit U1 is moved to the second register unit U2 for storage, and the output value in the second time difference interval is stored in the first register unit U1. And by analogy, after four time difference intervals pass, the output value of a fourth time difference interval is stored in the first register unit U1, the output value of a third time difference interval is stored in the second register unit U2, the output value of the second time difference interval is stored in the third register unit U3, and the output value of the first time difference interval is stored in the fourth register unit U4.

Further, each of the register units is connected to each of the adders 30211. Each adder 30211 is configured to accumulate the values stored in each register unit to form a plurality of output results corresponding to different time difference intervals. Preferably, the output result of each adder 30211 includes a one-by-one accumulation result of the data in all the register units. For example, three adders 30211 connected to the shift register 30210 as shown in fig. 11 output the sum of the data in the first register unit U1 and the second register unit U2, the sum of the data in the first register unit U1, the second register unit U2 and the third register unit U3, and the sum of the data in the first register unit U1, the second register unit U2, the third register unit U3 and the fourth register unit U4, respectively, as three output results. It can be understood that the three output results respectively correspond to the output values of the logic operation module 3020 accumulated in two time difference intervals, the output values of the logic operation module 3020 accumulated in three time difference intervals, and the output values of the logic operation module 3020 accumulated in four time difference intervals. And the output terminal of each adder 30211 is connected to the third selector 30212, and the third selector 30212 is used to gate the output result of the corresponding adder 30211. In addition, an adder 30211 is further disposed between the output terminal of the third selector 30212 and the memory block 30220. The adder 30211 adds up the output value of the third selector 30212 and the data in the corresponding storage unit of the corresponding time difference section in the storage block 30220, and inputs the addition result to the corresponding storage unit to update the data in the corresponding storage unit.

Illustratively, as shown in fig. 10 and 11, the third selector 30212 gates the adder 30211 for accumulating the data in the first and second register units U1 and U2. When the first lighting starts timing and passes through the first time difference interval [0, dt ], the logic operation module 3020 inputs the output value corresponding to the first time difference interval [0, dt ] to the first register unit U1; after the second time difference interval [ dt,2dt ] passes, the data in the first register unit U1 is shifted and registered to the second register unit U2, and the logic operation module 3020 inputs the output value corresponding to the second time difference interval [ dt,2dt ] to the first register unit U1. At this time, the adder 30211 connected to the first register unit U1 and the second register unit U2 obtains the data in the two register units to accumulate, and stores the accumulated data W0 into the first storage unit Bin0. Therefore, stored in each of the memory cells in the memory block 30220 is the sum of the data of the two time periods dt. When the second lighting starts timing and passes through the first time difference interval [0, dt ] and the second time difference interval [ dt,2dt ], the corresponding adder 30211 inputs the accumulated data W1 into the adder 30211 connected to the storage block 30220, and invokes the data W0 stored in the first storage unit Bin0 in the storage block 30220, the adder 30211 accumulates the data W0 and the data W1, and updates the first storage unit Bin0 with w0+w1 as new data.

Therefore, under the combined action of the shift register 30210, the adder 30211, and the third selector 30212, the duration range of the time difference interval corresponding to the data stored in each storage unit can be flexibly configured, and the ranging accuracy of the corresponding TCSPC circuit 302 is configured. For example, the measurement accuracy is doubled when two time periods dt are stored as one time lag zone compared to four time periods dt. And when more of the register units and the adder 30211 are provided, a greater variety of ranging accuracy can be configured. It should be noted that, as shown in fig. 11, the first register unit U1 may be directly connected to the third selector 30212, so that each time period dt is used as one time difference interval for data storage in the strobe state of the third selector 30212.

As can be seen from the above, the TCSPC circuit 302 provided in this embodiment implements the configuration of the pixel resolution through the division of the macro pixel set 3010, the setting of the logic operation module 3020 and the first selector; the configuration of the ranging range is realized through the gating setting of the second selector to the memory block 30220; and, by setting the shift register 30210, the adder 30211, and the third selector 30212, configuration of the ranging accuracy is achieved. Thus, the TCSPC circuit 302 provided in this embodiment greatly increases the applicable range of the detection device, and has high configuration flexibility. Preferably, the above three configurations may be set in the TCSPC circuit 302 at the same time, or one or two configurations may be selected to be set in the TCSPC circuit 302.

With continued reference to fig. 6 and 9, as can be seen from the foregoing description, to adjust the pixel resolution, the first selector in the TCSPC circuit 302 provided in this embodiment may gate different macro-pixel sets 3010 and gate different pixels P in each macro-pixel set 3010. When the first selector gates all the pixels P in all the macro-pixel sets 3010, the receiving area in the receiving unit 30 is the area of the entire pixel array 301. When a part of the macro-pixel sets 3010 are gated, or a part of the pixels P in each macro-pixel set 3010 are gated, or a part of the pixels P in a part of the macro-pixel sets 3010 are gated, the receiving area in the receiving unit 30 is smaller than the area of the pixel array 301, that is, there are some of the pixels P in the sleep state all the time, which results in limited coverage of the receiving range of the reflected light spot. Accordingly, the TCSPC circuit 302 provided in this embodiment also includes a timer (not shown). The timer is connected with the first selector and is used for timing and sending a switching signal to the first selector at each preset time point. The first selector, upon receiving the switching signal, switches on other sets of macro-pixels 3010 and/or switches on other pixels P in each of the sets of macro-pixels 3010. In other words, the present embodiment uses the timer and the first selector to implement the alternate sampling of different macro-pixel sets 3010 and/or different pixels P in the macro-pixel sets 3010, so as to improve the receiving coverage of the reflected light spot by the receiving unit 30.

Based on this, the TCSPC circuit provided in this embodiment may be divided into three modes of operation: in a first operation mode, the plurality of accumulation modules 3021 are in one-to-one correspondence with and connected to the plurality of storage blocks 30220, so as to enable all the macro-pixel sets 3010 to perform parallel sampling; in the second working mode, each accumulation module 3021 is correspondingly connected with at least two storage blocks 30220, so that at least two accumulation modules 3021 alternately use one storage block 30220, and part of the macro-pixel sets 3010 alternately perform parallel sampling; in a third operation mode, each of the accumulation modules 3021 is connected to all of the storage blocks 30220, so that each of the accumulation modules 3021 uses all of the storage blocks 30220 alternately, and each of the macro-pixel sets 3010 is sampled alternately.

Illustratively, in a first mode of operation, as shown in fig. 9, 12 and 13, the pixel array 301 includes a first set of macro-pixels 3010a, a second set of macro-pixels 3010b, a third set of macro-pixels 3010c and a fourth set of macro-pixels 3010d. The intersection set between each macro-pixel set 3010 is an empty set, and each macro-pixel set 3010 corresponds to one storage block 30220, so that parallel sampling of four macro-pixel sets 3010 can be realized. In a first time period 0-T1, the first selector gates the macro pixels in the first macro pixel set 3010a to include L1-L5 column pixels P of R7 and R8 rows; the macro pixels in the second macro pixel set 3010b include L6-L10 columns of pixels P in R7 and R8 rows; the macro pixels in the third macro pixel set 3010c include L1-L5 column pixels P of the R1 and R2 rows; and, the macro-pixels in the fourth macro-pixel set 3010d include L6-L10 columns of pixels P of rows R1 and R2. When the timer counts from zero to time T1, the timer sends a switching signal to the first selector, and the first selector switches and gates the macro pixels in the first macro pixel set 3010a to include L1-L5 column pixels P of R5 and R6 rows; the macro pixels in the second macro pixel set 3010b are selected to comprise L6-L10 columns of pixels P in R5 and R6 rows; the macro pixels in the third macro pixel set 3010c are selected to comprise L1-L5 columns of pixels P in the R3 and R4 rows; and, the macro-pixels in the fourth macro-pixel set 3010d are strobed to include L6-L10 columns of pixels P of rows R3 and R4. Thus, full coverage sampling of the pixel array 301 during the first time period 0 to T1 and the second time period T1 to T2 can be achieved. And when the timer counts from time T1 to time T2, the TCSPC circuit 302 completes sampling and storing in the second time period T1 to T2, and the first selector switches to gate each macro pixel gated in the first time period 0 to T1 again. Such repeated alternating sampling may continue to achieve multiple full coverage samplings of the pixel array 301.

In still another exemplary operation mode, as shown in fig. 9, 14, 15, 16 and 17, the accumulating modules 3021 corresponding to the first macro-pixel set 3010a, the second macro-pixel set 3010b, the third macro-pixel set 3010c and the fourth macro-pixel set 3010d are respectively connected to the two storage blocks 30220. Since only four of the memory blocks 30220 are included in the memory 3022, only two of the macro-pixel sets 3010 can be supported for parallel sampling during sampling. Thus, in the third time period 0-T3, the first selector gates the macro pixels in the first macro pixel set 3010a to include the L1-L5 column pixels P of the R7 and R8 rows; and, the macro-pixels in the third macro-pixel set 3010c are gated to include L1-L5 column pixels P of the R1 and R2 rows. And the other pixels P are in a non-working state in a third time period 0-T3. When the timer counts to the time T3, the timer sends a switching signal to the first selector, and the first selector switches and gates the macro pixels in the first macro pixel set 3010a to include L1-L5 column pixels P of R5 and R6 rows; and, the macro-pixels in the third macro-pixel set 3010c are gated to include L1-L5 column pixels P of the R3 and R4 rows; the other pixels P are in the inactive state. It is understood that the receiving unit 30 can obtain the output of the pixel P within the coverage area of the first macro-pixel set 3010a and the third macro-pixel set 3010c during the third time period 0 to T3 and the fourth time period T3 to T4, and the second macro-pixel 3010b and the fourth macro-pixel 3010d are always in the inactive state during this time period. And four storage blocks 30220 in the memory 3022 store the relevant data collected by the first macro-pixel set 3010a and the third macro-pixel set 3010c all the time during the third time period 0 to T3 and the fourth time period T3 to T4.

In order to expand the data acquisition range, when the timer counts to the time T4, the timer sends a switching signal to the first selector, and the first selector switches and gates the L6-L10 column pixels P of the R7 th and R8 th rows of the macro pixel packet in the second macro pixel set 3010 b; and, the L6-L10 column pixels P of the R1 and R2 rows are strobed in the macro pixel group 3010 d. Similarly, when the fifth time period T4-T5 is elapsed and the time is counted to the time T5, the first selector switches and gates the L6-L10 columns of pixels P of the R5 th and R6 th rows of the macro pixel packets in the second macro pixel set 3010 b; and, the macro-pixels in the fourth macro-pixel set 3010d are strobed to wrap the L6-L10 column pixels P of the R3 and R4 rows, so as to implement full coverage sampling of the second macro-pixel 3010b and the fourth macro-pixel 3010d during the fifth time period T4-T5 and the sixth time period T5-T6, during which the four storage blocks 30220 in the memory 3022 always store the relevant data collected by the second macro-pixel set 3010b and the fourth macro-pixel 3010 d. And, full coverage sampling of the pixel array 301 is achieved during the third time period 0-T3, the fourth time period T3-T4, the fifth time period T4-T5, and the sixth time period T5-T6. Such repeated alternating sampling may continue to achieve multiple full coverage samplings of the pixel array 301.

Similarly, in the third operation mode, when each of the macro-pixel sets 3010 is connected to all the storage blocks 30220 in the memory 3022, each of the macro-pixel sets 3010 may be sampled one by one, so as to complete the full-coverage sampling of the pixel array 301. And, when each macro-pixel set 3010 is sampled, the pixels P in the macro-pixel set 3010 may be alternately sampled by referring to the examples of the two operation modes, which is not described in detail herein.

Further, as can be seen from the above examples, there may be a spatial separation between the macro-pixels that are gated during sampling, while in a particular application scenario it is often required that the macro-pixels that are simultaneously on are spatially continuous. In this regard, in this embodiment, different macro-pixel sets 3010 may share a portion of the pixels P, that is, an intersection between the macro-pixel sets 3010 is a non-empty set, so that the first selector ensures that the macro-pixels turned on in each macro-pixel set 3010 are spatially continuous when gated. Illustratively, as shown in FIGS. 18 and 19, the first macro-pixel set 3010a includes L1-L5 columns of pixels P of rows R2-R8; the second macro-pixel set 3010b includes L6-L10 row pixels P of R2-R8 rows; the third macro-pixel set 3010c includes L1-L5 pixels P of R1-R7 rows; and, the fourth macro-pixel set 3010d includes the L6-L10 column pixels P of the R1-R7 row. Thus, the intersection between the first and third macro-pixel sets 3010a and 3010c is a non-empty set, as is the intersection between the second and fourth macro-pixel sets 3010b and 3010 d. In the first operation mode, each macro-pixel set 3010 is connected to one storage block 30220, so as to implement parallel sampling of four macro-pixels. As shown in fig. 9, 20 and 21, in a seventh time period 0 to t7, the first selector gates that the macro pixels in the first macro pixel set 3010a include the L1 th to L5 th column pixels P of the R7 th and R8 th rows; the macro pixels in the second macro pixel set 3010b include L6-L10 columns of pixels P in R7 and R8 rows; the macro pixels in the third macro pixel set 3010c include L1-L5 column pixels P of the R5 th and R6 th rows; and, the macro-pixels in the fourth macro-pixel set 3010d include L6-L10 columns of pixels P of the R5 and R6 rows. When the timer counts to the time T7, the timer sends a switching signal to the first selector, and the first selector switches and gates the macro pixels in the first macro pixel set 3010a to include L1-L5 columns of pixels P of R3 and R4 rows; the macro pixels in the second macro pixel set 3010b include L6-L10 columns of pixels P in R3 and R4 rows; the macro pixels in the third macro pixel set 3010c include L1-L5 column pixels P of the R1 and R2 rows; and, the macro-pixels in the fourth macro-pixel set 3010d include L6-L10 columns of pixels P of rows R1 and R2. Based on this, full coverage sampling of the pixel array 301 is achieved during the seventh time period 0 to T7 and the eighth time period T7 to T8, and it is ensured that the macro-pixels that are turned on are spatially continuous in any sampling time period.

Similarly, in the second and third operation modes, when each of the macro-pixel sets 3010 corresponds to a part of or all of the storage blocks 30220 in the memory 3022, each of the macro-pixel sets 3010 and different macro-pixels in each of the macro-pixel sets 3010 may be sequentially switched and gated, so as to implement full coverage sampling of the pixel array 301, and the pixels P that are configurable to be turned on simultaneously may remain spatially continuous based on non-empty intersections between the macro-pixel sets 3010.

Note that the above data is merely an example of the TCSPC circuit 302, and the present embodiment is not limited to specific time and switching frequency of each preset time point, and the size and distribution of the macro pixels in each macro pixel set 3010 of each gating of the first selector, and the gating of each macro pixel may be configured according to different shapes, distribution rules, and the like of the reflected light spots. When the pixel resolution requirement is high, a small number of pixels P are included in each gating macro pixel, and in order to meet the requirement of sampling coverage, the number of sampling switching times of macro pixels between the macro pixel sets 3010 and in the macro pixel sets 3010 may be correspondingly increased, which is not an example any more in this embodiment. Conversely, when the pixel resolution requirement is low, the number of pixels P included in each gating macro pixel is large, and the number of sampling switches can be reduced accordingly. And when the requirement of the detection device on the frame rate is higher, the parallel sampling of more macro-pixel sets 3010 is realized as much as possible, and the switching gating among different macro-pixel sets 3010 is reduced. Preferably, all the macro-pixel sets 3010 are sampled in parallel, and then each accumulation module 3021 performs synchronous storage corresponding to at least one storage block 30220. When the frame rate requirement of the detection device is not high, the number of switching times between the macro-pixel sets 3010 can be increased, the number of the storage blocks 30220 corresponding to each macro-pixel set 3010 can be increased appropriately, and the ranging range of the detection device can be increased.

As can be seen from the foregoing, the TCSPC-based detection device provided in this embodiment divides the pixel array 301 into a plurality of macro-pixel sets 3010, and gates the pixels P in each macro-pixel set 3010, so as to implement flexible configuration of pixel resolution, and meanwhile, flexibly adapt to lasers with different spot shapes and distribution rules, thereby maximally improving the light source utilization rate. In addition, the flexible gating configuration of the macro pixels can also greatly reduce the adjustment precision of the detection device and save the cost. In addition, in the TCSPC circuit 302 provided in this embodiment, the number of the memory blocks 30220 connected to each accumulation module 3021 may be configured by the second selector, and the accumulation modules 3021 may share a plurality of memory blocks 30220 in a memory 3022, so as to flexibly allocate a memory space corresponding to each macro-pixel set 3010, thereby implementing flexible configuration of a detection range of the detection device. And, by the output value of the third selector 30212, flexible configuration of the detection accuracy of the detection apparatus can also be achieved.

It should also be appreciated that while the present invention has been disclosed in the context of a preferred embodiment, the above embodiments are not intended to limit the invention. Many possible variations and modifications of the disclosed technology can be made by anyone skilled in the art without departing from the scope of the technology, or the technology can be modified to be equivalent. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A detecting device based on TCSPC, which is characterized by comprising a transmitting unit, a receiving unit and a data processing unit;

The emitting unit comprises a laser for emitting laser to the measured target;

The data processing unit is used for acquiring the flight time of the laser according to at least the data stored in the memory and calculating the distance of the measured object;

And, the TCSPC circuit further includes a plurality of accumulation modules; the accumulation modules are in one-to-one correspondence and connected with the logic operation modules, and are used for accumulating the output values of the corresponding logic operation modules in each time difference interval; the memory comprises a plurality of memory blocks, and each accumulation module is connected with at least one memory block; and the TCSPC circuit has three modes of operation:

2. TCSPC-based detection apparatus according to claim 1, wherein the intersection between each of the macro-pixel sets is an empty set and/or the intersection between part of the macro-pixel sets is a non-empty set.

3. TCSPC-based detection apparatus according to claim 1 or 2, wherein when the number of pixels in the macro-pixel set is greater than 1, the pixels in the macro-pixel set are spatially adjacent in sequence and/or portions of the pixels are spatially separated.

4. The TCSPC based detection apparatus of claim 1 or 2, wherein the TCSPC circuit further comprises a first selector interfaced with each of the macro-pixel sets for configuring each of the macro-pixel sets and gating of each of the pixels in each of the macro-pixel sets to configure pixel resolution; and said first selector is further for alternately gating different ones of said pixels in each of said macropixel sets;

5. TCSPC based detection apparatus according to claim 1, characterized in that the pixel comprises at least one sensor device; the sensing device comprises a single photon avalanche diode and is used for acquiring the photon number according to the received reflected laser; and the output value of the pixel includes the number of photons acquired by the pixel.

6. The TCSPC based detection apparatus of claim 1, wherein the logic operation module comprises at least one or a combination of two or more of an adder, an and gate, an or gate, and a not gate.

7. The TCSPC based detection apparatus of claim 1, wherein the memory block includes a plurality of memory cells, each memory cell for storing an output value of a corresponding accumulation module within at least one time difference interval; and

8. The TCSPC based detection apparatus of claim 1, wherein the accumulation module comprises a shift register, a plurality of adders, and a third selector; wherein,