CN117873257A - Low-dropout NMOS type LDO with ultra-wide working voltage range - Google Patents

Low-dropout NMOS type LDO with ultra-wide working voltage range Download PDF

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Publication number
CN117873257A
CN117873257A CN202410143349.4A CN202410143349A CN117873257A CN 117873257 A CN117873257 A CN 117873257A CN 202410143349 A CN202410143349 A CN 202410143349A CN 117873257 A CN117873257 A CN 117873257A
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China
Prior art keywords
charge pump
voltage
detection module
ldo
tube
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Pending
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CN202410143349.4A
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Chinese (zh)
Inventor
祝磊
曾浩生
吴桐
陈伟冲
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Guangzhou Tuoer Microelectronics Co ltd
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Guangzhou Tuoer Microelectronics Co ltd
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Priority to CN202410143349.4A priority Critical patent/CN117873257A/en
Publication of CN117873257A publication Critical patent/CN117873257A/en
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Abstract

The invention discloses a low-dropout NMOS (N-channel metal oxide semiconductor) LDO with an ultra-wide working voltage range, which comprises a first detection module, a first charge pump, a second detection module, a second charge pump, a reference voltage source, an error amplifier, a power tube grid driving circuit, a power tube and an external feedback structure, wherein the first detection module is connected with the first charge pump; the first detection module is used for detecting input voltage and controlling the first charge pump to work; the second detection module is used for detecting the output voltage of the first charge pump and controlling the second charge pump to work; the reference voltage source, the error amplifier, the power tube grid driving circuit and the power tube are sequentially connected, and the error amplifier is also connected with the external feedback structure. By using the invention, the input voltage range can be widened, the lower input voltage can be compatible, and the use of high-voltage devices can be reduced. The invention can be widely applied to the field of LDO circuits.

Description

Low-dropout NMOS type LDO with ultra-wide working voltage range
Technical Field
The invention relates to the field of LDO circuits, in particular to a low-dropout NMOS (N-channel metal oxide semiconductor) LDO with an ultra-wide working voltage range.
Background
With the popularity of consumer electronics and the development of 5G communications, the role of power management chips in their systems is becoming increasingly significant. Compared with a switching power supply, the LDO (low dropout linear regulator) has the characteristics of low power consumption, low dropout, good ripple, power supply rejection ratio and the like, and is suitable for application scenes sensitive to ripple, noise and the like, such as an ADC (analog-to-digital converter), a DAC (digital-to-analog converter) and the like.
The LDOs can be classified into nmosfos and PMOS LDOs according to the types of power transistors. Compared to PMOSLDO, NMOSLDO, an additional power rail is needed for power, but the nmoldo has better transient response and regulation, while achieving higher efficiency due to its lower on-resistance.
In nmoldo, additional charge pump circuits are typically required. At present, a single charge pump circuit is adopted to supply power to all internal modules, the structure is unfavorable for widening the input voltage range, otherwise, if the input voltage is too high, the internal modules need to use a large amount of high-voltage devices, and the device cost of the chip is increased.
Disclosure of Invention
In view of this, in order to solve the technical problem that the working voltage range is narrow caused by adopting a single charge pump circuit to supply power in the existing NMOS type LDO circuit, the invention provides a low-dropout NMOS type LDO with an ultra-wide working voltage range, which comprises a first detection module, a first charge pump, a second detection module, a second charge pump, a reference voltage source, an error amplifier, a power tube grid driving circuit, a power tube and an external feedback structure, wherein:
the first detection module is connected with the first charge pump and is used for detecting input voltage and controlling the first charge pump to work;
the second detection module is connected with the second charge pump and is used for detecting the output voltage of the first charge pump and controlling the second charge pump to work;
the reference voltage source, the error amplifier, the power tube grid driving circuit and the power tube are sequentially connected, and the error amplifier is also connected with the external feedback structure.
The first charge pump supplies power to the reference voltage source and the error amplifier;
the second charge pump supplies power to the power tube grid driving circuit.
The first charge pump responds to a control signal of the first detection module to raise the input voltage;
the second charge pump responds to the control signal of the second detection module to raise the output voltage of the first charge pump.
The reference voltage source provides a reference voltage for the error amplifier;
the error amplifier compares the feedback voltage of the external feedback structure with the reference voltage and outputs an error amplification signal; and the power tube grid driving circuit outputs a driving signal according to the output error amplification signal, controls the grid of the power tube and regulates the output of the LDO.
In some embodiments, the first charge pump employs a multi-stage cascade structure.
Through the preferred step, multistage supercharging can be realized, and the requirements of different scenes are met.
In some embodiments, the single-stage structure of the first charge pump includes a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, wherein:
the first end of the first capacitor, the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the grid electrode of the third MOS tube and the grid electrode of the fourth MOS tube are connected;
the first end of the second capacitor, the grid electrode of the first MOS tube, the grid electrode of the second MOS tube, the drain electrode of the third MOS tube and the drain electrode of the fourth MOS tube are connected;
the source electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the source electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube.
Based on the scheme, the low-dropout NMOS LDO with an ultra-wide working voltage range is provided by the invention, and two charge pumps are used for supplying power to an internal circuit separately, so that the low-dropout NMOS LDO can be compatible with lower input voltage while the input voltage range is widened, and the use of high-voltage devices is reduced.
Drawings
FIG. 1 is a block diagram of a low dropout NMOS LDO with an ultra wide operating voltage range;
FIG. 2 is a circuit diagram of a first detection module according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of a second detection module according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a single stage configuration of a charge pump in accordance with an embodiment of the present invention;
FIG. 5 is a circuit diagram of a reference voltage source in accordance with an embodiment of the present invention;
FIG. 6 is a circuit diagram of an error amplifier according to an embodiment of the present invention;
FIG. 7 is a circuit diagram of a power tube gate drive circuit in accordance with an embodiment of the present invention;
FIG. 8 is a functional block diagram of a first charge pump according to an embodiment of the present invention;
fig. 9 is a functional block diagram of a second charge pump in accordance with an embodiment of the present invention.
Reference numerals: BGR, reference voltage source; EA. An error amplifier; driver and power tube grid driving circuit; r1, a first resistor; r2, a second resistor; powerMOS, power tube.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
For convenience of description, only a portion related to the present invention is shown in the drawings. Embodiments and features of embodiments in this application may be combined with each other without conflict.
It should be appreciated that "system," "apparatus," "unit" and/or "module" as used in this application is one method for distinguishing between different components, elements, parts, portions or assemblies at different levels. However, if other words can achieve the same purpose, the word can be replaced by other expressions.
The terms "a," "an," "the," and/or "the" are not specific to the singular, but may include the plural, unless the context clearly indicates otherwise. In general, the terms "comprises" and "comprising" merely indicate that the steps and elements are explicitly identified, and they do not constitute an exclusive list, as other steps or elements may be included in a method or apparatus. The inclusion of an element defined by the phrase "comprising one … …" does not exclude the presence of additional identical elements in a process, method, article, or apparatus that comprises an element.
In the description of the embodiments of the present application, "plurality" means two or more than two. The following terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
Referring to fig. 1, a block diagram of an alternative example of a low dropout NMOS LDO with an ultra wide operating voltage range according to the present invention includes a first detection module, a first charge pump, a second detection module, a second charge pump, a reference voltage source, an error amplifier, a power transistor gate driving circuit, a power transistor, and an external feedback structure, wherein:
the first detection module is connected with the first charge pump and is used for detecting input voltage and controlling the first charge pump to work;
the second detection module is connected with the second charge pump and is used for detecting the output voltage of the first charge pump and controlling the second charge pump to work;
the reference voltage source, the error amplifier, the power tube grid driving circuit and the power tube are sequentially connected, and the error amplifier is also connected with the external feedback structure.
Referring to fig. 2, the first detection module is configured to detect the magnitude of the input voltage, determine whether the first charge pump is turned on and the number of stages of the turn-on, and control the first charge pump by comparing the magnitude of the input voltage and providing a corresponding control signal.
Referring to fig. 3, the second detection module is configured to detect a difference between a voltage value output by the first charge pump and an LDO output voltage, and determine whether to start the second charge pump to raise the voltage of the first charge pump to provide a sufficient supply voltage to a gate driving circuit Driver of a rear power tube, so as to provide a sufficient gate driving voltage to the power tube.
The overall working principle of the LDO is as follows:
when the LDO works, the first charge pump supplies power for modules such as a reference voltage source BGR, an error amplifier EA and the like, and the second charge pump supplies power for a power tube grid driving circuit Driver; the reference voltage source BGR provides a reference voltage Vref and inputs the reference voltage Vref into the error amplifier EA; the error amplifier EA compares the feedback voltage Vfb of the external feedback structure with the reference voltage Vref and outputs an error amplified signal Vea; the power tube grid driving circuit Driver processes the error amplification signal and then outputs a driving signal Vg to control the grid of the power tube, so that the effect of regulating the output of the LDO is achieved, and the LDO is stably output.
In some possible embodiments, the first charge pump adopts a multi-stage cascade structure. The single-stage structure of the first charge pump is shown in fig. 4, where the single-stage structure of the first charge pump includes a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, where:
the first end of the first capacitor, the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the grid electrode of the third MOS tube and the grid electrode of the fourth MOS tube are connected;
the first end of the second capacitor, the grid electrode of the first MOS tube, the grid electrode of the second MOS tube, the drain electrode of the third MOS tube and the drain electrode of the fourth MOS tube are connected;
the source electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the source electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube.
The first charge pump is used for boosting the input voltage, providing working voltage for other subsequent modules such as a reference voltage source and the like, and realizing lifting of different multiples of the input voltage according to control signals given by the first voltage detection module so as to provide enough proper working voltage.
The second charge pump adopts a single-stage structure, and a specific circuit is like the single-stage structure of the first charge pump. In addition, the second charge pump can also adopt a multi-stage cascade structure to meet the requirements of different scenes.
The second charge pump is used for boosting the voltage output by the first charge pump so as to provide enough grid driving voltage, and whether the second charge pump is started or not is determined according to a control signal given by the second voltage detection module.
The first voltage detection module detects an input voltage Vin, if Vin is greater than a first preset voltage vth_cp1, the first charge pump is not started, and at this time, the voltage vcp1=vin output by the first charge pump is directly used as a power supply to supply power to modules such as a reference voltage source BGR, an error amplifier EA and the like; if Vin is smaller than vth_cp1, the first charge pump is turned on to boost Vin, and according to the magnitude of Vin, the voltage vcp1= (1+x) output by the first charge pump is Vin (x=1, 2, 3, 4, represents the number of stages of turning on the charge pump 1), and Vcp1 (multiple times of the increase of Vin) supplies power to modules such as the reference voltage source BGR and the error amplifier EA.
The second voltage detection module detects the difference value of the output voltage Vcp1 of the first charge pump and the final output voltage Vout of the LDO, if Vcp1-Vout is larger than a second preset threshold Vth_c2, the second charge pump is not started, and at the moment, the voltage Vcp2=Vcp1 output by the second charge pump is equivalent to Vcp1, and directly supplies power to a power tube grid driving circuit Driver; if Vcp1-Vout is smaller than vth_cp2, the second charge pump is turned on to boost the voltage Vcp1 output by the first charge pump, where vcp2=2xvcp1 is the voltage output by the second charge pump (the second charge pump has a single-stage structure and performs voltage doubling operation on the input voltage Vcp 1), and Vcp2 supplies power to the power transistor gate driving circuit Driver.
As shown in fig. 8, a functional block diagram of the first charge pump is shown, and the working principle thereof is as follows: the first voltage detection module determines whether to start the first charge pump or not and the number of stages by which the first charge pump is started by detecting Vin. When Vin is greater than the first charge pump on threshold voltage vth_cp1, the first voltage detection module outputs an enable signal en0, the first charge pump is not turned on, and the output voltage vcp1=vin; when V1< Vin is less than or equal to Vth_cP1, the first voltage detection module outputs an enable signal en1, the first charge pump is started for 1 stage, and the output voltage Vcp1=2×vin; when V2< Vin is less than or equal to V1, the first voltage detection module outputs an enable signal en2, the first charge pump is started for 2 stages, and the output voltage Vcp1=3×vin; when V3< Vin is less than or equal to V2, the first voltage detection module outputs an enable signal en3, the first charge pump is started for 3 stages, and the output voltage Vcp1=4×vin is output; when vin_min is smaller than or equal to Vin and smaller than or equal to V3, the first voltage detection module outputs an enable signal en4, the first charge pump is started for 4 stages, and the output voltage Vcp1=5×vin is output. Wherein V1, V2 and V3 are designed threshold voltages for determining the first charge pump turn-on stage, vin_min is LDO minimum input voltage, and vin_max is LDO maximum input voltage.
As shown in fig. 9, a functional block diagram of the second charge pump is shown, and the working principle thereof is as follows: the second voltage detection module determines whether to turn on the second charge pump by detecting a difference Vcp1-Vout between the first charge pump output voltage Vcp1 and the LDO output voltage Vout. When the difference Vcp1-Vout is greater than the second charge pump on threshold voltage vth_cp2, the second voltage detection module outputs an enable signal en0, the second charge pump is not turned on, and the output voltage vcp2=vcp1; when the difference Vcp1-Vout is smaller than the second charge pump on threshold voltage vth_cp2, the second voltage detection module outputs the enable signal en1, and the second charge pump is turned on, which outputs the voltage vcp2=2×vcp1.
In this embodiment, by adopting the mode of supplying power to the two charge pumps respectively, the input voltage range of the LDO can be widened and the input voltage can be compatible with lower input voltages. The first charge pump adopts a 4-stage cascade structure, and different stages can be selectively started according to the magnitude of the input voltage. If the input voltage is smaller, a multi-stage charge pump can be started to raise Vin to a sufficient voltage value to supply power for modules such as BGR, EA and the like; if the input voltage is larger, the number of stages of starting the charge pump can be reduced, and the waste of power consumption is avoided. The second charge pump is adopted to supply power for the grid driving circuit Driver of the power tube, so that higher grid voltage can be provided when necessary, the grid source voltage of the power tube is increased, and the voltage difference of the power tube is reduced; meanwhile, the use of high-voltage devices of other modules such as EA can be reduced when the input and output voltages are higher and the higher gate voltage is required.
In some possible embodiments, referring to fig. 5, the reference voltage source BGR is configured to provide a stable reference voltage source, and can output stable voltage values under different power supply voltages, and provide reference voltages for other internal modules such as an error amplifier, so as to achieve operations such as accurate comparison and signal amplification
In some possible embodiments, referring to fig. 6, the circuit structure of the error amplifier EA is used for amplifying the difference signal between the external feedback voltage and the internal reference voltage, outputting a corresponding signal, increasing the driving capability by the power tube gate driving circuit, and adjusting the gate voltage of the power tube, so as to achieve the function of stabilizing the LDO output voltage.
In some possible embodiments, referring to fig. 7, the circuit structure of the power tube gate driving circuit Driver is used for enhancing the driving capability of the error signal output by the error amplifier EA, then driving the gate of the power tube, changing the gate voltage of the power tube, achieving the function of adjusting different working states of the power tube, and achieving the stabilization of the output voltage of the LDO.
The power tube is used for adjusting external output voltage and current driving capability and changing the grid source voltage according to an error signal output by the error amplifier EA, thereby realizing the functions of stabilizing the output voltage and providing different current driving capability.
In some possible embodiments, the external feedback structure includes a first resistor R1 and a second resistor R2, and samples different voltage values Vfb according to the change of the output voltage, and feeds back the sampled voltage values Vfb to the error amplifier EA, and the error amplifier EA dynamically adjusts the working state of the power tube by comparing the difference value between the sampled voltage values Vfb and the reference voltage Vref, so as to realize the function of stabilizing the output voltage.
Based on the scheme, compared with the traditional related LDO circuit, the invention has the advantages that two charge pumps are adopted to respectively supply power to modules such as EA and the like and the grid driving circuit of the power tube. In the conventional application, a charge pump is used to supply power to the whole circuit, if the output voltage is higher, the gate driving voltage also needs to be correspondingly raised higher, and the whole circuit needs to use more high-voltage devices to withstand higher power supply voltage. The invention adopts two charge pumps to supply power respectively, so that the situation can be avoided. The first charge pump supplies the BGR and EA modules only to be raised to the conventional voltage range. If a higher gate voltage is required, a second charge pump is used to perform further voltage boosting to supply the power transistor gate drive circuit. Only the power tube gate driving circuit needs to use a certain high-voltage device. The two charge pump scheme can further widen the input voltage range and work normally at lower input voltages.
While the preferred embodiment of the present invention has been described in detail, the invention is not limited to the embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the invention, and these modifications and substitutions are intended to be included in the scope of the present invention as defined in the appended claims.

Claims (6)

1. The utility model provides a low pressure differential NMOS type LDO of super wide operating voltage scope which characterized in that includes first detection module, first charge pump, second detection module, second charge pump, reference voltage source, error amplifier, power tube grid drive circuit, power tube, outside feedback structure, wherein:
the first detection module is connected with the first charge pump and is used for detecting input voltage and controlling the first charge pump to work;
the second detection module is connected with the second charge pump and is used for detecting the output voltage of the first charge pump and controlling the second charge pump to work;
the reference voltage source, the error amplifier, the power tube grid driving circuit and the power tube are sequentially connected, and the error amplifier is also connected with the external feedback structure.
2. The low dropout NMOS LDO of claim 1 wherein said first charge pump is of a multi-stage cascade configuration.
3. The low dropout NMOS type LDO of claim 2, wherein said single stage structure of said first charge pump comprises a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, wherein:
the first end of the first capacitor, the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the grid electrode of the third MOS tube and the grid electrode of the fourth MOS tube are connected;
the first end of the second capacitor, the grid electrode of the first MOS tube, the grid electrode of the second MOS tube, the drain electrode of the third MOS tube and the drain electrode of the fourth MOS tube are connected;
the source electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the source electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube.
4. The low dropout NMOS LDO of claim 1 wherein:
the first charge pump supplies power to the reference voltage source and the error amplifier;
the second charge pump supplies power to the power tube grid driving circuit.
5. The low dropout NMOS LDO of claim 1 wherein:
the first charge pump responds to a control signal of the first detection module to raise the input voltage;
the second charge pump responds to the control signal of the second detection module to raise the output voltage of the first charge pump.
6. The low dropout NMOS LDO of claim 1 wherein:
the reference voltage source provides a reference voltage for the error amplifier;
the error amplifier compares the feedback voltage of the external feedback structure with the reference voltage and outputs an error amplification signal;
and the power tube grid driving circuit outputs a driving signal according to the output error amplification signal, controls the grid of the power tube and regulates the output of the LDO.
CN202410143349.4A 2024-02-01 2024-02-01 Low-dropout NMOS type LDO with ultra-wide working voltage range Pending CN117873257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410143349.4A CN117873257A (en) 2024-02-01 2024-02-01 Low-dropout NMOS type LDO with ultra-wide working voltage range

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410143349.4A CN117873257A (en) 2024-02-01 2024-02-01 Low-dropout NMOS type LDO with ultra-wide working voltage range

Publications (1)

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CN117873257A true CN117873257A (en) 2024-04-12

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