CN117858570A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN117858570A
CN117858570A CN202311765115.5A CN202311765115A CN117858570A CN 117858570 A CN117858570 A CN 117858570A CN 202311765115 A CN202311765115 A CN 202311765115A CN 117858570 A CN117858570 A CN 117858570A
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China
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layer
light
electrophoresis
electrode
display panel
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CN202311765115.5A
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Chinese (zh)
Inventor
蒲洋
叶利丹
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HKC Co Ltd
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HKC Co Ltd
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Priority to CN202311765115.5A priority Critical patent/CN117858570A/en
Publication of CN117858570A publication Critical patent/CN117858570A/en
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Abstract

The application provides a display panel, the display panel include be used for sending a plurality of luminous subassembly and a plurality of electrophoresis unit of display light, electrophoresis unit set up in the light-emitting side of luminous subassembly. Each electrophoresis unit comprises a pixel electrode and a public electrode, wherein a plurality of first electrophoresis particles and a plurality of second electrophoresis particles which are arranged on one side of the electrophoresis unit, which is opposite to the light-emitting component, are accommodated between the pixel electrode and the public electrode. The pixel electrode and the common electrode are used for forming a driving electric field so as to drive the first electrophoretic particles and the second electrophoretic particles to diffuse to the light emitting side of the light emitting component when the light intensity of the external environment is high, so that the second electrophoretic particles absorb the external environment light emitted to the second electrophoretic particles, the first electrophoretic particles reflect the display light emitted to the first electrophoretic particles to the light emitting component so as to emit the display panel from the peripheral sides of the second electrophoretic particles, and therefore the light emitting efficiency of the display panel is improved, and meanwhile, the influence of the environment reflected light on the display effect of the display panel is reduced. The application also discloses a display device.

Description

Display panel and display device
Technical Field
The present disclosure relates to the field of display technologies, and particularly to a display panel and a display device having the same.
Background
An Organic Light-Emitting Diode (OLED) display panel has advantages of Light weight, thinness, flexibility, high brightness, low power consumption, high contrast, quick response, high definition, wide color gamut, etc., so that the OLED display panel is widely applied in the display field and has a wide development prospect.
In the related art, the OLED display generally has top emission, and the anode of the top emission OLED display is generally made of total reflection metal (ITO/Ag/ITO), so that in order to ensure light-emitting efficiency, a larger aperture ratio of the light-emitting layer is used as much as possible. However, the larger aperture ratio of the light emitting layer can lead to strong reflection of ambient light when the external ambient light irradiates the anode metal, thereby affecting the display effect. To solve this problem, a quarter-wave plate and a polarizer are usually added to the display panel, so as to reduce the influence of the ambient reflected light. However, since the polarizer absorbs half of the light output intensity, the light output efficiency of the display panel is reduced by half.
Therefore, how to improve the light-emitting efficiency of the display panel and reduce the influence of the ambient reflected light on the display effect of the display panel is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present application is to provide a display panel and a display device having the same, which are aimed at solving the problem of how to improve the light-emitting efficiency of the display panel and reduce the influence of the ambient reflection light on the display effect of the display panel in the prior art.
In order to solve the above technical problems, embodiments of the present application provide a display panel, which includes a light emitting component for emitting display light, and further includes an interlayer substrate, an electrophoresis component, and a packaging substrate. The interlayer substrate is arranged on one side of the light-emitting component, the electrophoresis component is arranged on one side of the interlayer substrate opposite to the light-emitting component, and the packaging substrate is arranged on one side of the electrophoresis component opposite to the interlayer substrate. The light emitting assembly includes a plurality of light emitting elements for emitting the display light. The electrophoresis assembly comprises a plurality of electrophoresis units, the electrophoresis units are in one-to-one correspondence with the light-emitting elements, and the electrophoresis units are positioned on the light-emitting sides of the light-emitting elements. Each electrophoresis unit comprises a pixel electrode, a public electrode and electrophoresis liquid, wherein the pixel electrode and the public electrode are arranged between the interlayer substrate and the packaging substrate, the pixel electrode and the public electrode are oppositely arranged at intervals to form a containing space, and the electrophoresis liquid is contained in the containing space. The electrophoresis liquid comprises an electrophoresis medium, a plurality of first electrophoresis particles and a plurality of second electrophoresis particles, wherein the polarities of the first electrophoresis particles and the second electrophoresis particles are the same, the first electrophoresis particles and the second electrophoresis particles are layered in the electrophoresis medium, and the second electrophoresis particles are positioned on one side of the first electrophoresis particles opposite to the interlayer substrate. The pixel electrode and the common electrode are used for forming a driving electric field, the driving electric field is used for driving a plurality of first electrophoretic particles and a plurality of second electrophoretic particles to move towards the pixel electrode or the common electrode, the first electrophoretic particles are used for reflecting the display light emitted by the light-emitting element towards the first electrophoretic particles, and the second electrophoretic particles are used for absorbing external environment light emitted towards the second electrophoretic particles.
In summary, the driving electric field formed between the pixel electrode and the common electrode may be controlled to control the plurality of first electrophoretic particles and the plurality of second electrophoretic particles with the same polarity to move in the accommodating space, so as to control the reflection of the plurality of first electrophoretic particles on the display light emitted by the light emitting element and control the absorption of the plurality of second electrophoretic particles on the external environment light. For example, when the external ambient light is weaker, a voltage is applied between the pixel electrode and the common electrode to form a first driving electric field, so that the plurality of first electrophoretic particles and the plurality of second electrophoretic particles move under the driving of the first driving electric field to gather to one side of the accommodating space, the distribution area of the plurality of first electrophoretic particles and the plurality of second electrophoretic particles in the horizontal direction of the accommodating space is reduced, and more display light is emitted out of the display panel through the accommodating space. When the external ambient light is stronger, a reverse voltage is applied between the pixel electrode and the public electrode to form a second driving electric field with the direction opposite to the first driving electric field, so that a plurality of first electrophoretic particles and a plurality of second electrophoretic particles are diffused to the surface of the accommodating space under the driving of the second driving electric field, the distribution area of the plurality of first electrophoretic particles and the plurality of second electrophoretic particles in the horizontal direction of the accommodating space is increased, more second electrophoretic particles absorb the external ambient light, and interference of the external ambient light on display light is reduced. Meanwhile, the first electrophoretic particles reflect the display light irradiated on the first electrophoretic particles to the light-emitting component, so that the display light is reflected between the first electrophoretic particles and the light-emitting component and finally emitted out of the display panel, and the light-emitting efficiency of the display panel is improved. Therefore, the display panel provided by the application can reduce the influence of external environment light while having higher light-emitting efficiency, and further the display panel can obtain a better display effect.
In an exemplary embodiment, the display panel further includes a substrate base plate, a driving circuit layer, and a planarization layer. The light-emitting device comprises a substrate, a light-emitting component, a flat layer, a driving circuit layer, a light-emitting component and a light-emitting assembly, wherein the driving circuit layer is arranged on one side of the substrate, which faces towards the light-emitting component, the flat layer is arranged on one side of the driving circuit layer, which faces away from the substrate, and the light-emitting component is arranged on one side of the flat layer, which faces away from the driving circuit layer. The driving circuit layer is used for driving the light-emitting component to emit light, and a plurality of through holes which are arranged at intervals and expose the driving circuit layer are formed in the flat layer.
In an exemplary embodiment, the light emitting assembly further includes a pixel defining layer, a plurality of anode layers, and a cathode layer. The anode layers are arranged on one side of the flat layer, which is opposite to the driving circuit layer, and the anode layers are in one-to-one correspondence with the through holes. At least part of the anode layer is accommodated in the corresponding through hole and is electrically connected with the driving circuit layer. The pixel definition layer is arranged on one side of the anode layers, which is opposite to the flat layer, and on the periphery of the anode layers, a plurality of containing holes exposing the anode layers are formed in the anode layers, and the containing holes are in one-to-one correspondence with the anode layers. Each containing hole contains one light-emitting element, and the light-emitting elements are electrically connected with the anode layer. The cathode layer is arranged on one side of the pixel definition layer, which is opposite to the anode layers, and is electrically connected with the light-emitting elements. The display panel further comprises an encapsulation layer, wherein the encapsulation layer is arranged on one side of the cathode layer, which is opposite to the pixel definition layer, and the encapsulation layer is used for encapsulating the light-emitting component.
In an exemplary embodiment, each of the anode layers includes a first anode region and a second anode region. The position of the first anode region corresponds to the position of the light-emitting element, the first anode region is connected with one end, facing the flat layer, of the light-emitting element, and the second anode region is arranged on the periphery of the first anode region. The surface of the first anode region, which is contacted with the light-emitting element, is a cambered surface protruding towards the light-emitting element.
In an exemplary embodiment, the electrophoresis assembly further includes a gate insulating layer and a passivation layer, wherein the gate insulating layer is disposed on a side of the interlayer substrate facing away from the encapsulation layer, and the passivation layer is disposed on a side of the gate insulating layer facing away from the interlayer substrate. Each electrophoresis unit further comprises a driving transistor and a signal connection end which are arranged at intervals, wherein the driving transistor comprises an active layer, a source electrode, a drain electrode and a grid electrode. The grid is embedded in the grid insulating layer, the active layer, the source electrode and the drain electrode are embedded in the passivation layer, the passivation layer is provided with a first opening exposing at least part of the drain electrode, and the source electrode and the drain electrode are arranged at the opposite ends of the active layer at intervals and are electrically connected with the active layer. The signal connection end is embedded in one end, far away from the active layer, of the passivation layer, and the passivation layer is provided with a second opening exposing at least part of the signal connection end. The passivation layer is used for protecting the active layer, the source electrode, the drain electrode and the signal connection end.
In an exemplary embodiment, each of the electrophoresis units further includes a ring-shaped support disposed at a side of the passivation layer facing away from the gate insulating layer, and between the first and second openings, the ring-shaped support for supporting the pixel electrode and the common electrode. One end of the pixel electrode extends to the drain electrode in the first opening, so that the pixel electrode is electrically connected with the drain electrode, and one end of the common electrode extends to the signal connection end in the second opening, so that the common electrode is electrically connected with the signal connection end.
In an exemplary embodiment, the passivation layer is further provided with a plurality of third openings, one third opening is located between one second opening and one first opening, the third openings are respectively arranged at intervals opposite to the first openings, and a part of inner walls opposite to the third openings are used for supporting a part of the pixel electrode and a part of the common electrode. One end of the pixel electrode extends to the drain electrode in the first opening, so that the pixel electrode is electrically connected with the drain electrode, and one end of the common electrode extends to the signal connection end in the second opening, so that the common electrode is electrically connected with the signal connection end.
In an exemplary embodiment, the gate insulating layer is provided with a plurality of fourth openings, the fourth openings are in one-to-one correspondence with the third openings, one fourth opening is communicated with one third opening, and the orthographic projection of one fourth opening on the interlayer substrate is located between the orthographic projection of one driving transistor on the interlayer substrate and the orthographic projection of one signal connection end on the interlayer substrate. And part of the inner wall of the fourth opening is used for supporting part of the pixel electrode and part of the common electrode. Part of the pixel electrode and part of the common electrode are respectively arranged on the inner walls of the two opposite sides of the third opening and the fourth opening which are communicated.
In an exemplary embodiment, each of the electrophoresis units further includes a transparent blocking member disposed in the accommodating space and connected to the pixel electrode and the common electrode disposed at opposite sides of the accommodating space, the blocking member dividing the accommodating space into a first accommodating space and a second accommodating space which are not communicated and are stacked, the first accommodating space being disposed at a side of the blocking member facing the light emitting assembly, and the second accommodating space being disposed at a side of the blocking member facing away from the light emitting assembly. Part of the electrophoresis medium is accommodated in the first accommodating space, part of the electrophoresis medium is accommodated in the second accommodating space, a plurality of first electrophoresis particles are accommodated in the first accommodating space, and a plurality of second electrophoresis particles are accommodated in a plurality of second accommodating spaces.
Based on the same inventive concept, the embodiment of the application also provides a display device, which comprises a shell and the display panel, wherein the display panel is arranged in the shell.
In summary, the display device provided in the embodiment of the present application includes a housing and a display panel, where the display panel can control the movement of the plurality of first electrophoretic particles and the plurality of second electrophoretic particles with the same polarity in the accommodating space by controlling the driving electric field formed between the pixel electrode and the common electrode, so as to control the reflection of the plurality of first electrophoretic particles on the display light emitted by the light emitting element and control the absorption of the plurality of second electrophoretic particles on the external ambient light. For example, when the external ambient light is weaker, a voltage is applied between the pixel electrode and the common electrode to form a first driving electric field, so that the plurality of first electrophoretic particles and the plurality of second electrophoretic particles move under the driving of the first driving electric field to gather to one side of the accommodating space, the distribution area of the plurality of first electrophoretic particles and the plurality of second electrophoretic particles in the horizontal direction of the accommodating space is reduced, and more display light is emitted out of the display panel through the accommodating space. When the external ambient light is stronger, a reverse voltage is applied between the pixel electrode and the public electrode to form a second driving electric field with the direction opposite to the first driving electric field, so that a plurality of first electrophoretic particles and a plurality of second electrophoretic particles are diffused to the surface of the accommodating space under the driving of the second driving electric field, the distribution area of the plurality of first electrophoretic particles and the plurality of second electrophoretic particles in the horizontal direction of the accommodating space is increased, more second electrophoretic particles absorb the external ambient light, and interference of the external ambient light on display light is reduced. Meanwhile, the first electrophoretic particles reflect the display light irradiated on the first electrophoretic particles to the light-emitting component, so that the display light is reflected between the first electrophoretic particles and the light-emitting component and finally emitted out of the display panel, and the light-emitting efficiency of the display panel is improved. Therefore, the display panel provided by the application can reduce the influence of external environment light while having higher light-emitting efficiency, and further the display panel can obtain a better display effect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic view of a first partial cross-sectional structure of a display panel according to a first embodiment of the present disclosure;
fig. 2 is a schematic cross-sectional view of a first portion of an electrophoretic component of the display panel shown in fig. 1;
FIG. 3 is a schematic view of a second partial cross-sectional structure of the display panel shown in FIG. 1;
fig. 4 is a schematic view showing a second partial cross-sectional structure of an electrophoretic component of the display panel shown in fig. 1;
fig. 5 is a schematic view of a partial cross-sectional structure of a display panel according to a second embodiment of the present disclosure;
fig. 6 is a schematic view illustrating a partial cross-sectional structure of an electrophoresis assembly of the display panel shown in fig. 5;
fig. 7 is a schematic view of a partial cross-sectional structure of a display panel according to a third embodiment of the present disclosure;
FIG. 8 is an enlarged schematic view of a partial structure VIII of the display panel shown in FIG. 7;
Fig. 9 is a schematic view of a partial cross-sectional structure of a display panel according to a fourth embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of a display device according to a fifth embodiment of the present disclosure;
fig. 11 is a flowchart illustrating a method for manufacturing a display panel according to a sixth embodiment of the present disclosure;
FIG. 12 is a flow chart of step 20 in the manufacturing method shown in FIG. 11;
fig. 13 is a flow chart illustrating step 40 in the manufacturing method shown in fig. 11.
Reference numerals illustrate:
1-a display panel; 10-a substrate base; 20-a driving circuit layer; 30-a flat layer; 30 a-a via; 50-a light emitting assembly; 51-a pixel definition layer; 51 a-receiving holes; 52-an anode layer; 52 a-a first anode region; 52 b-a second anode region; 53-a light emitting element; 55-a cathode layer; 60-packaging layers; 70-an interlayer substrate; 80-an electrophoresis assembly; 81-a gate insulating layer; 82-a passivation layer; 83-electrophoresis unit; 90-packaging a substrate; 100-a display device; 821-first openings; 822-a second opening; 823-third opening; 811-a fourth aperture; 831-drive transistor; 832-signal connection terminal; 833—an annular support; 834-pixel electrodes; 835-common electrode; 836-blocking element; 8311—an active layer; 8311 a-a photosensitive layer; 8312—source; 8313-drain; 8315-gate; 8341-a first pixel electrode; 8342-a second pixel electrode; 8343—a third pixel electrode; 8351—a first common electrode; 8352-a second common electrode; 8353-a third common electrode; a is an accommodating space; a1-a display area; a2-avoidance zone; a1-a first accommodating space; a2-a second accommodating space; b-electrophoresis liquid; b1-an electrophoretic medium; b2-first electrophoretic particles; b3-second electrophoretic particles; S10-S50-a manufacturing method of the display panel; S21-S22-substeps of step 20; S41-S48-substeps of step 40.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments that can be used to practice the present application. The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The terms "coupled" and "connected," as used herein, are intended to encompass both direct and indirect coupling (coupling), unless otherwise indicated. Directional terms referred to in this application, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outer", "side", etc., are merely directions referring to the attached drawings, and thus, directional terms are used for better, more clear description and understanding of the present application, rather than indicating or implying that the apparatus or element being referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; may be a mechanical connection; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context. It should be noted that the terms "first," "second," and the like in the description and claims of the present application and in the drawings are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprises," "comprising," "includes," "including," "may be" or "including" as used in this application mean the presence of the corresponding function, operation, element, etc. disclosed, but not limited to other one or more additional functions, operations, elements, etc. Furthermore, the terms "comprises" or "comprising" mean that there is a corresponding feature, number, step, operation, element, component, or combination thereof disclosed in the specification, and that there is no intention to exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof. It will also be understood that the meaning of "at least one" as described herein is one and more, such as one, two or three, etc., and the meaning of "a plurality" is at least two, such as two or three, etc., unless specifically defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
Referring to fig. 1, fig. 1 is a schematic view of a first partial cross-sectional structure of a display panel according to a first embodiment of the present application. The application provides a display panel, it has higher light-emitting efficiency, simultaneously, display panel can also be in the influence that reduces external environment light, and then can obtain the display effect of preferred. As shown in fig. 1, the display panel 1 includes a stacked substrate 10, a light emitting assembly 50, an interlayer substrate 70, an electrophoresis assembly 80, and a packaging substrate 90, wherein the light emitting assembly 50 is disposed on a side of the substrate 10, the interlayer substrate 70 is disposed on a side of the light emitting assembly 50 opposite to the substrate 10, the electrophoresis assembly 80 is disposed on a side of the interlayer substrate 70 opposite to the light emitting assembly 50, and the packaging substrate 90 is disposed on a side of the electrophoresis assembly 80 opposite to the interlayer substrate 70. The substrate 10 is used for carrying the light emitting component 50, the interlayer substrate 70 is used for carrying the electrophoresis component 80, and the packaging substrate 90 is used for packaging the electrophoresis component 80. The light emitting assembly 50 includes a plurality of light emitting elements 53, and the plurality of light emitting elements 53 are configured to emit display light. The electrophoresis assembly 80 includes a plurality of electrophoresis units 83, the electrophoresis units 83 are disposed on a side of the interlayer substrate 70 opposite to the light emitting assembly 50, the electrophoresis units 83 are in one-to-one correspondence with the light emitting elements 53, and the electrophoresis units 83 are disposed on a light emitting side of the light emitting elements 53, so that display light emitted by the light emitting elements 53 is emitted through the corresponding electrophoresis units 83.
In the present embodiment, each of the electrophoresis units 83 includes a pixel electrode 834, a common electrode 835, and an electrophoresis liquid b. The pixel electrode 834 and the common electrode 835 are disposed between the interlayer substrate 70 and the package substrate 90, and the pixel electrode 834 and the common electrode 835 are disposed in the same layer. The pixel electrode 834 is opposite to and spaced apart from the common electrode 835 to form a receiving space a, and the electrophoretic fluid b is received in the receiving space a. The electrophoresis liquid b includes an electrophoresis medium b1, a plurality of first electrophoresis particles b2, and a plurality of second electrophoresis particles b3, wherein the electrophoresis medium b1 is accommodated in the accommodation space a, the plurality of first electrophoresis particles b2 and the plurality of second electrophoresis particles b3 are layered in the electrophoresis medium b1, for example, the plurality of first electrophoresis particles b2 may be dispersed in a region of the electrophoresis medium b1 away from the encapsulation substrate 90, the plurality of second electrophoresis particles b3 may be dispersed in a region of the electrophoresis medium b1 close to the encapsulation substrate 90, that is, the plurality of first electrophoresis particles b2 and the plurality of second electrophoresis particles b3 are layered. The electrophoretic medium b1 is configured to carry a plurality of the first electrophoretic particles b2 and a plurality of the second electrophoretic particles b3, where the first electrophoretic particles b2 are configured to reflect the display light emitted from the light emitting element 53 toward the first electrophoretic particles b2, and the second electrophoretic particles b3 are configured to absorb the external ambient light emitted toward the second electrophoretic particles b 3.
In the embodiment of the present application, the first electrophoretic particles b2 may be reflective electrophoretic particles, and the second electrophoretic particles b3 may be light-shielding electrophoretic particles. The first electrophoretic particles b2 and the second electrophoretic particles b3 have the same polarity, i.e., the first electrophoretic particles b2 and the second electrophoretic particles b3 have positive or negative charges.
Referring to fig. 1 and 2, fig. 2 is a schematic cross-sectional view of a first portion of an electrophoresis assembly 80 of the display panel shown in fig. 1. In the present embodiment, X represents a horizontal direction, and Y represents a vertical direction. The pixel electrode 834 and the common electrode 835 are used to form a driving electric field (shown by solid lines with arrows in fig. 2) directed to the common electrode 835 by the pixel electrode 834 or to the pixel electrode 834 by the common electrode 835. The driving electric field is used for driving the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 accommodated in the accommodating space A to move along the horizontal direction.
It is understood that the movement of the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 having positive or negative charges in the horizontal direction may be controlled by controlling the driving electric field formed between the pixel electrode 834 and the common electrode 835, thereby controlling the reflection of the display light emitted from the light emitting element 53 by the plurality of first electrophoretic particles b2 and the absorption of the external ambient light by the plurality of second electrophoretic particles b 3.
Specifically, referring to fig. 1 and 3, fig. 3 is a schematic view of a second partial cross-sectional structure of the display panel shown in fig. 1. When the external ambient light is weak, a voltage is applied between the pixel electrode 834 and the common electrode 835 to form a first driving electric field, so that the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 move under the driving of the first driving electric field to gather to one side of the accommodating space a, and the distribution area of the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 in the horizontal direction of the accommodating space a is reduced, so that more display light is emitted out of the display panel 1 through the accommodating space a. When the external ambient light is strong, a reverse voltage is applied between the pixel electrode 834 and the common electrode 835 to form a second driving electric field opposite to the first driving electric field, so that the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 are diffused to the surface of the accommodating space a under the driving of the second driving electric field, the distribution area of the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 in the horizontal direction of the accommodating space a is increased, and further the plurality of second electrophoretic particles b3 absorb the external ambient light, thereby reducing the interference of the external ambient light on the display light. Meanwhile, the first electrophoretic particles b2 reflect the display light irradiated onto the first electrophoretic particles b2 to the light emitting component 50, so that the display light is reflected between the first electrophoretic particles b2 and the light emitting component 50 and finally emitted out of the display panel 1, thereby improving the light emitting efficiency of the display panel 1. Therefore, the display panel 1 provided by the application can reduce the influence of external environment light while having higher light-emitting efficiency, and further the display panel 1 obtains better display effect.
It should be noted that, the driving electric field formed by the pixel electrode 834 and the common electrode 835 means that a component of the electric field along the horizontal direction is stronger, so that the movement of the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 along the horizontal direction is easier to control, and a component of the electric field along the vertical direction has little or no vertical component, so as to reduce the power consumption of the display panel 1.
In this embodiment, the density of the plurality of first electrophoretic particles b2 is greater than the density of the plurality of second electrophoretic particles b3, and the density of the plurality of first electrophoretic particles b2 is greater than or equal to the density of the electrophoretic medium b1, so that the plurality of second electrophoretic particles b3 are located on a side of the plurality of first electrophoretic particles b2 facing away from the light emitting component 50, and the plurality of second electrophoretic particles are located on a side of the plurality of first electrophoretic particles b2 facing away from the light emitting side of the light emitting element 53, that is, the two are layered in the electrophoretic medium b1 by the different densities of the first electrophoretic particles b2 and the second electrophoretic particles b 3.
Referring to fig. 1, fig. 2 and fig. 3, in this embodiment, each of the accommodating spaces a includes a display area A1 and two avoidance areas A2 that are communicated, where two avoidance areas A2 are disposed on opposite sides of the display area A1, and one of the avoidance areas A2 is adjacent to the pixel electrode 834, and the other one of the avoidance areas A2 is adjacent to the common electrode 835. The front projection of the display area A1 on the substrate 10 covers the front projection of the light emitting element 53 corresponding thereto on the substrate 10, and the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 can be completely collected in the avoiding area A2 located at one side of the display area A1 or spread to at least part of the surface of the display area A1 under the driving of the driving electric field.
It can be understood that, when the external ambient light is weaker, the first electrophoretic particles b2 and the second electrophoretic particles b3 can be completely collected in the avoiding area A2 located at one side of the display area A1, so that the display light emitted from the light emitting element 53 to the display area A1 can be directly emitted out of the display panel 1 through the display area A1, thereby ensuring the light-emitting efficiency of the display panel 1 when the external ambient light is weaker.
In an exemplary embodiment, the area of the front projection of the avoidance area A2 on the substrate 10 may be one fifth of the area of the front projection of the display area A1 on the substrate 10, so as to ensure that the avoidance area A2 has enough space to accommodate the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 when the external ambient light is weak.
In an exemplary embodiment, the number of the avoidance areas A2 may be one, that is, one of the avoidance areas A2 is disposed at a side of the display area A1 near the pixel electrode 834 or a side of the display area A1 near the common electrode 835.
Referring to fig. 1 and 3, in the embodiment of the present application, the display panel 1 further includes a driving circuit layer 20 and a flat layer 30 stacked on the substrate 10, wherein the driving circuit layer 20 is disposed on a side of the substrate 10 facing the light emitting component 50, that is, the driving circuit layer 20 is disposed on a side of the substrate 10, the flat layer 30 is disposed on a side of the driving circuit layer 20 facing away from the substrate 10, and covers the driving circuit layer 20, and the light emitting component 50 is disposed on a side of the flat layer 30 facing away from the driving circuit layer 20. The driving circuit layer 20 is used for driving the light emitting component 50 to emit light. The flat layer 30 is provided with a plurality of via holes 30a disposed at intervals exposing the driving circuit layer 20, that is, the plurality of via holes 30a penetrate through the flat layer 30 in the thickness direction of the flat layer 30, so that a part of the driving circuit layer 20 is not covered by the flat layer 30.
In the present embodiment, the light emitting assembly 50 further includes a pixel defining layer 51, a plurality of anode layers 52, and a cathode layer 55. The anode layers 52 are disposed on a side of the flat layer 30 opposite to the driving circuit layer 20, and the anode layers 52 are in one-to-one correspondence with the vias 30 a. At least a portion of the anode layer 52 is accommodated in the corresponding via hole 30a and connected to the driving circuit layer 20, so that the anode layer 52 is electrically connected to the driving circuit layer 20. The pixel defining layer 51 is disposed on a side of the anode layers 52 facing away from the flat layer 30 and a peripheral side of the anode layers 52, i.e. the pixel defining layer 51 covers the anode layers 52 on the flat layer 30. The pixel defining layer 51 is provided with a plurality of accommodating holes 51a exposing a plurality of anode layers 52, and the accommodating holes 51a are in one-to-one correspondence with the anode layers 52. One of the light emitting elements 53 is accommodated in each of the accommodation holes 51a, and the light emitting element 53 is connected to the anode layer 52 such that the light emitting element 53 is electrically connected to the anode layer 52. The cathode layer 55 is disposed on a side of the pixel defining layer 51 facing away from the plurality of anode layers 52 and covers a side of the plurality of light emitting elements 53 facing away from the plurality of anode layers 52. The cathode layer 55 is connected to the light emitting element 53 such that the cathode layer 55 is electrically connected to the light emitting element 53.
In the present embodiment, each of the anode layers 52 includes a first anode region 52a and a second anode region 52b, wherein the first anode region 52a is located at a position where the light emitting element 53 corresponding thereto faces the substrate base plate 10 and is connected to the light emitting element 53, and the second anode region 52b is located at a peripheral side of the first anode region 52 a. That is, the position of the first anode region 52a corresponds to the position of the light emitting element 53, the first anode region 52a is connected to one end of the light emitting element 53 facing the flat layer 30, and the second anode region 52b is disposed around the first anode region 52 a. The surface of the first anode region 52a contacting with the light-emitting element 53 is a cambered surface protruding toward the light-emitting element 53, that is, the center of the cambered surface is located at the side of the first anode region 52a opposite to the light-emitting element 53.
It can be understood that, by setting the surface of the first anode region 52a contacting the light emitting element 53 as an arc surface, when the light intensity of the external environment is high, that is, when the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 are distributed on the surface of the display region A1, the anode layer 52 may reflect more display light to the peripheral side of the display region A1, thereby improving the light emitting efficiency of the display panel 1.
In an exemplary embodiment, the surface of the first anode region 52a formed at the portion of the flat layer 30 may be made to be a cambered surface by preparing the surface of the portion of the flat layer 30 in contact with the first anode region 52 a.
Referring to fig. 1, in the embodiment of the present application, the display panel 1 further includes an encapsulation layer 60, and the encapsulation layer 60 is disposed on a side of the cathode layer 55 opposite to the pixel defining layer 51 and covers the cathode layer 55. The encapsulation layer 60 is used for encapsulating the light emitting assembly 50, so that the light emitting assembly 50 is isolated from the outside, and the light emitting assembly 50 is prevented from being affected by impurities such as moisture, oxygen or dust.
In this embodiment, the substrate 10, the driving circuit layer 20, the planarization layer 30, the light emitting component 50, the encapsulation layer 60, and the interlayer substrate 70 may form an OLED structure, and may specifically be a low temperature polysilicon (Low Temperature Poly-Silicon, LTPS) OLED structure. For display panels and devices, the use of polysilicon liquid crystal materials has many advantages, such as thin film circuits that can be made thinner and smaller, lower power consumption, etc.
Referring to fig. 1 and fig. 4, fig. 4 is a schematic cross-sectional view of a second portion of the electrophoresis assembly of the display panel shown in fig. 1. In this embodiment, the insulating isolation layer of the electrophoresis assembly 80 further includes a gate insulating layer 81 and a passivation layer 82, wherein the gate insulating layer 81 is disposed on a side of the interlayer substrate 70 facing away from the encapsulation layer 60, and the passivation layer 82 is disposed on a side of the gate insulating layer 81 facing away from the interlayer substrate 70.
In the embodiment of the present application, each of the electrophoresis units 83 further includes a driving transistor 831 and a signal connection terminal 832. The driving transistor 831 includes an active layer 8311, a source 8312, a drain 8313, and a gate 8315. The gate electrode 8315 is embedded in the gate insulating layer 81, and a side of the gate electrode 8315 facing the interlayer substrate 70 contacts the interlayer substrate 70, and a side of the gate electrode 8315 facing away from the interlayer substrate 70 is spaced apart from a side of the gate insulating layer 81 facing away from the interlayer substrate 70. That is, the gate insulating layer 81 covers the gate electrode 8315 to the interlayer substrate 70, and the gate insulating layer 81 is used to isolate the gate electrode 8315 from the active layer 8311, the source electrode 8312, and the drain electrode 8313. The active layer 8311, the source electrode 8312 and the drain electrode 8313 are embedded in the passivation layer 82 and contact with a side of the gate insulating layer 81 opposite to the interlayer substrate 70, and the passivation layer 82 is provided with a first opening 821 exposing at least a part of the drain electrode 8313. The source electrode 8312 and the drain electrode 8313 are disposed at opposite ends of the active layer 8311 at intervals, and the source electrode 8312 and the drain electrode 8313 are electrically connected to the active layer 8311 respectively. The side of the active layer 8311 facing the gate insulating layer 81, the side of the source electrode 8312 facing the gate insulating layer 81 and the side of the drain electrode 8313 facing the gate insulating layer 81 are flush and are in contact with the side of the gate insulating layer 81 facing away from the interlayer substrate 70, the side of the active layer 8311 facing away from the gate insulating layer 81, the side of the source electrode 8312 facing away from the gate insulating layer 81 and a part of the side of the drain electrode 8313 facing away from the gate insulating layer 81 are spaced apart from the side of the passivation layer 82 facing away from the gate insulating layer 81, i.e., the passivation layer 82 covers the active layer 8311, the source electrode 8312 and a part of the drain electrode 8313 to the gate insulating layer 81. The signal connection terminal 832 is embedded in an end of the passivation layer 82 away from the active layer 8311, and the passivation layer 82 is provided with a second opening 822 exposing at least a portion of the signal connection terminal 832. The passivation layer 82 is used to protect the active layer 8311, the source electrode 8312, the drain electrode 8313, and the signal connection terminal 832. The side of the signal connection terminal 832 facing the gate insulating layer 81 contacts the gate insulating layer 81, and a portion of the side of the signal connection terminal 832 facing away from the gate insulating layer 81 is spaced apart from the side of the passivation layer 82 facing away from the gate insulating layer 81, i.e. the passivation layer 82 covers a portion of the signal connection terminal 832 on the gate insulating layer 81.
Referring to fig. 1 and 4, in the embodiment of the present application, each of the electrophoresis units 83 further includes a ring-shaped support 833, the ring-shaped support 833 is disposed on a side of the passivation layer 82 opposite to the gate insulating layer 81, and the ring-shaped support 833 is located between the first opening 821 and the second opening 822. The ring-shaped support 833 serves to support the pixel electrode 834 and the common electrode 835. In the embodiment of the present application, the cross section of the annular support 833 (i.e., the cross section along the horizontal direction X) may be a hollow rectangle, i.e., an annular rectangle cross section.
In the embodiment of the present application, the pixel electrode 834 includes a first pixel electrode 8341, a second pixel electrode 8342, and a third pixel electrode 8343, and the common electrode 835 includes a first common electrode 8351, a second common electrode 8352, and a third common electrode 8353. The first pixel electrode 8341 and the first common electrode 8351 are respectively disposed on inner surfaces of opposite ends of the annular support 833, the second pixel electrode 8342 and the second common electrode 8352 are disposed on a side of the annular support 833 opposite to the passivation layer 82, one end of the second pixel electrode 8342 is connected with the first pixel electrode 8341, and one end of the second common electrode 8352 is connected with the first common electrode 8351. A part of the third pixel electrode 8343 and a part of the third common electrode 8353 are disposed on outer peripheral surfaces of opposite ends of the annular supporting member 833, specifically, the third pixel electrode 8343 is connected to an end of the second pixel electrode 8342 away from the first pixel electrode 8341, and the third pixel electrode 8343 extends to the drain electrode 8313 in the first opening 821 and covers at least a part of the drain electrode 8313, so that the pixel electrode 834 is electrically connected to the drain electrode 8313. The third common electrode 8353 is connected to an end of the second common electrode 8352 away from the first common electrode 8351, and the third common electrode 8353 extends to the signal connection terminal 832 in the second opening 822 and covers at least a part of the signal connection terminal 832 such that the common electrode 835 is electrically connected to the signal connection terminal 832.
It is understood that, by electrically connecting the pixel electrode 834 with the drain electrode 8313 and the common electrode 835 with the signal connection terminal 832, the drain electrode 8313 transmits an electrical signal to the pixel electrode 834, and the signal connection terminal 832 transmits an electrical signal to the common electrode 835, so that voltages can be respectively applied to the pixel electrode 834 and the common electrode 835 to form a driving electric field to control the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 to move in the accommodating space a.
Specifically, when the voltage of the common electrode 835 is greater than the voltage of the pixel electrode 834, and the first electrophoretic particles b2 and the second electrophoretic particles b3 are both positive charges, a driving electric field directed to the pixel electrode 834 by the common electrode 835 is formed, so that a plurality of the first electrophoretic particles b2 and a plurality of the second electrophoretic particles b3 are driven to move to the side of the pixel electrode 834 and finally gathered into the avoiding area A2 near the side of the pixel electrode 834, so that the display light emitted from the light emitting element 53 to the display area A1 can be directly emitted out of the display panel 1 through the display area A1. When a reverse voltage is applied between the common electrode 835 and the pixel electrode 834, that is, when the voltage of the pixel electrode 834 is greater than the voltage of the common electrode 835, a driving electric field directed from the pixel electrode 834 to the common electrode 835 is formed, thereby driving the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 to move to one side of the common electrode 835. Therefore, by controlling the magnitude of the voltage difference between the pixel electrode 834 and the common electrode 835 and the application time of the driving electric field formed between the pixel electrode 834 and the common electrode 835, the moving distance of the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 may be controlled, and finally the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 may be diffused to the entire surface of the display area A1, so that the plurality of second electrophoretic particles b3 absorb the external ambient light irradiated to the display area A1, and the plurality of first electrophoretic particles b2 reflect the display light irradiated to the display area A1 to the light emitting assembly 50, and finally the display light may be emitted from the circumference side of the display area A1 to the display panel 1.
Referring to fig. 1 and fig. 4, in the embodiment of the present application, the drain electrode 8313 and the signal connection terminal 832 are disposed in the same layer and spaced apart from each other, so as to ensure that the drain electrode 8313 and the signal connection terminal 832 can complete processing through the same process, and can receive control signals with different voltage magnitudes.
In this embodiment, the side of the second pixel electrode 8342 opposite to the second common electrode 8352 facing away from the annular supporting member 833 abuts against the package substrate 90, and the side of the annular supporting member 833 not supporting the pixel electrode 834 or the common electrode 835 facing away from the interlayer substrate 70 also abuts against the package substrate 90, so that the glass substrate 90, the annular supporting member 833, the pixel electrode 834, the common electrode 835 and the passivation layer 82 form a sealed accommodating space a, thereby preventing the electrophoresis liquid b accommodated in the accommodating space a from leaking.
Referring to fig. 4, in the embodiment of the present application, the active layer 8311 includes a photosensitive layer 8311a, the photosensitive layer 8311a is configured to generate photo-generated carriers under the condition of light irradiation to form an on current, and the stronger the light irradiated to the photosensitive layer 8311a, the more photo-generated carriers generated by the photosensitive layer 8311a, the larger the on current.
It will be appreciated that the more photo-generated carriers are generated by the photosensitive layer 8311a, the greater the on-current, and the greater the voltage applied to the pixel electrode 834 by the driving transistor 831. Therefore, when the light of the external environment is weak so that the photosensitive layer 8311a generates less photo-generated carriers, and the voltage of the pixel electrode 834 is smaller than that of the common electrode 835, the pixel electrode 834 and the common electrode 835 form an electric field directed to the pixel electrode 834 by the common electrode 835, thereby driving the first electrophoretic particles b2 and the second electrophoretic particles b3 to move into the avoiding area A2 near the pixel electrode 834, and further enabling the display light emitted from the light emitting element 53 to the display area A1 to be directly emitted out of the display panel 1 through the display area A1. When the light of the external environment is strong so that the photosensitive layer 8311a generates more photo-generated carriers, the voltage of the pixel electrode 834 is greater than the voltage of the common electrode 835, an electric field directed to the common electrode 835 by the pixel electrode 834 is formed between the pixel electrode 834 and the common electrode 835, thereby driving the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 to move toward the common electrode 835 to diffuse to the surface of the display area A1, and further enabling the plurality of second electrophoretic particles b3 to absorb the external environment light irradiated to the display area A1, so as to reduce the influence of the external environment light on the display light.
It is understood that in other embodiments, the active layer 8311 may further include a semiconductor layer on a side of the photosensitive layer 8311a facing the gate insulating layer 81, the semiconductor layer being configured to generate carriers under an electric field generated by a voltage of the gate electrode 8315, thereby improving a signal strength outputted from the driving transistor 831.
In the embodiment of the present application, the material of the photosensitive layer 8311a is poly (3-hexylthiophene) (P3 HT), P3HT is an organic material having both photosensitive performance and semiconductor performance, and in order to improve the photosensitive performance of the P3HT material, methyl [6,6] -phenyl-carbon 61-butyrate (PCBM) may be doped therein to form the photosensitive layer 8311a including a mixed material of P3HT and PCBM.
Referring to fig. 4, in the embodiment of the present application, the front projection of the gate electrode 8315 on the substrate 10 covers the front projection of the active layer 8311 on the substrate 10, that is, the front projection of the active layer 8311 on the substrate 10 is located in the front projection of the gate electrode 8315 on the substrate 10, and the gate electrode 8315 is used to block the display light emitted to the active layer 8311.
It is understood that, by shielding the display light emitted to the active layer 8311 by the gate electrode 8315, the display light is prevented from being emitted to the photosensitive layer 8311a, and thus the photosensitive layer 8311a is prevented from generating photo-generated carriers under the irradiation of the display light, so as to ensure that the photo-generated carriers generated by the photosensitive layer 8311a are only related to the external environment light.
Referring to fig. 5 and fig. 6, fig. 5 is a schematic view of a partial cross-sectional structure of a display panel according to a second embodiment of the present application, and fig. 6 is a schematic view of a partial cross-sectional structure of an electrophoresis assembly of the display panel shown in fig. 5. The display panel in the second embodiment differs from the display panel in the first embodiment only in that: the electrophoresis unit 83 does not include the annular support 833, and the passivation layer 82 is further provided with a plurality of third openings 823. For a description of the display panel in the second embodiment, which is the same as the display panel in the first embodiment, please refer to the related description of the display panel in the first embodiment, and the description is omitted herein.
Specifically, in this embodiment, the passivation layer 82 is further provided with a plurality of third openings 823, one third opening 823 is located between one first opening 821 and one second opening 822, and the third openings 823 are respectively disposed at opposite intervals with the first opening 821 and the second opening 822. The inner walls of the third opening 823 are used for supporting a portion of the pixel electrode 834 and a portion of the common electrode 835, that is, a portion of the pixel electrode 834 and a portion of the common electrode 835 are respectively disposed on the inner walls of the opposite sides of the third opening 823, so that the accommodating space a is located in the third opening 823. The electrophoresis liquid b is accommodated in the accommodating space.
In the embodiment of the present application, the third opening 823 penetrates through the passivation layer 82, and it is understood that in other embodiments, the third opening 823 may not penetrate through the passivation layer 82, so that a groove-like structure is formed on the passivation layer 82.
In the embodiment of the application, the first pixel electrode 8341 and the first common electrode 8351 are respectively disposed on the inner walls of the opposite sides of the third opening 823. The second pixel electrode 8342 and the second common electrode 8352 are respectively disposed on a side of the passivation layer 82 opposite to the gate insulating layer 81, one end of the second pixel electrode 8342 is connected to the first pixel electrode 8341, and one end of the second common electrode 8352 is connected to the first common electrode 8351. The third pixel electrode 8343 is connected to an end of the second pixel electrode 8342 away from the first pixel electrode 8341, and the third pixel electrode 8343 extends to the drain electrode 8313 in the first opening 821 and covers at least a part of the drain electrode 8313, so that the pixel electrode 834 is electrically connected to the drain electrode 8313. The third common electrode 8353 is connected to an end of the second common electrode 8352 away from the first common electrode 8351, and the third common electrode 8353 extends to the signal connection terminal 832 in the second opening 822 and covers at least a part of the signal connection terminal 832 such that the common electrode 835 is electrically connected to the signal connection terminal 832.
In this embodiment, the second pixel electrode 8342 and the second common electrode 8352 are abutted against the package substrate 90 on the side opposite to the passivation layer 82, and the passivation layer 82 on the side opposite to the interlayer substrate 70, which does not support the pixel electrode 834 or the common electrode 835, is abutted against the package substrate 90, so that the glass substrate 90, the passivation layer 82, the pixel electrode 834, the common electrode 835 and the gate insulating layer 81 form a sealed accommodating space a, thereby preventing the electrophoresis liquid b accommodated in the accommodating space a from leaking.
It will be appreciated that in the embodiment of the present application, the annular support 833 is no longer disposed between the passivation layer 82 and the package substrate 90, thereby reducing the thickness of the display panel 1. Meanwhile, the plurality of first electrophoretic particles b2 and the plurality of second electrophoretic particles b3 are accommodated in the accommodating space a between the pixel electrode 834 and the common electrode 835, that is, in the third opening 823, so that the distance between the plurality of first electrophoretic particles b2 and the light emitting component 50 is reduced, the propagation distance between the plurality of first electrophoretic particles b2 and the light emitting component 50 of the display light is reduced, the energy loss of the display light in the reflection process is reduced, and the light emitting efficiency of the display panel 1 is improved.
Referring to fig. 7 and 8, fig. 7 is a schematic view of a partial cross-sectional structure of a display panel according to a third embodiment of the present disclosure, and fig. 8 is an enlarged schematic view of a partial structure VIII of the display panel shown in fig. 7. The display panel in the third embodiment differs from the display panel in the second embodiment only in that: the gate insulating layer 81 is provided with a plurality of fourth holes 811. For a description of the display panel in the third embodiment, which is the same as the display panel in the second embodiment, please refer to the related description of the display panel in the second embodiment, and the description is omitted herein.
Specifically, in the embodiment of the present application, the gate insulating layer 81 is provided with a plurality of fourth openings 811, and the fourth openings 811 and the third openings 823 are in one-to-one correspondence. One of the fourth openings 811 communicates with one of the third openings 823, and the orthographic projection of one of the fourth openings 811 on the substrate 10 is located between the orthographic projection of one of the driving transistors 831 on the substrate 10 and the orthographic projection of one of the signal connection terminals 832 on the substrate 10. A portion of the inner wall of the fourth hole 811 is used for supporting a portion of the pixel electrode 834 and a portion of the common electrode 835, that is, a portion of the pixel electrode 834 and a portion of the common electrode 835 are respectively disposed on inner walls of opposite sides of the third hole 823 and the fourth hole 811, which are in communication with each other, so that the accommodating space a is partially located in the third hole 823 and partially located in the fourth hole 811. The electrophoresis liquid b is accommodated in the accommodating space A.
In the embodiment of the present application, the fourth opening 811 penetrates through the gate insulating layer 81, and it is understood that in other embodiments, the fourth opening 811 may not penetrate through the gate insulating layer 81, so as to form a groove-like structure in the gate insulating layer 81.
In this embodiment, the first pixel electrode 8341 and the first common electrode 8351 are respectively disposed on inner walls of two opposite sides of the third opening 823 and the fourth opening 811, that is, the first pixel electrode 8341 and the first common electrode 8351 are respectively located on two opposite sides of the accommodating space a.
In this embodiment, the second pixel electrode 8342 and the second common electrode 8352 are abutted against the package substrate 90 on a side opposite to the passivation layer 82, and a portion of the passivation layer 82 that does not support the pixel electrode 834 or the common electrode 835 is abutted against the package substrate 90 on a side opposite to the interlayer substrate 70, so that the package substrate 90, the passivation layer 82, the gate insulating layer 81, the pixel electrode 834, the common electrode 835 and the interlayer substrate 70 form a sealed accommodating space a, thereby preventing the electrophoresis liquid b accommodated in the accommodating space a from leaking.
It can be appreciated that, by opening the fourth hole 811 communicating with the third hole 823 on the gate insulating layer 81, so that a portion of the accommodating space a is located in the fourth hole 811, so as to reduce the distance between the plurality of first electrophoretic particles b2 and the light emitting component 50, which are accommodated in the accommodating space a, thereby further reducing the propagation distance of the display light between the plurality of first electrophoretic particles b2 and the light emitting component 50 on the basis of the second embodiment, further reducing the energy loss of the display light in the reflection process, and improving the light emitting efficiency of the display panel 1.
Referring to fig. 9, fig. 9 is a schematic view of a partial cross-sectional structure of a display panel according to a fourth embodiment of the present disclosure. The display panel in the fourth embodiment differs from the display panel in the first embodiment only in that: the electrophoresis unit 83 further comprises a transparent barrier element 836. The display panel in the fourth embodiment is the same as the display panel in the first embodiment, and the description thereof is omitted herein for brevity.
Specifically, in the embodiment of the present application, the blocking element 836 is disposed in the accommodating space a and is respectively connected to the pixel electrode 834 and the common electrode 835 located on opposite sides of the accommodating space a, the blocking element 836 divides the accommodating space a into a first accommodating space a1 and a second accommodating space a2 which are not communicated and are stacked, the first accommodating space a1 is disposed on a side of the blocking element 836 facing the light emitting assembly 50, and the second accommodating space a2 is disposed on a side of the blocking element 836 facing away from the light emitting assembly 50. Part of the electrophoresis medium b1 is accommodated in the first accommodating space a1, part of the electrophoresis medium b1 is accommodated in the second accommodating space a2, a plurality of first electrophoresis particles b2 are accommodated in the first accommodating space a1, and a plurality of second electrophoresis particles b3 are accommodated in the second accommodating space a 2.
It can be appreciated that, by disposing the blocking element 836 in the accommodating space a, the second electrophoretic particles b3 can be always located on a side of the first electrophoretic particles b2 facing away from the light emitting component 50, so as to avoid the first electrophoretic particles b2 reflecting the external ambient light and the second electrophoretic particles b3 absorbing the display light.
It is to be understood that the blocking element 836 may also be applied to the display panels of the second and third embodiments, and the positional relationship and the connection relationship between the blocking element 836 and the display panels of the second and third embodiments are described with reference to the related description of the display panels of the fourth embodiment, which is not repeated herein.
Referring to fig. 10, fig. 10 is a schematic structural diagram of a display device according to a fifth embodiment of the present disclosure. In this embodiment, the display device 100 may include a display panel 1 and a housing, where the display panel 1 is disposed in the housing, and the light emitting side of the display panel 1 is exposed out of the housing. The display panel 1 is used for displaying images.
In an exemplary embodiment, the display panel 1 may be an Organic Light-Emitting Diode (OLED) display panel 1 or a Micro Light-Emitting Diode (Micro LED) display panel 1, and the application will be described by taking the display panel 1 as an OLED display panel 1 as an example.
It is understood that the display device 100 may be used in electronic devices including, but not limited to, televisions, tablet computers, notebook computers, desktop computers, mobile phones, in-vehicle displays, smart watches, smart bracelets, smart glasses, roadway signs, and the like. According to the embodiment of the present application, the specific type of the display device 100 is not particularly limited, and a person skilled in the art can correspondingly design according to the specific use requirement of the display device 100, which is not described herein.
In an exemplary embodiment, the display device 100 may further include other necessary components and constituent parts such as a driving board, a power board, a high-voltage board, and a key control board, which may be correspondingly supplemented by those skilled in the art according to the specific type and actual function of the display device 100, and will not be described herein.
Based on the same inventive concept, the fifth embodiment of the present application further provides a method for manufacturing a display panel, where the method for manufacturing a display panel is used for manufacturing the display panel in the first embodiment of the present application, and descriptions of the points of the method for manufacturing a display panel that are the same as those of the display vertical panel in the first embodiment are referred to in the description related to the display panel in the first embodiment, and are not repeated herein. Referring to fig. 11, fig. 11 is a flowchart of a method for manufacturing a display panel according to a sixth embodiment of the present disclosure, where the method for manufacturing a display panel may include the following steps.
S10, providing the substrate 10, the driving circuit layer 20, and the planarization layer 30, which are stacked.
In an exemplary embodiment, as shown in fig. 1, a substrate base plate 10, a driving circuit layer 20, and a planarization layer 30 are provided, wherein the driving circuit layer 20 is disposed on one side of the substrate base plate 10, and the planarization layer 30 is formed on a side of the driving circuit layer 20 facing away from the substrate base plate 10. The flat layer 30 is provided with a plurality of vias 30a penetrating the flat layer 30, and a part of the surface of the flat layer 30 opposite to the side of the driving circuit layer 20 is a cambered surface.
S20, a light emitting component 50 is formed on a side of the flat layer 30 facing away from the driving circuit layer 20.
In the embodiment of the present application, please refer to fig. 12, fig. 12 is a flowchart illustrating a step 20 in the manufacturing method shown in fig. 11. The step 20 may include the following steps.
S21, a plurality of anode layers 52 are formed on a side of the flat layer 30 facing away from the driving circuit layer 20.
In an exemplary embodiment, as shown in fig. 1, a plurality of anode layers 52 are formed on a side of the flat layer 30 facing away from the driving circuit layer 20, and the plurality of anode layers 52 are in one-to-one correspondence with the plurality of vias 30 a. Each of the anode layers 52 includes a first anode region 52a and a second anode region 52b, and the first anode region 52a is formed on a portion of the flat layer 30 having an arc surface opposite to the driving circuit layer 20, so that the surface of the first anode region 52a is also an arc surface. The second anode region 52b is disposed on the peripheral side of the first anode region 52a, and a portion of the second anode region 52b is accommodated in the via hole 30a and connected to the driving circuit layer 20.
S22, a pixel defining layer 51, a plurality of light emitting elements 53, and a cathode layer 55 are formed on a side of the plurality of anode layers 52 facing away from the flat layer 30.
In an exemplary embodiment, as shown in fig. 1, a pixel defining layer 51 is formed on a side of the anode layer 52 facing away from the flat layer 30 and a circumferential side of the anode layer 52. The pixel defining layer 51 is provided with a plurality of accommodating holes 51a exposing the anode layer 52, and the accommodating holes 51a correspond to the anode layers 52. One light emitting element 53 is accommodated in each of the accommodation holes 51a, and the light emitting element 53 is electrically connected to the anode layer 52. The cathode layer 55 is formed on a side of the pixel defining layer 51 facing away from the plurality of anode layers 52 and a side of the plurality of light emitting elements 53 facing away from the anode layers 52, and the cathode layer 55 is electrically connected to the light emitting elements 53.
In an exemplary embodiment, the pixel defining layer 51 may be formed by a photolithography process or a 3D printing manner.
And S30, forming a packaging layer 60 and an interlayer substrate 70 on the side of the light-emitting component 50 opposite to the flat layer 30.
In an exemplary embodiment, as shown in fig. 1, an encapsulation layer 60 and an interlayer substrate 70 are formed on a side of the light emitting assembly 50 facing away from the planarization layer 30. The encapsulation layer 60 is formed on a side of the cathode layer 55 facing away from the pixel defining layer 51. The interlayer substrate 70 is disposed on a side of the encapsulation layer 60 opposite to the cathode layer 55.
In an exemplary embodiment, the interlayer substrate 70 may be a transparent material such as glass or flexible Polyimide (PI).
And S40, forming an electrophoresis assembly 80 on the side of the interlayer substrate 70 opposite to the encapsulation layer 60.
In the embodiment of the present application, please refer to fig. 1, fig. 13 is a flowchart illustrating a step 40 in the manufacturing method shown in fig. 11. The step S40 may include the following steps.
S41, a gate 8315 is formed on a side of the interlayer substrate 70 facing away from the encapsulation layer 60.
In an exemplary embodiment, the gate 8315 is formed on the side of the interlayer substrate 70 opposite to the encapsulation layer 60 by physical vapor deposition, photolithography, and etching, where the gate 8315 is typically made of a metal material such as copper, aluminum, or molybdenum.
S42, a gate insulating layer 81 is formed on the surface of the gate 8315.
In an exemplary embodiment, a gate insulating layer 81 is formed on the surface of the gate 8315 sequentially by chemical vapor deposition, and the gate insulating layer 81 is made of a silicon nitride material.
S43, an active layer 8311 and a signal connection terminal 832 are formed on a side of the gate insulating layer 81 opposite to the gate insulating layer 81.
In an exemplary embodiment, the active layer 8311 and the signal connection terminal 832 are formed on the side of the gate insulating layer 81 opposite to the gate insulating layer 81 by chemical vapor deposition, photolithography, and etching.
S44, a source electrode 8312 and a drain electrode 8313 are formed at both ends of the active layer 8311 and at a side of a part of the active layer 8311 opposite to the gate insulating layer 81.
In an exemplary embodiment, the source electrode 8312 and the drain electrode 8313 are formed at both ends of the active layer 8311 and a side of a part of the active layer 8311 opposite to the gate insulating layer 81 by chemical vapor deposition, photolithography, and etching.
S45, a passivation layer 82 is formed on the active layer 8311, the source electrode 8312, the drain electrode 8313, and the surface of the signal connection terminal 832.
In an exemplary embodiment, a passivation layer 82 is formed on the active layer 8311, the source electrode 8312, the drain electrode 8313 and the surface of the signal connection terminal 832 by chemical vapor deposition, photolithography and etching, and a first opening 821 exposing the drain electrode 8313 and a second opening 822 exposing the signal connection terminal 832 are formed on a side of the passivation layer 82 opposite to the active layer 8311.
S46, a ring-shaped support 833 is disposed on a side of the passivation layer 82 opposite to the active layer 8311.
S47, forming a pixel electrode 834 and a common electrode 835 on a part of the surface of the annular support 833 to form a receiving space a, wherein the pixel electrode 834 is electrically connected with the drain electrode 8313, and the common electrode 835 is electrically connected with the signal connection terminal 832.
In an exemplary embodiment, a first pixel electrode 8341 and a first common electrode 8351 are formed on inner surfaces of opposite sides of the ring-shaped support 833, a second pixel electrode 8342 connected to the first pixel electrode 8341 and a second common electrode 8352 connected to the first common electrode 8351 are formed on a side of the ring-shaped support 833 opposite to the passivation layer 82, and a third pixel electrode 8343 connected to the second pixel electrode 8342 and a third common electrode 8353 connected to the second common electrode 8352 are formed on outer surfaces of opposite sides of the ring-shaped support 833. The third pixel electrode 8343 extends into the first opening 821 and is connected to the drain electrode 8313, and the third common electrode 8353 extends into the second opening 822 and is connected to the signal connection terminal 832. A receiving space a is formed between the first pixel electrode 8341 and the first common electrode 8351, and the orthographic projection of the receiving space a on the substrate 10 covers the orthographic projection of the light emitting element 53 on the substrate 10.
In an exemplary embodiment, the pixel electrode 834 and the common electrode 835 are both indium tin oxide. The Indium tin oxide may be an ITO (Indium tin oxide) semiconductor material, and the Indium tin oxide has good light transmittance and conductivity.
S48, filling the accommodation space A with the electrophoresis liquid b.
In an exemplary embodiment, the accommodation space a is filled with the electrophoretic medium b1, and then a plurality of first electrophoretic particles b2 and a plurality of second electrophoretic particles are added to the electrophoretic medium b1 by inkjet.
And S50, arranging a packaging substrate 90 on the side of the electrophoresis assembly 80 opposite to the interlayer substrate 70 to form the display panel 1.
In an exemplary embodiment, a package substrate 90 is disposed on a side of the electrophoretic element 80 facing away from the interlayer substrate 70 to form the display panel 1. The second pixel electrode 8342 and the second common electrode 8352 are abutted against the package substrate 90 on a side opposite to the annular supporting member 833, and the portion of the annular supporting member 833 which does not support the pixel electrode 834 or the common electrode 835 is abutted against the package substrate 90 on a side opposite to the passivation layer 82.
In the description of the present specification, reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
It is to be understood that the application of the present application is not limited to the examples described above, but that modifications and variations can be made by a person skilled in the art from the above description, all of which modifications and variations are intended to fall within the scope of the claims appended hereto. Those skilled in the art will recognize that the implementations of all or part of the procedures described in the embodiments described above and in accordance with the equivalent arrangements of the claims are within the scope of the present application.

Claims (10)

1. The display panel comprises a light emitting component for emitting display light, and is characterized by further comprising an interlayer substrate, an electrophoresis component and a packaging substrate, wherein the interlayer substrate is arranged on one side of the light emitting component, the electrophoresis component is arranged on one side of the interlayer substrate, which is opposite to the light emitting component, and the packaging substrate is arranged on one side of the electrophoresis component, which is opposite to the interlayer substrate; the light emitting assembly comprises a plurality of light emitting elements, and the plurality of light emitting elements are used for emitting the display light; the electrophoresis assembly comprises a plurality of electrophoresis units, the electrophoresis units are in one-to-one correspondence with the light-emitting elements, and the electrophoresis units are positioned on the light-emitting sides of the light-emitting elements;
Each electrophoresis unit comprises a pixel electrode, a common electrode and electrophoresis liquid, wherein the pixel electrode and the common electrode are arranged between the interlayer substrate and the packaging substrate, the pixel electrode and the common electrode are oppositely arranged at intervals to form a containing space, and the electrophoresis liquid is contained in the containing space;
the electrophoresis liquid comprises an electrophoresis medium, a plurality of first electrophoresis particles and a plurality of second electrophoresis particles, wherein the polarities of the first electrophoresis particles and the second electrophoresis particles are the same, the first electrophoresis particles and the second electrophoresis particles are layered in the electrophoresis medium, and the second electrophoresis particles are positioned on one side of the first electrophoresis particles opposite to the interlayer substrate;
the pixel electrode and the common electrode are used for forming a driving electric field, the driving electric field is used for driving a plurality of first electrophoretic particles and a plurality of second electrophoretic particles to move towards the pixel electrode or the common electrode, the first electrophoretic particles are used for reflecting the display light emitted by the light-emitting element towards the first electrophoretic particles, and the second electrophoretic particles are used for absorbing external environment light emitted towards the second electrophoretic particles.
2. The display panel of claim 1, further comprising a substrate base plate, a driving circuit layer, and a flat layer, wherein the driving circuit layer is disposed on a side of the substrate base plate facing the light emitting component, the flat layer is disposed on a side of the driving circuit layer facing away from the substrate base plate, and the light emitting component is disposed on a side of the flat layer facing away from the driving circuit layer; the driving circuit layer is used for driving the light-emitting component to emit light, and a plurality of through holes which are arranged at intervals and expose the driving circuit layer are formed in the flat layer.
3. The display panel of claim 2, wherein the light emitting device further comprises a pixel defining layer, a plurality of anode layers and a cathode layer, wherein the anode layers are disposed on a side of the flat layer opposite to the driving circuit layer, and the anode layers are in one-to-one correspondence with the plurality of vias; at least part of the anode layer is accommodated in the corresponding through hole and is electrically connected with the driving circuit layer; the pixel definition layer is arranged on one side of the anode layers, which is opposite to the flat layer, and the periphery of the anode layers, a plurality of containing holes exposing the anode layers are formed in the anode layers, and the containing holes are in one-to-one correspondence with the anode layers; each containing hole contains one light-emitting element, and the light-emitting elements are electrically connected with the anode layer; the cathode layer is arranged on one side of the pixel definition layer, which is opposite to the anode layers, and is electrically connected with the light-emitting elements;
The display panel further comprises an encapsulation layer, wherein the encapsulation layer is arranged on one side of the cathode layer, which is opposite to the pixel definition layer, and the encapsulation layer is used for encapsulating the light-emitting component.
4. The display panel according to claim 3, wherein each of the anode layers includes a first anode region and a second anode region, wherein a position of the first anode region corresponds to a position of the light emitting element, and the first anode region is connected to an end of the light emitting element toward the flat layer, and the second anode region is provided on a peripheral side of the first anode region; the surface of the first anode region, which is contacted with the light-emitting element, is a cambered surface protruding towards the light-emitting element.
5. The display panel of claim 3, wherein the electrophoretic assembly further comprises a gate insulating layer and a passivation layer, wherein the gate insulating layer is disposed on a side of the interlayer substrate facing away from the encapsulation layer, and the passivation layer is disposed on a side of the gate insulating layer facing away from the interlayer substrate;
each electrophoresis unit further comprises a driving transistor and a signal connection end which are arranged at intervals, wherein the driving transistor comprises an active layer, a source electrode, a drain electrode and a grid electrode; the grid electrode is embedded in the grid electrode insulating layer, the active layer, the source electrode and the drain electrode are embedded in the passivation layer, the passivation layer is provided with a first opening exposing at least part of the drain electrode, and the source electrode and the drain electrode are arranged at the opposite ends of the active layer at intervals and are electrically connected with the active layer; the signal connection end is embedded in one end, far away from the active layer, of the passivation layer, and the passivation layer is provided with a second opening exposing at least part of the signal connection end; the passivation layer is used for protecting the active layer, the source electrode, the drain electrode and the signal connection end.
6. The display panel of claim 5, wherein each of the electrophoretic cells further comprises a ring-shaped support disposed on a side of the passivation layer facing away from the gate insulating layer, the ring-shaped support being positioned between the first opening and the second opening, the ring-shaped support for supporting the pixel electrode and the common electrode;
one end of the pixel electrode extends to the drain electrode in the first opening, so that the pixel electrode is electrically connected with the drain electrode, and one end of the common electrode extends to the signal connection end in the second opening, so that the common electrode is electrically connected with the signal connection end.
7. The display panel according to claim 5, wherein the passivation layer is further provided with a plurality of third openings, one third opening is located between one second opening and one first opening, the third openings are respectively disposed opposite to the first openings at intervals, and a portion of inner walls of the third openings opposite to each other are used for supporting a portion of the pixel electrode and a portion of the common electrode;
one end of the pixel electrode extends to the drain electrode in the first opening, so that the pixel electrode is electrically connected with the drain electrode, and one end of the common electrode extends to the signal connection end in the second opening, so that the common electrode is electrically connected with the signal connection end.
8. The display panel according to claim 7, wherein the gate insulating layer is provided with a plurality of fourth openings, the fourth openings are in one-to-one correspondence with the third openings, and one fourth opening is communicated with one third opening, and an orthographic projection of one fourth opening on the interlayer substrate is located between an orthographic projection of one driving transistor on the interlayer substrate and an orthographic projection of one signal connection terminal on the interlayer substrate; a part of the inner wall of the fourth opening is used for supporting a part of the pixel electrode and a part of the common electrode;
part of the pixel electrode and part of the common electrode are respectively arranged on the inner walls of the two opposite sides of the third opening and the fourth opening which are communicated.
9. The display panel according to any one of claims 1 to 8, wherein each of the electrophoresis units further comprises a transparent barrier member disposed in the accommodation space and connected to the pixel electrode and the common electrode on opposite sides of the accommodation space, respectively, the barrier member dividing the accommodation space into a first accommodation space and a second accommodation space which are not communicated and are stacked, the first accommodation space being disposed on a side of the barrier member facing the light emitting assembly, and the second accommodation space being disposed on a side of the barrier member facing away from the light emitting assembly; part of the electrophoresis medium is accommodated in the first accommodating space, part of the electrophoresis medium is accommodated in the second accommodating space, a plurality of first electrophoresis particles are accommodated in the first accommodating space, and a plurality of second electrophoresis particles are accommodated in a plurality of second accommodating spaces.
10. A display device comprising a housing and the display panel of any one of claims 1-9 disposed within the housing.
CN202311765115.5A 2023-12-20 2023-12-20 Display panel and display device Pending CN117858570A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311765115.5A CN117858570A (en) 2023-12-20 2023-12-20 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311765115.5A CN117858570A (en) 2023-12-20 2023-12-20 Display panel and display device

Publications (1)

Publication Number Publication Date
CN117858570A true CN117858570A (en) 2024-04-09

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311765115.5A Pending CN117858570A (en) 2023-12-20 2023-12-20 Display panel and display device

Country Status (1)

Country Link
CN (1) CN117858570A (en)

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