CN117857803A - End-to-end video coding code rate adjusting system, method, medium and equipment - Google Patents
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Abstract
The present disclosure relates to an end-to-end video coding rate adjustment system, method, medium and apparatus, the system comprising: the single-model multi-code rate module is embedded in the video coding model and is used for acquiring image frame data and carrying out coding processing and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data; and the code rate control modules update parameters of the video coding models in the corresponding single-model variable code rate modules in real time by adopting a code rate distribution mode selected by the self-adaptive quantization scale.
Description
Technical Field
The present disclosure relates to the field of digital signal processing technology, and more particularly, to an end-to-end video coding rate adjustment system, method, medium, and apparatus.
Background
Deep learning is continuously broken through on the basis of the traditional computer vision task, and the performance of the video coding task under the same coding configuration exceeds the most advanced traditional video coding standard VVC. But relatively little research is done on rate control models for end-to-end video coding. The current end-to-end video coding models are mainly trained for single code rate points, which makes them unable to achieve smooth code rate adjustment in a single model. Even if an empirical model with strong constraint is introduced in the code rate estimation by the existing code rate control method along with the appearance of a variable code rate model, accurate output code stream control is difficult to realize.
Disclosure of Invention
The invention mainly aims to solve the technical problem that the existing code rate control method is difficult to realize accurate output code stream control in code rate estimation.
To achieve the above technical object, the present disclosure provides an end-to-end video coding rate adjustment system, which includes:
the single-model multi-code rate module is embedded in the video coding model and is used for acquiring image frame data and carrying out coding processing and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data;
and the code rate control modules are used for updating the parameters of the video coding model in the corresponding single-model variable code rate module in real time by adopting a code rate distribution mode selected by the self-adaptive quantization scale.
Further, the single-model variable code rate module is specifically configured to:
code rate adjustment for end-to-end video coding is achieved at the input of the residual/motion decoder by applying a learnable quantization scale map to the output of the residual/motion encoder.
Further, the applying a learnable quantization scale map to the output of the residual/motion encoder specifically comprises:
the method comprises the steps of performing smooth adjustment of training present model code rate on the same model by using 4 different weighing factors lambda to obtain a single model variable code rate module; (lambda) 1 ＝256，λ 2 ＝512，λ 3 ＝1024，λ 4 ＝2048)
Code rate and global introducedQuantization step size Q s Modeling, modeling relationship is as follows:
code rate R:wherein C and K are fitting parameters.
Further, the code rate control module for updating the parameters in real time obtains the configuration parameters of the current code through inter-group code rate allocation and inter-frame code rate allocation, and adjusts the configuration parameters in real time frame by frame so as to realize the code rate control of the parameters in real time.
Further, the inter-group code rate allocation is specifically realized by the following formula:
wherein G is T Target code rate representing current coding group, R picture Representing a target code rate, N, specified before encoding required to encode a frame of video coded Representing video frames that have been encoded, R coded Representing the code rate consumed by the encoded video frames, N representing the number of video frames within the group;
SW represents the size of the sliding window, and SW is set as follows:
total represents the Total amount of video frames within a group.
Further, the inter-frame code rate allocation specifically adopts a code rate allocation mode of self-adaptive quantization scale selection:
when the coding is carried out to the ith frame in the group, determining a required quantization scale according to the consumed code rate in the group, and dynamically adjusting the video coding of each frame;
the dynamic adjustment mode is as follows:
R gop_coded representing the code rate used to encode the current gop, R left Representing the code rate residual of the current gop coding; c (C) i And K i Respectively representing the current fitting parameters of the ith frame in the group.
Further, after finishing the encoding of the current frame, the gradient descent method is used for fitting the parameter C i ，K i Updating and re-estimating parameters, wherein the fitting parameters C i ，K i The update of (2) is expressed as:
wherein delta C And delta K Represent learning rate, bpp real And Bpp estimate The true code rate and the estimated code rate of the current frame are represented for calculating gradients to update parameters.
In order to achieve the above technical purpose, the present disclosure further provides an end-to-end video coding rate adjustment method, which is applied to the above end-to-end video coding rate adjustment system, and includes:
acquiring image frame data by using a single-model variable code rate module and performing coding processing according to the acquired image frame data;
and updating parameters of an end-to-end video coding rate adjustment system in real time by adopting a rate allocation mode selected by a self-adaptive quantization scale.
To achieve the above technical object, the present disclosure also provides a computer storage medium having a computer program stored thereon, which when executed by a processor is configured to implement the steps of the above-described end-to-end video coding rate adjustment method.
In order to achieve the above technical objective, the present disclosure further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and capable of running on the processor, where the processor implements the steps of the above end-to-end video coding rate adjustment method when executing the computer program.
The beneficial effects of the present disclosure are:
the method combines the code rate parameter and the video coding quantization step size parameter to model, realizes an accurate code rate control method, and simultaneously utilizes a deep learning mode to carry out inter-frame code rate allocation to improve coding performance. Firstly, adding a quantization step length control module into a single code rate point model for optimization training to realize adjustable code rate of the single model, then carrying out mathematical modeling on the output code rate and quantization step length parameters, establishing a mapping relation, and finally combining a real-time updated code rate distribution and code rate control algorithm to realize accurate output code rate control. Considering that a fixed quality fluctuation structure exists in a part of end-to-end video coding network, the code rate control algorithm disclosed by the invention adopts a mode of updating control parameters in real time to protect the structure and maintain high-efficiency coding performance.
Drawings
Fig. 1 shows a schematic diagram of an end-to-end video coding rate adjustment system according to a first embodiment of the present disclosure;
fig. 2 shows a schematic diagram of a motion/residual coding module incorporating a variable rate code rate according to a first embodiment of the present disclosure;
FIG. 3 shows a coding quality result display schematic diagram of the present disclosure;
fig. 4 shows a flow diagram of a second embodiment of the present disclosure;
fig. 5 shows a schematic structural diagram of a fourth embodiment of the present disclosure.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
Various structural schematic diagrams according to embodiments of the present disclosure are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated for clarity of presentation and may have been omitted. The shapes of the various regions, layers and relative sizes, positional relationships between them shown in the drawings are merely exemplary, may in practice deviate due to manufacturing tolerances or technical limitations, and one skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions as actually required.
Embodiment one:
as shown in fig. 1 and 2:
the present disclosure provides an end-to-end video coding rate adjustment system, the systemization comprising:
the single-model multi-code rate module is embedded in the video coding model and is used for acquiring image frame data and carrying out coding processing and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data;
and the code rate control modules are used for updating the parameters of the video coding model in the corresponding single-model variable code rate module in real time by adopting a code rate distribution mode selected by the self-adaptive quantization scale.
Further, the single-model variable code rate module is specifically configured to:
code rate adjustment for end-to-end video coding is achieved at the input of the residual/motion decoder by applying a learnable quantization scale map to the output of the residual/motion encoder.
Further, the applying a learnable quantization scale map to the output of the residual/motion encoder specifically comprises:
the method comprises the steps of performing smooth adjustment of training present model code rate on the same model by using 4 different weighing factors lambda to obtain a single model variable code rate module; (lambda) 1 ＝256，λ 2 ＝512，λ 3 ＝1024，λ 4 ＝2048)
Rate and global quantization step size Q introduced s Modeling, modeling relationship is as follows:
code rate R:wherein C and K are fitting parameters.
Further, the code rate control module for updating the parameters in real time obtains the configuration parameters of the current code through inter-group code rate allocation and inter-frame code rate allocation, and adjusts the configuration parameters in real time frame by frame so as to realize the code rate control of the parameters in real time.
Further, the inter-group code rate allocation is specifically realized by the following formula:
wherein G is T Target code rate representing current coding group, R picture Representing a target code rate, N, specified before encoding required to encode a frame of video coded Representing video frames that have been encoded, R coded Representing the code rate consumed by the encoded video frames, N representing the number of video frames within the group;
SW represents the size of the sliding window, and SW is set as follows:
total represents the Total amount of video frames within a group.
Further, the inter-frame code rate allocation specifically adopts a code rate allocation mode of self-adaptive quantization scale selection:
when the coding is carried out to the ith frame in the group, determining a required quantization scale according to the consumed code rate in the group, and dynamically adjusting the video coding of each frame;
the dynamic adjustment mode is as follows:
R gop_coded representing the code rate used to encode the current gop, R left Representing the code rate residual of the current gop coding; c (C) i And K i Respectively representing the current fitting parameters of the ith frame in the group.
Further, after finishing the encoding of the current frame, gradient descent method is usedFor fitting parameter C i ，K i Updating and re-estimating parameters, wherein the fitting parameters C i ，K i The update of (2) is expressed as:
wherein delta C And delta K Represent learning rate, bpp real And Bpp estimate The true code rate and the estimated code rate of the current frame are represented for calculating gradients to update parameters.
The present disclosure tests on the HEVC test set, comparing the coding performance before and after rate control as shown in table 1, the coding time average bit error rate bre= (R target -R)/R target TR represents a comparison of coding times before and after adding the Rate control method, and BD-Rate is used for performance evaluation. The method is superior to the existing code rate control method of all the current end-to-end video coding frames in control accuracy, and the effectiveness of the method is supported.
Table 1 comparison of coding properties
The method combines the code rate parameter and the video coding quantization step size parameter to model, realizes an accurate code rate control method, and simultaneously utilizes a deep learning mode to carry out inter-frame code rate allocation to improve coding performance. Firstly, adding a quantization step length control module into a single code rate point model for optimization training to realize adjustable code rate of the single model, then carrying out mathematical modeling on the output code rate and quantization step length parameters, establishing a mapping relation, and finally combining a real-time updated code rate distribution and code rate control algorithm to realize accurate output code rate control. Considering that a fixed quality fluctuation structure exists in a part of end-to-end video coding network, the code rate control algorithm disclosed by the invention adopts a mode of updating control parameters in real time to protect the structure and maintain high-efficiency coding performance.
Embodiment two:
as shown in fig. 4:
in order to achieve the above technical purpose, the present disclosure further provides an end-to-end video coding rate adjustment method, which is applied to the above end-to-end video coding rate adjustment system, and includes:
s201: acquiring original image frame data by utilizing a single-model multi-code rate module embedded in a video coding model, and performing coding and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data;
s202: and updating parameters of an end-to-end video coding rate adjustment system in real time by adopting a rate allocation mode selected by a self-adaptive quantization scale.
Embodiment III:
the present disclosure can also provide a computer storage medium having stored thereon a computer program for implementing the steps of the end-to-end video coding rate adjustment method described above when the computer program is executed by a processor.
The computer storage media of the present disclosure may be implemented using semiconductor memory, magnetic core memory, drum memory, or magnetic disk memory.
Semiconductor memory devices mainly used for computers mainly include two types, mos and bipolar. The Mos device has high integration level, simple process and slower speed. Bipolar devices have complex processes, high power consumption, low integration, and high speed. After the advent of NMos and CMos, mos memories began to dominate semiconductor memories. NMos is fast, e.g., 1K bit SRAM access time from Intel corporation is 45ns. And the CMos has low power consumption, and the access time of the CMos static memory with 4K bits is 300ns. The semiconductor memories are all Random Access Memories (RAM), i.e. new contents can be read and written randomly during operation. While semiconductor read-only memory (ROM) is randomly readable but not writable during operation and is used to store cured programs and data. ROM is in turn divided into two types, non-rewritable fuse read-only memory-PROM and rewritable read-only memory EPROM.
The magnetic core memory has the characteristics of low cost and high reliability, and has practical use experience of more than 20 years. Core memory has been widely used as main memory before the mid-70 s. Its storage capacity can be up to above 10 bits, and its access time is up to 300ns. The internationally typical core memory capacity is 4 MS-8 MB with access cycles of 1.0-1.5 mus. After the rapid development of semiconductor memory replaces the location of core memory as main memory, core memory can still be applied as mass expansion memory.
A magnetic drum memory, an external memory for magnetic recording. Because of its fast information access speed, it works stably and reliably, and although its capacity is smaller, it is gradually replaced by disk memory, but it is still used as external memory for real-time process control computers and middle and large-sized computers. In order to meet the demands of small-sized and microcomputer, a microminiature magnetic drum has appeared, which has small volume, light weight, high reliability and convenient use.
A magnetic disk memory, an external memory for magnetic recording. It has the advantages of both drum and tape storage, i.e. its storage capacity is greater than that of drum, and its access speed is faster than that of tape storage, and it can be stored off-line, so that magnetic disk is widely used as external memory with large capacity in various computer systems. Magnetic disks are generally classified into hard disks and floppy disk storage.
Hard disk memory is of a wide variety. Structurally, the device is divided into a replaceable type and a fixed type. The replaceable disk platter is replaceable, and the fixed disk platter is fixed. The replaceable and fixed magnetic disks have two types of multi-disc combination and single-disc structure, and can be divided into fixed magnetic head type and movable magnetic head type. The fixed head type magnetic disk has a small capacity, a low recording density, a high access speed, and a high cost. The movable magnetic head type magnetic disk has high recording density (up to 1000-6250 bit/inch) and thus large capacity, but has low access speed compared with the fixed magnetic head magnetic disk. The storage capacity of the disk product may be up to several hundred megabytes with a bit density of 6 bits per inch and a track density of 475 tracks per inch. The disk group of the disk memory can be replaced, so that the disk memory has large capacity, large capacity and high speed, can store large-capacity information data, and is widely applied to an online information retrieval system and a database management system.
Embodiment four:
the present disclosure also provides an electronic device including a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the end-to-end video coding rate adjustment method described above when executing the computer program.
Fig. 5 is a schematic diagram of an internal structure of an electronic device in one embodiment. As shown in fig. 5, the electronic device includes a processor, a storage medium, a memory, and a network interface connected by a system bus. The storage medium of the computer device stores an operating system, a database and computer readable instructions, the database can store a control information sequence, and when the computer readable instructions are executed by a processor, the processor can realize an end-to-end video coding code rate adjustment method. The processor of the electrical device is used to provide computing and control capabilities, supporting the operation of the entire computer device. The memory of the computer device may store computer readable instructions that, when executed by the processor, cause the processor to perform an end-to-end video coding rate adjustment method. The network interface of the computer device is for communicating with a terminal connection. It will be appreciated by those skilled in the art that the structure shown in fig. 5 is merely a block diagram of some of the structures associated with the present application and is not limiting of the computer device to which the present application may be applied, and that a particular computer device may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.
The electronic device includes, but is not limited to, a smart phone, a computer, a tablet computer, a wearable smart device, an artificial smart device, a mobile power supply, and the like.
The processor may in some embodiments be comprised of integrated circuits, for example, a single packaged integrated circuit, or may be comprised of multiple integrated circuits packaged with the same or different functionality, including one or more central processing units (Central Processing unit, CPU), microprocessors, digital processing chips, graphics processors, a combination of various control chips, and the like. The processor is a Control Unit (Control Unit) of the electronic device, connects various components of the entire electronic device using various interfaces and lines, and executes various functions of the electronic device and processes data by running or executing programs or modules stored in the memory (for example, executing remote data read-write programs, etc.), and calling data stored in the memory.
The bus may be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus or an extended industry standard architecture (extended industry standard architecture, EISA) bus, among others. The bus may be classified as an address bus, a data bus, a control bus, etc. The bus is arranged to enable a connection communication between the memory and at least one processor or the like.
Fig. 5 shows only an electronic device with components, and it will be understood by those skilled in the art that the structure shown in fig. 5 is not limiting of the electronic device and may include fewer or more components than shown, or may combine certain components, or a different arrangement of components.
For example, although not shown, the electronic device may further include a power source (such as a battery) for supplying power to the respective components, and preferably, the power source may be logically connected to the at least one processor through a power management device, so that functions of charge management, discharge management, power consumption management, and the like are implemented through the power management device. The power supply may also include one or more of any of a direct current or alternating current power supply, recharging device, power failure detection circuit, power converter or inverter, power status indicator, etc. The electronic device may further include various sensors, bluetooth modules, wi-Fi modules, etc., which are not described herein.
Further, the electronic device may also include a network interface, optionally, the network interface may include a wired interface and/or a wireless interface (e.g., WI-FI interface, bluetooth interface, etc.), typically used to establish a communication connection between the electronic device and other electronic devices.
Optionally, the electronic device may further comprise a user interface, which may be a Display, an input unit, such as a Keyboard (Keyboard), or a standard wired interface, a wireless interface. Alternatively, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, or the like. The display may also be referred to as a display screen or display unit, as appropriate, for displaying information processed in the electronic device and for displaying a visual user interface.
Further, the computer-usable storage medium may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data created from the use of blockchain nodes, and the like.
In the several embodiments provided in the present invention, it should be understood that the disclosed apparatus, device and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be other manners of division when actually implemented.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical units, may be located in one place, or may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units can be realized in a form of hardware or a form of hardware and a form of software functional modules.
The embodiments of the present disclosure are described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be made by those skilled in the art without departing from the scope of the disclosure, and such alternatives and modifications are intended to fall within the scope of the disclosure.
Claims (10)
1. An end-to-end video coding rate adjustment system, comprising:
the single-model multi-code rate module is embedded in the video coding model and is used for acquiring image frame data and carrying out coding processing and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data;
and the code rate control modules are used for updating the parameters of the video coding model in the corresponding single-model variable code rate module in real time by adopting a code rate distribution mode selected by the self-adaptive quantization scale.
2. The system according to claim 1, wherein the single-model variable code rate module is specifically configured to:
code rate adjustment for end-to-end video coding is achieved at the input of the residual/motion decoder by applying a learnable quantization scale map to the output of the residual/motion encoder.
3. The system according to claim 2, wherein said applying a learnable quantization scale map to the output of the residual/motion encoder comprises:
training the same model by using 4 different weighing factors lambda to realize smooth adjustment of the model code rate, so as to obtain a single-model variable code rate module;
code rate and the code rate are matchedIntroduced global quantization step size Q s Modeling, modeling relationship is as follows:
code rate R:wherein C and K are fitting parameters.
4. The system of claim 1, wherein the real-time updated parameter rate control module obtains the currently encoded configuration parameters by inter-group rate allocation and inter-frame rate allocation, and adjusts the configuration parameters in real time frame by frame to realize the real-time updated parameter rate control.
5. The system according to claim 4, wherein the inter-group code rate allocation is specifically implemented by the following formula:
wherein G is T Target code rate representing current coding group, R picture Representing a target code rate, N, specified before encoding required to encode a frame of video coded Representing video frames that have been encoded, R coded Representing the code rate consumed by the encoded video frames, N representing the number of video frames within the group;
SW represents the size of the sliding window, and SW is set as follows:
X＝Total-N coded the method comprises the steps of carrying out a first treatment on the surface of the Total represents the Total amount of video frames within a group.
6. The system according to claim 5, wherein the inter-frame code rate allocation specifically adopts a code rate allocation mode selected by an adaptive quantization scale:
when the coding is carried out to the ith frame in the group, determining a required quantization scale according to the consumed code rate in the group, and dynamically adjusting the video coding of each frame;
the dynamic adjustment mode is as follows:
R gop_coded representing the code rate used to encode the current gop, R left Representing the code rate residual of the current gop coding; c (C) i And K i Respectively representing the current fitting parameters of the ith frame in the group.
7. The system of claim 6, wherein the fitting parameter C is determined using a gradient descent method after the current frame is encoded i ，K i Updating and re-estimating parameters, wherein the fitting parameters C i ，K i The update of (2) is expressed as:
wherein delta C And delta K Represent learning rate, bpp real And Bpp estimate The true code rate and the estimated code rate of the current frame are represented for calculating gradients to update parameters.
8. An end-to-end video coding rate adjustment method applied to an end-to-end video coding rate adjustment system as claimed in any one of claims 1 to 7, comprising:
acquiring original image frame data by utilizing a single-model multi-code rate module embedded in a video coding model, and performing coding and decoding processing according to the acquired image frame data; the encoding process is to quantize and scale the characteristic value of the image frame data, and the decoding process is to restore the characteristic value of the encoded data;
and updating parameters of an end-to-end video coding rate adjustment system in real time by adopting a rate allocation mode selected by a self-adaptive quantization scale.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and operable on the processor, characterized in that an end-to-end video coding rate adjustment system according to any one of claims 1 to 7 is installed, the processor implementing the steps corresponding to the end-to-end video coding rate adjustment method according to claim 8 when the computer program is executed by the processor.
10. A computer storage medium having stored thereon computer program instructions, which when executed by a processor are adapted to carry out the corresponding steps of the end-to-end video coding rate adjustment method as claimed in claim 8.
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