CN117855239A - Photoelectric conversion structure, pixel unit, preparation method of pixel unit and image sensor - Google Patents
Photoelectric conversion structure, pixel unit, preparation method of pixel unit and image sensor Download PDFInfo
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Abstract
The application discloses a photoelectric conversion structure, a pixel unit, a preparation method of the pixel unit and an image sensor, wherein the photoelectric conversion structure comprises a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer which are positioned on the substrate, the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding part, and the first photoelectric conversion layer at least covers the surface of the first protruding part; wherein the doping concentration of the first photoelectric conversion layer is greater than that of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate. According to the embodiment of the application, the first protruding portion in the photoelectric conversion structure is provided with the side wall capacitance, the distribution of the transverse electric field is adjusted, the increase of the capacity of the full well is achieved, and the potential gradient in the vertical direction and the side wall direction is formed, so that the charge transfer efficiency is improved.
Description
Technical Field
The present disclosure relates to the field of image sensing, and in particular, to a photoelectric conversion structure, a pixel unit, a method for manufacturing the pixel unit, and an image sensor.
Background
The CMOS image sensor (CMOS Imager Sensor, CIS) has wide application in the fields of smart phones and the like due to the advantages of small volume, low power consumption and the like, as the demand of the mobile phone market for the high-resolution CMOS image sensor increases, the pixel size is reduced to a submicron pixel interval, and the full-well capacity (Full Well Capacity, FWC) is a key characteristic parameter of the submicron pixels. The image sensor requires a photoelectric conversion element with high full-well capacity, however, the full-well capacity of the CMOS image sensor of the conventional planar structure is difficult to be effectively improved due to the pixel size and transmission.
In the prior art, the full-well capacity is improved by increasing the concentration and depth of the N-type photoelectric conversion layer to enlarge the depletion region volume. The concentration of the N-type photoelectric conversion layer cannot be continuously increased due to the limitation of the supply of the reverse bias voltage, so that the full-well capacity cannot be effectively improved, and the depth of the N-type photoelectric conversion layer is increased to lower the charge transmission efficiency due to the lack of charge driving inside the photoelectric conversion element.
Disclosure of Invention
The application provides a photoelectric conversion structure, a pixel unit, a preparation method of the pixel unit and an image sensor, which are used for improving charge transmission efficiency.
In a first aspect, the present application provides a photoelectric conversion structure, including:
a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer on the substrate, wherein the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding part, and the first photoelectric conversion layer at least covers the surface of the first protruding part;
wherein the doping concentration of the first photoelectric conversion layer is greater than the doping concentration of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate.
In one possible implementation, the surface of the substrate has a second protruding portion, and the second photoelectric conversion layer covers at least the surface of the second protruding portion.
In one possible implementation, the height of the first protrusion is less than the height of the second protrusion.
In one possible implementation, the size of the orthographic projection of the first protrusion on the substrate surface is larger than the size of the orthographic projection of the second protrusion on the substrate surface.
In one possible implementation, the cross-sectional profile of the first protrusion is circular or polygonal, and the cross-sectional profile of the second protrusion is rectangular or cross-shaped.
In one possible implementation manner, the photoelectric conversion structure further includes a third photoelectric conversion layer located on the first photoelectric conversion layer, the first photoelectric conversion layer includes a third protruding portion, the third photoelectric conversion layer covers at least a surface of the third protruding portion, and doping concentrations of the third photoelectric conversion layer, the first photoelectric conversion layer, and the second photoelectric conversion layer sequentially decrease.
In one possible implementation, the height of the third protrusion is smaller than the height of the first protrusion.
In one possible implementation, the size of the orthographic projection of the third protrusion on the substrate surface is larger than the size of the orthographic projection of the first protrusion on the substrate surface.
In a second aspect, the present application provides a pixel unit, including: the photoelectric conversion structure as claimed in any one of the first aspects;
and the isolation layer at least covers the top surface and the side surface of the first photoelectric conversion layer and covers the side surface of the second photoelectric conversion layer.
In one possible implementation, the doping type of the isolation layer is the same as the doping type of the substrate, and the doping concentration of the isolation layer is greater than the doping concentration of the substrate.
In one possible implementation, the pixel cell further includes a transfer transistor and a floating diffusion region on the isolation layer, the transfer transistor including any one of a planar transistor, a fin transistor, and a vertical transistor.
In one possible implementation manner, the pixel unit includes a vertical transistor located on the isolation layer, where the vertical transistor includes a semiconductor layer and a transmission gate, one end of the semiconductor layer is connected to the photoelectric conversion structure, the other end of the semiconductor layer is connected to the floating diffusion region, and the transmission gate surrounds the semiconductor layer.
In a third aspect, the present application provides an image sensor comprising a plurality of pixel units according to any one of the second aspects arranged in an array.
In a fourth aspect, the present application provides a method for manufacturing a pixel unit, including:
providing a substrate;
forming a photoelectric conversion structure over the substrate, the photoelectric conversion structure including at least a first photoelectric conversion layer and a second photoelectric conversion layer, the first photoelectric conversion layer being located over the second photoelectric conversion layer, the second photoelectric conversion layer including a first protruding portion, and the first photoelectric conversion layer covering at least a surface of the first protruding portion; wherein the doping concentration of the first photoelectric conversion layer is greater than the doping concentration of the second photoelectric conversion layer; the doping types of the first photoelectric conversion layer and the second photoelectric conversion layer are the same and different from the doping type of the substrate;
and forming an isolation layer over the photoelectric conversion structure, wherein the isolation layer at least covers the top surface and the side surface of the first photoelectric conversion layer and covers the side surface of the second photoelectric conversion layer, and the doping type of the isolation layer is the same as that of the substrate.
The beneficial effects of the application are as follows:
the photoelectric conversion structure comprises a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer which are positioned on the substrate, wherein the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding portion, and the first photoelectric conversion layer at least covers the surface of the first protruding portion; wherein the doping concentration of the first photoelectric conversion layer is greater than that of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate. According to the embodiment of the application, the first protruding portion in the photoelectric conversion structure is provided with the side wall capacitance, the distribution of the transverse electric field is adjusted, the increase of the capacity of the full well is achieved, and the potential gradient in the vertical direction and the side wall direction is formed, so that the charge transfer efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a CMOS image sensor according to the related art;
fig. 2 is a cross-sectional view of a photoelectric conversion structure according to an embodiment of the present disclosure;
fig. 3 is a cross-sectional view of another photoelectric conversion structure according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a height comparison of a first boss and a second boss provided in an embodiment of the present application;
fig. 5 is a cross-sectional view of another photoelectric conversion structure according to an embodiment of the present disclosure;
FIG. 6 (a) is a schematic diagram of a height comparison of a first boss and a third boss provided in an embodiment of the present application;
FIG. 6 (b) is a schematic diagram of a height comparison of a first boss and a third boss provided in an embodiment of the present application;
fig. 7 is a cross-sectional view of a pixel unit according to an embodiment of the present disclosure;
fig. 8 (a) is a cross-sectional view of a pixel unit provided in the related art;
FIG. 8 (b) is a cross-sectional view of another pixel cell according to an embodiment of the present application;
FIG. 8 (c) is a schematic diagram of a potential gradient change in a first direction provided in an embodiment of the present application;
FIG. 8 (d) is a schematic diagram of a potential gradient change in a second direction provided in an embodiment of the present application;
fig. 9 (a) is a schematic cross-sectional view of the photoelectric conversion structure AA' according to an embodiment of the present application;
fig. 9 (b) is another schematic cross-sectional view of the photoelectric conversion structure AA' according to an embodiment of the present application;
fig. 9 (c) is another schematic cross-sectional view of the photoelectric conversion structure AA' according to an embodiment of the present application;
fig. 9 (d) is a schematic cross-sectional view of BB' in the photoelectric conversion structure according to the embodiment of the present application;
fig. 9 (e) is another schematic cross-sectional view of BB' in the photoelectric conversion structure according to the embodiment of the present application;
fig. 10 (a) is a cross-sectional view of a pixel unit of a planar transistor according to an embodiment of the present application;
fig. 10 (b) is a cross-sectional view of a pixel unit of a vertical transistor according to an embodiment of the present application;
fig. 10 (c) is a cross-sectional view of a pixel unit of another vertical transistor according to an embodiment of the present application;
FIG. 11 (a) is a cross-sectional view of another pixel unit according to an embodiment of the present disclosure;
fig. 11 (b) is a schematic diagram of a PD layer of a top view of a pixel unit according to an embodiment of the present application;
fig. 11 (c) is a schematic diagram of a pixel driving layer of a top view of a pixel unit according to an embodiment of the present application;
fig. 12 is a schematic flow chart of a method for manufacturing a pixel unit according to an embodiment of the present application;
drawing number marks: 201-a substrate; 202-a second photoelectric conversion layer; 203-a first photoelectric conversion layer; 204-a first lobe; 301-a second boss; 701-a third photoelectric conversion layer; 702-a third lobe; 901-isolating layer; 902-a pass transistor; 903—floating diffusion region; 1101-semiconductor layer; 1102-transfer gate.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present application, the following description will be given in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.
The CMOS image sensor has wide application in the fields of smart phones and the like due to the advantages of small volume, low power consumption and the like, and as the demand of the mobile phone market for the high-resolution CMOS image sensor increases, the pixel size is reduced to a submicron pixel interval, and FWC is a key characteristic parameter of submicron pixels. Wherein,
wherein q is the electron charge quantity,the junction capacitance of the photodiode, vreset, is a reset voltage, vmax is a maximum voltage, and V is a voltage across the photoelectric conversion element.
As shown in fig. 1, a schematic structure diagram of a CMOS image sensor provided in the related art is provided, wherein a photoelectric conversion element is composed of p+, N and P-, STI is a shallow trench isolation structure, TG is a transfer gate of a transfer transistor, and FD is a floating diffusion region. In the related art, in order to obtain a photoelectric conversion element of high full well capacity, a CMOS image sensor enlarges the depletion region volume by increasing the concentration and depth of an N-type photoelectric conversion layer. However, the concentration of the N-type photoelectric conversion layer cannot be fully depleted and cannot be continuously increased due to the supply limitation limited by the reverse bias voltage, and the charge transfer efficiency is low due to lack of charge driving in the lateral and longitudinal directions inside the photoelectric conversion element. Therefore, the full well capacity of the CMOS image sensor of the conventional planar structure is difficult to be effectively improved.
Based on the above-described problems, an embodiment of the present application provides a photoelectric conversion structure, as shown in fig. 2, including:
a substrate 201, and a first photoelectric conversion layer 203 and a second photoelectric conversion layer 202 on the substrate 201, the first photoelectric conversion layer 203 being located above the second photoelectric conversion layer 202, the second photoelectric conversion layer 202 including a first convex portion 204, and the first photoelectric conversion layer 203 covering at least a surface of the first convex portion 204;
wherein, the doping concentration of the first photoelectric conversion layer 203 is greater than the doping concentration of the second photoelectric conversion layer 202; the doping type of the first photoelectric conversion layer 203 and the second photoelectric conversion layer 202 is the same and different from that of the substrate 201.
The doping type of the first photoelectric conversion layer 203 and the second photoelectric conversion layer 202 is N-type ions, and the doping type of the substrate 201 is P-type ions.
In the embodiment of the application, the photoelectric conversion structure comprises a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer which are positioned on the substrate, wherein the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding part, and the first photoelectric conversion layer at least covers the surface of the first protruding part; wherein the doping concentration of the first photoelectric conversion layer is greater than that of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate. According to the embodiment of the application, the first protruding portion in the photoelectric conversion structure is provided with the side wall capacitance, the distribution of the transverse electric field is adjusted, the increase of the capacity of the full well is achieved, and the potential gradient in the vertical direction and the side wall direction is formed, so that the charge transfer efficiency is improved.
In one embodiment, as shown in fig. 3, a cross-sectional view of another photoelectric conversion structure according to an embodiment of the present application is provided.
The surface of the substrate 201 has a second convex portion 301, and the second photoelectric conversion layer 202 covers at least the surface of the second convex portion 301.
In a specific embodiment, electrons generated after the second photoelectric conversion layer 202 is sensitized rise to the first photoelectric conversion layer 203, and because the middle potential of the photoelectric conversion structure is high, electrons are difficult to be led out, and the second protruding portion 301 is arranged on the upper surface of the substrate 201, the capacitance value of the side wall of the photoelectric conversion structure can be increased, the capacity of the full well is increased, and meanwhile, the photoelectric conversion structure forms charge transmission paths distributed in the second protruding portion 301, so that the charge transmission efficiency is improved.
As shown in fig. 4, in order to provide a schematic diagram of comparing the heights of the first protruding portion 204 and the second protruding portion 301 according to the embodiment of the present application, the height h1 of the first protruding portion 204 is smaller than the height h2 of the second protruding portion 301.
In this embodiment, the height h1 of the first protruding portion 204 is smaller than the height h2 of the second protruding portion 301, which is favorable for forming a potential gradient, promoting the effective transfer of charges, and avoiding the occurrence of image tailing.
In addition, the dimension of the orthographic projection of the first protrusion 204 on the surface of the substrate 201 is greater than the dimension of the orthographic projection of the second protrusion 301 on the surface of the substrate 201.
In this embodiment of the present application, the orthographic projection of the first protruding portion 204 on the surface of the substrate 201, that is, the cross-sectional area of the first protruding portion 204, the orthographic projection of the second protruding portion 301 on the surface of the substrate 201, that is, the cross-sectional area of the second protruding portion 301, the cross-sectional area of the first protruding portion 204 is greater than the cross-sectional area of the second protruding portion 301, so that occupation of an effective photoelectric conversion area can be avoided, and full well capacity is ensured.
In an alternative embodiment, as shown in fig. 5, which is a cross-sectional view of another photoelectric conversion structure provided in the embodiment of the present application, the photoelectric conversion structure further includes a third photoelectric conversion layer 701 disposed on the first photoelectric conversion layer 203, the first photoelectric conversion layer 203 includes a third protrusion 702, the third photoelectric conversion layer 701 covers at least a surface of the third protrusion 702, and doping concentrations of the third photoelectric conversion layer 701, the first photoelectric conversion layer 203, and the second photoelectric conversion layer 202 sequentially decrease in a direction from the third photoelectric conversion layer 701 toward the substrate 201.
Wherein the doping type of the third photoelectric conversion layer 701, the first photoelectric conversion layer 203, and the second photoelectric conversion layer 202 is N-type ions.
In this embodiment, the third protruding portion 702 is disposed on the upper surface of the first photoelectric conversion layer 203, so as to increase the capacitance value of the side wall of the photoelectric conversion structure, increase the capacity of the full well, and meanwhile, the photoelectric conversion structure forms the charge transmission paths distributed in the third protruding portion 702, thereby improving the charge transmission efficiency.
In one possible implementation, as shown in fig. 6 (a), a schematic diagram is provided for comparing the heights of the first boss 204 and the third boss 702 in the embodiment of the present application, where the height h3 of the third boss 702 is smaller than the height h1 of the first boss 204. And, the height h3 of the third boss 702 is smaller than the height h2 of the second boss.
In another possible implementation, as shown in fig. 6 (b), a schematic diagram is provided for comparing the heights of the first boss 204 and the third boss 702 in the embodiment of the present application, where the height h3 of the third boss 702 is equal to the height h1 of the first boss 204, and the height h3 of the third boss 702 is smaller than the height h2 of the second boss.
Furthermore, in one possible embodiment, the size of the orthographic projection of third lobe 702 on the surface of substrate 201 is greater than the size of the orthographic projection of first lobe 204 on the surface of substrate 201, and the size of the orthographic projection of third lobe 702 on the surface of substrate 201 is greater than the size of the orthographic projection of second lobe 301 on the surface of substrate 201.
In another possible embodiment, the size of the orthographic projection of third lobe 702 on the surface of substrate 201 is equal to the size of the orthographic projection of first lobe 204 on the surface of substrate 201, and the size of the orthographic projection of third lobe 702 on the surface of substrate 201 is greater than the size of the orthographic projection of second lobe 301 on the surface of substrate 201.
In a specific embodiment, the height h1 of the first protruding portion 204 is greater than the height h3 of the third protruding portion 702, which is beneficial to forming a potential gradient, promoting efficient transfer of charges, and avoiding image tailing. The cross-sectional area of the first protruding portion 204 is smaller than that of the third protruding portion 702, so that occupation of an effective photoelectric conversion region can be avoided, and full well capacity can be ensured.
Based on the same conception, the embodiment of the application also provides a pixel unit, which comprises any one of the above photoelectric conversion structures, and the principle of solving the problem of the pixel unit is similar to that of the photoelectric conversion structure, and the implementation of the pixel unit can be referred to the implementation of the photoelectric conversion structure, and the repetition is omitted.
As shown in fig. 7, a cross-sectional view of a pixel unit according to an embodiment of the present application is provided, where the pixel unit includes any one of the above-mentioned photoelectric conversion structures, and an isolation layer 901;
the isolation layer 901 covers at least the top and side surfaces of the first photoelectric conversion layer 203 and the side surface of the second photoelectric conversion layer 202.
The doping type of the isolation layer 901 is the same as that of the substrate 201, and is P-type ion, and the doping concentration of the isolation layer 901 is greater than that of the substrate 201.
The pixel unit further includes a transfer Transistor (TG) 902 and a floating diffusion region (FD) 903 on the isolation layer 901, where the transfer transistor TG includes any one of a planar transistor, a fin transistor, and a vertical transistor.
In an alternative embodiment, as shown in fig. 8 (a), a cross-sectional view of a pixel unit provided for the related art; as shown in fig. 8 (b), in the cross-sectional view of a pixel unit according to the embodiment of the present application, the photoelectric conversion structure in the pixel unit shown in fig. 8 (a) is a planar structure, and the photoelectric conversion structure in the pixel unit shown in fig. 8 (b) increases the sidewall capacitance by adding the first bump 204 and the second bump 301, so that the charge is changed from planar accumulation to sidewall expansion, and the full well capacity is increased. Where AA 'is the cross-sectional line of the first lobe 204 and BB' is the cross-sectional line of the second lobe 301.
As shown in fig. 8 (c), a schematic diagram of a potential gradient change in a first direction provided in the embodiment of the present application is shown, in fig. 8 (c), an abscissa represents a first direction x1, an ordinate represents a potential y, a dotted line represents a potential gradient change in the first direction x1 of the related art, and a solid line represents a potential gradient change in the first direction x1 after the sidewall electric field strength and the sidewall capacitance are increased, which is provided in the embodiment of the present application, by adding the first bump 204 and the second bump 301, the sidewall capacitance of the photoelectric conversion element is increased, so that a depletion region is expanded, thereby increasing a full well capacity.
As shown in fig. 8 (d), which is a schematic diagram of the change of the potential gradient in the second direction provided in the embodiment of the present application, in fig. 8 (d), the abscissa represents the second direction x2, that is, the depth, reflecting the charge transmission path, the ordinate represents the potential y, the broken line is the change of the potential gradient in the second direction x2 of the related art, and the solid line is the change of the potential gradient in the second direction x2 of the present application. In the embodiment of the application, by adding the first protruding portion 204 and the second protruding portion 301, the transfer potential gradient of the charges inside the photoelectric conversion element in the vertical direction is enlarged, the charge transfer paths distributed in the first protruding portion 204 and the second protruding portion 301 are formed, and the charge transfer efficiency of the photoelectric conversion element is improved.
Wherein the first direction x1 and the second direction x2 are perpendicular.
In one embodiment, the cross-sectional profile of the first boss 204 is circular or polygonal, and the cross-sectional profile of the second boss 301 is rectangular or cross-shaped.
The cross-section shown in fig. 9 (a), 9 (b) and 9 (c) is the AA' cross-section in the cross-sectional view provided in the embodiment of the present application in fig. 8 (b). In a specific embodiment, as shown in fig. 9 (a), the cross-sectional profile of the first protruding portion 204 is circular, and as shown in fig. 9 (b) and 9 (c), the cross-sectional profile of the first protruding portion 204 is polygonal.
As shown in fig. 9 (d), the cross section of the second protruding portion 301 is rectangular, as shown in fig. 9 (e), the cross section of the second protruding portion 301 is cross-shaped, and the cross sections shown in fig. 9 (d) and 9 (e) are the cross sections at BB' in the cross section provided in the embodiment of the present application in fig. 8 (b).
As shown in fig. 10 (a), a cross-sectional view of a pixel unit of a planar transistor according to an embodiment of the present application is shown, where in the pixel unit shown in fig. 10 (a), the transfer transistor is a planar transistor, and in addition, a first side surface of a first photoelectric conversion layer 203 and a first side surface of a second photoelectric conversion layer 202 and a first side surface of a substrate 201 in the pixel unit are located on the same vertical line, a second side surface of the first photoelectric conversion layer 203 and a second side surface of the second photoelectric conversion layer 202 are located on different vertical lines, and a second side surface of the second photoelectric conversion layer 202 and a second side surface of the substrate 201 are located on the same vertical line;
as shown in fig. 10 (b), a cross-sectional view of a pixel unit of a vertical transistor according to an embodiment of the present application is shown in fig. 10 (b), where the transmission transistor is a vertical transistor, and in addition, a first side surface of a first photoelectric conversion layer 203 and a first side surface of a second photoelectric conversion layer 202 in the pixel unit are located on the same vertical line, and a second side surface of the first photoelectric conversion layer 203 and a second side surface of the second photoelectric conversion layer 202 and a second side surface of the substrate 201 are located on the same vertical line;
as shown in fig. 10 (c), a cross-sectional view of a pixel unit of another vertical transistor provided in this embodiment of the present application is shown, in the pixel unit shown in fig. 10 (c), the transmission transistor is a vertical transistor, in addition, the first side surface of the first photoelectric conversion layer 203 and the first side surface of the second photoelectric conversion layer 202 in the pixel unit are located on the same vertical line, the second side surface of the first photoelectric conversion layer 203 and the second side surface of the second photoelectric conversion layer 202 are located on different vertical lines, and the second side surface of the second photoelectric conversion layer 202 and the second side surface of the substrate 201 are located on the same vertical line.
In one embodiment, as shown in fig. 11 (a), a cross-sectional view of another pixel unit provided in this embodiment of the present application, the pixel unit includes a vertical transistor located on an isolation layer 901, where the vertical transistor includes a semiconductor layer 1101 and a transmission gate 1102, one end of the semiconductor layer 1101 is connected to the photoelectric conversion structure, one end of the semiconductor layer 1101 is directly connected to the first photoelectric conversion layer 203 in this embodiment, the other end of the semiconductor layer 1101 is connected to a floating diffusion FD, and the transmission gate 1102 surrounds the semiconductor layer 1101. A gate dielectric layer is further disposed between the transfer gate 1102 and the semiconductor layer 1101, and the gate dielectric layer includes a gate oxide layer, such as silicon dioxide. In another embodiment, the photoelectric conversion structure includes the first photoelectric conversion layer 203, the second photoelectric conversion layer 202, and the third photoelectric conversion layer 701, and one end of the semiconductor layer 1101 is directly connected to the third photoelectric conversion layer 701 located at the topmost layer.
In a specific embodiment, one end of the semiconductor layer 1101 is connected to the first photoelectric conversion layer 203, and the other end is connected to the floating diffusion FD, so that the space occupation inside the pixel unit can be reduced; the transmission gate 1102 surrounds the semiconductor layer 1101, so that the occupied area of the transmission gate 1102 can be reduced, which is beneficial to the miniaturization of pixels and increases the freedom of pixel design.
As shown in fig. 11 (b), a schematic diagram of a PD layer of a top view of a pixel unit according to an embodiment of the present application is shown, where a transmission gate TG and a floating diffusion FD are disposed on the same cross section, so as to separate a pixel driving layer from a photoelectric conversion element PD layer, reduce occupation of an internal space of the photoelectric conversion element, implement a better analog circuit optimization effect, and implement an effect of a "double-layer transistor" in which the pixel driving layer and the photoelectric conversion element PD layer are separated on the same wafer.
As shown in fig. 11 (c), the pixel driving layer, which is a top view of a pixel unit according to an embodiment of the present application, includes a reset transistor RST, a source follower SF, a row selection transistor SEL, and a floating diffusion FD; the transmission transistor TG and the floating diffusion FD are arranged on the same cross section, and the pixel driving layer and the photoelectric conversion element PD layer are separated, so that free design of the floating diffusion FD is facilitated, the design thought of sharing the floating diffusion FD is not needed for saving area, and the gain and noise of each pixel can be controlled independently.
Based on the same conception, the embodiment of the application also provides an image sensor, which comprises a plurality of pixel units arranged in an array, wherein the principle of solving the problem of the image sensor is similar to that of the pixel units, the implementation of the image sensor can be referred to the implementation of the pixel units, and the repetition is omitted.
It should be noted that, the image sensor provided in the embodiments of the present application may be a CMOS image sensor.
Based on the same conception, the embodiment of the application also provides a preparation method of the pixel unit, the principle of the preparation method of the pixel unit is similar to that of the pixel unit, and the repetition is omitted.
Fig. 12 is a flowchart of a method for manufacturing a pixel unit according to the present application.
S1201, providing a substrate;
s1202, forming a photoelectric conversion structure above a substrate, wherein the photoelectric conversion structure at least comprises a first photoelectric conversion layer and a second photoelectric conversion layer, the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding part, and the first photoelectric conversion layer at least covers the surface of the first protruding part; wherein the doping concentration of the first photoelectric conversion layer is greater than that of the second photoelectric conversion layer; the doping types of the first photoelectric conversion layer and the second photoelectric conversion layer are the same and different from the doping type of the substrate;
s1203 forms an isolation layer over the photoelectric conversion structure, the isolation layer covering at least the top surface and the side surface of the first photoelectric conversion layer and covering the side surface of the second photoelectric conversion layer, and the doping type of the isolation layer is the same as the doping type of the substrate.
In one possible implementation, the surface of the substrate has a second protruding portion, and the second photoelectric conversion layer covers at least the surface of the second protruding portion.
In one possible implementation, the height of the first protrusion is less than the height of the second protrusion.
In one possible implementation, the size of the orthographic projection of the first protrusion on the substrate surface is larger than the size of the orthographic projection of the second protrusion on the substrate surface.
In one possible implementation, the cross-sectional profile of the first protrusion is circular or polygonal, and the cross-sectional profile of the second protrusion is rectangular or cross-shaped.
In one possible implementation manner, the photoelectric conversion structure further includes a third photoelectric conversion layer located on the first photoelectric conversion layer, the first photoelectric conversion layer includes a third protruding portion, the third photoelectric conversion layer covers at least a surface of the third protruding portion, and doping concentrations of the third photoelectric conversion layer, the first photoelectric conversion layer, and the second photoelectric conversion layer sequentially decrease.
In one possible implementation, the height of the third protrusion is smaller than the height of the first protrusion.
In one possible implementation, the size of the orthographic projection of the third protrusion on the substrate surface is larger than the size of the orthographic projection of the first protrusion on the substrate surface.
In one possible implementation, the pixel cell further includes a transfer transistor and a floating diffusion region on the isolation layer, the transfer transistor including any one of a planar transistor, a fin transistor, and a vertical transistor.
In one possible implementation manner, the pixel unit includes a vertical transistor located on the isolation layer, where the vertical transistor includes a semiconductor layer, one end of which is connected to the first photoelectric conversion layer, and a transfer gate, and the other end of which is connected to the floating diffusion region, and the transfer gate surrounds the semiconductor layer.
The photoelectric conversion structure comprises a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer which are positioned on the substrate, wherein the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding portion, and the first photoelectric conversion layer at least covers the surface of the first protruding portion; wherein the doping concentration of the first photoelectric conversion layer is greater than that of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate. According to the embodiment of the application, the first protruding portion and the second protruding portion in the photoelectric conversion structure are used for increasing the side wall capacitance, adjusting the distribution of the transverse electric field, increasing the capacity of the full trap, forming the ion gradient in the vertical direction and the side wall direction, and therefore improving the charge transfer efficiency.
The present application is described above with reference to block diagrams and/or flowchart illustrations of methods, apparatus (systems) and/or computer program products according to embodiments of the application. It will be understood that one block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, and/or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
Accordingly, the present application may also be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.). Still further, the present application may take the form of a computer program product on a computer-usable or computer-readable storage medium having computer-usable or computer-readable program code embodied in the medium for use by or in connection with an instruction execution system. In the context of this application, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims and the equivalents thereof, the present application is intended to cover such modifications and variations.
Claims (14)
1. A photoelectric conversion structure, characterized by comprising:
a substrate, and a first photoelectric conversion layer and a second photoelectric conversion layer on the substrate, wherein the first photoelectric conversion layer is positioned above the second photoelectric conversion layer, the second photoelectric conversion layer comprises a first protruding part, and the first photoelectric conversion layer at least covers the surface of the first protruding part;
wherein the doping concentration of the first photoelectric conversion layer is greater than the doping concentration of the second photoelectric conversion layer; the doping type of the first photoelectric conversion layer and the second photoelectric conversion layer is the same and different from the doping type of the substrate.
2. The photoelectric conversion structure according to claim 1, wherein a surface of the substrate has a second convex portion, and the second photoelectric conversion layer covers at least a surface of the second convex portion.
3. The photoelectric conversion structure according to claim 2, wherein a height of the first protruding portion is smaller than a height of the second protruding portion.
4. The photoelectric conversion structure according to claim 2, wherein a size of an orthographic projection of the first convex portion on the substrate surface is larger than a size of an orthographic projection of the second convex portion on the substrate surface.
5. The photoelectric conversion structure according to any one of claims 2 to 4, wherein a cross-sectional profile of the first protruding portion is circular or polygonal, and a cross-sectional profile of the second protruding portion is rectangular or cross-shaped.
6. The photoelectric conversion structure according to any one of claims 2 to 4, further comprising a third photoelectric conversion layer on the first photoelectric conversion layer, the first photoelectric conversion layer including a third convex portion, the third photoelectric conversion layer covering at least a surface of the third convex portion, doping concentrations of the third photoelectric conversion layer, the first photoelectric conversion layer, and the second photoelectric conversion layer decreasing in order.
7. The photoelectric conversion structure according to claim 6, wherein a height of the third protruding portion is smaller than a height of the first protruding portion.
8. The photoelectric conversion structure according to claim 6, wherein a size of an orthographic projection of the third convex portion on the substrate surface is larger than a size of an orthographic projection of the first convex portion on the substrate surface.
9. A pixel cell, comprising: the photoelectric conversion structure according to any one of claims 1 to 8;
and the isolation layer at least covers the top surface and the side surface of the first photoelectric conversion layer and covers the side surface of the second photoelectric conversion layer.
10. The pixel cell of claim 9, wherein the spacer layer has a doping type that is the same as a doping type of the substrate and a doping concentration that is greater than the doping concentration of the substrate.
11. The pixel cell of claim 9, further comprising a transfer transistor and a floating diffusion region on the isolation layer, the transfer transistor comprising any one of a planar transistor, a fin transistor, a vertical transistor.
12. The pixel cell of claim 11, wherein the pixel cell comprises a vertical transistor on the isolation layer, the vertical transistor comprising a semiconductor layer having one end connected to the photoelectric conversion structure and the other end connected to the floating diffusion region, and a transfer gate surrounding the semiconductor layer.
13. An image sensor comprising a plurality of pixel units according to any one of claims 9 to 12 arranged in an array.
14. A method for manufacturing a pixel cell, comprising:
providing a substrate;
forming a photoelectric conversion structure over the substrate, the photoelectric conversion structure including at least a first photoelectric conversion layer and a second photoelectric conversion layer, the first photoelectric conversion layer being located over the second photoelectric conversion layer, the second photoelectric conversion layer including a first protruding portion, and the first photoelectric conversion layer covering at least a surface of the first protruding portion; wherein the doping concentration of the first photoelectric conversion layer is greater than the doping concentration of the second photoelectric conversion layer; the doping types of the first photoelectric conversion layer and the second photoelectric conversion layer are the same and different from the doping type of the substrate;
and forming an isolation layer over the photoelectric conversion structure, wherein the isolation layer at least covers the top surface and the side surface of the first photoelectric conversion layer and covers the side surface of the second photoelectric conversion layer, and the doping type of the isolation layer is the same as that of the substrate.
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