CN117852660A - Construction method and device of variable component sub-circuit, medium and electronic device - Google Patents
Construction method and device of variable component sub-circuit, medium and electronic device Download PDFInfo
- Publication number
- CN117852660A CN117852660A CN202211220359.0A CN202211220359A CN117852660A CN 117852660 A CN117852660 A CN 117852660A CN 202211220359 A CN202211220359 A CN 202211220359A CN 117852660 A CN117852660 A CN 117852660A
- Authority
- CN
- China
- Prior art keywords
- quantum
- sub
- module
- circuit module
- logic gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010276 construction Methods 0.000 title claims abstract description 20
- 238000005259 measurement Methods 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000002096 quantum dot Substances 0.000 claims description 34
- 238000004590 computer program Methods 0.000 claims description 15
- 238000010586 diagram Methods 0.000 description 14
- 239000011159 matrix material Substances 0.000 description 14
- 230000006870 function Effects 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 6
- 238000012545 processing Methods 0.000 description 5
- 230000005283 ground state Effects 0.000 description 4
- 239000013598 vector Substances 0.000 description 4
- 238000004422 calculation algorithm Methods 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000013075 data extraction Methods 0.000 description 2
- 230000005610 quantum mechanics Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Logic Circuits (AREA)
Abstract
The invention discloses a construction method and a device of a variable component sub-circuit, wherein the method comprises the following steps: firstly, a group of quantum bits is obtained, a first sub-quantum circuit module for performing data coding operation on quantum states of single quantum bits is constructed by utilizing a first type quantum logic gate, a second sub-quantum circuit module for performing entanglement operation on quantum states of multiple quantum bits is constructed by utilizing a second type quantum logic gate, initial variation parameters are obtained, a third sub-quantum circuit module for optimizing the variation parameters is constructed by utilizing a third type quantum logic gate, and a variation sub-quantum circuit is generated by utilizing the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and a measurement operation module.
Description
Technical Field
The invention belongs to the technical field of quantum computing, and particularly relates to a construction method and device of a variable component sub-circuit, a medium and an electronic device.
Background
The quantum computer is a kind of physical device which performs high-speed mathematical and logical operation, stores and processes quantum information according to the law of quantum mechanics. When a device processes and calculates quantum information and operates on a quantum algorithm, the device is a quantum computer. Quantum computers are a key technology under investigation because of their ability to handle mathematical problems more efficiently than ordinary computers, for example, to accelerate the time to crack RSA keys from hundreds of years to hours.
The conventional variable component quantum eigenvalue solver (Variational Quantum Eigensolver, VQE) can solve matrix eigenvalue and eigenvector by using a classical optimizer, can also be used for solving the ground state and low excitation state of a quantum system, and has wide application prospects in the fields of quantum multi-body physics, quantum chemistry and the like.
The difficulty in solving the complex problem by using the conventional method is that the complexity, the efficiency and the calculation accuracy of the data extraction and data processing process are high, so that how to solve the problem by constructing a variable component sub-circuit becomes a problem to be solved urgently.
Disclosure of Invention
The invention aims to provide a construction method, a device, a medium and an electronic device of a variable component sub-circuit, which are used for solving the defects in the prior art, and improving the efficiency and the calculation accuracy of data extraction and data processing processes and reducing the complexity of data processing by constructing a new variable component sub-circuit.
One embodiment of the present application provides a method for constructing a variable component sub-line, the method comprising:
acquiring a group of quantum bits;
constructing a first sub-quantum circuit module for performing data encoding operation on the quantum state of the single quantum bit by utilizing a first type quantum logic gate;
constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multiple quantum bits by using a second type quantum logic gate;
acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
and generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
Optionally, the initial state of the set of quantum bits is |0>.
Optionally, the first type of quantum logic gate includes: hadamard quantum logic gates and RY quantum logic gates.
Optionally, the first sub-quantum circuit module is composed of Hadamard quantum logic gates and RY quantum logic gates acting on all the quantum bits in sequence.
Optionally, the second type quantum logic gate includes: CNOT gate.
Optionally, the third type of quantum logic gate includes: one or a combination of an RX quantum logic gate, RY quantum logic gate, or RZ quantum logic gate.
Optionally, the generating a variable component sub-line by using the first sub-quantum line module, the second sub-quantum line module, the third sub-quantum line module, and the measurement operation module includes:
combining the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module in sequence to obtain a variable component sub-circuit, or
And combining the first sub-quantum circuit module, a preset number of second sub-quantum circuit modules, a preset number of third sub-quantum circuit modules and a measurement operation module in sequence to obtain a variable component sub-circuit, wherein the preset number is an integer greater than or equal to 2.
Yet another embodiment of the present application provides a construction apparatus of a variable component sub-line, the apparatus including:
the first acquisition module is used for acquiring a group of quantum bits;
the first construction module is used for constructing a first sub-quantum circuit module for executing data coding operation on the quantum state of the single quantum bit by utilizing a first type of quantum logic gate;
the second building module is used for building a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multi-quantum bit by utilizing a second type quantum logic gate;
the third construction module is used for acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
the generation module is used for generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
Optionally, the generating module includes:
a first combining unit for combining the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module in order to obtain a variable component sub-circuit, or
And the second combination unit is used for sequentially combining the first sub-quantum circuit module, a preset number of second sub-quantum circuit modules, a preset number of third sub-quantum circuit modules and a measurement operation module to obtain a variable component sub-circuit, wherein the preset number is an integer greater than or equal to 2.
A further embodiment of the present application provides a storage medium having a computer program stored therein, wherein the computer program is arranged to implement the method of any of the above when run.
Yet another embodiment of the present application provides an electronic device comprising a memory having a computer program stored therein and a processor configured to run the computer program to implement the method described in any of the above.
Compared with the prior art, the method comprises the steps of firstly obtaining a group of quantum bits, constructing a first sub-quantum circuit module for performing data coding operation on the quantum state of single quantum bits by utilizing a first type quantum logic gate, constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of multiple quantum bits by utilizing a second type quantum logic gate, obtaining initial variation parameters, constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate, and generating a variation sub-circuit by utilizing the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and a measurement operation module.
Drawings
Fig. 1 is a hardware block diagram of a computer terminal according to a construction method of a variable component sub-line according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for constructing a variable component sub-line according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an acquired set of quantum bits according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a first sub-quantum circuit module according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a second sub-quantum circuit module according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a third sub-quantum circuit module according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a variable component sub-circuit provided by an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a device for constructing a variable component sub-line according to an embodiment of the present invention.
Detailed Description
The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
The embodiment of the invention firstly provides a construction method of a variable component sub-circuit, which can be applied to electronic equipment such as a computer terminal, in particular to a common computer, a quantum computer and the like.
The following describes the operation of the computer terminal in detail by taking it as an example. Fig. 1 is a hardware block diagram of a computer terminal according to a construction method of a variable component sub-line according to an embodiment of the present invention. As shown in fig. 1, the computer terminal may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 104 for storing data, and optionally, a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the configuration shown in fig. 1 is merely illustrative and is not intended to limit the configuration of the computer terminal described above. For example, the computer terminal may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.
The memory 104 may be used to store software programs and modules of application software, such as program instructions/modules corresponding to the method of constructing the variable component sub-circuits in the embodiments of the present application, and the processor 102 executes the software programs and modules stored in the memory 104, thereby performing various functional applications and data processing, that is, implementing the above-mentioned methods. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the computer terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission means 106 is arranged to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module for communicating with the internet wirelessly.
It should be noted that a real quantum computer is a hybrid structure, which includes two major parts: part of the computers are classical computers and are responsible for performing classical computation and control; the other part is quantum equipment, which is responsible for running quantum programs so as to realize quantum computation. The quantum program is a series of instruction sequences written by a quantum language such as the qlunes language and capable of running on a quantum computer, so that the support of quantum logic gate operation is realized, and finally, quantum computing is realized. Specifically, the quantum program is a series of instruction sequences for operating the quantum logic gate according to a certain time sequence.
In practical applications, quantum computing simulations are often required to verify quantum algorithms, quantum applications, etc., due to the development of quantum device hardware. Quantum computing simulation is a process of realizing simulated operation of a quantum program corresponding to a specific problem by means of a virtual architecture (namely a quantum virtual machine) built by resources of a common computer. In general, it is necessary to construct a quantum program corresponding to a specific problem. The quantum program, namely the program for representing the quantum bit and the evolution thereof written in the classical language, wherein the quantum bit, the quantum logic gate and the like related to quantum computation are all represented by corresponding classical codes.
Quantum circuits, which are one embodiment of quantum programs, also weigh sub-logic circuits, are the most commonly used general quantum computing models, representing circuits that operate on qubits under an abstract concept, the composition of which includes qubits, circuits (timelines), and various quantum logic gates, and finally the results often need to be read out by quantum measurement operations.
Unlike conventional circuits, which are connected by metal lines to carry voltage or current signals, in a quantum circuit, the circuit can be seen as being connected by time, i.e., the state of the qubit naturally evolves over time, as indicated by the hamiltonian operator, during which it is operated until a logic gate is encountered.
One quantum program is corresponding to one total quantum circuit, and the quantum program refers to the total quantum circuit, wherein the total number of quantum bits in the total quantum circuit is the same as the total number of quantum bits of the quantum program. It can be understood that: one quantum program may consist of a quantum circuit, a measurement operation for the quantum bits in the quantum circuit, a register to hold the measurement results, and a control flow node (jump instruction), and one quantum circuit may contain several tens to hundreds or even thousands of quantum logic gate operations. The execution process of the quantum program is a process of executing all quantum logic gates according to a certain time sequence. Note that the timing is the time sequence in which a single quantum logic gate is executed.
It should be noted that in classical computation, the most basic unit is a bit, and the most basic control mode is a logic gate, and the purpose of the control circuit can be achieved by a combination of logic gates. Similarly, the way in which the qubits are handled is a quantum logic gate. Quantum logic gates are used, which are the basis for forming quantum circuits, and include single-bit quantum logic gates, such as Hadamard gates (H gates, hadamard gates), brix gates (X gates), brix-Y gates (Y gates), brix-Z gates (Z gates), RX gates, RY gates, RZ gates, and the like; multi-bit quantum logic gates such as CNOT gates, CR gates, iSWAP gates, toffoli gates, and the like. Quantum logic gates are typically represented using unitary matrices, which are not only in matrix form, but also an operation and transformation. The effect of a general quantum logic gate on a quantum state is calculated by multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.
It will be appreciated by those skilled in the art that in classical computers, the basic unit of information is a bit, one bit having two states, 0 and 1, the most common physical implementation being to represent both states by the level of high and low. In quantum computing, the basic unit of information is a qubit, and one qubit also has two states of 0 and 1, which is marked as |0>And |1>But it can be in an overlapped state of two states of 0 and 1, and can be expressed asWherein a and b are represented by |0>State, |1>Complex numbers of state amplitudes (probability magnitudes), which are not possessed by classical bits. After measurement, the state of the qubit collapses to a definite state (eigenstate, here |0>State, |1>State), where collapse to |0>The probability of (a) is |a| 2 Collapse to |1>The probability of (2) is |b| 2 ，|a| 2 +|b| 2 ＝1，|>Is a dirac symbol.
Quantum states, i.e., states of qubits, generally require the use of a set of orthographically complete basis vector descriptions, the computational basis typically used for which is represented in binary in a quantum algorithm (or weighing subroutine). For example, a group of qubits q0, q1, q2, representing the 0 th, 1 st, and 2 nd qubits, ordered from high order to low order as q2q1q0, the quantum state of the group of qubits being 2 3 The superposition state of the computing groups, 8 computing groups refer to: i000>、|001>、|010>、|011>、|100>、|101>、|110>、|111>Each computation basis corresponds to a qubit, e.g., |000>In states, 000 corresponds to q2q1q0 from high to low. In short, a quantum state is an overlapped state composed of basis vectors, when the probability amplitude of other basis is 0, that is, at one of the determined basis vectors.
In quantum mechanics, all measurable mechanical quantities can be described by a hermite matrix, which is defined as the transposed conjugate of the matrix, i.e. the matrix itself, i.e. there is:such a matrix is commonly referred to as a measurement operator, and non-zero operators each have at least one eigenvalue λ other than 0 and its corresponding eigenvalue |ψ>Satisfy H|psi>＝λ|ψ>If the eigenvalues of the operator H correspond to the energy levels of a certain system, such an operator may also be referred to as Hamiltonian.
From one state |ψ (t=0) according to the schrodinger equation>Start to evolve to another state |ψ (t=t)>Is done with unitary operators, i.e., U (0, t) |ψ (t=0)>＝|ψ(t＝T)>Wherein, the relationship between the hamiltonian and the unitary operator is that if a quantum state naturally evolves under a certain system, and describes the energy of the system, namely, the hamiltonian, the unitary operator can be written by the hamiltonian:
when the system starts from time 0 and the hamiltonian does not change with time, the unitary operator, i.e., u=exp #, isiHt). In quantum computing in a closed system, all quantum operations, except for measurements, can be described by a unitary matrix, which is defined as the transposed conjugate of the matrix, i.e., the inverse of the matrix, i.e., there is:in general, unitary operators are also known as quantum logic gates in quantum computing.
Referring to fig. 2, fig. 2 is a schematic flow chart of a method for constructing a variable component sub-line according to an embodiment of the present invention, which may include the following steps:
s201: a set of quantum bits is obtained.
Specifically, in quantum computing, quantum bits are used as quantum information units, and the quantum bits are similar to classical bits, but the quantum characteristics of physical atoms are increased. Physically, a qubit is a quantum state, and therefore, a qubit has the property of a quantum state. Due to the unique quantum properties of the quantum states, qubits have many different features than classical bits, which is one of the fundamental features of quantum information science.
In order to intuitively display the quantum bits and facilitate the understanding of the user, in the quantum computing cloud platform, a group of quantum bits is acquired, and the acquired quantum bits can be represented by a group of parallel timelines.
For example, referring to fig. 3, fig. 3 is a schematic diagram of an acquired set of qubits according to an embodiment of the present invention, where the number of the acquired set of qubits is 9, and the quantum state in front of each timeline represents the initial quantum state of the qubit, which may be, for example, |0> or any other quantum state; the q 0-q 8 before the initial quantum state represents the number of the quantum bit, which is the number 0, the number 1, the number … and the number 8 in turn, and the quantum logic gate on each time line represents that the quantum logic gate acts on the current quantum bit and performs corresponding operations, which are not described in detail later.
S202: and constructing a first sub-quantum circuit module for performing data encoding operation on the quantum state of the single quantum bit by utilizing the first type quantum logic gate.
Specifically, the first type quantum logic gate includes: hadamard quantum logic gates and RY quantum logic gates. The first sub-quantum circuit module consists of a Hadamard quantum logic gate and a RY quantum logic gate which sequentially act on all the quantum bits. Referring to fig. 4, fig. 4 is a schematic diagram of a first sub-quantum circuit module according to an embodiment of the present invention, in which the Hadamard quantum logic gate is a qubit gate capable of changing a ground state into an overlapped state, and acts on a single qubit, and it changes the ground state |0>Becomes intoWill be in the ground state |1>Become->The matrix form of Hadamard quantum logic gates is:
RY quantum logic gate is a rotary quantum logic gate, similar to RY quantum logic gate, there are RX quantum logic gate and RZ quantum logic gate, RX quantum logic gate, RY quantum logic gate and RZ quantum logic gate mean that quantum state is rotated on the Buroche sphere by θ angle around X, Y, Z axis respectively, so RX quantum logic gate and RY quantum logic gate can bring about probability amplitude change, RZ quantum logic gate only phase change. Then, the common use of these three operations enables the quantum state to move freely throughout the bloch sphere. The matrix form of the RY quantum logic gate is:
s203: and constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multi-quantum bit by using the second type quantum logic gate.
Specifically, the second type quantum logic gate includes: a Control-NOT (CNOT) gate is a commonly used two-bit quantum logic gate, which has the following matrix form:
the meaning is that when the control bit is in the state of |0>, the target bit is not changed; when the control bit is in a state of |1>, pauli-X gate (quantum NOT gate) is executed on the target bit, the Pauli-X gate acts on a single quantum bit, which is the quantum equivalence of a NOT gate of a classical computer, the quantum state is turned over, and the quantum state change modes are |0> →|1>, |1> →0>.
In an alternative implementation, referring to fig. 5, fig. 5 is a schematic diagram of a second sub-quantum circuit module according to an embodiment of the present invention, where a quantum bit where a solid dot is located is called a control bit, and the graphThe quantum bit is called as target bit, the entanglement operation is performed on the quantum state of the multiple quantum bit by using the CNOT gate, and the construction of the entanglement state of adjacent quantum bits, the construction of the entanglement state of one quantum bit at intervals, the construction of the entanglement state of two quantum bits at intervals and the like can be sequentially performed from the low quantum bit by using the CNOT gate until all the quantum bits are entangled with each other.
S204: and acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type of quantum logic gate.
Specifically, the third type of quantum logic gate includes: one or a combination of an RX quantum logic gate, RY quantum logic gate, or RZ quantum logic gate.
The initial variation parameter may be obtained according to a preset function, so as to determine the initial variation parameter. The function may be selected according to the actual situation, for example, may be a probability density function or other functions that may obtain a variation parameter. The initial variation parameters may be more than one, and when the initial variation parameters are more than one, they may be acquired separately or simultaneously. The initial value of the variation parameter can be a value selected from the function values of the probability density function at random, or can be a value selected according to a certain rule, and the selected initial value is assigned to the variation parameter.
It should be noted that there are many methods for optimizing the variation parameter, for example, the method may be to obtain a new variation parameter to replace the value of the variation parameter in the current module; or constructing a quantum circuit with the same structure as the third sub-quantum circuit module by using the new variation parameters, and inserting the quantum circuit into the variation sub-quantum circuit, which is not limited herein.
Referring to fig. 6, fig. 6 is a schematic diagram of a third sub-quantum circuit module according to an embodiment of the present invention, where the third type of quantum logic gate selects an RY quantum logic gate.
S205: and generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
Specifically, the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module are combined in sequence to obtain a variable component sub-circuit, or the first sub-quantum circuit module, a preset number of second sub-quantum circuit modules, the third sub-quantum circuit module and the measurement operation module are combined in sequence to obtain a variable component sub-circuit, wherein the preset number is an integer greater than or equal to 2.
Referring to fig. 7 for an exemplary, fig. 7 is a schematic diagram of a variable component sub-circuit according to an embodiment of the present invention, in which a measurement operation module is omitted, only the variable component sub-circuits formed by sequentially combining the first sub-quantum circuit module, the second sub-quantum circuit module and the third sub-quantum circuit module are shown. In the figure, a group of quantum circuits with 9 quantum bits are obtained, and the initial states of all the quantum bits are set to be |0>The qubits are numbered q0]-q[8]The first sub-quantum circuit module mainly uses a Hadamard quantum logic gate and an RY quantum logic gate, and firstly uses the Hadamard quantum logic gate to act onInitial state of qubitOn, it is converted into the superimposed state +.>A classical set of data x can then be used i ＝[a 0 、a 0 、…、a 7 、a 8 ]As a quantum logic gate parameter, the form RY (a j ) Where j=0, 1, …,7,8, respectively quantized mapped onto qubits in the superposition state, then operated on by two quantum gates: the CNOT gate and the RY quantum logic gate have the main functions of realizing quantum state entanglement, exchanging and transmitting information among quantum bits, introducing a parameterized RY (theta) gate into a circuit after realizing multi-time cross-quantum bit entanglement, optimizing a variable component sub-circuit by continuously iterating and optimizing a rotation angle parameter theta, and superposing a second sub-circuit module for multiple times according to a circuit structure and task, increasing depth and seeking a better variable component sub-circuit model. Finally, a layer of measurement operation module can be added to decoherence the quantum bit, so as to realize conversion from quantum data to classical data.
Compared with the prior art, the method comprises the steps of firstly obtaining a group of quantum bits, constructing a first sub-quantum circuit module for performing data coding operation on the quantum state of single quantum bits by utilizing a first type quantum logic gate, constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of multiple quantum bits by utilizing a second type quantum logic gate, obtaining initial variation parameters, constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate, and generating a variation sub-circuit by utilizing the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and a measurement operation module.
Referring to fig. 8, fig. 8 is a schematic structural diagram of a construction device of a variable component sub-circuit according to an embodiment of the present invention, which corresponds to the flow shown in fig. 2, and may include:
a first obtaining module 801, configured to obtain a set of measurement sub-bits;
a first building block 802, configured to build a first sub-quantum circuit module that performs a data encoding operation on a quantum state of a single quantum bit using a first type of quantum logic gate;
a second construction module 803, configured to construct a second sub-quantum circuit module that performs entanglement operation on the quantum state of the multiple quantum bits using a second type of quantum logic gate;
a third construction module 804, configured to obtain an initial variation parameter and construct a third sub-quantum circuit module for optimizing the variation parameter by using a third type of quantum logic gate;
and a generating module 805, configured to generate a variable component sub-line by using the first sub-quantum line module, the second sub-quantum line module, the third sub-quantum line module, and the measurement operation module.
Specifically, the generating module includes:
a first combining unit for combining the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module in order to obtain a variable component sub-circuit, or
And the second combination unit is used for sequentially combining the first sub-quantum circuit module, a preset number of second sub-quantum circuit modules, a preset number of third sub-quantum circuit modules and a measurement operation module to obtain a variable component sub-circuit, wherein the preset number is an integer greater than or equal to 2.
Compared with the prior art, the method comprises the steps of firstly obtaining a group of quantum bits, constructing a first sub-quantum circuit module for performing data coding operation on the quantum state of single quantum bits by utilizing a first type quantum logic gate, constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of multiple quantum bits by utilizing a second type quantum logic gate, obtaining initial variation parameters, constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate, and generating a variation sub-circuit by utilizing the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and a measurement operation module.
The embodiment of the invention also provides a storage medium in which a computer program is stored, wherein the computer program is configured to implement the steps of the method embodiment of any one of the above when run.
Specifically, in the present embodiment, the above-described storage medium may be configured to store a computer program for realizing the steps of:
s201: acquiring a group of quantum bits;
s202: constructing a first sub-quantum circuit module for performing data encoding operation on the quantum state of the single quantum bit by utilizing a first type quantum logic gate;
s203: constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multiple quantum bits by using a second type quantum logic gate;
s204: acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
s205: and generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
Specifically, in the present embodiment, the storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
An embodiment of the invention also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to implement the steps of the method embodiment of any of the above.
Specifically, the electronic apparatus may further include a transmission device and an input/output device, where the transmission device is connected to the processor, and the input/output device is connected to the processor.
Specifically, in this embodiment, the above-mentioned processor may be configured to implement the following steps by a computer program:
s201: acquiring a group of quantum bits;
s202: constructing a first sub-quantum circuit module for performing data encoding operation on the quantum state of the single quantum bit by utilizing a first type quantum logic gate;
s203: constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multiple quantum bits by using a second type quantum logic gate;
s204: acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
s205: and generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (10)
1. A method of constructing a variable component sub-line, the method comprising:
acquiring a group of quantum bits;
constructing a first sub-quantum circuit module for performing data encoding operation on the quantum state of the single quantum bit by utilizing a first type quantum logic gate;
constructing a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multiple quantum bits by using a second type quantum logic gate;
acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
and generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
2. The method of claim 1, wherein the initial state of the set of quantum bits is |0>.
3. The method of claim 1, wherein the first type of quantum logic gate comprises: hadamard quantum logic gates and RY quantum logic gates.
4. A method according to claim 3, wherein the first sub-quantum circuit module consists of Hadamard and RY quantum logic gates acting on all the qubits in sequence.
5. The method of claim 1, wherein the second type of quantum logic gate comprises: CNOT gate.
6. The method of claim 1, wherein the third type of quantum logic gate comprises: one or a combination of an RX quantum logic gate, RY quantum logic gate, or RZ quantum logic gate.
7. The method of any of claims 1 to 6, wherein the generating a variable component sub-line using the first sub-quantum line module, the second sub-quantum line module, the third sub-quantum line module, and the measurement operation module comprises:
combining the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module in sequence to obtain a variable component sub-circuit, or
And combining the first sub-quantum circuit module, a preset number of second sub-quantum circuit modules, a preset number of third sub-quantum circuit modules and a measurement operation module in sequence to obtain a variable component sub-circuit, wherein the preset number is an integer greater than or equal to 2.
8. A construction apparatus for a variable component sub-line, the apparatus comprising:
the first acquisition module is used for acquiring a group of quantum bits;
the first construction module is used for constructing a first sub-quantum circuit module for executing data coding operation on the quantum state of the single quantum bit by utilizing a first type of quantum logic gate;
the second building module is used for building a second sub-quantum circuit module for performing entanglement operation on the quantum state of the multi-quantum bit by utilizing a second type quantum logic gate;
the third construction module is used for acquiring initial variation parameters and constructing a third sub-quantum circuit module for optimizing the variation parameters by utilizing a third type quantum logic gate;
the generation module is used for generating a variable component sub-circuit by using the first sub-quantum circuit module, the second sub-quantum circuit module, the third sub-quantum circuit module and the measurement operation module.
9. A storage medium having a computer program stored therein, wherein the computer program is arranged to implement the method of any of claims 1 to 7 when run.
10. An electronic device comprising a memory and a processor, characterized in that the memory has stored therein a computer program, the processor being arranged to run the computer program to implement the method of any of the claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211220359.0A CN117852660A (en) | 2022-09-30 | 2022-09-30 | Construction method and device of variable component sub-circuit, medium and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211220359.0A CN117852660A (en) | 2022-09-30 | 2022-09-30 | Construction method and device of variable component sub-circuit, medium and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117852660A true CN117852660A (en) | 2024-04-09 |
Family
ID=90531784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211220359.0A Pending CN117852660A (en) | 2022-09-30 | 2022-09-30 | Construction method and device of variable component sub-circuit, medium and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117852660A (en) |
-
2022
- 2022-09-30 CN CN202211220359.0A patent/CN117852660A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112232513B (en) | Quantum state preparation method and device | |
| CN112633507B (en) | Method and device for encoding complex vector to quantum circuit | |
| CN113222155B (en) | Quantum circuit construction method and device, electronic device and storage medium | |
| CN114819163B (en) | Training method and device for quantum generation countermeasure network, medium and electronic device | |
| CN114492815A (en) | Method, device and medium for calculating target system energy based on quantum chemistry | |
| CN117709415A (en) | Quantum neural network model optimization method and device | |
| CN114511094B (en) | Quantum algorithm optimization method and device, storage medium and electronic device | |
| CN114819168B (en) | Quantum comparison method and device for matrix eigenvalues | |
| CN116090568B (en) | Method and device for determining size relation between quantum data and classical floating point data | |
| CN115879562B (en) | Quantum program initial mapping determination method and device and quantum computer | |
| CN114881238A (en) | Method and apparatus for constructing quantum discriminator, medium, and electronic apparatus | |
| CN114881239A (en) | Method and apparatus for constructing quantum generator, medium, and electronic apparatus | |
| CN117852660A (en) | Construction method and device of variable component sub-circuit, medium and electronic device | |
| CN115879558B (en) | Method and device for comparing sizes of multiple quantum states | |
| CN115879560B (en) | Equivalent relation judging method and device for quantum data and classical data | |
| CN115879559B (en) | Method and device for judging equivalence relation among multiple quantum states and quantum computer | |
| CN115713122B (en) | Method and device for determining size relation between quantum data and classical data | |
| CN116499466B (en) | Intelligent navigation method and device, storage medium and electronic device | |
| CN115879557B (en) | Quantum circuit-based data size comparison method and device and quantum computer | |
| CN114819169B (en) | Quantum estimation method and device for matrix condition number | |
| CN117877611A (en) | Method and device for predicting molecular properties | |
| CN117669757A (en) | Hamiltonian volume construction method and device | |
| CN117744818A (en) | Constant adder based on quantum Fourier transform, operation method and related device | |
| CN117114118A (en) | Method and device for constructing quantum weight adder, medium and electronic device | |
| CN116738127A (en) | Solving method and device of differential equation, medium and electronic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |