CN117833926A - Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment - Google Patents

Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment Download PDF

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Publication number
CN117833926A
CN117833926A CN202410009995.1A CN202410009995A CN117833926A CN 117833926 A CN117833926 A CN 117833926A CN 202410009995 A CN202410009995 A CN 202410009995A CN 117833926 A CN117833926 A CN 117833926A
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China
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feedback
charge
voltage
signal
module
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CN202410009995.1A
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Chinese (zh)
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丁召明
钱旭东
张禄鑫
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Shanghai Xinhai Chuangxin Technology Co ltd
Chipsea Technologies Shenzhen Co Ltd
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Shanghai Xinhai Chuangxin Technology Co ltd
Chipsea Technologies Shenzhen Co Ltd
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Priority to CN202410009995.1A priority Critical patent/CN117833926A/en
Publication of CN117833926A publication Critical patent/CN117833926A/en
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Abstract

The embodiment of the application provides a feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment, and feedback circuit includes: the voltage output module is used for outputting a first voltage signal and a second voltage signal, and a first voltage difference is formed between the first voltage signal and the second voltage signal; the feedback module is used for outputting a feedback charge signal according to the first voltage signal and/or the first voltage difference; every time the feedback module outputs a feedback charge signal once according to the first voltage signal, the feedback module switches the current charge feedback mode to another charge feedback mode, so that the feedback module outputs the feedback charge signal in different charge feedback modes. The mismatch quantity of the feedback charge signals in the process of outputting N feedback charge signals through the mismatch capacitance quantification of the multiple charge feedback modes is beneficial to reducing the mismatch influence of the Sigma-Delta modulator.

Description

Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment
Technical Field
The application relates to the technical field of integrated circuits, in particular to a feedback circuit, a voltage detection circuit, a temperature detection circuit, a chip and electronic equipment.
Background
Currently, a Sigma-Delta modulator (SDM) is a high-precision analog-to-digital converter with oversampling characteristics, and is often used for high-precision measurement of low-frequency voltage signals. In the related art, a Sigma-Delta modulator mainly includes an integrator for integrating charges of an input voltage signal and a reference voltage signal, a comparator for comparing output results of the integrator, and a feedback circuit for generating a feedback charge signal corresponding to the reference voltage signal, wherein the output results of the comparator control positive and negative of the feedback charge signal, so that the output results of the integrator are close to or equal to 0 in a plurality of cycles, and finally, after the integrator integrates the input voltage signal and the charge signal corresponding to the reference voltage signal for a plurality of times, the magnitude of the input voltage signal is quantized by the difference between the positive and negative times of the feedback reference voltage signal and the magnitude of the reference voltage signal.
However, since the capacitor of the feedback circuit has a mismatch phenomenon caused by factors such as process error and size deviation, the feedback charge signal output by the feedback circuit part of the Sigma-Delta modulator has a mismatch phenomenon, and under the condition that the mismatch capacitor cannot be determined, the Sigma-Delta modulator causes a measurement error, so that the measurement accuracy of the Sigma-Delta modulator is reduced.
Disclosure of Invention
In view of the above, embodiments of the present application provide a feedback circuit, a voltage detection circuit, a temperature detection circuit, a chip, and an electronic device, so as to solve the above technical problems.
In a first aspect, an embodiment of the present application provides a feedback circuit for feeding back a charge signal N times in a measurement process, where N is an integer greater than 1, the feedback circuit including:
the voltage output module is used for outputting a first voltage signal and a second voltage signal, and a first voltage difference is formed between the first voltage signal and the second voltage signal;
the feedback module is used for outputting a feedback charge signal according to the first voltage signal and/or the first voltage difference;
the voltage output module is provided with a plurality of voltage output modes, and the first mismatch voltages of the first voltage signals output by the voltage output module in at least two voltage output modes are unequal;
every time the feedback module outputs a feedback charge signal according to the first voltage difference, the voltage output module switches the current voltage output mode to another voltage output mode, so that the feedback module outputs the feedback charge signal according to the first voltage difference generated by different voltage output modes.
In a second aspect, the present application provides a voltage detection circuit comprising a feedback circuit as described in the first aspect.
In a third aspect, the present application provides a temperature detection circuit, comprising:
the feedback circuit of the first aspect, wherein the first voltage difference has a first temperature coefficient, the first voltage signal has a second temperature coefficient, one of the first temperature coefficient and the second temperature coefficient is a positive temperature coefficient, and the other is a negative temperature coefficient;
the metering circuit is used for integrating the N times of feedback charge signals output by the feedback circuit and determining a voltage value of the first voltage difference according to the first times, the second times and the reference voltage;
the first frequency is the frequency of the feedback module outputting a feedback charge signal based on the first voltage signal, and the second frequency is the frequency of the feedback module outputting the feedback charge signal based on the first voltage difference;
the reference voltage is a zero temperature coefficient voltage determined based on the first voltage signal and the first voltage difference, and the integration result of the metering circuit on the N times of feedback charge signals is close to or equal to zero.
In a fourth aspect, embodiments of the present application further provide a chip including the voltage detection circuit described in the second aspect and/or the temperature detection circuit described in the third aspect.
In a fifth aspect, an embodiment of the present application further provides an electronic device, including the chip described in the fourth aspect.
In the embodiment of the application, since the feedback module switches the current charge feedback mode to another charge feedback mode every time the feedback module outputs a feedback charge signal according to the first voltage signal, the feedback module can output the feedback charge signal according to the mismatch capacitance generated by different charge feedback modes, so that the mismatch quantity of the feedback charge signal output by the first voltage signal generated by different charge feedback modes can be accumulated in the process of outputting N times of feedback charge signals, and finally the mismatch quantity of the feedback charge signal in the process of outputting N times of feedback charge signals can be quantified through the mismatch capacitance of multiple charge feedback modes, the influence of the mismatch voltage received by the Sigma-Delta modulator can be reduced after the Sigma-Delta modulator is calibrated, and finally the measurement accuracy of the Sigma-Delta modulator is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows a schematic block diagram of a Sigma-Delta modulator in the related art.
Fig. 2 shows a schematic block diagram of a feedback circuit in an embodiment of the present application.
Fig. 3 shows a schematic circuit diagram of the voltage output module in the embodiment of the application.
Fig. 4 shows another circuit schematic of the voltage output module in an embodiment of the present application.
Fig. 5 shows a schematic circuit diagram of the feedback module in the embodiment of the application.
Fig. 6 shows another circuit schematic of the feedback module in an embodiment of the present application.
Fig. 7 shows a schematic block diagram of a feedback block in an embodiment of the present application.
Fig. 8 shows another circuit schematic of the feedback module in an embodiment of the present application.
Fig. 9 shows a schematic diagram of the operation of the feedback module in an embodiment of the present application.
Fig. 10 shows a schematic diagram of the operation of the feedback circuit in an embodiment of the present application.
Fig. 11 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 12 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 13 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 14 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 15 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 16 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 17 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 18 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 19 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 20 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 21 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 22 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 23 shows a schematic block diagram of a voltage output module in an embodiment of the present application.
Fig. 24 shows another circuit schematic of the voltage output module in an embodiment of the present application.
Fig. 25 shows another circuit schematic of the voltage output module in an embodiment of the present application.
Fig. 26 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 27 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 28 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 29 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 30 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 31 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 32 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 33 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 34 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 35 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 36 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 37 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 38 shows another schematic operation of the feedback circuit in an embodiment of the present application.
Fig. 39 shows a schematic block diagram of the voltage detection circuit in the embodiment of the present application.
Fig. 40 shows another block diagram of the voltage detection circuit in the embodiment of the present application.
Fig. 41 shows a schematic circuit diagram of a voltage detection circuit in an embodiment of the present application.
Fig. 42 shows a schematic block diagram of a temperature detection circuit in an embodiment of the present application.
Fig. 43 shows a schematic circuit diagram of a temperature detection circuit in an embodiment of the present application.
The system comprises a 10 voltage output module and a 20 feedback module;
the first voltage signal Vbep, the second voltage signal Vben, the first voltage difference VBE, the feedback charge signal QR, the voltage output modes VM1 to VM12, the charge feedback modes QM1 to QM2;
the voltage generating sub-module 11, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the triode BJT, the current source I u;
the charge feedback sub-module 21, the first sub-switch S01, the second sub-switch S02, the third sub-switch S03, and the first capacitor Cf;
the feedback circuit 100, the voltage input circuit 200, the metering circuit 300, the integrating module 310, the comparing module 320, the counting module 330, the voltage signal Vin to be measured, the charge signal Qin to be measured, the integrated voltage signal VI, the preset voltage Vref, and the control signal VC.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In order to better understand the solution of the present application, the following description will make clear and complete descriptions of the technical solution of the embodiment of the present application with reference to the accompanying drawings in the embodiment of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In the description of embodiments of the present application, words such as "example" or "such as" are used to indicate exemplary, illustrative, or descriptive matter. Any embodiment or design described herein as "example" or "such as" is not necessarily to be construed as preferred or advantageous over another embodiment or design. The use of words such as "example" or "such as" is intended to present relative concepts in a clear manner.
In addition, the term "plurality" in the embodiments of the present application means two or more, and in view of this, the term "plurality" may be understood as "at least two" in the embodiments of the present application. "at least one" may be understood as one or more, for example as one, two or more. For example, including at least one means including one, two or more, and not limiting what is included, e.g., including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A and B and C, may be included.
It should be noted that, in the embodiment of the present application, "and/or" describe the association relationship of the association object, which means that three relationships may exist, for example, a and/or B may be represented: a exists alone, A and B exist together, and B exists alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship.
It should be noted that in the embodiments of the present application, "connected" is understood to mean electrically connected, and two electrical components may be connected directly or indirectly between two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.
The first pole/first terminal of each transistor used in the embodiments herein is one of a source and a drain, and the second pole/second terminal of each transistor is the other of the source and the drain. Since the source and drain of a transistor may be symmetrical in structure, the source and drain may be indistinguishable in structure, that is, the first pole/first terminal and the second pole/second terminal of the transistor in embodiments of the present application may be indistinguishable in structure. Illustratively, in the case where the transistor is a P-type transistor, the first pole/first terminal of the transistor is the source and the second pole/second terminal is the drain; illustratively, in the case where the transistor is an N-type transistor, the first pole/first terminal of the transistor is the drain and the second pole/second terminal is the source.
In the circuit structure provided in the embodiments of the present application, the first node, the second node, and the like are not nodes representing actually existing components, but represent junction points of related coupling in the circuit diagram, that is, the nodes are equivalent nodes formed by the junction points of the related coupling in the circuit diagram.
Currently, a Sigma-Delta modulator is a high-precision analog-to-digital converter with oversampling characteristics, and is often used for high-precision measurement of low-frequency voltage signals. Taking fig. 1 as an example, the Sigma-Delta modulator mainly includes a feedback circuit for generating a reference voltage signal Vdac, an integrator for integrating charges on an input voltage signal V0 and the reference voltage signal Vdac, a comparator for comparing output voltages of the integrator, and a counter for recording output results of the comparator, wherein the output results of the comparator control positive and negative of the feedback charge signal so that the output results of the integrator are close to or equal to 0 in a plurality of cycles. For example, during one cycle, when the output voltage of the comparator integrator is greater than the reference voltage VR, the control feedback circuit outputs a negative feedback charge signal-vdac×c during the next cycle, so that the output voltage of the integrator decreases; in contrast, in a cycle, when the output voltage of the comparator integrator is smaller than the reference voltage Vref, the feedback circuit is controlled to output a positive feedback charge signal +vdac×c in the next cycle, so that the output voltage of the integrator increases.
During operation of the Sigma-Delta modulator, the integrator integrates the input charge signal V0C and the feedback charge signal Vdac C during each cycle, and since the output of the integrator is close to or equal to 0 after a plurality of cycles, the number of times the input voltage signal V0, the reference voltage signal Vdac, the feedback positive reference voltage signal +vdac, and the feedback negative reference voltage signal-Vdac satisfy the following relation:
V0*(X1+X2)*C＝(Vdac*X1)-(Vdac*X2)*C
Wherein X1 is the number of times of feedback positive feedback charge signal +vdac×c, and X2 is the number of times of feedback negative feedback charge signal-vdac×c.
Thus, the input voltage signal V0 can be calculated as follows:
however, the capacitance corresponding to the feedback charge signal is not completely identical to the capacitance corresponding to the input charge signal in size, and there is a capacitance mismatch phenomenon, and therefore, the input voltage signal V0 is actually calculated as follows:
where ΔC is the mismatch capacitance.
It can be seen that, due to the mismatch phenomenon caused by factors such as process error and size deviation of the capacitance of the feedback circuit, under the condition that the mismatch capacitance cannot be determined, the Sigma-Delta modulator causes measurement error, so that the measurement accuracy of the Sigma-Delta modulator is reduced.
For this reason, the present application provides a feedback circuit, a voltage detection circuit, a temperature detection circuit, a chip, and an electronic device, which are described in detail below.
First, referring to fig. 2, the feedback circuit 100 is configured to feedback the N times of feedback charge signals QR during one measurement, where N is an integer greater than 1, and the feedback circuit 100 includes:
the voltage output module 10, the voltage output module 10 is configured to output a first voltage signal Vbep and a second voltage signal Vben, and a first voltage difference VBE is between the first voltage signal Vbep and the second voltage signal Vben;
The feedback module 20, the feedback module 20 is configured to output a feedback charge signal QR according to the first voltage signal Vbep and/or the first voltage difference VBE;
the feedback module 20 has a plurality of charge feedback modes, and mismatch capacitances of the feedback module 20 in at least two charge feedback modes are not equal;
each time the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to another charge feedback mode, so that the feedback module 20 outputs the feedback charge signal QR in a different charge feedback mode.
Specifically, the voltage output module 10 may output the first voltage signal Vbep and the second voltage signal Vben, so that the feedback module 20 generates the first voltage signal Vbep and/or the first voltage difference VBE according to the corresponding voltage output mode to output the feedback charge signal QR. In some embodiments of the present application, the voltage output module 10 may generate the first voltage signal Vbep and the second voltage signal Vben using a transistor, for example, referring to fig. 3, where the voltage output module 10 includes a current source I1, a current source I2, a switch s1, a switch s2, a transistor BJT1 and a transistor BJT2, when the switch s1 and the switch s2 are closed, the current source I1 provides a current to the transistor BJT1, the current source I2 provides a current to the transistor BJT2, so as to generate the first voltage signal Vbep at one end of the transistor BJT1 and generate the second voltage signal Vben at one end of the transistor BJT2, and the final voltage output module 10 may output the first voltage signal Vbep and the second voltage signal Vben.
In some embodiments of the present application, the voltage output module 10 may generate the first voltage signal Vbep and the second voltage signal Vben using a resistor, for example, referring to fig. 4, where the voltage output module 10 includes a current source I1, a current source I2, a switch s1, a switch s2, a resistor R1 and a resistor R2, when the switch s1 and the switch s2 are closed, the current source I1 provides a current to the resistor R1, the current source I2 provides a current to the resistor R2, so as to generate the first voltage signal Vbep at one end of the resistor R1 and generate the second voltage signal Vben at one end of the resistor R2, and the voltage output module 10 may output the first voltage signal Vbep and the second voltage signal Vben.
It will be appreciated that the voltage output module 10 may also output the first voltage signal Vbep and the second voltage signal Vben using other electronic devices or circuit structures, such as a MOS transistor with a shorted gate and drain, and a bias current, such as a bandgap reference circuit.
In some embodiments of the present application, the first voltage signal Vbep has a first temperature coefficient, the first voltage difference VBE has a second temperature coefficient, one of the first temperature coefficient and the second temperature coefficient is a positive temperature coefficient, and the other one is a negative temperature coefficient, so that when the feedback module 20 outputs the feedback charge signal QR according to the first voltage signal Vbep and the first voltage difference VBE, a zero temperature coefficient reference voltage is generated through the first voltage signal Vbep and the first voltage difference VBE, and the feedback module 20 can generate a corresponding feedback charge signal QR according to the zero temperature coefficient reference voltage, so as to avoid a phenomenon that the feedback charge signal QR is indirectly affected by temperature due to the voltage signal having the temperature coefficient.
In some embodiments of the present application, for example, for embodiments that generate the first voltage signal Vbep and the second voltage signal Vben according to transistors and current sources, the second voltage signal Vben and the first voltage signal Vbep are both negative temperature coefficient voltages, and the first voltage difference VBE is a positive temperature coefficient voltage. It is understood that the second voltage signal Vben and the first voltage signal Vbep may be positive temperature coefficient voltages, and the first voltage difference VBE is a negative temperature coefficient voltage.
The feedback module 20 may output the feedback charge signal QR according to the first voltage signal Vbep and/or the first voltage difference VBE. For example, the feedback module 20 may output the feedback charge signal QR based only on the first voltage signal Vbep in order to output the feedback charge signal QR having a temperature coefficient (e.g., a negative temperature coefficient). For another example, the feedback module 20 may output the feedback charge signal QR based only on the first voltage difference VBE in order to output the feedback charge signal QR having a temperature coefficient (e.g., a positive temperature coefficient). For another example, the feedback module 20 may output the feedback charge signal QR according to the first voltage difference VBE and the first voltage signal Vbep so as to output the feedback charge signal QR with a zero temperature coefficient.
It should be noted that, in the present application, the feedback module 20 outputs the feedback charge signal QR only according to the first voltage signal Vbep (or the first voltage difference VBE), which means that the feedback module 20 only accesses the first voltage signal Vbep (or the first voltage difference VBE) and outputs the feedback charge signal QR; the feedback module 20 outputting the feedback charge signal QR according to the first voltage signal Vbep may refer to the feedback module 20 only accessing the first voltage signal Vbep and outputting the feedback charge signal QR, or may refer to the feedback module 20 accessing the first voltage signal Vbep and the first voltage difference VBE and outputting the feedback charge signal QR; similarly, the feedback module 20 outputting the feedback charge signal QR according to the first voltage signal Vbep may refer to the feedback module 20 only accessing the first voltage difference VBE and outputting the feedback charge signal QR, or may refer to the feedback module 20 accessing the first voltage signal Vbep and the first voltage difference VBE and outputting the feedback charge signal QR.
In some embodiments of the present application, feedback module 20 may include a switched-capacitor circuit by way of which feedback charge signal QR is output. As an example, referring to fig. 5, the feedback module 20 includes a first sub-switch S01, a second sub-switch S02, a third sub-switch S03, and a first capacitor Cf, wherein a first end of the first sub-switch S01 is used for accessing the first voltage signal Vbep, and a second end of the first sub-switch S01 is connected to a first end of the first capacitor Cf; the first end of the second sub-switch S02 is used for accessing the second voltage signal Vben, and the second end of the second sub-switch S02 is connected with the first end of the first capacitor Cf; the first terminal of the third sub-switch S03 is connected to the ground, and the second terminal of the third sub-switch S03 is connected to the first terminal of the first capacitor Cf.
For example, taking the feedback module 20 as an example to output the feedback charge signal QR according to the first voltage signal Vbep, when the first sub-switch S01 is closed, the second sub-switch S02 is opened, and the third sub-switch S03 is opened, the first capacitor Cf is connected to the first voltage signal Vbep for charging; when the first capacitor Cf finishes charging, the first sub-switch S01 and the second sub-switch S02 are opened, and the third sub-switch S03 is closed, and the charge amount of the feedback charge signal QR output by the first capacitor Cf satisfies the relationship: qr= -Vbep Cf, such that the feedback module 20 outputs a feedback charge signal QR of corresponding charge amount according to the first voltage signal Vbep.
For another example, taking the feedback module 20 as an output feedback charge signal QR according to the first voltage difference VBE, when the first sub-switch S01 is closed, the second sub-switch S02 is opened, and the third sub-switch S03 is opened, the first capacitor Cf is connected to the first voltage signal Vbep for charging; when the first capacitor Cf is charged, the first sub-switch S01 and the third sub-switch S03 are turned off, and the second sub-switch S02 is turned on, and the charge amount of the feedback charge signal QR output by the first capacitor Cf satisfies the relationship: qr= (Vbep-Vben) cf=vbe×cf, so that the feedback module 20 outputs a feedback charge signal QR of a corresponding charge amount according to the first voltage difference VBE.
As another example, referring to fig. 6, the feedback module 20 includes a switch s1, a switch s2, a switch s3, a switch s4, a switch s5, a switch s6, a switch s7, a capacitor cf1, and a capacitor cf2.
Specifically, taking the feedback module 20 as an example, outputting the feedback charge signal QR according to the first voltage signal Vbep, when the switches s1 and s5 are closed, the switches s2, s3, s4, s6 and s7 are opened, the capacitor cf1 is connected to the first voltage signal Vbep for charging; when the capacitor cf1 is charged, the switch s1 is opened, the switch s3 is closed, and the rest switch states are kept unchanged, so that the charge quantity of the feedback charge signal QR output by the capacitor cf1 satisfies the relation: qr= -Vbep Cf, such that the feedback module 20 outputs a feedback charge signal QR of corresponding charge amount according to the first voltage signal Vbep.
Taking the feedback module 20 as an example, outputting the feedback charge signal QR according to the second voltage signal Vben, when the switches s2 and s6 are closed, and the switches s1, s3, s4, s5 and s7 are opened, the capacitor cf2 is connected to the second voltage signal Vben for charging; when the capacitor cf2 is charged, the switch s2 is opened, the switch s4 is closed, and the other switch states remain unchanged, so that the charge quantity of the feedback charge signal QR output by the capacitor cf2 satisfies the relation: qr= -Vben Cf, such that the feedback module 20 outputs a feedback charge signal QR corresponding to the amount of charge according to the second voltage signal Vben.
Taking the feedback module 20 as an example, outputting the feedback charge signal QR according to the first voltage difference VBE, when the switch s1, the switch s2, the switch s5, the switch s6 and the switch s7 are closed, and the switch s3 and the switch s4 are opened, the capacitor cf1 is connected to the first voltage signal Vbep for charging, the capacitor cf2 is connected to the second voltage signal Vben for charging, and when the capacitor cf1 and the capacitor cf2 are charged, the total charge amount charged by the capacitor cf1 and the capacitor cf2 is as follows: qr= (Vbep-Vben) cf=vbe Cf; subsequently, the switch s1, the switch s2 and the switch s5 are opened, and the switch s3 and the switch s4 are controlled to be closed, so that the feedback module 20 outputs the charge amount corresponding to the first voltage difference VBE.
It can be appreciated that, when the feedback module 20 needs to output the feedback charge signal QR according to the first voltage difference VBE and the first voltage signal Vbep, the above circuit structure may be arrayed, so that one switched capacitor circuit in the array circuit outputs the feedback charge signal QR according to the first voltage difference VBE, and the other switched capacitor circuit in the array circuit outputs the feedback charge signal QR according to the first voltage signal Vbep, and finally, the feedback module 20 outputs the feedback charge signal QR corresponding to the charge amount according to the first voltage difference VBE and the first voltage signal Vbep.
In some embodiments of the present application, when the feedback circuit 100 outputs the feedback charge signal QR, the feedback charge signal QR may be a positive charge signal, a negative charge signal, or 0, so that the output result of the integrator after the Sigma-Delta modulator receives the feedback charge signal QR multiple times is smaller than a preset voltage, so that the Sigma-Delta modulator measures the voltage and/or the temperature.
In the embodiment of the present application, the feedback module 20 has multiple charge feedback modes, and mismatch capacitances of the feedback module 20 in at least two charge feedback modes are not equal. The mismatch capacitance refers to the deviation of the capacitance in the feedback module 20 from the set capacitance value due to mismatch. For example, the capacitance of a certain capacitor in the feedback module 20 is set to 100pF, and the actual value of the capacitor may be 95pF to 105pF, and the deviation ±5pf is the mismatch capacitor of the feedback module 20.
In some embodiments of the present application, referring to fig. 7, wherein the feedback module 20 includes a plurality of charge feedback sub-modules 21; each charge feedback sub-module 21 is configured to output a feedback charge signal QR, and mismatch capacitances of each charge feedback sub-module 21 are not equal; the feedback module 20 outputs the feedback charge signal QR according to the first voltage signal Vbep and/or the first voltage difference VBE in different charge feedback modes.
It should be noted that, one or more of the plurality of charge feedback sub-modules 21 outputs the feedback charge signal QR, that is, the feedback module 20 is in a charge feedback mode, for example, referring to fig. 7, when the feedback module 20 is in the charge feedback mode QM1, the feedback module 20 outputs the feedback charge signal QR through the charge feedback sub-module 1; when the feedback module 20 is in the charge feedback mode QM2, the feedback module 20 outputs a feedback charge signal QR through the charge feedback sub-module 2; for another example, with continued reference to fig. 7, when the feedback module 20 is in the charge feedback mode QM1, the feedback module 20 outputs the feedback charge signal QR through the charge feedback sub-module 1 and the charge feedback sub-module 2; when the feedback module 20 is in the charge feedback mode QM2, the feedback module 20 outputs a feedback charge signal QR through the charge feedback sub-module 2 and the charge feedback sub-module 3.
In some embodiments of the present application, for example, for embodiments in which the feedback module 20 includes a plurality of charge feedback sub-modules 21, referring to fig. 8, each charge feedback sub-module 21 includes a first sub-switch S01, a second sub-switch S02, a third sub-switch S03, and a first capacitance Cf. Specifically, taking the feedback charge signal QR corresponding to the zero temperature coefficient reference voltage output by the feedback module 20 as an example, it is assumed that the first voltage signal Vbep is a negative temperature coefficient voltage and the first voltage difference VBE is a positive temperature coefficient voltage, and meanwhile, the zero temperature coefficient reference voltage Vdac, the first voltage signal Vbep and the first voltage difference VBE satisfy the following relation:
Vdac＝Vbep+2*VBE
At this time, 3 charge feedback sub-modules 21 are selected from the n charge feedback sub-modules 21 to operate, so as to output a feedback charge signal QR corresponding to the zero temperature coefficient reference voltage. For example, referring to fig. 9, where the charge feedback sub-module 21a outputs the charge amount qr=vbep×cf according to the first voltage signal Vbep, the charge feedback sub-module 21b outputs the charge amount qr=vbe×cf according to the first voltage difference VBE, and the charge feedback sub-module 21c superimposes the feedback charge signals QR outputted by the charge feedback sub-modules 21a, 21b and 21c according to the first voltage difference VBE output the charge amount qr=vbe×cf, it can be seen that:
QR＝(Vbep+2*VBE)*Cf＝Vdac*Cf
it can be seen that when the feedback module 20 outputs the feedback charge signal QR according to the first voltage signal Vbep and the first voltage difference VBE, the feedback charge signal QR corresponding to the zero temperature coefficient reference voltage can be finally output by controlling the working number of the charge feedback sub-module 21 and the switch of the corresponding charge feedback sub-module 21.
Meanwhile, since the capacitance value of each charge feedback sub-module 21 has different mismatch capacitances, when the feedback module 20 switches between different charge feedback sub-modules 21, the feedback module 20 can be in different charge feedback modes. For example, in the embodiment described above in which 3 charge feedback sub-modules 21 are selected to operate in n charge feedback sub-modules 21, if the number of charge feedback sub-modules 21 of the feedback module 20 is 5, 3 charge feedback sub-modules 21 are selected to have a seed in 5 charge feedback sub-modules 21 The feedback module 20 has 10 charge feedback modes in combination.
It can be understood that, the more the number of the charge feedback sub-modules 21 of the feedback module 20 is, the more the charge feedback modes corresponding to the feedback module 20 are, but the larger the circuit area is, so that a person skilled in the art can set the number of the charge feedback sub-modules 21 according to actual needs, so as to avoid the phenomenon of overlarge circuit area while ensuring a sufficient number of charge feedback modes.
It should be noted that, taking the feedback module 20 outputting the feedback signal according to the first voltage difference VBE and the first voltage signal Vbep each time as an example, the feedback charge signal output by the feedback circuit each time can be calculated according to the following formula:
wherein,for the first voltage difference VBE corresponding to the capacitance value of the capacitor, and (2)>The first voltage signal Vbep is the capacitance value of the corresponding capacitor.
Then, the charge mismatch amount dQ of the feedback charge signal can be calculated as follows:
in the above formula, the first voltage difference VBE, the first voltage signal Vbep may be calculated as follows:
I x ＝xI u
I y ＝yI s
wherein V is T Is the temperature coefficient of thermal voltage, I x Is the input current of the triode BJT, I s Is the saturation current of the triode BJT, I u Is the input current of the triode BJT, I y Is the saturation current of the triode BJT.
For the capacitance mismatch amount dC and the current mismatch amountCan be calculated as follows:
wherein sigma u Is the standard deviation of the capacitance of the capacitor,is the standard deviation of current, n 2 For the number of capacitors, x inputs current I y Is a number of (3).
Thus, the charge mismatch amount dQ of the feedback charge signal can be finally calculated as follows:
it can be seen that for the first input voltage Vbep, the charge mismatch amount dQ resulting in the feedback charge signal is mainly affected by capacitance mismatchFor the first voltage difference, the charge mismatch dQ of the feedback charge signal is mainly influenced by current and triode mismatch>I.e. a first mismatch voltage generated by the first input voltage Vbep (a second mismatch voltage generated by the second input voltage Vben).
Therefore, in the embodiment of the present application, since the feedback module 20 switches the current charge feedback mode to another charge feedback mode whenever the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the feedback module 20 can output the feedback charge signal QR according to the mismatch capacitance generated by the different charge feedback modes, so that the mismatch amount of the feedback charge signal QR output by the first voltage signal Vbep generated by the different charge feedback modes can be accumulated in the process of outputting the N-time feedback charge signal QR, and finally the mismatch amount of the feedback charge signal QR in the process of outputting the N-time feedback charge signal QR can be quantified through the mismatch capacitance of the multiple charge feedback modes, the influence of the mismatch voltage suffered by the Sigma-Delta modulator can be reduced after the Sigma-Delta modulator is calibrated, and finally the measurement accuracy of the Sigma-Delta modulator is facilitated to be improved.
In some embodiments of the present application, the charge feedback mode of the feedback module 20 remains unchanged every time the feedback module 20 outputs the feedback charge signal QR only once according to the first voltage difference VBE. For example, referring to fig. 10, the current charge feedback mode of the feedback module 20 is QM3 mode, after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE in the charge feedback mode QM3, the feedback module 20 remains QM3 mode, and the voltage output module 10 is changed from VM2 mode to VM3 mode, that is, the charge feedback mode of the charge feedback module 20 remains QM3 when the feedback module 20 outputs the feedback charge signal QR next time.
It should be noted that, each time the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to another charge feedback mode, which is beneficial to ensuring that the voltage output module 10 switches to the other charge feedback mode; and each time the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE, the charge feedback mode of the feedback module 20 remains unchanged, so that it can be ensured that when the feedback module 20 outputs the feedback charge signal QR next time according to the first voltage signal Vbep, the mismatch amount corresponding to the charge feedback mode is collected, which is favorable for making the feedback module 20 output the feedback charge signal QR at least once according to the first voltage signal Vbep in each charge feedback mode.
In some embodiments of the present application, after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to another charge feedback mode. For example, referring to fig. 11, where the current charge feedback mode of the feedback module 20 is QM3, after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep at the charge feedback mode QM3, the charge feedback mode of the feedback module 20 switches QM4.
In some embodiments of the present application, the feedback module 20 may switch the current charge feedback mode to another charge feedback mode before the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep. For example, referring to fig. 12, before the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the feedback module 20 has switched the charge feedback mode from QM3 mode to QM4 mode, so that during the current output of the feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR according to the first voltage signal Vbep in QM3 mode.
It should be noted that, the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage signal Vbep may refer to that the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage signal Vbep only, for example, referring to fig. 11 or 12, the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage signal Vbep only; meanwhile, it may also refer to that the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE and the first voltage signal Vbep, for example, refer to fig. 13, wherein after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep and the first voltage difference VBE, the charge feedback mode of the feedback module 20 is switched from the QM3 mode to the QM4 mode.
In some embodiments of the present application, for example, for embodiments in which the feedback charge signal QR may be a positive charge signal or a negative charge signal, after the feedback module 20 outputs the feedback charge signal QR of the first polarity once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to the next charge feedback mode; before the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to the previous charge feedback mode; the first polarity is opposite to the second polarity, and the next charge feedback mode is the charge feedback mode in which the feedback module 20 is in when the feedback module 20 outputs the feedback charge signal QR next time, and the last charge feedback mode is the charge feedback mode in which the feedback module 20 is in when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep last time.
As an example, referring to fig. 14, wherein, when outputting the mth feedback charge signal QR, the feedback module 20 is in the charge feedback mode QM3, the feedback module 20 outputs the once positively charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM3, and switches the charge feedback mode QM3 to the charge feedback mode QM4 after outputting the once positively charged feedback charge signal QR; when outputting the m+1th feedback charge signal QR, the feedback module 20 switches from the charge feedback mode QM4 to the charge feedback mode QM3 before outputting the negatively charged feedback charge signal QR because the negatively charged feedback charge signal QR is outputted according to the first voltage signal Vbep at this time, and the feedback module 20 outputs the negatively charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 3; while outputting the m+2th feedback charge signal QR, the feedback module 20 continues to output the once-positively-charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM3, and the feedback module 20 switches the charge feedback mode QM3 to the charge feedback mode QM4 after outputting the once-positively-charged feedback charge signal QR.
As another example, referring to fig. 15, wherein upon outputting the mth feedback charge signal QR, the feedback module 20 outputs the once positively charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 3; when outputting the m+1th feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR according to the first voltage difference VBE in the charge feedback mode QM 4; when outputting the m+2th feedback charge signal QR, the feedback module 20 outputs the negatively charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 3; while outputting the m+3rd feedback charge signal, the feedback module 20 continues to output the once positively charged feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 3.
As can be seen from fig. 14 and 15, in the process of outputting the mth feedback charge signal QR and the (m+2) th feedback charge signal QR, the feedback module 20 outputs the feedback charge signals QR of the first polarity and the second polarity in the same charge feedback mode (QM 3) according to the first voltage signal Vbep, respectively, so that the mismatch amount of the feedback charge signals QR in the same charge feedback mode is cancelled by the positive and negative charges; in the process of outputting the feedback charge signal QR of the m+2th (m+3rd), the feedback module 20 continues to output the feedback charge signal QR of the first polarity once according to the first voltage signal Vbep in the charge feedback mode QM3, so as to facilitate accumulation of the charge mismatch amounts of the first polarity (or the second polarity) corresponding to the first voltage signal Vbep of all the charge feedback modes, and avoid the phenomenon that the mismatch amounts of part of the charge feedback modes are not accumulated and cannot perform gain calibration on the Sigma-Delta modulator due to positive and negative charge cancellation.
In some embodiments of the present application, the feedback module 20 switches the current charge feedback mode to the next charge feedback mode in a fifth preset order based on the plurality of charge feedback modes; the feedback module 20 switches the current charge feedback mode to the previous charge feedback mode according to a sixth preset sequence based on the plurality of charge feedback modes; wherein the fifth preset sequence is opposite to the sixth preset sequence.
For example, referring to fig. 14 or 15, when the feedback module 20 needs to switch to the next charge feedback mode, the charge feedback mode switches the current charge feedback mode to the next charge feedback mode in the order of QM1-QM 8; conversely, when the feedback module 20 needs to switch to the previous charge feedback mode, the feedback module 20 switches the current charge feedback mode to the next charge feedback mode in the order QM8-QM 1.
For another example, referring to fig. 16, when the feedback module 20 needs to switch to the next charge feedback mode, the voltage output module 10 switches the current charge feedback mode QM1 to the next charge feedback mode QM2 in the clockwise order of QM1-QM 12; referring to fig. 17, when the feedback block 20 needs to switch to the previous charge feedback mode, the feedback block switches the current charge feedback mode QM2 to the previous charge feedback mode QM1 in a counterclockwise order of QM12-QM 1.
In some embodiments of the present application, referring to fig. 18, the charge feedback modes of the feedback module 20 include a first polarity charge feedback mode and a second polarity charge feedback mode, wherein the first polarity charge feedback mode is a charge feedback mode corresponding to the feedback module 20 outputting the feedback charge signal QR of the first polarity according to the first voltage signal Vbep, and the second polarity charge feedback mode is a charge feedback mode corresponding to the feedback module 20 outputting the feedback charge signal QR of the second polarity according to the first voltage signal Vbep.
Specifically, after the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to the next first polarity charge feedback mode, which is the charge feedback mode in which the feedback module 20 is located when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep next time.
For example, referring to fig. 19, when outputting the mth feedback charge signal QR, the feedback module 20 is in the first polarity charge feedback mode QM1, and the feedback module 20 outputs the first polarity feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 1; when the feedback charge signal QR is output for the m+a-th time (a Σ1), the feedback module 20 is in the first polarity charge feedback mode QM2, so that the feedback module 20 outputs the first polarity feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 2.
On the contrary, after the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage signal Vbep, the feedback module 20 switches the current charge feedback mode to the next second polarity charge feedback mode, which is the charge feedback mode in which the feedback module 20 is located when the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep next time.
For example, referring to fig. 20, when outputting the mth feedback charge signal QR, the feedback module 20 is in the second polarity charge feedback mode QM2, and the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep in the charge feedback mode QM 2; while the feedback module 20 is in the second polarity charge feedback mode QM3 when the feedback charge signal QR is output for the m+b time (b≡1), the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep in the charge feedback mode QM 3.
That is, when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep, the feedback module 20 switches according to the charge feedback mode of the first polarity so that the feedback module 20 can output the feedback charge signal QR of the first polarity according to the first voltage signal Vbep in all the charge feedback modes, thereby accumulating the charge mismatch amount of the first polarity. When the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep, the output mode of the feedback module 20 is switched according to the feedback mode of the second polarity, so that the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep in all the charge feedback modes, thereby accumulating the charge mismatch amount of the second polarity, so as to calculate the total charge mismatch amount and the corresponding capacitance mismatch amount after subtracting the charge mismatch amount of the first polarity from the charge mismatch amount of the second polarity.
It can be appreciated that the feedback module 20 may switch the current charge feedback mode to the next charge feedback mode of the first polarity before the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep; alternatively, the voltage output module 10 may switch the current charge feedback mode to the previous charge feedback mode of the first polarity before the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage signal Vbep.
As an exemplary illustration of the operation of the feedback circuit 100 of the present application, referring to fig. 21, when outputting the mth feedback charge signal QR, the feedback module 20 is in the first polarity charge feedback mode QM1, and the feedback module 20 outputs the first polarity feedback charge signal QR according to the first voltage signal Vbep in the charge feedback mode QM 1; when outputting the m+1th feedback charge signal QR, the first polarity charge feedback mode is changed from QM1 charge feedback mode to QM2 charge feedback mode, and since the second polarity feedback charge signal QR is output this time, the feedback module 20 is in the second polarity charge feedback mode QM2, and the feedback module 20 outputs the second polarity feedback charge signal QR in the second polarity charge feedback mode QM2 according to the first voltage signal Vbep; when the m+2th feedback charge signal QR is output, the second polarity charge feedback mode is changed from QM2 charge feedback mode to QM3 charge feedback mode, and the feedback module 20 is in the first polarity charge feedback mode QM2 because the first polarity feedback charge signal QR is output this time, and the feedback module 20 outputs the second polarity feedback charge signal QR according to the first voltage signal Vbep in the first polarity charge feedback mode QM 2.
As another exemplary illustration of the operation of the feedback circuit 100 of the present application, referring to fig. 22, when outputting the mth feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep in the charge feedback mode QM 2; while outputting the m+1th feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage signal Vbep in the first polarity charge feedback mode QM 1; while the (M+2) -th feedback charge signal QR is outputted, the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage signal Vbep in the second polarity charge feedback mode QM 3.
In some embodiments of the present application, the feedback module 20 switches the current charge feedback mode to the next first polarity charge feedback mode in a seventh preset order based on the plurality of charge feedback modes; the feedback module 20 switches the current charge feedback mode to the next first polarity charge feedback mode according to an eighth preset sequence based on the plurality of charge feedback modes; wherein the seventh preset sequence is the same as or opposite to the eighth preset sequence.
For example, referring to fig. 21 or 22, when the feedback module 20 needs to switch to the next first polarity charge feedback mode, the feedback module 20 switches the current charge feedback mode to the next charge feedback mode in the order of QM1-QM 8; conversely, when the feedback module 20 needs to switch to the next second polarity charge feedback mode, the feedback module 20 may switch the current charge feedback mode to the next charge feedback mode according to the order of QM8-QM1, so that the feedback module 20 switches to the other charge feedback modes during the process of the feedback module 20 outputting the N feedback charge signals QR.
It should be noted that the above description is related to solving the capacitance mismatch phenomenon, and actually, according to the charge calculation formula: q=u×c, and the feedback circuit 100 has not only a mismatch phenomenon due to capacitance mismatch but also a mismatch phenomenon due to voltage mismatch when feeding back the charge signal QR. To solve the voltage mismatch problem, please refer to the following:
in some embodiments of the present application, the first voltage signal Vbep output by the voltage output module 10 in the voltage output mode has a first mismatch voltage, where the first mismatch voltages of the first voltage signal Vbep output by the voltage output module 10 in the at least two voltage output modes are not equal, and the first mismatch voltage may be a mismatch voltage caused by mismatch of electronic components (e.g. transistors) of an internal circuit of the voltage output module 10, or may refer to a mismatch voltage caused by mismatch of an introduced external signal (e.g. a bias current signal).
In some embodiments of the present application, referring to fig. 23, the voltage output module 10 includes a plurality of voltage generating sub-modules 11, each voltage generating sub-module 11 may output a first voltage signal Vbep and a second voltage signal Vben, the first mismatch voltages of the first voltage signal Vbep output by each voltage generating sub-module 11 are not equal, the voltage output module 10 implements switching of the voltage output modes by switching the voltage generating sub-modules 11 outputting the first voltage signal Vbep and the second voltage signal Vben, and makes the first mismatch voltages of the first voltage signal Vbep output by the voltage output module 10 in at least two voltage output modes not equal.
As an exemplary example, referring to fig. 24, each voltage generating sub-module 11 includes a current source I1, a current source I2, a switch s1, a switch s2, a transistor BJT1 and a transistor BJT2, when one of the voltage generating sub-modules 11 is turned on, the current source I1 provides a current to the transistor BJT1, the current source I2 provides a current to the transistor BJT2, thereby generating a first voltage signal Vbep at one end of the transistor BJT1 and a second voltage signal Vben at one end of the transistor BJT2, so that each voltage generating sub-module 11 can output the first voltage signal Vbep and the second voltage signal Vben.
Because the transistor BJT1, the transistor BJT2, the current signal input by the current source IuI1, and the current signal input by the current source IuI have mismatch phenomena, the first voltage signal Vbep has a first mismatch voltage, the second voltage signal Vben has a second mismatch voltage, and under the condition that the mismatch of the current signals input by the transistor BJT1, the transistor BJT2, the current source I1, and the current signal input by the current source I2 of each voltage generating sub-module 11 is inconsistent, the first mismatch voltages of the first voltage signal Vbep output by the voltage output module 10 in each voltage output mode are finally unequal.
It will be appreciated that the transistors BJT1 and BJT2 in the above circuits are replaced by other types of electronic components, such as source-to-gate shorted MOS transistors or resistors.
As another exemplary example, referring to fig. 25, wherein the voltage output module 10 includes M1 bias current sources Iu, M1 first switches S1, M1 second switches S2, N1 third switches S3, N1 fourth switches S4, and N1 transistors BJT; the first switches S1 are in one-to-one correspondence with the bias current sources Iu, the first end of each first switch S1 is connected with the corresponding bias current source Iu, and the second end of each first switch S1 is connected with the first ends of N1 third switches S3; the third switches S3 are in one-to-one correspondence with the triodes BJTs, and the second end of each third switch S3 is connected with the corresponding triode BJT; the second switches S2 are in one-to-one correspondence with the bias current sources Iu, the first end of each second switch S2 is connected with the corresponding bias current source Iu, and the second end of each second switch S2 is connected with N1 fourth switches S4; the fourth switches S4 are in one-to-one correspondence with the triode BJTs, and the second end of each fourth switch S4 is connected with the corresponding triode BJT; wherein M1 and N1 are integers greater than 1.
Specifically, when the voltage output module 10 is in a certain voltage output mode, any M2 first switches S1 of the M1 first switches S1 are closed, any N2 second switches S2 of the N1 third switches S3 are closed, and at this time, the M2 bias current sources Iu supply current to the N2 parallel transistors BJT, so as to generate the first voltage signal Vbep between the first switches S1 and the third switches S3. Meanwhile, when the voltage output module 10 is in a certain voltage output mode, any of M1-M2 first switches S1 of M1 second switches S2 are closed, and any of N1-N2 second switches S2 of N1 third switches S3 are closed, so that a second voltage signal Vben is generated between the second switch S2 and the fourth switch S4.
It can be seen that, due to the mismatch phenomenon of the current signals input by the triode BJT and the current source Iu, when the voltage output module 10 switches the switch that is turned on to introduce the current signals of different triode BJTs and current sources Iu, the first mismatch voltage of the first voltage signal Vbep is not equal in different voltage output modes, and the second mismatch voltage of the second voltage signal Vben is also not equal in different voltage output modes.
In some embodiments of the present application, M1, M2, N1, N2 satisfy the following relationship:
M1-M2＝1
N2＝1
for the first voltage signal Vbep, the current source Iu is selected to beSeed (i.e.)>M1) combinations, and the selection of triode BJTs is +.>Seed (i.e.)>N1) combinations, thus the first voltage signal Vbep can correspond to M1 x N1 voltage output modes according to the above combinations; likewise, for the second voltage signal Vben, the current source Iu is selected with +.>Seed (i.eM1) combinations, and the selection of triode BJTs is +.>Seed (i.e.)>N1) combinations, so that the second voltage signal Vben may also correspond to M1×n1 voltage output modes according to the above combinations, and finally, the voltage output module 10 has M1×n1 voltage output modes, and compared to the embodiment in which the voltage output module 10 includes a plurality of voltage generating sub-modules 11, the voltage output module 10 of the above embodiment shares the transistor BJT and the current source Iu, which can simplify the circuit structure while providing a greater number of voltage output modes.
It should be noted that, as described above, for the first input voltage Vbep, the charge mismatch amount dQ resulting in the feedback charge signal mainly affects as capacitance mismatchFor the first voltage difference, the charge mismatch amount dQ of the feedback charge signal is mainly affected by the current and the transistor mismatch, i.e. the first mismatch voltage generated by the first input voltage Vbep (the second mismatch voltage generated by the second input voltage Vben).
Therefore, in the embodiment of the present application, since the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to another voltage output mode, so that the feedback module 20 outputs the feedback charge signal QR according to the first voltage difference VBE generated by different voltage output modes, in the process of outputting the feedback charge signal QR for N times, the charge mismatch amount of the feedback charge signal QR generated by the first voltage difference VBE generated by different voltage output modes can be accumulated, and finally, the mismatch amount of the feedback charge signal QR in the process of outputting the feedback charge signal QR for N times can be quantified through the mismatch voltages of multiple voltage output modes, after the Sigma-Delta modulator is calibrated, the influence of the mismatch voltage suffered by the Sigma-Delta modulator can be reduced, and finally, the voltage measurement accuracy of the Sigma-Delta modulator is facilitated.
In some embodiments of the present application, the voltage output mode of the voltage output module 10 remains unchanged every time the feedback module 20 outputs the feedback charge signal QR only once according to the first voltage signal Vbep. For example, referring to fig. 26, where the current voltage output mode of the voltage output module 10 is VM2 mode, after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep corresponding to the voltage output mode VM2, the voltage output mode of the voltage output module 10 is kept in VM2 mode, and the charge feedback module 20 is changed from the charge feedback mode QM3 to the charge feedback mode QM4, that is, the voltage output mode of the voltage output module 10 is still in VM2 mode when the feedback module 20 outputs the feedback charge signal QR next time.
It should be noted that, for the first voltage difference VBE, the charge mismatch amount dQ of the feedback charge signal mainly affects capacitance mismatch, so each time the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to another voltage output mode, which is favorable for ensuring that the voltage output module 10 switches to the other voltage output mode, and accumulates the mismatch amount of the feedback charge signal QR corresponding to the first voltage difference VBE; and each time the feedback module 20 outputs the feedback charge signal QR once according to the first voltage signal Vbep, the voltage output mode of the voltage output module 10 remains unchanged, so that it can be ensured that when the feedback module 20 outputs the feedback charge signal QR next time according to the first voltage difference VBE, the corresponding mismatch amount of the voltage output mode is collected, which is beneficial to ensuring that the feedback module 20 outputs the feedback charge signal QR at least once according to the first voltage difference VBE corresponding to each voltage output mode.
That is, in the embodiment of the present application, when the feedback module 20 outputs the feedback charge signal QR only once according to the first voltage signal Vbep, the feedback module 20 does not switch the voltage output mode, and only when the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE (or according to the first voltage difference VBE and the first voltage signal Vbep), the feedback module 20 switches the voltage output mode, which is not only beneficial for the voltage output module 10 to switch other voltage output modes, but also can ensure that the feedback module 20 outputs the feedback charge signal QR according to the first voltage difference VBE corresponding to each or part of the voltage output modes.
In some embodiments of the present application, the voltage output module 10 may switch the current voltage output mode to another voltage output mode after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE. For example, referring to fig. 27, the current voltage output mode of the voltage output module 10 is a VM2 mode, and after the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE corresponding to the voltage output mode VM2, the voltage output mode of the voltage output module 10 is switched to a VM3 mode. That is, the voltage output module 10 may switch the current voltage output mode to another voltage output mode after outputting the feedback charge signal QR once.
In some embodiments of the present application, the voltage output module 10 may switch the current voltage output mode to another voltage output mode before the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE. For example, referring to fig. 28, before the feedback module 20 outputs the feedback charge signal QR once according to the first voltage difference VBE, the voltage output module 10 has switched the voltage output mode from the VM2 mode to the VM3 mode, so that in the process of outputting the feedback charge signal QR this time, the feedback module 20 outputs the feedback charge signal QR according to the first voltage difference VBE corresponding to the VM3 mode. That is, the voltage output module 10 may have switched the current voltage output mode to another voltage output mode before outputting the once-feedback charge signal QR.
It should be noted that, the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage difference VBE may mean that the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage difference VBE only, for example, referring to fig. 27 or fig. 28, the feedback module 20 outputs the primary feedback charge signal QR according to the first voltage difference VBE only; meanwhile, it may also refer to the feedback module 20 outputting the once feedback charge signal QR according to the first voltage difference VBE and the first voltage signal Vbep, for example, refer to fig. 29, wherein after the feedback module 20 outputs the once feedback charge signal QR according to the first voltage signal Vbep and the first voltage difference VBE, the voltage output mode of the voltage output module 10 is switched from the VM2 mode to the VM3 mode.
In some embodiments of the present application, for example, for embodiments in which the feedback charge signal QR may be a positive charge signal or a negative charge signal, after the feedback module 20 outputs the feedback charge signal QR of the first polarity once according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to the next voltage output mode; before the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to the previous voltage output mode; the first polarity is opposite to the second polarity, and the next voltage output mode is the voltage output mode in which the voltage output module 10 is located when the feedback module 20 outputs the feedback charge signal QR next time, and the last voltage output mode is the voltage output mode in which the voltage output module 10 is located when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE last time.
As an example, referring to fig. 30, when the mth feedback charge signal QR is output, the voltage output module 10 is in the voltage output mode VM2, the feedback module 20 outputs the once positively charged feedback charge signal QR according to the first voltage difference VBE corresponding to the voltage output mode VM2, and the voltage output module 10 switches the voltage output mode VM2 to the voltage output mode VM3 after outputting the once positively charged feedback charge signal QR; when outputting the m+1th feedback charge signal QR, the voltage output module 10 switches the voltage output mode VM3 to the voltage output mode VM2 before outputting the negatively charged feedback charge signal QR because the negatively charged feedback charge signal QR is output according to the first voltage difference VBE, and the feedback module 20 outputs the negatively charged feedback charge signal QR once according to the first voltage difference VBE corresponding to the voltage output mode VM 2; when outputting the m+2th feedback charge signal QR, the feedback module 20 continues to output the once-positively-charged feedback charge signal QR according to the first voltage difference VBE corresponding to the voltage output mode VM2, and the voltage output module 10 switches the voltage output mode VM2 to the voltage output mode VM3 after outputting the once-positively-charged feedback charge signal QR.
As another example, referring to fig. 31, in which, when outputting the mth feedback charge signal QR, the voltage output module 10 is in the voltage output mode VM2, and the feedback module 20 outputs the positively charged feedback charge signal QR once according to the first voltage difference VBE corresponding to the voltage output mode VM 2; when outputting the m+1th feedback charge signal QR, the feedback module 20 outputs the first feedback charge signal QR according to the first voltage signal Vbep corresponding to the voltage output mode VM 3; while outputting the m+2th feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR with negative charge once according to the first voltage difference VBE corresponding to the voltage output mode VM 2; when outputting the m+3rd feedback charge signal QR, the feedback module 20 continues to output the positively charged feedback charge signal QR once according to the first voltage difference VBE corresponding to the voltage output mode VM 2.
As can be seen from fig. 30 and 31, in the process of outputting the mth feedback charge signal QR and the (m+2) th feedback charge signal QR, the feedback module 20 outputs the feedback charge signals QR of the first polarity and the second polarity in the same voltage output mode (VM 2) according to the first voltage difference VBE, respectively, so that the mismatch amount of the feedback charge signals QR in the voltage output mode (VM 2) is cancelled by the positive and negative charges; in the process of outputting the feedback charge signal QR of the m+2th (m+3rd), the feedback module 20 continues to output the feedback charge signal QR of one time with positive charges according to the first voltage difference VBE corresponding to the voltage output mode VM2, so as to facilitate accumulation of the charge mismatch amount of the first polarity (or the second polarity) corresponding to the first voltage difference VBE of all the voltage output modes, and avoid the phenomenon that the mismatch amount of part of the voltage output modes is not accumulated and cannot perform gain calibration on the Sigma-Delta modulator due to positive and negative charge cancellation.
In some embodiments of the present application, the voltage output module 10 switches the current voltage output mode to the next voltage output mode in a first preset order based on a plurality of voltage output modes; the voltage output module 10 switches the current voltage output mode to the previous voltage output mode according to a second preset sequence based on the plurality of voltage output modes; wherein the first preset sequence is opposite to the second preset sequence.
For example, referring to fig. 30 or 31, when the voltage output module 10 needs to switch to the next voltage output mode, the voltage output module 10 switches the current voltage output mode to the next voltage output mode in the order of VM1 to VM 8; on the contrary, when the voltage output module 10 needs to switch to the previous voltage output mode, the voltage output module 10 switches the current voltage output mode to the next voltage output mode according to the sequence of VM8-VM1, so that the voltage output module 10 switches to other voltage output modes in the process of the feedback module 20 outputting the N times of feedback charge signals QR.
For another example, referring to fig. 32, when the voltage output module 10 needs to switch to the next voltage output mode, the voltage output module 10 switches the current voltage output mode VM1 to the next voltage output mode VM2 in the clockwise order of VM1 to VM 12; referring to fig. 33, when the voltage output module 10 needs to switch to the previous voltage output mode, the voltage output module 10 switches the current voltage output mode VM2 to the previous voltage output mode VM1 in the counterclockwise order of VM12-VM 1.
It should be noted that, when the feedback circuit 100 outputs the feedback charge signal QR with the second polarity from the beginning, i.e. according to the first voltage difference VBE, the voltage output mode of the voltage output module 10 may be switched to the previous voltage output mode according to the second preset sequence in the initial voltage output mode, for example, referring to fig. 32, if the initial voltage output mode of the voltage output module 10 is VM1, the feedback circuit 100 outputs the feedback charge signal QR for the first time, since the feedback charge signal QR with the second polarity is output according to the first voltage difference VBE this time, before the feedback charge signal QR with the second polarity is output, the voltage output module 10 switches the voltage output mode VM1 to the voltage output mode VM12, and the feedback module 20 outputs the feedback charge signal QR with the second polarity once according to the first voltage difference VBE corresponding to the voltage output mode VM 12.
In some embodiments of the present application, referring to fig. 34, the voltage output modes of the voltage output module 10 include a first polarity voltage output mode and a second polarity voltage output mode, wherein the first polarity voltage output mode is a voltage output mode corresponding to the feedback module 20 outputting the feedback charge signal QR of the first polarity according to the first voltage difference VBE, and the second polarity voltage output mode is a voltage output mode corresponding to the feedback module 20 outputting the feedback charge signal QR of the second polarity according to the first voltage difference VBE.
Specifically, after the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to the next first polarity voltage output mode, where the voltage output module 10 is in the voltage output mode when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE next time.
For example, referring to fig. 35, when the mth feedback charge signal QR is output, the voltage output module 10 is in the first polarity voltage output mode VM2, and the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the voltage output mode VM 2; when the feedback charge signal QR is output for the m+a time (a is greater than or equal to 1), the voltage output module 10 is in the first polarity voltage output mode VM3, so that the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the voltage output mode VM3, so as to accumulate the charge mismatch amounts of the first polarity corresponding to the first voltage difference VBE of all the voltage output modes.
On the contrary, after the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage difference VBE, the voltage output module 10 switches the current voltage output mode to the next second polarity voltage output mode, where the next second polarity voltage output mode is the voltage output mode in which the voltage output module 10 is located when the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage difference VBE next time.
For example, referring to fig. 36, when the mth feedback charge signal QR is output, the voltage output module 10 is in the second polarity voltage output mode VM1, and the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage difference VBE corresponding to the voltage output mode VM 1; when the feedback charge signal QR is output for the m+b time (b is greater than or equal to 1), the voltage output module 10 is in the second polarity voltage output mode VM2, so that the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the first voltage difference VBE corresponding to the voltage output mode VM2, so as to accumulate the charge mismatch amounts of the second polarity corresponding to the first voltage difference VBE of all the voltage output modes.
That is, when the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE, the output mode of the voltage output module 10 is switched according to the voltage output mode of the first polarity, so that the feedback module 20 can output the feedback charge signal QR of the first polarity according to the first voltage differences VBE corresponding to all the voltage modes, thereby accumulating the charge mismatch amount of the first polarity. When the feedback module 20 outputs the feedback charge signal QR with the second polarity according to the first voltage difference VBE, the output mode of the voltage output module 10 is switched according to the voltage output mode with the second polarity, so that the feedback module 20 can output the feedback charge signal QR with the second polarity according to the first voltage differences VBE corresponding to all the voltage modes, thereby accumulating the charge mismatch amount with the second polarity. After obtaining the charge mismatch amount of the first polarity and the charge mismatch amount of the second polarity, the charge mismatch amount of the first polarity and the charge mismatch amount of the second polarity can be subtracted to be the total charge mismatch amount and the mismatch voltage can be quantified.
It can be appreciated that the voltage output module 10 may also switch the current voltage output mode to the next first polarity voltage output mode before the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE; alternatively, the voltage output module 10 may switch the current voltage output mode to the previous voltage output mode before the feedback module 20 outputs the feedback charge signal QR of the second polarity once according to the first voltage difference VBE.
As an exemplary illustration of the operation of the feedback circuit 100 of the present application, referring to fig. 37, when outputting the mth feedback charge signal QR, the voltage output module 10 is in the second polarity voltage output mode VM1, and the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the voltage output mode VM 1; when outputting the m+1th feedback charge signal QR, the second polarity voltage output mode is changed from the VM1 voltage output mode to the VM2 voltage output mode, and the voltage output module 10 is in the first polarity voltage output mode VM2 because the first polarity feedback charge signal QR is output this time, and the feedback module 20 outputs the first polarity feedback charge signal QR according to the first voltage difference VBE corresponding to the first polarity voltage output mode VM 2; when outputting the m+2th feedback charge signal QR, the first polarity voltage output mode is changed from the VM2 voltage output mode to the VM3 voltage output mode, and the voltage output module 10 is in the second polarity voltage output mode VM2 because the second polarity feedback charge signal QR is output at this time, and the feedback module 20 outputs the second polarity feedback charge signal QR according to the first voltage difference VBE corresponding to the second polarity voltage output mode VM 2.
As another exemplary illustration of the operation of the feedback circuit 100 of the present application, referring to fig. 38, fig. 38 shows another operation schematic diagram of the feedback circuit 100 in the embodiment of the present application, when outputting the mth feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the voltage output mode VM 2; while outputting the m+1th feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the second polarity voltage output mode VM 1; while outputting the m+2th feedback charge signal QR, the feedback module 20 outputs the feedback charge signal QR of the first polarity according to the first voltage difference VBE corresponding to the first polarity voltage output mode VM 3.
In some embodiments of the present application, the voltage output module 10 switches the current voltage output mode to the next first polarity voltage output mode in a third preset order based on the plurality of voltage output modes; the voltage output module 10 switches the current voltage output mode to the next second polarity voltage output mode according to a fourth preset sequence based on the plurality of voltage output modes; wherein the third preset sequence is the same as or opposite to the fourth preset sequence.
For example, referring to fig. 37 or 38, when the voltage output module 10 needs to switch to the next first polarity voltage output mode, the voltage output module 10 switches the current voltage output mode to the next voltage output mode in the order of VM1-VM 8; conversely, when the voltage output module 10 needs to switch to the next second polarity voltage output mode, the voltage output module 10 may switch the current voltage output mode to the next voltage output mode according to the sequence VM8-VM1, so that the voltage output module 10 switches to other voltage output modes during the process of outputting the N feedback charge signals QR by the feedback module 20.
In order to better implement the feedback circuit 100 in the embodiments of the present application, the present application further provides a voltage detection circuit, which includes the feedback circuit 100 according to any one of the embodiments above, based on the feedback circuit 100. As an exemplary illustration, referring to fig. 39, fig. 39 shows a schematic block diagram of a voltage detection circuit according to an embodiment of the present application, where the voltage detection circuit may include:
a voltage input circuit 200, the voltage input circuit 200 is configured to output a charge signal Qin to be measured N times according to a voltage signal Vin to be measured;
the feedback circuit 100 according to any of the above embodiments, wherein the first voltage difference VBE has a first temperature coefficient, the first voltage signal Vbep has a second temperature coefficient, one of the first temperature coefficient and the second temperature coefficient is a positive temperature coefficient, and the other is a negative temperature coefficient;
The metering circuit 300, the metering circuit 300 is configured to integrate the N feedback charge signals QR output by the feedback circuit 100 and the N charge signals Qin to be measured output by the voltage input circuit 200, and determine the charge signal Qin to be measured corresponding to the voltage signal Vin to be measured according to the first times, the second times, the first polarity feedback charge signals QR and the second polarity feedback charge signals QR;
the first number is the number of times that the feedback module 20 outputs the feedback charge signal QR of the first polarity, and the second number is the number of times that the feedback module 20 outputs the feedback charge signal QR of the second polarity, where the first polarity is opposite to the second polarity;
the temperature coefficient of the feedback charge signal QR is zero, and the integration result of the metering circuit 300 on the N feedback charge signals QR and the N charge signals Qin to be measured is smaller than the preset voltage Vref.
It should be noted that, when the feedback circuit 100 is applied to voltage detection, the feedback charge signal QR output by the feedback module 20 is a charge signal generated by the reference voltage with zero temperature coefficient, that is, the temperature coefficient of the feedback charge signal QR is zero, so as to avoid inaccurate voltage measurement caused by the influence of the ambient temperature when the voltage is measured. Meanwhile, since the integration result of the metering circuit 300 on the N feedback charge signals QR and the N charge signals Qin to be measured is smaller than the preset voltage and can be ignored, if the charge amounts of the feedback charge signals QR output by the feedback circuit 100 each time are equal, the charge signals Qin to be measured corresponding to the voltage signal Vin to be measured can be calculated according to the following formula:
Where N is the number of times the voltage input circuit 200 outputs the charge signal Qin to be measured, QN1 is the amount of charge of the charge signal Qin to be measured, QN2 is the amount of charge of the feedback charge signal QR output by the feedback circuit 100 each time, Y1 is the number of times the feedback module 20 outputs the first polarity feedback charge signal QR, Y2 is the number of times the feedback module 20 outputs the second polarity feedback charge signal QR, and Y3 is the number of times the feedback module 20 outputs the amount of charge of 0.
It can be seen that the charge signal Qin to be measured can be calculated according to the above formula, and after the charge signal Qin to be measured is obtained, the voltage signal 40 Vin to be measured can be calculated, and the purpose of voltage measurement is achieved.
In some embodiments of the present application, with continued reference to fig. 40, fig. 40 shows another block diagram of a voltage measurement circuit in embodiments of the present application, where the metering circuit 300 includes an integrating module 310, a comparing module 320, and a counting module 330. Specifically, the integrating module 310 is configured to integrate the feedback charge signal QR and the charge signal Qin to be measured and output an integrated voltage signal VI, and the comparing module 320 is configured to compare the integrated voltage signal VI with a preset voltage Vref and output a control signal VC after the integrating module integrates the charge signal Qin to be measured and/or the feedback charge signal QR at least once every time, where the control signal VC is configured to control the feedback module 20 to output the feedback charge signal QR of the first polarity or the feedback charge signal QR of the second polarity, so that an integration result of the integrating module 310 on the feedback charge signal QR N times and the charge signal Qin to be measured is close to or equal to zero; the counting module 330 is configured to record the number of times the feedback module 20 outputs the feedback charge signal QR of the first polarity and the number of times the feedback module 20 outputs the feedback charge signal QR of the second polarity according to the control signal VC, so as to obtain the first number of times and the second number of times and calculate the voltage value of the voltage to be measured.
As an exemplary embodiment, referring to fig. 41, fig. 41 shows a schematic circuit structure of a voltage measurement circuit in the embodiment of the present application, where the feedback circuit 100 only shows a part of the circuit structure of the feedback module 20, and omits the counting module 330 of the metering circuit 300, and the process of measuring the voltage of the present application is illustrated by taking this figure as an example.
When the measurement is started, the switches S7 and S8 are closed, the switches S1< i > and S4< i > are closed, the switches S5< i > and S6< i > are open, the switches S13 and S15 are open, the switches S14 and S16 are closed, the switches S01 and S02 are open, the switch S03 is closed, and the voltage signal Vin to be measured charges the capacitors cs1< i > and cs2< i >; after the capacitors cs1< i >, cs2< i > are charged, the switches S1< i >, S2< i > are opened, the switches S5< i >, S6< i > are closed, the switches S13, S15 are closed, the switches S14, S16 are opened, at this time, the capacitors cs1< i >, cs2< i > release the charge signal Qin to be measured due to the voltage change at two ends, the magnitude is (V0-Vcm) ×cs, cs is the capacitance value of cs1< i >, cs2< i >, and the capacitor of the integration module 310 receives the charge signal Qin to be measured and makes the output signal voltage of the integration module 310 rise, and when the output signal voltage of the integration module 310 is higher than the preset reference voltage, the comparator outputs the control signal VC at high level and completes one cycle.
At the beginning of the next cycle, the voltage input circuit 200 repeats the above-mentioned input process of the charge signal Qin to be measured, and the feedback circuit 100 receives the high-level control signal VC output from the comparator of the previous cycle and controls the switches S01 and S02 and the switch S03, so that the feedback circuit 100 outputs the negatively charged feedback charge signal, thereby the output signal voltage of the integrator decreases, and when the output signal voltage of the integrating module 310 is lower than the preset reference voltage, the comparator outputs the low-level control signal VC and completes one cycle.
At the beginning of the next cycle, the voltage input circuit 200 repeats the above-mentioned input process of the charge signal Qin to be measured, and the feedback circuit 100 receives the low-level control signal VC output from the comparator of the previous cycle and controls the switches S01 and S02 and the switch S03, so that the feedback circuit 100 outputs the positively charged feedback charge signal, thereby reducing the output signal voltage of the integrator, and when the output signal voltage of the integrating module 310 is still lower than the preset reference voltage, the comparator outputs the high-level control signal VC and completes one cycle.
After the above process is repeatedly executed for a plurality of times, finally, the charge signal Qin to be measured and the voltage to be measured can be calculated according to the feedback times of the positive and negative feedback charge signals and the input times of the charge signal Qin to be measured.
In order to better implement the feedback circuit 100 in the embodiment of the present application, the present application further provides a temperature detection circuit based on the feedback circuit 100, referring to fig. 42, fig. 42 shows a schematic block diagram of the temperature detection circuit in the embodiment of the present application, where the temperature detection circuit includes:
the feedback circuit 100 according to any of the above embodiments, wherein the first voltage difference VBE has a first temperature coefficient, the first voltage signal Vbep has a second temperature coefficient, one of the first temperature coefficient and the second temperature coefficient is a positive temperature coefficient, and the other is a negative temperature coefficient;
the metering circuit 300, the metering circuit 300 is configured to integrate the N times of feedback charge signals QR output by the feedback circuit 100, and determine a voltage value of the first voltage difference VBE according to the first times, the second times and the reference voltage;
the first number of times is the number of times that the feedback module 20 outputs the feedback charge signal QR based on the first voltage signal Vbep, and the second number of times is the number of times that the feedback module 20 outputs the feedback charge signal QR based on the first voltage difference VBE;
the reference voltage is a zero temperature coefficient voltage determined based on the first voltage signal Vbep and the first voltage difference VBE, and the integration result of the metering circuit 300 on the N times feedback charge signal QR is close to or equal to zero.
It should be noted that, since the first voltage difference VBE and the first voltage signal Vbep have temperature coefficients, the corresponding temperature can be calculated by measuring the first voltage difference VBE or the first voltage signal Vbep. Specifically, the feedback module 20 outputs the feedback charge signal QR based on the first voltage signal Vbep, and the feedback module 20 outputs the feedback charge signal QR based on the first voltage difference VBE may be calculated as follows:
QX1＝-a1*Vbep*C
QX2＝b1*VBE*C
Vref＝a1*Vbep+b1*VBE
wherein QX1 is the charge amount of the feedback charge signal QR output by the feedback module 20 based on the first voltage signal Vbep, QX2 is the charge amount of the feedback charge signal QR output by the feedback module 20 based on the first voltage difference VBE, C is the capacitance value of the corresponding capacitor, vref is the zero temperature coefficient reference voltage determined by the first voltage signal Vbep and the first voltage difference VBE, and a1 and b1 are coefficients corresponding to the zero temperature coefficient reference voltage.
Since the integration result of the metering circuit 300 on the N-time charge signal Qin to be measured is close to or equal to zero, it can be seen that:
QX1*X1+QX2*X2＝0
wherein X1 is the number of times the feedback module 20 outputs the feedback charge signal QR based on the first voltage signal Vbep, and X2 is the number of times the feedback module 20 outputs the feedback charge signal QR based on the first voltage difference VBE.
The above is converted:
QX2*X2+QX1*X1＝-QX1*X1+QX1*X1
QX2(X1+X2)＝X1(-QX1+QX2)
Substituting the reference voltage calculation formula, QX1 and QX2 into the above formula, it can be seen that:
b1*VBE*C(X1+X2)＝X1(Vref*C)
therefore, the first voltage signal Vbep can be calculated as follows:
it can be seen that, by recording the number of times the feedback module 20 outputs the feedback charge signal QR based on the first voltage signal Vbep, the number of times the feedback module 20 outputs the feedback charge signal QR based on the first voltage difference VBE, and the zero temperature coefficient voltage Vref determined by the first voltage signal Vbep and the first voltage difference VBE, the magnitude of the first voltage difference VBE can be obtained, so as to calculate the corresponding ambient temperature.
It will be appreciated that the magnitude of the first voltage signal Vbep may be measured to calculate the corresponding ambient temperature.
As an exemplary embodiment, referring to fig. 43, fig. 43 shows a schematic circuit structure of the voltage measurement circuit in the embodiment of the present application, where the feedback circuit 100 only shows a part of the circuit structure of the feedback module 20, and the process of measuring the voltage of the present application is illustrated by taking this figure as an example.
At the start of temperature measurement, the switches S13, S15 are opened, the switches S14, S16 are closed, and the feedback circuit 100 outputs a negatively charged feedback charge signal by controlling the switches S01, S02 and S03, whereby the output signal voltage of the integrator decreases, and when the output signal voltage of the integration module 310 is lower than a preset reference voltage, the comparator outputs a control signal VC of a low level, and one cycle is completed.
At the beginning of the next cycle, the feedback circuit 100 receives the low electric control signal VC output by the comparator during the previous cycle, and controls the switches S01 and S02 and the switch S03, so that the feedback circuit 100 outputs the positively charged feedback charge signal, and thus the output signal voltage of the integrator increases, and when the output signal voltage of the integrating module 310 is higher than the preset reference voltage, the comparator outputs the high control signal VC, and completes one cycle.
After the above process is repeatedly executed for a plurality of times, the first voltage signal Vbep (or the first voltage difference VBE) may be calculated according to the feedback times of the positive and negative feedback charge signals, so as to obtain a corresponding temperature value.
The embodiment of the application also provides a chip, which comprises the voltage detection circuit or the temperature detection circuit. The Chip (Integrated Circuit, IC) is also referred to as a Chip, which may be, but is not limited to, a SOC (System on Chip) Chip, a SIP (System in package) Chip.
The embodiment of the application also provides electronic equipment, which comprises an equipment main body and the chip arranged in the equipment theme. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutritional scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a quick charger, an on-board charger, an adapter, a display, a USB (Universal Serial Bus ) docking station, a stylus, a real wireless headset, an automotive center control screen, an automobile, an intelligent wearable device, a mobile terminal, an intelligent home device. The intelligent wearing equipment comprises, but is not limited to, an intelligent watch, an intelligent bracelet and a cervical vertebra massage instrument. Mobile terminals include, but are not limited to, smartphones, notebook computers, tablet computers, POS (point of sales terminal, point of sale terminal) machines. The intelligent household equipment comprises, but is not limited to, an intelligent socket, an intelligent electric cooker, an intelligent sweeper and an intelligent lamp.
The foregoing description is not intended to limit the preferred embodiments of the present application, but is not intended to limit the scope of the present application, and any such modifications, equivalents and adaptations of the embodiments described above in accordance with the principles of the present application should and are intended to be within the scope of the present application, as long as they do not depart from the scope of the present application.

Claims (13)

1. A feedback circuit for outputting N feedback charge signals, N being an integer greater than 1, the feedback circuit comprising:
the voltage output module is used for outputting a first voltage signal and a second voltage signal, and a first voltage difference is formed between the first voltage signal and the second voltage signal;
the feedback module is used for outputting a feedback charge signal according to the first voltage signal and/or the first voltage difference;
the feedback module is provided with a plurality of charge feedback modes, and mismatch capacitances of the feedback module in at least two charge feedback modes are unequal;
Each time the feedback module outputs the feedback charge signal once according to the first voltage signal, the feedback module switches the current charge feedback mode to another charge feedback mode, so that the feedback module outputs the feedback charge signal in different charge feedback modes.
2. The feedback circuit of claim 1, wherein the charge feedback mode of the feedback module remains unchanged each time the feedback module outputs the feedback charge signal only once according to the first voltage difference.
3. The feedback circuit of claim 1, wherein after the feedback module outputs the feedback charge signal once according to the first voltage signal, the feedback module switches a current charge feedback mode to another charge feedback mode; or alternatively
Before the feedback module outputs the feedback charge signal once according to the first voltage signal, the feedback module switches the current charge feedback mode to another charge feedback mode.
4. The feedback circuit of claim 3, wherein after the feedback module outputs the feedback charge signal of a first polarity according to the first voltage signal, the feedback module switches a current charge feedback mode to a next charge feedback mode;
Before the feedback module outputs the feedback charge signal with the second polarity once according to the first voltage signal, the feedback module switches the current charge feedback mode to the previous charge feedback mode;
the first polarity is opposite to the second polarity, the next charge feedback mode is a charge feedback mode in which the feedback module is in when the feedback module outputs the feedback charge signal next time, and the last charge feedback mode is a charge feedback mode in which the feedback module is in when the feedback module outputs the feedback charge signal of the first polarity according to the first voltage signal last time.
5. The feedback circuit of claim 4, wherein the feedback module switches a current charge feedback mode to the next charge feedback mode in a fifth preset order based on the plurality of charge feedback modes;
the feedback module switches the current charge feedback mode to the last charge feedback mode according to a sixth preset sequence based on the plurality of charge feedback modes;
wherein the fifth preset order is opposite to the sixth preset order.
6. The feedback circuit of claim 3, wherein after the feedback module outputs the feedback charge signal of a first polarity according to the first voltage signal, the feedback module switches a current charge feedback mode to a next charge feedback mode of the first polarity;
After the feedback module outputs the feedback charge signal of the second polarity once according to the first voltage signal, the feedback module switches the current charge feedback mode to the next charge feedback mode of the second polarity;
the first polarity is opposite to the second polarity, and the next charge feedback mode with the first polarity is the charge feedback mode in which the feedback module is located when the feedback module outputs the feedback charge signal with the first polarity according to the first voltage signal;
the next second polarity charge feedback mode is a charge feedback mode in which the feedback module is located next time the feedback module outputs the feedback charge signal of the second polarity according to the first voltage signal.
7. The feedback circuit of claim 6, wherein the feedback module switches a current charge feedback mode to a next first polarity charge feedback mode in a seventh preset order based on the plurality of charge feedback modes;
the feedback module switches the current charge feedback mode to the next first polarity charge feedback mode according to an eighth preset sequence based on the plurality of charge feedback modes;
Wherein the seventh preset sequence is the same as or opposite to the eighth preset sequence.
8. The feedback circuit of claim 1, wherein the feedback module comprises a plurality of charge feedback sub-modules;
each charge feedback sub-module is used for outputting a feedback charge signal, and the mismatch capacitance of each charge feedback sub-module is unequal;
the feedback module outputs a feedback charge signal according to the first voltage signal and/or the first voltage difference in different charge feedback modes.
9. The feedback circuit of claim 8, wherein each of the charge feedback sub-modules comprises a first sub-switch, a second sub-switch, a third sub-switch, and a first capacitance;
the first end of the first sub-switch is used for accessing the first voltage signal, and the second end of the first sub-switch is connected with the first end of the first capacitor;
the first end of the second sub-switch is used for being connected with the second voltage signal, and the second end of the second sub-switch is connected with the first end of the first capacitor;
the first end of the third sub-switch is used for being connected with a grounding end, and the second end of the third sub-switch is connected with the first end of the first capacitor.
10. A voltage detection circuit comprising a feedback circuit according to any one of claims 1 to 9.
11. A temperature detection circuit, comprising:
the feedback circuit of any of claims 1 to 9, the first voltage difference having a first temperature coefficient, the first voltage signal having a second temperature coefficient, one of the first temperature coefficient and the second temperature coefficient being a positive temperature coefficient, the other being a negative temperature coefficient;
the metering circuit is used for integrating the N times of feedback charge signals output by the feedback circuit and determining the voltage value of the first voltage difference according to the first times, the second times and the reference voltage;
the first frequency is the frequency of the feedback module outputting a feedback charge signal based on the first voltage signal, and the second frequency is the frequency of the feedback module outputting a feedback charge signal based on the first voltage difference;
the reference voltage is zero temperature coefficient voltage determined based on the first voltage signal and the first voltage difference, and the integration result of the metering circuit on the feedback charge signal for N times is smaller than a preset voltage.
12. A chip, comprising:
the voltage detection circuit of claim 10; and/or
The temperature detection circuit of claim 11.
13. An electronic device comprising a device body and the chip of claim 12 provided on the device body.
CN202410009995.1A 2024-01-03 2024-01-03 Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment Pending CN117833926A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410009995.1A CN117833926A (en) 2024-01-03 2024-01-03 Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410009995.1A CN117833926A (en) 2024-01-03 2024-01-03 Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment

Publications (1)

Publication Number Publication Date
CN117833926A true CN117833926A (en) 2024-04-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410009995.1A Pending CN117833926A (en) 2024-01-03 2024-01-03 Feedback circuit, voltage detection circuit, temperature detection circuit, chip and electronic equipment

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CN (1) CN117833926A (en)

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