CN117832356A

CN117832356A - Light-emitting diode chip, display substrate, preparation method of light-emitting diode chip and display device

Info

Publication number: CN117832356A
Application number: CN202211200707.8A
Authority: CN
Inventors: 王明星; 曲燕; 李伟; 闫华杰; 孙倩; 焦志强
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2022-09-29
Filing date: 2022-09-29
Publication date: 2024-04-05

Abstract

The embodiment of the disclosure provides a light emitting diode chip, a display substrate, a preparation method of the light emitting diode chip and the display substrate, and a display device. The light emitting diode chip includes: the epitaxial structure comprises a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern which are stacked, wherein the second semiconductor patterns of the epitaxial structures are communicated with each other to form a second semiconductor layer; the passivation layer is positioned on one side of the first semiconductor pattern, which is far away from the second semiconductor layer, and a plurality of first through holes which are in one-to-one correspondence with the first semiconductor pattern are formed on the passivation layer; the first electrodes are positioned on one side of the passivation layer, which is far away from the second semiconductor layer, and correspond to the first semiconductor patterns one by one, and are electrically connected with the corresponding first semiconductor patterns through the corresponding first through holes; and the second electrodes are positioned on one side of the second semiconductor layer away from the light-emitting pattern and are electrically connected with the second semiconductor layer.

Description

Light-emitting diode chip, display substrate, preparation method of light-emitting diode chip and display device

Technical Field

The disclosure relates to the technical field of display, in particular to a light emitting diode chip, a display substrate, a preparation method of the display substrate and a display device.

Background

The micro light emitting diode has the advantages of high brightness, high contrast, quick response and low power consumption, and the thin film, the microminiaturization and the matrixing of the display panel can be realized by integrating the high-density light emitting device array formed by the micro light emitting diode on the substrate.

Disclosure of Invention

The embodiment of the disclosure provides a light emitting diode chip, a display substrate, a preparation method of the light emitting diode chip and the display substrate, and a display device.

In a first aspect, embodiments of the present disclosure provide a light emitting diode chip, including:

the semiconductor device comprises a plurality of epitaxial structures, wherein a gap is reserved between any two epitaxial structures, the epitaxial structures comprise a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern which are stacked, and the second semiconductor patterns of the epitaxial structures are communicated with each other to form a second semiconductor layer;

the passivation layer is positioned on one side of the first semiconductor pattern away from the second semiconductor layer, and a plurality of first through holes which are in one-to-one correspondence with the first semiconductor pattern are formed on the passivation layer;

the first electrodes are positioned on one side of the passivation layer away from the second semiconductor layer, the first electrodes are in one-to-one correspondence with the first semiconductor patterns, and the first electrodes are electrically connected with the corresponding first semiconductor patterns through the corresponding first through holes;

And a plurality of second electrodes located at a side of the second semiconductor layer away from the light emitting pattern and electrically connected with the second semiconductor layer.

In some embodiments, the epitaxial structure corresponds to a plurality of second electrodes, and orthographic projections of the epitaxial structure corresponding to the plurality of second electrodes on the second semiconductor layer surround orthographic projections of the light emitting pattern on the second semiconductor layer within the same epitaxial structure.

In a second aspect, an embodiment of the present disclosure provides a display substrate, including a driving back plate and a plurality of light emitting diode chips disposed on the driving back plate and arranged in an array, where the light emitting diode chips adopt the light emitting diode chips in the first aspect; wherein,

the drive backboard comprises a plurality of connection pads;

the first electrode in the light emitting diode chip is electrically connected with the corresponding connection pad.

In some embodiments, the display substrate further comprises:

and the conductive connecting layer is positioned at one side of the second electrode far away from the driving backboard and is electrically connected with the second electrode in the light-emitting diode chip.

In some embodiments, the conductive connection layer is made of a conductive shading material, and a plurality of first light emitting holes corresponding to the epitaxial structure one by one are formed in the conductive connection layer;

The orthographic projection of the first light emitting hole on the second semiconductor layer is overlapped with the orthographic projection of the light emitting pattern on the second semiconductor layer in the corresponding epitaxial structure;

the display substrate further includes: the light processing patterns are located in the corresponding first light emitting holes, at least one light processing pattern is a color conversion pattern, and the color conversion pattern is configured to convert preset color light emitted by the light emitting pattern into other color light.

In some embodiments, the display substrate further comprises:

the color film layer is positioned on one side of the conductive connecting layer far away from the epitaxial structure and comprises a black matrix pattern 71 and a plurality of color filter patterns;

the black matrix pattern 71 is provided with a plurality of second light emitting holes corresponding to the first light emitting holes one by one, the orthographic projection of the first light emitting holes on the black matrix overlaps with the corresponding second light emitting holes, and the color filter pattern is positioned in the second light emitting holes.

In some embodiments, the orthographic projection of the second light exit holes on the black matrix completely covers the corresponding first light exit holes.

In some embodiments, the display substrate further comprises:

the packaging layer is positioned between the light processing pattern and the second semiconductor layer, a plurality of second through holes are formed on the packaging layer, orthographic projection of the packaging layer on the conductive connecting layer covers the light processing pattern, and orthographic projection of the second through holes on the second semiconductor layer covers the second electrode;

the conductive connection layer is electrically connected with the second electrode through the second via hole.

In some embodiments, the preset color light is blue light;

the other color light includes at least one of red light, green light, cyan light, magenta light, and yellow light.

In some embodiments, the conductive connection layer has a thickness of 10-100 μm.

In some embodiments, the display substrate further comprises:

and the filling layer is filled between the driving backboard and the light-emitting diode chip and between adjacent light-emitting diode chips.

In a third aspect, an embodiment of the present disclosure provides a method for preparing a light emitting diode chip, where the method is used to prepare the light emitting diode chip of the first aspect, and the method includes:

Forming a plurality of epitaxial structures, wherein gaps are reserved between any two epitaxial structures, the epitaxial structures comprise first semiconductor patterns, light-emitting patterns and second semiconductor patterns which are stacked, and the second semiconductor patterns of the epitaxial structures are communicated with each other to form a second semiconductor layer;

forming a passivation layer, wherein the passivation layer is positioned on one side of the first semiconductor pattern away from the second semiconductor layer, and a plurality of first through holes which are in one-to-one correspondence with the first semiconductor pattern are formed on the passivation layer;

forming a plurality of first electrodes, wherein the first electrodes are positioned on one side of the passivation layer, which is far away from the second semiconductor layer, and are in one-to-one correspondence with the first semiconductor patterns, and the first electrodes are electrically connected with the corresponding first semiconductor patterns through the corresponding first through holes;

and forming a plurality of second electrodes, wherein the second electrodes are positioned on one side of the second semiconductor layer away from the light emitting pattern and are electrically connected with the second semiconductor layer.

In some embodiments, the step of forming a plurality of epitaxial structures includes:

providing a first substrate base plate;

forming a buffer layer and an epitaxial layer on one side of the first substrate in sequence; the epitaxial layer comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are sequentially stacked, and the second semiconductor layer is in contact with the buffer layer;

And patterning the epitaxial layer to form a plurality of epitaxial structures.

In some embodiments, prior to the step of forming the plurality of second electrodes, the method of preparing further comprises:

providing a transition substrate, and fixing one side surface of the passivation layer far away from the second semiconductor layer pattern with the transition substrate;

sequentially removing the first substrate base plate and the buffer layer to expose the second semiconductor layer;

the step of forming a plurality of second electrodes includes: a plurality of second electrodes are formed on a side of the second semiconductor layer remote from the light emitting pattern.

In a fourth aspect, an embodiment of the present disclosure provides a method for manufacturing a display substrate, including:

preparing a light-emitting diode chip by adopting the preparation method of the third aspect;

providing a driving backboard, wherein the driving backboard comprises a plurality of connecting pads;

and electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad.

In some embodiments, the step of electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad includes, before the step of manufacturing, the method further includes:

and removing the transition substrate.

In some embodiments, after the step of electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad, the manufacturing method further includes:

forming a pair of cartridge substrates comprising: the device comprises a second substrate base plate and a conductive connecting layer positioned at one side of the second substrate base plate;

and fixing the box-pairing substrate and the plurality of light-emitting diode chips formed on the driving backboard, wherein the conductive connecting layer is positioned on one side of the second electrode far away from the driving backboard, and the conductive connecting layer is electrically connected with the second electrodes in the light-emitting diode chips.

In some embodiments, the step of forming the pair of cartridge substrates comprises:

providing a second substrate base plate;

sequentially forming a color film layer, a conductive connecting layer and a packaging layer on the second substrate;

the conductive connecting layer is made of a conductive shading material, and a plurality of first light emitting holes which are in one-to-one correspondence with the epitaxial structure are formed in the conductive connecting layer; forming a light treatment pattern in the first light outlet hole;

the color film layer comprises a black matrix pattern and a plurality of color filter patterns, a plurality of second light emitting holes which are in one-to-one correspondence with the first light emitting holes are arranged on the black matrix pattern, and the color filter patterns are positioned in the second light emitting holes;

And a plurality of second through holes are formed on the packaging layer, orthographic projection of the packaging layer on the conductive connecting layer covers the light treatment pattern, orthographic projection of the second through holes on the second semiconductor layer covers the second electrode, and the conductive connecting layer is electrically connected with the second electrode through the second through holes.

In some embodiments, before the step of forming the color film layer, the preparation method further includes: forming a sacrificial layer on the second substrate base plate;

after the step of fixing the pair of box substrates and the plurality of light emitting diode chips formed on the driving back plate, the method further comprises:

and removing the sacrificial layer to separate the second substrate from the color film layer.

In a fifth aspect, embodiments of the present disclosure provide a display device including the display substrate of the second aspect.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification, illustrate the disclosure and together with the description serve to explain, but do not limit the disclosure. In the drawings:

fig. 1 is a schematic structural diagram of a light emitting diode chip according to an embodiment of the disclosure.

Fig. 2a is a schematic distribution diagram of a first electrode according to an embodiment of the disclosure.

Fig. 2b is a schematic diagram of a distribution of a second electrode according to an embodiment of the disclosure.

Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure.

Fig. 4 is a schematic structural diagram of another display substrate according to an embodiment of the disclosure.

Fig. 5 is a schematic flowchart of a method for manufacturing a light emitting diode chip according to an embodiment of the disclosure.

Fig. 6 is a schematic flowchart of another method for manufacturing a light emitting diode chip according to an embodiment of the disclosure.

Fig. 7a to 7d are schematic cross-sectional views of intermediate products obtained by the preparation method shown in fig. 6.

Fig. 8 is a schematic flowchart of a method for manufacturing a display substrate according to an embodiment of the disclosure.

Fig. 9 is a schematic structural diagram of a pair of box substrates according to an embodiment of the disclosure.

Fig. 10 is a schematic cross-sectional view of an intermediate product obtained by the preparation method shown in fig. 8.

Fig. 11 is a schematic plan view showing a structure of a substrate corresponding to a light emitting region of a light emitting diode chip.

Reference numerals illustrate:

light emitting diode chip 100:

epitaxial structure 1: a first semiconductor pattern 11, a light emitting pattern 12, a second semiconductor pattern 13, a first semiconductor layer 110, a light emitting layer 120, a second semiconductor layer 130;

A passivation layer 2, a first via hole 20, a first electrode 11a, a second electrode 13a;

a first substrate 3, a buffer layer 4, a transition substrate 5, and an adhesive layer 5a;

drive backplate 200: a connection pad 201;

a filler layer 210;

the alignment substrate 300:

conductive connection layer 6: a first light exit hole 60, a light treatment pattern 6a;

color film layer 7: a second light exit hole 70, a color filter pattern 7a, and a black matrix pattern 71;

encapsulation layer 8: a second via 80;

a second substrate 9, and a sacrificial layer 9a.

Detailed Description

Specific embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the disclosure, are not intended to limit the disclosure.

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.

Unless defined otherwise, technical or scientific terms used in embodiments of the present disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.

Mini LED refers to a light emitting device with a chip size of 100-300 μm, and Micro-LED refers to a light emitting device with a chip size of 100 μm or less. Micro light emitting diodes (Mini-LEDs/Micro-LEDs, MLEDs) can be used as self-luminous LEDs for display, and have the advantages of high brightness, high contrast, quick response and low power consumption, so that the display technology based on the MLEDs is increasingly widely applied in the display field.

In the manufacturing process of the MLED display panel, since the MLED chip cannot be directly manufactured on the array substrate of the display device through a film and a patterning process, the MLED chip needs to be grown on an original substrate (such as a sapphire substrate) through a molecular beam epitaxy method, specifically, an epitaxial layer is formed on the original substrate, and patterning is performed on the epitaxial layer to obtain an epitaxial layer structure with a shape and a size required by the MLED.

In the related art, a single MLED chip has only one epitaxial structure, so that only one color light can be emitted, and thus, in order to realize multicolor display of the MLED display device, it is required to transfer the MLED chips emitting different colors of light onto the driving back plate by a mass transfer technology (Mass Transfer Technology), respectively. With the increase of resolution and the increase of the number of sub-pixels of the display device, the number of MLED chips to be transferred is correspondingly increased, and the increase of transfer times, the increase of process difficulty and the reduction of product yield are accompanied.

In addition, the preparation process and yield uniformity of the MLED chips emitting light of different colors are different, and especially for the MLED chips with red light emission color, the light emission efficiency is lower than that of the MLED chips with other colors, so that when the MLED chips with different qualities are applied to the same display device, the problem of uneven brightness of a display screen can occur.

In order to solve at least one of the above technical problems, an embodiment of the present disclosure provides a light emitting diode chip, which can make the light emitting diode chip have a plurality of independent light emitting areas, and when the light emitting diode chip is applied to a display device, one light emitting diode chip can correspond to a plurality of sub-pixels in the display device, so as to reduce the number of light emitting diode chips to be transferred, thereby effectively reducing the transfer times, reducing the process difficulty, and improving the product yield.

Fig. 1 is a schematic structural diagram of a light emitting diode chip according to an embodiment of the disclosure, where, as shown in fig. 1, the light emitting diode chip includes: a plurality of epitaxial structures 1, a passivation layer 2, a plurality of first electrodes 11a and a plurality of second electrodes 13a.

The epitaxial structure 1 includes a first semiconductor pattern 11, a light emitting pattern 12, and a second semiconductor pattern 13 stacked on each other, and the second semiconductor patterns 13 of the plurality of epitaxial structures 1 are connected to each other to form a second semiconductor layer 130.

The passivation layer 2 is located at a side of the first semiconductor pattern 11 away from the second semiconductor layer 130, and a plurality of first vias 20 corresponding to the first semiconductor pattern 11 one by one are formed on the passivation layer 2.

The first electrodes 11a are located at a side of the passivation layer 2 away from the second semiconductor layer 130, the first electrodes 11a are in one-to-one correspondence with the first semiconductor patterns 11, and the first electrodes 11a are electrically connected with the corresponding first semiconductor patterns 11 through the corresponding first vias 20. The plurality of second electrodes 13a, the second electrodes 13a are located at a side of the second semiconductor layer 130 away from the light emitting pattern 12, and are electrically connected to the second semiconductor layer 130.

In some embodiments, the first semiconductor pattern 11 and the light emitting pattern 12 may be in direct contact, and the light emitting pattern 12 and the second semiconductor layer 130 may be in direct contact. The material of the first semiconductor pattern 11 may be a P-type semiconductor material, and correspondingly, the material of the second semiconductor layer 130 may be an N-type semiconductor material; alternatively, the material of the first semiconductor pattern 11 may be an N-type semiconductor material, and accordingly, the material of the second semiconductor layer 130 may be a P-type semiconductor material. The light emitting pattern 12 may be a multiple quantum well layer (Multiple Quantum Well, abbreviated as MQW), and the material of the light emitting pattern 12 may be gallium nitride (GaN), for example.

In practical applications, the materials of the first semiconductor pattern 11 and the second semiconductor layer 130 include various materials, and may be selectively set according to practical needs. Illustratively, the intrinsic semiconductor material in the first semiconductor pattern 11 and the second semiconductor pattern 13 is the same, and may be any one of GaN, gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs), and aluminum gallium indium phosphide (AlGaInP). Illustratively, if the intrinsic semiconductor materials of the first semiconductor pattern 11 and the second semiconductor layer 130 are GaP, alGaAs, or AlGaInP, the epitaxial structure 1 may emit red light.

In the embodiment of the present disclosure, the intrinsic semiconductor materials in the first semiconductor pattern 11 and the second semiconductor layer 130 are both GaN, and then the epitaxial structure 1 may emit blue light under the condition that different voltages are applied to the first semiconductor pattern 11 and the second semiconductor layer 130, respectively, to form an electric field therebetween.

In the embodiment of the disclosure, a gap is formed between any two adjacent epitaxial structures in a plurality of epitaxial structures on the same light emitting diode chip. This means that each epitaxial structure may have a separate light emitting region. The light emitting diode chip can have a plurality of independent light emitting areas by the plurality of epitaxial structures included in the light emitting diode chip. In case of applying the light emitting diode chip to the display device, one light emitting region or a plurality of light emitting regions (e.g., two or three, etc.) in the light emitting diode chip may correspond to one sub-pixel in the display device, which means that one light emitting diode chip may correspond to a plurality of sub-pixels in the light emitting diode display device. In this way, in the process of transferring the light emitting diode chips, one light emitting diode chip can be transferred to correspond to a plurality of sub-pixels, and compared with the situation that one sub-pixel in the related art needs to be correspondingly transferred to one light emitting diode chip, the technical scheme of the present disclosure can effectively reduce the number of light emitting diode chips to be transferred, thereby effectively reducing the transfer times, reducing the process difficulty, and improving the product yield.

In addition, in the embodiment of the disclosure, the first electrode 11a and the second electrode 13a are distributed on two sides of the epitaxial structure 1 to form a light emitting diode chip with a vertical structure, which has advantages of uniform current distribution, high current density, high light extraction efficiency, and the like.

Fig. 2a is a schematic distribution diagram of a first electrode provided by an embodiment of the disclosure, and fig. 2b is a schematic distribution diagram of a second electrode provided by an embodiment of the disclosure, in some embodiments, as shown in fig. 2a and fig. 2b, the epitaxial structure 1 corresponds to a plurality of second electrodes 13a, and orthographic projections of the epitaxial structure 1 corresponding to the plurality of second electrodes 13a on the second semiconductor layer 130 surround orthographic projections of the light emitting patterns 12 in the same epitaxial structure 1 on the second semiconductor layer 130.

In the case where different voltages are applied to the first semiconductor pattern 11 and the second semiconductor layer 130, respectively, to form an electric field therebetween, that is, in the case where a PN junction having a potential barrier is formed between the first semiconductor pattern 11 and the second semiconductor pattern 13, when minority carriers and majority carriers are combined in an overlapping region of the first semiconductor pattern 11, the light emitting pattern 12, and the second semiconductor layer 130 in the stacking direction, excessive energy is released in the form of light, and electric energy is directly converted into light energy. Therefore, the overlapping region in the lamination direction of the three is basically the light emitting region of the epitaxial structure 1.

As shown in fig. 2a and 2b, the orthographic projection of the light emitting pattern 12 in the epitaxial structure 1 on the second semiconductor layer 130 is that of the light emitting region of the epitaxial structure 1, that is, the plurality of second electrodes 13a corresponding to the epitaxial structure 1 are distributed around the light emitting region. Because the light emitting diode chip provided in the embodiment of the present disclosure is provided with the plurality of epitaxial structures 1, each epitaxial structure 1 has an independent light emitting area, so that the plurality of second electrodes 13a corresponding to the epitaxial structures 1 are distributed around the light emitting area, on one hand, current distribution can be more uniform, and light emitting efficiency can be improved, and on the other hand, a blocking structure can be formed, so as to avoid the problem that light rays emitted by different epitaxial structures in the same light emitting diode chip produce superimposed crosstalk.

The embodiments of the present disclosure also provide a display substrate, in which the light emitting diode chip provided in the above embodiments is transferred to the driving back plate by a bulk transfer technology (Mass Transfer Technology) to achieve light emission control, which will be described in detail below with reference to the accompanying drawings.

Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the present disclosure, where the display substrate includes a driving backplate 200 and a plurality of light emitting diode chips disposed on the driving backplate 200 and arranged in an array, and for convenience of clearly showing the structure of each film layer of the display substrate, only one light emitting diode chip on the display substrate is shown in fig. 3.

In some embodiments, as shown in fig. 3, the display substrate includes a driving backplate 200 and a light emitting diode chip on the backplate; the driving backplate 200 includes a plurality of connection pads 201, and the first electrode 11a in the light emitting diode chip is electrically connected to the corresponding connection pad 201, so as to implement light emission control of the light emitting diode chip.

After the light emitting diode chip is fabricated, it is connected to the driving backplate 200 without packaging but through a die bonding process, and a filling layer 210 is disposed therebetween. Since the light emitting patterns 12 of the light emitting diode chips provided in the embodiments of the present disclosure are made of the same material, that is, electroluminescent material, which is excited by the quantum dot material in the light processing pattern 6a to form pixel units with different light emitting colors (described in the embodiments below, which will not be repeated here), the array arrangement sequence of the light emitting diode chips need not be considered in the die bonding process, and the die bonding efficiency is improved.

Note that, the driving manner of the driving backplate 200 may be any one of a Passive Matrix OLED (PMOLED) and an Active Matrix OLED (AMOLED), which is not limited in the embodiment of the present disclosure.

In some embodiments, the filling layer 210 is filled between the driving backplate 200 and the led chips, and between adjacent led chips, to ensure effective bonding between the led chips and the driving backplate 200, and to prevent the led chips from being corroded by water and oxygen.

In one example, the filler layer 210 may be an organic material, such as a resin, a filler glue, or the like. Specifically, a filling paste is injected between the driving backplate 200 and the light emitting diode chips, and between the adjacent light emitting diode chips, and then the filling package is realized by light curing.

In addition, the plurality of second electrodes 13a corresponding to the epitaxial structure 1 are distributed around the light emitting area, so that the problem that the fixing effect of the driving backplate 200 and the light emitting diode chip is affected due to the existence of flow holes in the material of the filling layer 210 can be avoided in the bonding process of the driving backplate 200 and the light emitting diode chip.

Fig. 4 is a schematic structural diagram of another display substrate according to an embodiment of the disclosure, and in some embodiments, as shown in fig. 4, the display substrate further includes: the conductive connection layer 6 is positioned on one side of the second electrode 13a away from the driving backboard 200, and the conductive connection layer 6 is electrically connected with the second electrode 13a in the light emitting diode chip. When electrons are injected into the second semiconductor layer 130 and the light emitting patterns 12 of the plurality of epitaxial structures 1 through the second electrode 13a, the electron amounts in the plurality of epitaxial structures corresponding to the light emitting diode chips can be the same or substantially the same, so that the difference of current between at least two epitaxial structures in the same light emitting diode chip can be reduced, and the current uniformity of the light emitting diode can be improved.

It should be noted that, there may be a plurality of led chips electrically connected to the conductive connection layer 6, and the provision of the conductive connection layer 6 may reduce the current difference between the plurality of led chips, which is beneficial to improving the brightness uniformity of the display substrate.

In some embodiments, the material of the conductive connection layer 6 is a conductive light shielding material, such as a metal material, in consideration of the requirement of the conductive connection layer 6 for the conductivity of the material, and the conductive connection layer 6 is formed by a process of electroplating growth, and thus, the metal material is preferably copper.

In some embodiments, the conductive connection layer 6 is provided with a plurality of first light emitting holes 60 corresponding to the epitaxial structure 1 one by one; the front projection of the first light exit hole 60 on the second semiconductor layer 130 overlaps with the front projection of the light emitting pattern 12 on the second semiconductor layer 130 in the corresponding epitaxial structure 1. Preferably, the orthographic projection of the first light emitting hole 60 on the second semiconductor layer 130 covers the orthographic projection of the light emitting pattern 12 on the second semiconductor layer 130 in the epitaxial structure 1 corresponding thereto. Further, there is no overlap between the orthographic projection of the first light exit hole 60 on the second semiconductor and the orthographic projection of the light emitting pattern 12 in the other epitaxial structure 1, which is not corresponding, on the second semiconductor.

It should be understood that, when the orthographic projection of the light emitting pattern 12 in the epitaxial structure 1 on the second semiconductor layer 130 is substantially the same as that of the light emitting region of the epitaxial structure 1, the first light emitting holes 60 are formed on the conductive connection layer 6 made of the conductive light shielding material, so that on one hand, the light emitting effect of the light emitting diode chip is not affected, and on the other hand, the light shielding effect is formed on the non-light emitting region, so that the problem of overlapping crosstalk caused by the light rays emitted by different epitaxial structures 1 is avoided.

In some embodiments, as shown in fig. 3, the display substrate further includes: the light processing patterns 6a are located in the corresponding first light emitting holes 60, and at least one light processing pattern 6a is a color conversion pattern configured to convert the preset color light emitted by the light emitting pattern 12 into other color light.

The thickness of the conductive connection layer 6 is 10 to 100. Mu.m, for example, 20. Mu.m, 30. Mu.m, 40. Mu.m, 50. Mu.m, 70. Mu.m, 90. Mu.m, etc. Based on this, when the first light emitting hole 60 is formed on the conductive connection layer 6, since the conductive connection layer 6 has a certain thickness, the first light emitting hole 60 forms a sidewall with a certain height, and when the light treatment pattern 6a is disposed in the first light emitting hole 60, it is equivalent to forming a retaining wall with a certain height to facilitate filling the light treatment pattern 6a and prevent the light treatment pattern 6a from being doped with other substances.

In some embodiments, the light processing pattern 6a further includes a light transmission pattern, and the material of the light transmission pattern includes a transparent resin and scattering particles (e.g., titanium oxide scattering particles) distributed in the transparent resin, and the light transmission pattern is configured to pass and scatter the preset color light emitted in the light emitting pattern 12.

It should be understood that the plurality of light treatment patterns 6a are in one-to-one correspondence with the first light emitting holes 60, and the plurality of first light emitting holes 60 are in one-to-one correspondence with the epitaxial structure 1, and then the plurality of light treatment patterns 6a are in one-to-one correspondence with the epitaxial structure 1. In one example, as shown in fig. 2a and fig. 2b, a light emitting diode chip includes three epitaxial structures 1, and the material of the light emitting pattern 12 in the epitaxial structures 1 may be an electroluminescent material that emits blue light, and the light processing patterns 6a corresponding to the three epitaxial structures 1 one by one are respectively: a blue light transmission pattern, a red color conversion pattern, and a green color conversion pattern. The blue light emitted from the light emitting pattern 12 is transmitted through the blue light transmitting pattern and then still emitted to form a blue light emitting unit; the blue light emitted from the light emitting pattern 12 is converted by the red color conversion pattern to emit red light to form a red light emitting unit; the blue light emitted from the light emitting pattern 12 is converted by the green conversion pattern and then emitted as green light to form a green light emitting unit, thereby realizing full color display of the display substrate.

Since the light treatment pattern 6a needs to cooperate with the light emission pattern 12 to realize full color display, the range of the light treatment pattern 6a is set to be larger than the range of the light emission pattern 12, that is, the front projection of the light treatment pattern 6a on the substrate covers the front projection of the light emission pattern 12 on the substrate, so as to avoid shielding the light emitting area and affecting the light emitting quantity.

The material of the color conversion pattern is a wavelength conversion material, for example, cadmium quantum dots, indium quantum dots, perovskite quantum dots, rare earth fluorescent powder, organic fluorescent material, and the like, and the electroluminescent material emitting blue light is excited by utilizing the wavelength conversion property thereof to convert the blue light into other color light.

In some embodiments, the other color light includes at least one of red light, green light, cyan light, magenta light, and yellow light.

In some embodiments, the display substrate further includes a color film layer 7, which is located on a side of the conductive connection layer 6 away from the epitaxial structure 1, and the color film layer 7 includes a black matrix pattern 71 and a plurality of color filter patterns 7a; the black matrix pattern 71 is provided with a plurality of second light emitting holes 70 corresponding to the first light emitting holes 60 one by one, and the orthographic projection of the first light emitting holes 60 on the black matrix overlaps with the corresponding second light emitting holes 70, and the color filter pattern 7a is located in the second light emitting holes 70. Preferably, the orthographic projection of the second light exit holes 70 on the black matrix completely covers the corresponding first light exit holes 60.

It should be understood that the color filter pattern 7a is located in the second light exit hole 70, the second light exit hole 70 corresponds to the first light exit hole 60, the light treatment pattern 6a is located in the first light exit hole 60, and the first light exit hole 60 corresponds to the epitaxial structure 1, and then the second light exit hole 70, the color filter pattern 7a located in the second light exit hole 70, the first light exit hole 60, the light treatment pattern 6a located in the first light exit hole 60, and the epitaxial structure 1 are all correspondingly arranged. In one example, the color filter pattern 7a may include a red filter pattern corresponding to a red color conversion pattern, a green filter pattern corresponding to a green color conversion pattern, and a blue filter pattern corresponding to a blue light transmission pattern. The red filter patterns can filter the colors of the light emitted by the corresponding light processing patterns 6a, so that the light purity of the corresponding light emitting units is higher, the color saturation is better, and the color display effect of the display substrate is improved.

In some embodiments, as shown in fig. 3 and 4, the display substrate further includes an encapsulation layer 8, which is located between the light processing pattern 6a and the second semiconductor layer 130, and the orthographic projection of the encapsulation layer 8 on the conductive connection layer 6 covers the light processing pattern 6a to encapsulate the quantum dot material in the light processing pattern 6a, so as to determine that the light processing pattern 6a and the light emitting pattern 12 in the light emitting diode chip are coupled, and realize full-color display of the display substrate while eliminating optical crosstalk. In addition, a plurality of second vias 80 are formed on the encapsulation layer 8, and the second electrode 13a is covered by the orthographic projection of the second vias 80 on the second semiconductor layer 130, and the conductive connection layer 6 is electrically connected to the second electrode 13a through the second vias 80.

In one example, the encapsulation layer 8 may employ a single layer of an inorganic material film such as silicon nitride or silicon oxide, or a laminate of an organic material film and an inorganic material film. The encapsulation layer 8 can prevent external moisture from entering into the encapsulated light treatment pattern 6a, thereby preventing the external moisture from damaging the performance of the light treatment pattern 6 a.

Based on the same inventive concept, the embodiments of the present disclosure further provide a method for manufacturing a light emitting diode chip, which may be used to manufacture the light emitting diode chip provided in the previous embodiments, and the detailed description will be given below with reference to the accompanying drawings.

Fig. 5 is a schematic flowchart of a method for manufacturing a light emitting diode chip according to an embodiment of the disclosure, as shown in fig. 5, where the method includes:

in step S11, a plurality of epitaxial structures 1 are formed, and a gap is formed between any two epitaxial structures 1, wherein the epitaxial structures 1 include a first semiconductor pattern 11, a light emitting pattern 12 and a second semiconductor pattern 13 that are stacked, and the second semiconductor patterns 13 of the plurality of epitaxial structures 1 are mutually communicated to form a second semiconductor layer 130.

In step S12, a passivation layer 2 is formed, the passivation layer 2 is located on one side of the first semiconductor pattern 11 away from the second semiconductor pattern 130, and a plurality of first vias 20 corresponding to the first semiconductor pattern 11 one by one are formed on the passivation layer 2.

In step S13, a plurality of first electrodes 11a are formed, the first electrodes 11a are located on one side of the passivation layer 2 away from the second semiconductor layer 130, the first electrodes 11a are in one-to-one correspondence with the first semiconductor patterns 11, and the first electrodes 11a are electrically connected with the corresponding first semiconductor patterns 11 through the corresponding first vias 20.

In step S14, a plurality of second electrodes 13a are formed, and the second electrodes 13a are located on a side of the second semiconductor layer 130 away from the light emitting pattern 12 and electrically connected to the second semiconductor layer 130.

Fig. 6 is a schematic flow chart of another method for manufacturing a light emitting diode chip according to an embodiment of the disclosure, and fig. 7a to 7d are schematic cross-sectional views of intermediate products manufactured by using the manufacturing method shown in fig. 6. It should be noted that fig. 7a to 7d are schematic cross-sectional views of intermediate products corresponding to the cross-section A-A' in fig. 2 b.

In some embodiments, as shown in fig. 6, step S11 includes step S111-step S113, wherein:

in step S111, a first substrate base plate 3 is provided.

The substrate may include various types, and may be, for example, a GaP substrate, a GaAs substrate, a silicon carbide substrate, a sapphire substrate, or the like.

The type of the first substrate 3 may be determined according to the materials of the first semiconductor pattern 11 and the second semiconductor pattern 13 to be formed later. Illustratively, in the case where the intrinsic semiconductor material of the first semiconductor pattern 11 and the second semiconductor pattern 13 is GaP, alGaAs, alGaInP, or the like, the first substrate 3 may be a GaP base or GaAs base. In the case where the intrinsic semiconductor material of the first semiconductor pattern 11 and the second semiconductor pattern 13 is GaN, the first substrate base 3 may be a silicon carbide base, a sapphire base, or the like.

Step S112, as shown in fig. 7a, sequentially forming a buffer layer 4 and an epitaxial layer on the first substrate 3 side; the epitaxial layer includes a first semiconductor layer 110, a light emitting layer 120, and a second semiconductor layer 130 stacked in this order, and the second semiconductor layer 130 is in contact with the buffer layer 4.

By providing the buffer layer 4, it is advantageous to make the second semiconductor layer 130 have a better crystal quality. The material of the buffer layer 4 may include various kinds, and illustratively, the material of the buffer layer 4 may be GaN.

For example, the second semiconductor layer 130, the light emitting layer 120, and the first semiconductor layer 110 may be sequentially epitaxially grown on the side of the buffer layer 4 remote from the first substrate 3 using a metal organic compound vapor phase epitaxy process.

Here, the materials of the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130 may be selected by referring to the descriptions of the materials of the first semiconductor pattern 11, the light emitting pattern 12, and the second semiconductor layer 130 in the previous embodiments, and will not be repeated here.

In step S113, patterning is performed on the epitaxial layer to form a plurality of epitaxial structures 1.

As shown in fig. 7b, at least two second semiconductor patterns 13 in the epitaxial structures 1 are connected to each other to form a second semiconductor layer 130. For example, the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130 may be patterned using a photolithography process.

In one example, in patterning the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130, for example, the etching depth may be greater than or equal to the thickness of the first semiconductor layer 110 (i.e., the dimension in the direction perpendicular to the first substrate 3) and less than the sum of the thicknesses of the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130, in which case a plurality of first semiconductor patterns 11 may be first formed to be spaced apart from and independent from each other.

At this time, the edge portion of the patterned light emitting layer 120 may be further patterned (e.g., photolithography process may be used) and simultaneously etched at a portion thereof located at a gap between any adjacent two of the first semiconductor patterns 11, to obtain a plurality of light emitting patterns 12.

In another example, in the process of patterning the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130, the etching depth may be greater than or equal to the sum of thicknesses of the first semiconductor layer 110 and the light emitting layer 120 and less than the sum of thicknesses of the first semiconductor layer 110, the light emitting layer 120, and the second semiconductor layer 130, in which case, the surface of the patterned second semiconductor layer 130 may be exposed to form a plurality of first semiconductor patterns 11, a plurality of light emitting patterns 12, and the second semiconductor layer 130 (a plurality of second semiconductor patterns 13 in the plurality of epitaxial structures 1 are all interconnected).

The shapes and arrangements of the obtained epitaxial structures 1 include various types, and can be selected and set according to actual needs. In one example, as shown in fig. 2a and fig. 2b, each light emitting diode chip includes three epitaxial structures 1, and the orthographic projection shape of each epitaxial structure 1 on the first plane may be rectangular; and the three epitaxial structures 1 may be arranged in a triangular shape.

In some embodiments, as shown in fig. 6, prior to step S14, the preparation method further comprises:

s131: as shown in fig. 7c, a transition substrate 5 is provided, and a surface of the passivation layer 2 away from the pattern of the second semiconductor layer 130 is fixed to the transition substrate 5.

Wherein the transition substrate 5 and the passivation layer 2 are fixed by the adhesive layer 5a, and the adhesive layer 5a has a via hole exposing the first electrode 11 a. In addition, the provision of the adhesive layer 5a is advantageous for separating the transition substrate 5 from the epitaxial structure 1 during the die bonding process. For example, the adhesive layer 5a may be a photoresist material, which is removable with a developer solution; alternatively, the adhesive layer is made of photoresist, and laser can be used to remove the adhesive layer 5a and separate the transition substrate 5.

S132: the first substrate base plate 3, the buffer layer 4 are sequentially removed so that the second semiconductor layer 130 is exposed.

Step S14 includes step S140: as shown in fig. 7d, a plurality of second electrodes 13a are formed on a side of the second semiconductor layer 130 remote from the light emitting pattern 12. The arrangement of the plurality of second electrodes 13a may be referred to the description of the arrangement of the second electrodes 13a in the previous embodiment, which is not repeated here.

Based on the same inventive concept, the embodiments of the present disclosure further provide a method for manufacturing a display substrate, which may be used to manufacture the display substrate provided in the previous embodiments, and the detailed description will be given below with reference to the accompanying drawings.

Fig. 8 is a schematic flow chart of a preparation method of a display substrate provided by an embodiment of the disclosure, fig. 9 is a schematic structural diagram of a pair of box substrates provided by an embodiment of the disclosure, and fig. 10 is a schematic sectional diagram of an intermediate product obtained by adopting the preparation method shown in fig. 8. Fig. 11 is a schematic plan view showing a structure of a substrate corresponding to a light emitting region of a light emitting diode.

As shown in fig. 8, the method for manufacturing a display substrate includes:

s21, preparing the light-emitting diode chip. The light emitting diode chip is formed by the manufacturing method shown in fig. 5 or 6.

S22, the transition substrate 5 is removed.

At this time, the adhesive layer 5a for connecting the transition substrate 5 and the first electrode 11a is removed at the same time.

S23, a driving backplate 200 is provided, and the driving backplate 200 includes a plurality of connection pads 201 thereon.

S24, electrically connecting the first electrode 11a in the light emitting diode chip with the corresponding connection pad 201.

At this time, the display substrate as shown in fig. 3 is formed, and specifically, the fixed connection between the light emitting diode chip and the driving backplate 200 may be achieved through a die bonding process.

S25, the opposite case substrate 300 is formed.

As shown in fig. 9, the opposite case substrate 300 may be a color film substrate, that is, the light processing pattern 6a and the color filter pattern 7a are formed on the opposite case substrate 300.

The step S25 includes steps S251 to S255:

step S251: a second substrate base plate 9 is provided.

The second substrate 9 may be a glass substrate.

Step S252: a sacrificial layer 9a is formed on the second substrate 9.

Wherein the formation of the sacrificial layer 9a facilitates the peeling of the second substrate base plate 9 in a subsequent process.

Step S253: the color film layer 7 is sequentially formed on the sacrificial layer 9a, the color film layer 7 comprises a black matrix pattern 71 and a plurality of color filter patterns 7a, a plurality of second light emitting holes 70 which are in one-to-one correspondence with the first light emitting holes 60 are arranged on the black matrix pattern 71, and the color filter patterns 7a are positioned in the second light emitting holes 70.

In step S254, a conductive connection layer 6 is formed on the color film layer 7, the conductive connection layer 6 is made of a conductive light-shielding material, a plurality of first light emitting holes 60 corresponding to the epitaxial structure 1 one by one are provided on the conductive connection layer 6, and a light treatment pattern 6a is formed in the first light emitting holes 60.

In step S255, the encapsulation layer 8 is formed on the conductive connection layer 6, the plurality of second vias 80 are formed on the encapsulation layer 8, the orthographic projection of the encapsulation layer 8 on the conductive connection layer 6 covers the light treatment pattern 6a, the orthographic projection of the second via 80 on the second semiconductor layer 130 covers the second electrode 13a, and the conductive connection layer 6 is electrically connected to the second electrode 13a through the second via 80.

As shown in fig. 11, the conductive connection layer 6 is provided with a plurality of first light emitting holes 60, the conductive connection layer 6 is covered with the encapsulation layer 8, and a plurality of second vias 80 are formed on the encapsulation layer 8 to expose a portion of the conductive connection layer. At this time, the distance a between the edge of the first light emitting hole 60 and the edge of the second via hole 80 is greater than 2.5 μm, so as to avoid the second electrode 13a contacting the light treatment pattern 6a in the first light emitting hole 60 when connected to the conductive connection layer 6 through the second via hole 80.

It should be understood that, as shown in fig. 11, the light treatment patterns 6a are located in the first light emitting holes 60, and each first light emitting hole 60 corresponds to a light emitting area, so that the light emitting effect can be ensured by setting the range of the light treatment patterns to be slightly larger than the range of the light emitting areas, and the front projection of the light treatment patterns on the substrate completely covers the light emitting areas. Based on this, the opening size of the first light exit hole 60 is set to d+2b, where d is the size of the light emitting region and b is the distance between the edge of the light emitting region and the edge of the first light exit hole 60.

The light emitting area may refer to an orthographic projection area of the light emitting pattern 12 on the substrate, and is specifically described in the embodiment of the led chip, which is not described herein.

In addition, the encapsulation layer 8 may be formed by laser printing or patterning a coated photoresist, which is not limited by the embodiments of the present disclosure.

Here, the materials, forming positions and ranges of the light emitting holes selected by the color film layer 7, the conductive connection layer 6 and the encapsulation layer 8 may be described with reference to the foregoing embodiments, and will not be described herein again.

In step S26, as shown in fig. 10, the alignment substrate 300 and the plurality of light emitting diode chips formed on the driving backplate 200 are aligned and fixed, the conductive connection layer 6 is located on the side of the second electrode 13a away from the driving backplate 200, and the conductive connection layer 6 is electrically connected to the second electrode 13a in the light emitting diode chips.

It should be noted that, as shown in fig. 11, the conductive connection layer 6 is electrically connected to the second electrode 13a through the second via hole 80 on the encapsulation layer 8, and the relationship between the width c of the second via hole 80 and the width e of the second electrode 13a is set to be c=10μm+e, so as to ensure that the two are connected within the alignment deviation, and improve the stability of electrical connection.

In addition, as shown in fig. 10, after the case substrate 300 and the plurality of light emitting diode chips formed on the driving backplate 200 are fixed to each other, two kinds of package structures, that is, a package layer 8 for packaging the light treatment pattern 6a on the side of the case substrate 300 and a filling layer 210 for fixing the light emitting diode chips and preventing them from being corroded by water oxygen, are included between the case substrate 300 and the light emitting diode chips 100, that is, on the side of the light emitting diode chips 200.

Specifically, the thickness of the encapsulation layer 8 and the filling layer 210 may be flexibly set, which is not limited in this embodiment of the disclosure, and the materials of the encapsulation layer 8 and the filling layer 210 are detailed in the above embodiments, which are not described herein.

In step S27, the sacrificial layer 9a is removed, so that the second substrate 9 is separated from the color film layer 7, and a display substrate as shown in fig. 4 is formed.

Specifically, the sacrificial layer 9a may be formed of an organic material, which may be a polymer material or a small molecular material capable of uniformly forming a film, and the sacrificial layer 9a may be removed by a laser lift-off technique. Of course, the sacrificial layer 9a may be made of other materials, and correspondingly have other stripping manners, so long as the color filter pattern 7a formed thereon is not damaged during the stripping process, which is not limited by the embodiment of the present disclosure.

After the box substrate 300 and the plurality of light emitting diode chips formed on the driving backplate 200 are fixed in a box, the second substrate 9 is located at the uppermost part of the light emitting side of the display substrate, and since the second substrate 9 has a certain thickness and the second substrate 9 is a glass substrate, when the display substrate emits light, part of light is reflected inside the glass substrate and emitted at the gap between two adjacent glass substrates after multiple reflection, which causes a light leakage problem at the seam between two adjacent glass substrates.

In order to solve the above problems, after the case substrate 300 and the plurality of light emitting diode chips formed on the driving backplate 200 are fixed, the second substrate 9 is peeled off by removing the sacrificial layer 9a, so as to avoid the light leakage problem on the display substrate and improve the display effect of the display substrate.

In some embodiments, the driving backplate 200 may be, for example, a display backplate. In this case, the light emitting diode chip may be used as a part of the plurality of sub-pixels, and the display device may be used as an LED display device for image display. The display device may be, for example, a Mini LED display device or a Micro LED display device.

In some embodiments, the display device may be: any product or component with a display function, such as electronic paper, mobile phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, etc., which is not limited in this disclosure.

It is to be understood that the above embodiments are merely exemplary embodiments employed to illustrate the principles of the present disclosure, however, the present disclosure is not limited thereto. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the disclosure, and are also considered to be within the scope of the disclosure.

Claims

1. A light emitting diode chip, comprising:

2. The light emitting diode chip of claim 1, wherein the epitaxial structure corresponds to a plurality of second electrodes, and wherein orthographic projections of the epitaxial structure corresponding to the plurality of second electrodes on the second semiconductor layer surround orthographic projections of the light emitting pattern on the second semiconductor layer within the same epitaxial structure.

3. A display substrate, comprising a driving back plate and a plurality of light emitting diode chips arranged in an array on the driving back plate, wherein the light emitting diode chips adopt the light emitting diode chips in any one of the claims 1-2; wherein,

the drive backboard comprises a plurality of connection pads;

4. A display substrate according to claim 3, wherein the display substrate further comprises:

5. The display substrate according to claim 4, wherein the conductive connection layer is made of a conductive light shielding material, and a plurality of first light emitting holes corresponding to the epitaxial structure one by one are formed in the conductive connection layer;

6. The display substrate of claim 5, further comprising:

The color film layer is positioned on one side of the conductive connecting layer far away from the epitaxial structure and comprises a black matrix pattern and a plurality of color filter patterns;

the black matrix pattern is provided with a plurality of second light emitting holes which are in one-to-one correspondence with the first light emitting holes, orthographic projection of the first light emitting holes on the black matrix is overlapped with the corresponding second light emitting holes, and the color filter pattern is positioned in the second light emitting holes.

7. The display substrate of claim 6, wherein the orthographic projection of the second light exit holes on the black matrix completely covers the corresponding first light exit holes.

8. The display substrate of claim 5, further comprising:

9. The display substrate according to claim 5, wherein the preset color light is blue light;

10. The display substrate according to claim 4, wherein the thickness of the conductive connection layer is 10-100 μm.

11. The display substrate according to any one of claims 3 to 10, further comprising:

12. A method for manufacturing a light emitting diode chip, wherein the method is used for manufacturing the light emitting diode chip according to any one of claims 1 to 2, and the method comprises:

13. The method of preparing as claimed in claim 12, wherein the step of forming a plurality of epitaxial structures comprises:

providing a first substrate base plate;

and patterning the epitaxial layer to form a plurality of epitaxial structures.

14. The method of manufacturing according to claim 13, wherein prior to the step of forming the plurality of second electrodes, the method further comprises:

15. A method for manufacturing a display substrate, comprising:

preparing a light emitting diode chip by the preparation method of any one of claims 12 to 14;

16. The method of claim 15, wherein the led chip is the led chip of claim 14;

the step of electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad includes, before the step of electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad, the method further includes:

and removing the transition substrate.

17. The method of manufacturing according to claim 15, wherein after the step of electrically connecting the first electrode in the light emitting diode chip with the corresponding connection pad, the method further comprises:

18. The method of manufacturing according to claim 17, wherein the step of forming the counter substrate comprises:

providing a second substrate base plate;

19. The method of manufacturing according to claim 18, wherein prior to the step of forming the color film layer, the method further comprises: forming a sacrificial layer on the second substrate base plate;

20. A display device, characterized in that the display device comprises a display substrate according to any one of claims 3-11.