CN117827081A - Storage device erasing method, device and system - Google Patents

Abstract

The application discloses a method, a device and a system for erasing storage equipment. The method comprises the following steps: if the host device determines that N units in the storage device are successfully erased, updating the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of the erased units, wherein the storage device supports a serial writing mode; the host equipment generates a writing instruction according to the logic address of the unit to be erased and the number N of the unit to be erased, the writing instruction indicates that all bits in M units to be erased are written with preset values from the target unit to be erased, any bit is written with the preset value to indicate that the data of the bit are erased, and the writing instruction is sent to the storage equipment, so that the storage equipment executes the writing instruction, and the usability is higher on the basis of realizing the safety of erasing the storage equipment.

Description

Storage device erasing method, device and system

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a method, an apparatus, and a system for erasing a storage device.

Background

Storage devices are widely used in everyday life. In some cases, the memory device needs to be completely erased. For example to reset the hard disk for subsequent use of the empty space to store other types of data. For example, the system is corrupted by malware or viruses, and it is also necessary to completely erase the storage device. In some cases, it may also be desirable to delete some private or secret data. Such as when the user intends to resell the computer, preventing theft of the identity information, or alternatively to completely erase the storage device.

In the existing method for erasing a storage device, taking a traditional Hard Disk Drive (HDD) as an example, the erasing flow of the HDD is generally determined by three-way overwrite (three-way overwrite), so that the data of the storage device can be thoroughly overwritten, the data cannot be restored by lawless persons, and the erasing safety is realized. However, the HDD erase procedure may take hours or even days, for example, an 8T mass disk may take days. In addition, in the conventional HDD erasing process, the erasing flow is easily broken, and the HDD needs to be erased again after the erasure is broken, so that the usability is poor. Therefore, there is a need for a method with high availability based on the security of erasing the memory device. This is a problem to be solved.

Disclosure of Invention

The application provides a storage device erasing method, device and system, which are used for enabling usability to be high on the basis of realizing the safety of erasing storage devices.

In a first aspect, an embodiment of the present application provides a storage device erasing method, where the method may be applied to a storage device erasing apparatus, and the storage device erasing apparatus may be a host device or a chip in the host device, and the method is described below by taking the host device as an example, and includes: if the host device determines that N units in the storage device have been successfully erased, updating the logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, where the target unit to be erased is a first unit among the N units, the target unit to be erased is a first unit after the N units, and N is a positive integer, and the storage device supports a serial write mode; the host device generates a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction instructs the storage device to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset values to indicate that the data of the bit are erased; the host device sends the write instruction to the storage device to cause the storage device to execute the write instruction.

In the above manner, if the host device determines that N units in the storage device have been successfully erased, the host device updates the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of erased units, and generates the write command. The writing instruction can instruct the storage device to start from the target unit to be erased, and write all bits in the M units to be erased into a preset value, so that the erasing safety is ensured by a writing mode. Even if the middle of the erasing process is interrupted, the logic address of the target unit to be erased can be obtained based on the logic address of the target unit to be erased and N because the logic address of the target unit to be erased is updated, and the data can be continuously erased. Thereby making the usability stronger on the basis of realizing the security of erasing the storage device.

In one possible design, the write instruction may be a binary stream write instruction, and the host device generates the write instruction according to the logical address of the target unit to be erased and the number M of units to be erased, including: the host device generates a binary stream file according to the logical address of the target unit to be erased and the number M of the units to be erased, wherein the logical address of the target unit to be erased and the number M of the units to be erased are indicated in the binary stream file, and the binary stream file comprises a preset value set to be written in each bit in any one unit to be erased; the host device generates a writing instruction of the binary stream, wherein the writing instruction of the binary stream indicates that a preset value set in the binary stream file is written into each bit in any one unit to be erased in M units to be erased from a logic address of the target unit to be erased.

In the above manner, the preset value to be written in each bit in each unit to be erased can be determined in advance through the binary stream file, and only the erasing unit is required to be written in according to the preset value set in the binary stream file, so that the erasing efficiency of the storage device can be improved.

In one possible design, the total number of cells in the storage device may be L, where L is a positive integer, and where M is equal to N; the updating the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of the erased units comprises the following steps: if the number of the un-erased units in the storage device is smaller than M, the host device determines that the logical address of the target unit to be erased is the logical address of the L-M+1th unit in the storage device.

In the above manner, if M is equal to N, the number of to-be-erased units corresponding to the write command generated by the host device each time is the same. And, when the number of the unerased erased cells in the storage device is less than M, that is, when the remaining unerased erased cells in the storage device are insufficient as M cells to be erased, the logical address of the target cell to be erased may be the logical address of the L-m+1th erased cell in the storage device. Thereby indicating that the memory device is starting to erase from the L-M +1 th erased cell, and is still able to erase M cells to be erased. Therefore, the number of the units to be erased does not need to be changed in the whole process, so that the complexity of erasing the storage device is simplified.

In one possible design, the method may further include: and if the host equipment determines that all the units in the storage equipment are successfully erased, randomly acquiring the data written in at least one unit in the storage equipment, and if all the bits of at least one unit are checked to be the preset value, confirming that the storage equipment is successfully erased.

In the above manner, after the host device determines that the erasing unit in the storage device has been successfully erased, the host device may also randomly acquire the data written in at least one erasing unit in the storage device for verification, and confirm that the erasing is successful when the data are both preset values, so that the reliability of the erasing of the storage device can be increased.

In one possible design, the storage device may be a mechanical hard disk, and illustratively, any one of the units in the mechanical hard disk is a sector.

In a second aspect, an embodiment of the present application provides a method for erasing a storage device, where the method may be applied to a storage device or a storage device control apparatus, and the method includes: the method comprises the steps that a storage device obtains a writing instruction from a host device, the storage device supports a serial writing mode, the writing instruction indicates that the storage device starts from a target unit to be erased, all bits in M units to be erased are written into a preset value, M is a positive integer, any bit is written into the preset value and indicates that data of the bit are erased, a logical address of the target unit to be erased is obtained by the host device according to the logical address of the target unit to be erased of the storage device and the number N of the erased units, N is a positive integer, the target unit to be erased is the first unit in N units which are successfully erased, and the target unit to be erased is the first unit after the N units; the storage device executes the write instruction.

In one possible design, after the storage device executes the write instruction successfully, a notification message is sent to the host device, where the notification message indicates that the write instruction executed successfully.

In a third aspect, embodiments of the present application provide a storage device erasing method, which describes a main process of the storage device erasing method provided in the present application from the perspective of interaction between a host device and a storage device. Comprising the following steps: if the host device determines that N units in the storage device have been successfully erased, updating the logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of the erased units, wherein the target unit to be erased is the first unit of the N units, the target unit to be erased is the first unit after the N units, N is a positive integer, and the storage device supports a serial writing mode; the host device generates a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction instructs the storage device to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset values to indicate that the data of the bit are erased; the storage device acquires the writing instruction from the host device, and after the writing instruction is successfully executed, sends a notification message to the host device, wherein the notification message indicates that the writing instruction is successfully executed.

In a fourth aspect, an embodiment of the present application provides a storage device erasing apparatus, where the apparatus has a function of implementing the behavior in the method example of the first aspect, and the beneficial effects may be referred to the description of the first aspect and are not repeated herein. The functions may be implemented by hardware, or may be implemented by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. In one possible design, the structure of the apparatus includes a determining module, a generating module, and an interface module, where these modules may perform the corresponding functions in the method example of the first aspect, and specific reference is made to the detailed description in the method example, which is not repeated herein.

In a fifth aspect, an embodiment of the present application provides a storage device, including an interface unit, configured to obtain a write instruction from a host device, where the storage device supports a serial write mode, where the write instruction instructs the storage device to start from a target unit to be erased, write all bits in M units to be erased to a preset value, where M is a positive integer, where any bit is written to the preset value, where the preset value indicates that data of the bit is erased, where a logical address of the target unit to be erased is obtained by the host device according to a logical address of a target unit to be erased of the storage device and the number N of erased units, where N is a positive integer, and the target unit to be erased is a first unit of N units that have been successfully erased, and where the target unit to be erased is a first unit after the N units; and the processing unit is used for executing the writing instruction.

In a possible design, the interface unit is further configured to send a notification message to the host device after the processing unit executes the write instruction successfully, where the notification message indicates that the write instruction is executed successfully.

In a sixth aspect, embodiments of the present application provide a storage device erasing system, including: the host device is configured to update, when it is determined that N units in the storage device have been successfully erased, a logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, where the target unit to be erased is a first unit among the N units, and the target unit to be erased is a first unit after the N units, and N is a positive integer; generating a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction indicates the storage equipment to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset value to indicate that the data of the bit is erased; the storage device is configured to obtain the write instruction from the host device, and after the write instruction is executed successfully, send a notification message to the host device, where the notification message indicates that the write instruction is executed successfully.

In a seventh aspect, an embodiment of the present application provides an electronic device, including: one or more processors; one or more memories; wherein the one or more memories store one or more computer instructions that, when executed by the one or more processors, cause the electronic device to perform the method of any of the first or second aspects above.

In an eighth aspect, embodiments of the present application provide a computer-readable storage medium comprising computer instructions which, when run on a computer, cause the computer to perform the method of any one of the first or second aspects above.

In a ninth aspect, embodiments of the present application provide a chip comprising a processor coupled to a memory for reading and executing a software program stored in the memory to implement the method according to any one of the first or second aspects.

In a tenth aspect, embodiments of the present application provide a computer program product which, when read and executed by a computer, causes the computer to perform the method of any one of the first or second aspects above.

The advantages of the second aspect to the tenth aspect are described above with reference to the advantages of the first aspect, and the description is not repeated.

Drawings

Fig. 1 is a schematic architecture diagram of a storage system to which a storage device erasing method provided in an embodiment of the present application is applicable;

fig. 2 is a schematic diagram of an interaction flow corresponding to a storage device erasing method provided in an embodiment of the present application;

fig. 3 is a schematic flowchart of a host device side step corresponding to the storage device erasing method provided in the embodiment of the present application;

FIG. 4 is a schematic diagram of an erasing unit of a memory device in the erasing method of the memory device according to the embodiment of the present application;

fig. 5 is a schematic structural diagram corresponding to an erasing device of a storage device according to an embodiment of the present application;

fig. 6 is a schematic structural diagram corresponding to a storage device provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

The terminology used in the following embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include, for example, "one or more" such forms of expression, unless the context clearly indicates to the contrary. It should also be understood that in embodiments of the present application, "one or more" refers to one or more than two (including two); "and/or", describes an association relationship of the association object, indicating that three relationships may exist; for example, a and/or B may represent: a alone, a and B together, and B alone, wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The term "plurality" in the embodiments of the present application means two or more, and for this reason, "plurality" may be also understood as "at least two" in the embodiments of the present application. "at least one" may be understood as one or more, for example as one, two or more. For example, including at least one means including one, two or more, and not limiting what is included. For example, at least one of A, B and C is included, then A, B, C, A and B, A and C, B and C, or A and B and C may be included. Likewise, the understanding of the description of "at least one" and the like is similar. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship.

Unless stated to the contrary, the embodiments of the present application refer to ordinal terms such as "first," "second," etc., for distinguishing between multiple objects and not for defining a sequence, timing, priority, or importance of the multiple objects.

For ease of understanding, the terms involved in the embodiments of the present application are explained as part of the disclosure of the embodiments of the present application.

As shown in fig. 1, a storage system to which the storage device erasing method provided in the embodiment of the present application is applicable is shown. It should be understood that the storage system shown in fig. 1 is illustrated by taking one case in a distributed storage system as an example, and the storage device erasing method provided in the embodiments of the present application may also be applied to other cases in a distributed storage system, and may also be applied to a centralized storage system. As shown in fig. 1, a distributed storage system provided in an embodiment of the present application includes a storage cluster. The storage cluster includes one or more host devices 110 (three host devices 110 are shown in fig. 1, but are not limited to three host devices 110), and the respective host devices 110 may communicate with each other. The host device 110 may be a device having both computing and storage capabilities, such as a server, computer device, or the like. Illustratively, an ARM server or an X86 server may be used as the host device 110 herein. In hardware, host device 110 includes at least a processor 112, a memory 113, a network card 114, and one or more storage devices 100. The processor 112, memory 113, network card 114, and one or more storage devices 100 may be connected by a bus. Wherein the processor 112 and the memory 113 are used for providing computing resources. Specifically, the processor 112 is a central processing unit (central processing unit, CPU) for processing data access requests from outside the host device 110 (application server or other host device 110) and also for processing requests generated internally to the host device 110. Illustratively, when the processor 112 receives write data requests, the data written by the write data requests is temporarily stored in the memory 113. When the total amount of data in the memory 113 reaches a certain threshold, the processor 112 sends the data stored in the memory 113 to the storage device 100 for persistent storage. In addition, the processor 112 is configured to perform calculations or processing on data, such as metadata management, deduplication, data compression, data verification, virtualized storage space, address translation, and the like. In fig. 1, only one CPU 112 is shown in one host device 110, and in practical applications, there may be a plurality of CPUs 112 in one host device 110, where one CPU 112 has one or more CPU cores. The present embodiment does not limit the number of CPUs and the number of CPU cores.

The memory 113 is an internal memory for directly exchanging data with the processor, and can read and write data at any time, and is fast, and is used as a temporary data memory for an operating system or other running programs. The memory includes at least two types of memories, for example, the memory may be a random access memory (ram) or a Read Only Memory (ROM). For example, the random access memory is a dynamic random access memory (dynamic random access memory, DRAM), or a storage class memory (storage class memory, SCM). DRAM is a semiconductor memory, which, like most random access memories (random access memory, RAM), is a volatile memory (volatile memory) device. SCM is a compound storage technology combining both traditional storage and memory characteristics, and storage class memories can provide faster read and write speeds than memory devices, but access speeds slower than DRAM, and are cheaper in cost than DRAM. However, the DRAM and SCM are only exemplary in this embodiment, and the memory may also include other random access memories, such as static random access memories (static random access memory, SRAM), and the like. For read-only memory, for example, it may be a programmable read-only memory (programmable read only memory, PROM), erasable programmable read-only memory (erasable programmable read only memory, EPROM), etc. In addition, the memory 113 may be a dual in-line memory module or a dual in-linememory module (DIMM), that is, a module composed of Dynamic Random Access Memory (DRAM), or a Solid State Disk (SSD). In practical applications, a plurality of memories 113 may be configured in the storage host device 110, and the plurality of memories 113 may be different types of memories. The number and type of the memories 113 are not limited in this embodiment. In addition, the memory 113 may be configured to have a power conservation function. The power-up protection function means that the data stored in the memory 113 is not lost when the system is powered down and powered up again. The memory having the power-saving function is called a nonvolatile memory.

The storage device 100 is used to provide storage resources, such as storage data. It may be a mechanical hard disk or other type of storage medium, such as a solid state disk or the like. The network card 114 is used to communicate with other application host devices 110.

The storage device may store data in the form of block stores. The block storage mode stores data, namely, a storage medium in a storage device is divided into blocks according to a fixed size, and each block is assigned a number for addressing. Taking the example that the storage device is a mechanical hard disk, a block may be a sector, a sector being 512 bytes or 4 kbytes. In some cases, hard disks are typically addressed with numbers consisting of Cylinder-Head-Sector numbers (CHS). In other cases, the hard disk may also be addressed with a logical block number (Logical Block Addressing, LBA). Therefore, hard disks are often referred to as block devices. The application server and the block device may communicate via iSCSI protocol, or other protocols.

In some cases, it is often necessary to completely erase the storage device, for example, in order to reset the storage device for subsequent use of the empty space to store other types of data. However, in the current erasing process of the storage device, for erasing security, a three-way overwriting erasing mode is generally adopted. The three-way overwriting erasure mode is long in time consumption, so that the erasure usability of the current storage device is poor. To this end, the present application provides a memory device erasing method.

Fig. 2 is a schematic diagram of an interaction flow corresponding to a storage device erasing method provided in the present application. The method may be performed by the host device 110 in fig. 1, or may be performed by a processor or a processing chip in the host device 110, or may be performed by other devices included in the system shown in fig. 1, which is not limited in this application. The storage device erasing method provided in the present application is described below by taking a storage device as a hard disk as an example, but the storage device erasing method provided in the present application may be applied to other types of storage media, such as a volatile storage medium, and the type of the storage medium to be erased is not limited in this application. The method comprises the following steps:

step 201: the host device determines a logical address of a target unit to be erased of the hard disk. There are a number of possible scenarios for step 201, specifically as follows:

in a possible case, if the host device determines that there is no erased unit in the hard disk, the host device may start erasing from a certain unit (target unit to be erased) included in the hard disk. The logical address of the target unit to be erased is not limited herein, and for example, the logical address of the target unit to be erased may be the logical address of the first unit in the hard disk. A unit is a unit of erase data in a hard disk, for example, in a mechanical hard disk, any one of the units in the mechanical hard disk is a sector.

In another possible scenario, if the host device determines that the target erased unit in the hard disk has been successfully erased, the host device updates the logical address of the target unit to be erased of the hard disk according to the logical address of the target erased unit and the number N of erased units. The target erased unit is the first unit in the N units, the target unit to be erased is the first unit after the N units, and N is a positive integer. The arrangement order of the units in the hard disk may be ordered according to the order of the logical addresses of the units.

For example, there are 98 units in total in a hard disk. The data of the first 15 cells in the hard disk have been erased, and these 15 cells are divided into 3 erasures, each of which erases 5 cells. For example, in a round of data erasing process of the hard disk, the N units are the 11 th to 15 th units in the hard disk, the target erased unit is the 11 th unit, and the logical address of the target erased unit is the logical address of the 11 th unit. While the number M of cells to be erased may be the same as N, i.e. the number of cells erased per round is the same, e.g. m=n=5.

Step 202: and the host equipment generates a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased. M is a positive integer. And the writing instruction indicates the hard disk to start from the target unit to be erased, all bits in the M units to be erased are written into a preset value, and any bit written into the preset value indicates that the data of the bit are erased.

For example, the write command instructs the hard disk to write all bits in the 5 th cell 16-20 to a preset value, e.g., 0, starting from the 16 th cell.

Step 203: the host device sends a write command to the hard disk.

Step 204: the hard disk executes the write instruction.

Wherein the hard disk supports a serial write mode and a parallel write mode. The serial writing mode refers to that after the hard disk receives a writing instruction, the hard disk executes other writing instructions after the hard disk finishes executing the writing instruction. The parallel write mode is: the hard disk starts to execute the writing instruction, and other writing instructions can be executed simultaneously. The serial writing mode can ensure that the data of the erasing unit after the previous erasing unit in the hard disk is erased successfully, thereby ensuring that each erasing can be successful, and finally, the data of all the units to be erased in the hard disk can be erased successfully.

If the hard disk executes the writing instruction successfully, optionally, steps 205 to 206 can be executed; if the hard disk is not successful in executing the write command, step 207 may also be executed.

Step 205: the hard disk sends a first notification message to the host device. The first notification message indicates that the hard disk is successful in executing the write instruction.

Step 206: the host device determines whether there are other un-erased units in the hard disk, and if so, returns to step 201 to continue to perform data erasure in the other un-erased units, otherwise, ends the flow.

It should be noted that, returning to step 201, the target erased cell is updated. For example, in step 201, if the logical address of the target erased unit is the logical address of the 11 th unit and N is 5, then after executing steps 201 to 206 for one round, the logical address of the target erased unit is changed to the logical address of the 16 th unit in the hard disk.

Step 207: the hard disk sends a second notification message to the host device. The second notification message indicates that the hard disk fails to execute the writing instruction.

After step 207 is performed, the process may return to step 204. It should be noted that, returning to step 204, the target erased cell is not updated. For example, in step 201, if the logical address of the target erased unit is the logical address of the 11 th unit and N is 5, after performing steps 201 to 204 and 207 for one round, i.e. performing the write instruction to erase the data in the 5 consecutive units from the 11 th unit, the logical address of the target erased unit is still the logical address of the 11 th unit in the hard disk, that is, the data in the 5 consecutive units from the 11 th unit needs to be erased again until the data in the 5 consecutive units from the 11 th unit are erased.

Fig. 2 illustrates an interaction process between a host device and a storage device. As can be seen from fig. 2, a method for erasing a memory device provided in the present application involves two side processes: and generating a writing instruction by the host device side, and executing the writing instruction by the storage device side. The storage device side receives the writing instruction and can execute the writing instruction, and returns a corresponding notification message to the host device according to the result of executing the writing instruction. In the following, taking the example that the storage device is a hard disk as an example, the execution process of the host side in the method for erasing the storage device provided in the present application is further described in detail in conjunction with fig. 3. Fig. 3 is a schematic flow chart of steps on a host device side corresponding to a storage device erasing method provided in the present application.

Step 301: the host device determines whether the hard disk supports the serial write mode. If yes, go to step 302; otherwise, ending the flow.

Step 302: the host device obtains the unit size of the hard disk. For example, when the hard disk is a mechanical hard disk, the host device obtains the size of each sector in the mechanical hard disk.

Step 303: the host device determines the logical address of the target cell to be erased.

The number M of cells to be erased may also be determined in step 303. In one possible scenario of step 303, the host device initializes the logical address of the target unit to be erased and the number M of units to be erased. For example, when the host device does not erase data of any unit in the hard disk, then the erasure can be started from a certain unit (target unit to be erased) included in the hard disk. The logical address of the target unit to be erased is not limited herein, and for example, the target unit to be erased may be the first unit or the second unit, or the third unit, etc. in the hard disk. Taking the target unit to be erased as the first unit in the hard disk as an example, the host device can obtain the logical address of the first unit in the hard disk and the number M of the units to be erased. Wherein M may be a set value, for example, M is 5.M can also be calculated according to the preset functional relation, for example, the functional relation between M and the number or proportion of erased units in the hard disk can be set; for example, there are 98 units in the hard disk, and M is 10 when the number of erased units in the hard disk is greater than 0 and less than or equal to 50; m is 5 when the number of unerased cells in the hard disk is greater than 50 and less than or equal to 98. M may also be rounded up or down for 1/N of the number of erased cells in the hard disk, where N is a natural number.

In another possible scenario of step 303, if the host device determines that N units in the hard disk have been successfully erased, then the logical address of the target unit to be erased is determined according to the logical address of the target erased unit and the number N of units to be erased. For example, there are 98 units in the hard disk, the target erased unit is the 11 th unit, and N is 5. The logical address of the target cell to be erased is the logical address of the 16 th cell in the hard disk.

In another possible scenario of step 303, the total number of units in the hard disk is L, L is a positive integer, M is equal to N, and if the number of un-erased units in the hard disk is less than M, the host device determines that the logical address of the target unit to be erased is the logical address of the L-m+1th unit in the hard disk. For example, as shown in fig. 4, there are 98 units in the hard disk, and if the first 95 units in the hard disk have been erased, the number of unerased units in the hard disk is 3, which is less than 5. The host device determines that the logical address of the target unit to be erased is the logical address of the 94 th (98-5 + 1) unit, and erases the data of the 5 units the last time, so that the data of the 98 units in the hard disk can be completely erased.

It should be noted that, there are various ways of determining that the number of un-erased units in the hard disk is less than M, and the relationship between the number of un-erased units in the hard disk and M may be directly compared, or the relationship between the number of times the hard disk has accumulated the success of erasing from the start of erasing and the expected number of times the success of erasing, which is the accumulated number of times the writing command is successfully executed, required for successfully erasing the hard disk. For example, there are 98 units in the hard disk, and the number of units to be erased is a fixed value of 5, and the expected number of erasures is 20. When the number of times of the accumulated erasing success of the hard disk from the erasing start is smaller than 20, the number of the un-erased units in the hard disk is larger than M, and when the number of times of the accumulated erasing success of the hard disk from the erasing start is equal to 20, the number of the un-erased units in the hard disk is smaller than M.

In the above manner, it is unnecessary to pay attention to the change in the number of erased cells which are not erased in the hard disk erasing process, and 5 cells which are arranged consecutively are fixedly erased at a time. Therefore, only the 94 th to 95 th erased units and the 95 th to 98 th unerased units are required to be erased again when the hard disk is erased for the last time, and 5 units are also erased, so that the hard disk erasing process is simplified.

Step 304: the host device generates a write instruction according to the logical address of the target unit to be erased and the number M of the units to be erased. The writing instruction indicates that the hard disk starts from a target unit to be erased, all bits in the M units to be erased are written into a preset value, and any bit written into the preset value indicates that the data of the bit are erased.

The specific case of step 304 may be as follows:

the host equipment generates a binary stream file according to the logical address of the target unit to be erased and the number M of the units to be erased; the host device generates a write instruction for the binary stream.

The binary stream file indicates the logical address of the target unit to be erased and the number M of the units to be erased, and the binary stream file comprises a preset value set to be written in each bit of the units to be erased. The write instruction of the binary stream indicates to write a preset value set in the binary stream file into each unit to be erased of the M units to be erased.

For example, the standard input format of a binary file may be as follows:

00000000：02000101 2ffeffd001000000ffffff00

00000010：000000000000 0000 0000 0000 0000 0000

00000020：0000 0000 0000 0000 0000 0000 0000 0000

……

wherein 00000000, 00000010, 00000020, etc. are used to mark the line number of the binary stream file; "0200" in 00000000 indicates that writing is performed in the serial writing mode; 00000000 "0101" indicates that the front end mode (for round) is adopted to return, that is, the erasing result can be actively returned after the binary stream file is written, and the erasing result is not required to be actively queried; "2ffe ffd0 0100" in 00000000 row indicates the logical address of the target cell to be erased, and may be arranged in a small-end mode; the last "ffff ff00" of 00000000 rows and the foremost "0000 0000" of 00000010 rows are taken together to be "ffff 000000 0000" which represents the number of cells to be erased, and can also be arranged in a small-end mode; the "0000 … … 0000" after the number of the cells to be erased "ffff 000000 0000" is a preset value set, so that the preset value set in the binary stream file can be written into each bit of the corresponding cells to be erased in the M cells to be erased respectively. Each bit preset value in the preset value set can correspond to one unit to be erased. For example, the first "0" after the number of cells to be erased "ffff 000000 0000" corresponds to a cell to be erased having a logical address of "2ffe ffd0 0100" in the hard disk, and "0" is written on the bit of the cell to be erased.

The binary stream file may be generated using the pack function provided in the library of the programming language python. The pack function is a wrapper function. In the python operating environment, the serial writing mode, the front-end mode, the logic address of the target unit to be erased and the preset value set exist in the form of data, such as variables and arrays, and the pack function can package the data into character strings in the binary stream file, so that the character strings can be filled into the binary stream file through the pack function, and the generating efficiency of the binary stream file can be improved.

For example, the binary stream write instruction may be obtained by running the following Linux commands on the host side:

#sg_raw--send＝512-t 300--infile＝/root/WriteSameALL/wwn-xxx.BIN/dev/sds 85 0B 06 00 00 00 01 00 E0 00 00 00 00 40 3F 00；

wherein sg_raw is a command in sg 3_uteis a small computer system interface (small computer system interface, SCSI) command set used for direct use under Linux, and sg_raw is identified to send SCSI command; send=512 means transmitting 512-bit binary streams; -t 300 represents a time limit for command execution, 300 representing within 300 milliseconds (ms); -profile represents the source of the binary stream, i.e. wwn-xxx.bin file under/root/WriteSameALL/path, wwn-xxx.bin file is binary stream file; the dev/sds is a hard disk identifier; 85 0B 06 00 00 00 01 is a protocol identification agreed in the SCSI protocol.

After the Linux command is executed, the host device may obtain a write command, and then step 305 can be executed.

Step 305: the host device sends a write command to the hard disk.

Step 306: the host device determines whether the hard disk successfully executes the write instruction. If yes, go to step 307; otherwise, returning to step 305, the host device continues to repeat sending the write instruction to the hard disk.

The possible scenarios of step 306 are as follows:

if the host device receives the first notification message from the hard disk, the host device determines that the hard disk successfully executes the writing instruction; if the host device receives the second notification message from the hard disk, determining that the hard disk does not successfully execute the writing instruction; for the write instruction defining the execution time limit, if the host device does not receive any message at the end of the execution time limit, it is also determined that the hard disk has not successfully executed the write instruction.

For example, if no message is received after 300ms of execution of #sg_raw_send=512-t300-file=/root/WriteSameALL/wwn-xxx.bin/dev/sds, 0B 06 00 00 00 01 00E0 00 00 00 00 40 3F 00, it is determined that the hard disk has not successfully executed the write command. For example, after the execution of #sg_raw_send=512-t300-file=/root/WriteSameALL/wwn-xxx.bin/dev/sds 85 0B 06 00 00 00 01 00E0 00 00 00 00 40 3F 00, the host device receives the first notification message "local disc/dev/scclear sectors 6509559420 successful execution" to determine that the write command is executed. The host device may also receive a second notification message "local disk/dev/sds clear sectors 6509559420 failed" to determine that the write instruction execution failed.

Step 307: the host device determines whether there are any more erased cells in the hard disk. If yes, go back to step 303; otherwise, step 308 is performed.

Step 308: the host device randomly acquires data written in at least one unit in the hard disk, and checks whether all bits of at least one unit are preset values. Step 308 may specifically be as follows:

for example, the following instructions "/home/fsp #ddif=/dev/sdo of=/home/fsp/111. Txtbs=1M count=1" and "/home/fsp #od 111.Txt" may be executed. Wherein,/home/fsp is a directory, 111.Txt is a file under the directory/home/fsp, dd is copying data with a block of a specified size, the od instruction reads the contents of the given file and presents the contents in octal, decimal or hexadecimal format, if is an input file of which output file is represented,/dev/sdo is a hard disk identification; bs represents a block size in bytes, bs=1m represents a block size of 1MB; count represents the copy block number, and count=1 represents the copy block.

The instruction "/home/fsp #ddif=/dev/sdo of=/home/fsp/111. Txt bs=1m count=1" indicates that 1MB of data at random positions in the hard disk "/dev/sdo" is copied into the 111.Txt file under the/home/fsp directory.

The instruction "/home/fsp#od 111.Txt" means that the data in 111.Txt is presented in an octal word. Wherein octal is the default format in od commands, other octals may also be employed. For example, the data in 111.Txt may be presented in a decimal word by the instruction "/home/fsp #od-d 111.Txt", where "—d" represents a decimal.

After the execution of step 308 is completed, if the check results in that all bits of at least one of the units are the preset values, step 309 is executed, and the host device confirms that the hard disk erase is successful. If it is verified that all bits of at least one of the units are not the preset value, step 310 is performed, and the host device confirms that the hard disk erase fails.

Step 309: the host device confirms that the hard disk erase was successful.

After the execution of step 309 is completed, the hard disk is successfully erased, and the data of each unit in the hard disk is changed. By way of example, the data comparison for each unit in a hard disk may be as follows:

before the hard disk is erased, the data of each unit in the hard disk is read into a binary stream file, and the content of the binary stream file can be as follows:

00000000：564865021451 875601 789121 564105 684523 654561 230321

00000020：484884 931441 874801 564131 484054 884433 844481 330231

……

wherein 00000000, 00000020 represents a line number; therefore, before the hard disk is erased, various values of data of each unit in the hard disk are available.

After the hard disk is erased, resetting each bit included in each unit in the hard disk to be digital 0, and obtaining the content of the binary stream file can be as follows:

00000000：000000000000000000000000000000000000000000 000000

00000020：000000 000000 000000 000000 000000 000000 000000 000000

……

therefore, after the hard disk is erased, the data value of each unit in the hard disk is 0, which indicates that the data of each unit in the hard disk is completely erased.

Step 310: the host device confirms that the hard disk erase failed.

Based on the same technical concept as the operation analysis method embodiment of the web page, the embodiment of the application further provides a storage device erasing apparatus, which can be used to execute the storage device erasing method shown in fig. 3. The apparatus may be the host device in fig. 1 or another computing device, which is not limited in this application. As shown in fig. 5, the operation analysis device for the web page includes a determination module 501, a generation module 502, and an interface module 503, and the foregoing modules may be implemented by software or implemented by hardware executing corresponding software. Specifically, in the operation analysis device of the web page, connection can be established between the modules through a communication path.

A determining module 501, configured to update, when it is determined that N units in a storage device have been successfully erased, a logical address of a target unit to be erased of the storage device according to a logical address of the target unit to be erased and a number N of erased units, where the target unit to be erased is a first unit among the N units, the target unit to be erased is a first unit after the N units, and N is a positive integer, and the storage device supports a serial write mode; a generating module 502, configured to generate a write instruction according to a logical address of the target unit to be erased and the number M of units to be erased, where M is a positive integer, where the write instruction instructs the storage device to write all bits in M units to be erased into a preset value from the target unit to be erased, and any bit is written into the preset value to indicate that the data of the bit is erased; and the interface module 503 is configured to send the write instruction to the storage device, so that the storage device executes the write instruction.

The storage device may be a mechanical hard disk, and any unit in the mechanical hard disk may be a sector.

In one possible design, the write instruction is a binary stream write instruction, and the generating module 502 is specifically configured to, when generating the write instruction according to the logical address of the target unit to be erased and the number M of units to be erased: generating a binary stream file according to the logical address of the target unit to be erased and the number M of the units to be erased, wherein the logical address of the target unit to be erased and the number M of the units to be erased are indicated in the binary stream file, and the binary stream file comprises a preset value set to be written in each bit in any one unit to be erased; generating a writing instruction of the binary stream, wherein the writing instruction of the binary stream indicates that a preset value set in the binary stream file is written into each bit in any one unit to be erased in M units to be erased from a logic address of the target unit to be erased.

In one possible design, the total number of units in the storage device is L, where L is a positive integer, and M is equal to N, and the determining module 501 is specifically configured to, when updating the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of erased units: if the number of the un-erased units in the storage device is smaller than M, determining the logical address of the target unit to be erased as the logical address of the L-M+1th unit in the storage device.

In a possible design, the determining module 501 is further configured to determine that all the cells in the storage device have been successfully erased, randomly acquire data written in at least one of the cells in the storage device, and confirm that the storage device is successfully erased if all the bits of at least one of the cells are checked to be a preset value.

As shown in fig. 6, an embodiment of the present application provides a storage device, including: an interface unit 601, configured to obtain a write instruction from a host device, where the storage device supports a serial write mode, where the write instruction instructs the storage device to start from a target unit to be erased, write all bits in M units to be erased to a preset value, where M is a positive integer, any bit is written to the preset value, where the preset value indicates that data of the bit is erased, a logical address of the target unit to be erased is obtained by the host device according to the logical address of the target unit to be erased of the storage device and the number N of erased units, where N is a positive integer, and the target unit to be erased is a first unit of N units that have been successfully erased, and the target unit to be erased is a first unit after the N units; and a processing unit 602, configured to execute the write instruction.

The interface unit 601 may be further configured to send a notification message to the host device after the write instruction is executed successfully, where the notification message indicates that the write instruction is executed successfully.

The embodiment of the application provides a storage device erasing system, which comprises a host device and a storage device (the storage device can be a hard disk or the like). When it is determined that N units in a storage device have been successfully erased, updating, by a host device, a logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, where the target unit to be erased is a first unit among the N units, and the target unit to be erased is a first unit after the N units, and N is a positive integer; generating a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction indicates the storage equipment to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset value to indicate that the data of the bit is erased; and the storage device is used for acquiring the writing instruction from the host device and sending a notification message to the host device after the writing instruction is successfully executed, wherein the notification message indicates that the writing instruction is successfully executed.

The embodiment of the application also provides an electronic device, which may have a structure as shown in fig. 7, and may be a computer device, or may be a chip or a chip system capable of supporting the computer device to implement the method.

The electronic device as shown in fig. 7 may comprise at least one processor 701, said at least one processor 701 being configured to be coupled to a memory, read and execute instructions in said memory to implement the steps of the propagation delay determining method provided by embodiments of the present application. Optionally, the electronic device may further comprise a communication interface 702 for supporting the electronic device in receiving or transmitting signaling or data. Communication interface 702 in the electronic device may be used to enable interaction with other electronic devices. The processor 701 may be used to implement an electronic device to perform the steps implemented by a host device or a storage device in the method shown in fig. 3. Optionally, the electronic device may further include a memory 703 in which computer instructions are stored, the memory 703 may be coupled to the processor 701 and/or the communication interface 702 for supporting the processor 701 to invoke the computer instructions in the memory 703 to implement the steps implemented by the host device or the storage device in the method shown in fig. 3; in addition, the memory 703 may also be used for storing data involved in the method embodiments of the present application, for example, for storing data, instructions necessary to support the communication interface 702 for implementing the interactions, and/or for storing configuration information necessary for the electronic device to perform the methods described in the method embodiments of the present application.

Embodiments of the present application also provide a computer readable storage medium, where computer instructions are stored, where the computer instructions, when executed by a computer, may cause the computer to perform the method involved in any one of the possible designs of the method embodiments and the method embodiments described above. In the embodiment of the present application, the computer readable storage medium is not limited, and may be, for example, RAM (random-access memory), ROM (read-only memory), or the like.

The present application also provides a chip, which may include a processor coupled to a memory for reading and executing a software program stored in the memory for performing the method involved in any one of the possible implementations of the method embodiments, the method embodiments described above, wherein "coupled" means that the two components are directly or indirectly combined with each other, which combination may be fixed or movable.

The present application also provides a computer program product which, when read and executed by a computer, causes the computer to perform the method as referred to in any one of the possible implementations of the method embodiments described above.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present invention are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, optical fiber), or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy Disk, a hard Disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

The steps of a method or algorithm described in the embodiments of the present application may be embodied directly in hardware, in a software element executed by a processor, or in a combination of the two. The software elements may be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. In an example, a storage medium may be coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC, which may reside in a terminal device. In the alternative, the processor and the storage medium may reside in different components in a terminal device.

These computer instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

Claims (18)

1. A method of erasing a memory device, comprising:

if the host device determines that N units in the storage device have been successfully erased, updating the logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, where the target unit to be erased is a first unit among the N units, the target unit to be erased is a first unit after the N units, and N is a positive integer, and the storage device supports a serial write mode;

the host device generates a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction instructs the storage device to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset values to indicate that the data of the bit are erased;

the host device sends the write instruction to the storage device to cause the storage device to execute the write instruction.

2. The method of claim 1, wherein the write instruction is a binary stream write instruction, the host device generating the write instruction according to the logical address of the target unit to be erased and the number M of units to be erased, comprising:

The host device generates a binary stream file according to the logical address of the target unit to be erased and the number M of the units to be erased, wherein the logical address of the target unit to be erased and the number M of the units to be erased are indicated in the binary stream file, and the binary stream file comprises a preset value set to be written in each bit in any one unit to be erased;

the host device generates a writing instruction of the binary stream, wherein the writing instruction of the binary stream indicates that a preset value set in the binary stream file is written into each bit in any one unit to be erased in M units to be erased from a logic address of the target unit to be erased.

3. The method of claim 1 or 2, wherein the total number of units in the storage device is L, L is a positive integer, and M is equal to N;

the updating the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of the erased units comprises the following steps:

if the number of the un-erased units in the storage device is smaller than M, the host device determines that the logical address of the target unit to be erased is the logical address of the L-M+1th unit in the storage device.

4. A method as claimed in any one of claims 1 to 3, further comprising:

and if the host equipment determines that all the units in the storage equipment are successfully erased, randomly acquiring the data written in at least one unit in the storage equipment, and if all the bits of at least one unit are checked to be the preset value, confirming that the storage equipment is successfully erased.

5. The method of any of claims 1 to 4, wherein the storage device is a mechanical hard disk, and any one of the units in the mechanical hard disk is a sector.

6. A method of erasing a memory device, comprising:

the method comprises the steps that a storage device obtains a writing instruction from a host device, the storage device supports a serial writing mode, the writing instruction indicates that the storage device starts from a target unit to be erased, all bits in M units to be erased are written into a preset value, M is a positive integer, any bit is written into the preset value and indicates that data of the bit are erased, a logical address of the target unit to be erased is obtained by the host device according to the logical address of the target unit to be erased of the storage device and the number N of the erased units, N is a positive integer, the target unit to be erased is the first unit in N units which are successfully erased, and the target unit to be erased is the first unit after the N units;

The storage device executes the write instruction.

7. The method as recited in claim 6, further comprising:

and after the storage device successfully executes the writing instruction, sending a notification message to the host device, wherein the notification message indicates that the writing instruction is successfully executed.

8. A method of erasing a memory device, comprising:

if the host device determines that N units in the storage device have been successfully erased, updating the logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, wherein the target unit to be erased is a first erased unit among the N units, the target unit to be erased is a first unit after the N units, and N is a positive integer, and the storage device supports a serial writing mode;

the host device generates a write-in instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the write-in instruction instructs the storage device to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset values to indicate that the data of the bit are erased;

The storage device acquires the writing instruction from the host device, and after the writing instruction is successfully executed, sends a notification message to the host device, wherein the notification message indicates that the writing instruction is successfully executed.

9. A memory device erasing apparatus, comprising:

a determining module, configured to update, when it is determined that N units in a storage device have been successfully erased, a logical address of a target unit to be erased of the storage device according to a logical address of the target unit to be erased and a number N of erased units, where the target unit to be erased is a first unit among the N units, the target unit to be erased is a first unit after the N units, and N is a positive integer, and the storage device supports a serial write mode;

the generating module is used for generating a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction indicates the storage equipment to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset value to indicate that the data of the bit is erased;

And the interface module is used for sending the writing instruction to the storage equipment so as to enable the storage equipment to execute the writing instruction.

10. The apparatus of claim 9, wherein the write command is a binary stream write command, and the generating module is specifically configured to, when generating the write command according to the logical address of the target unit to be erased and the number M of units to be erased:

generating a binary stream file according to the logical address of the target unit to be erased and the number M of the units to be erased, wherein the logical address of the target unit to be erased and the number M of the units to be erased are indicated in the binary stream file, and the binary stream file comprises a preset value set to be written in each bit in any one unit to be erased;

generating a writing instruction of the binary stream, wherein the writing instruction of the binary stream indicates that a preset value set in the binary stream file is written into each bit in any one unit to be erased in M units to be erased from a logic address of the target unit to be erased.

11. The apparatus of claim 9 or 10, wherein a total number of units in the storage device is L, L is a positive integer, and M is equal to N;

The determining module is specifically configured to update the logical address of the target unit to be erased of the storage device according to the logical address of the target erased unit and the number N of erased units:

if the number of the un-erased units in the storage device is smaller than M, determining the logical address of the target unit to be erased as the logical address of the L-M+1th unit in the storage device.

12. The apparatus of any of claims 9 to 11, wherein the determining module is further to:

and if all the bits of at least one unit are checked to be the preset value, confirming that the storage device is successfully erased.

13. The apparatus of any of claims 9 to 12, wherein the storage device is a mechanical hard disk, any one of the units of the mechanical hard disk being a sector.

14. A memory device, comprising:

an interface unit, configured to obtain a write instruction from a host device, where the storage device supports a serial write mode, where the write instruction instructs the storage device to start from a target unit to be erased, write all bits in M units to be erased to a preset value, where M is a positive integer, where any bit is written to the preset value, where the preset value indicates that data of the bit is erased, a logical address of the target unit to be erased is obtained by the host device according to the logical address of the target unit to be erased of the storage device and the number N of erased units, where N is a positive integer, and the target unit to be erased is a first unit of N units that have been successfully erased, and the target unit to be erased is a first unit after the N units;

And the processing unit is used for executing the writing instruction.

15. The storage device of claim 14, wherein the interface unit is further configured to send a notification message to the host device after the processing unit successfully executes the write instruction, the notification message indicating that the write instruction was successfully executed.

16. A storage device erase system, comprising: a host device and a storage device supporting a serial write mode;

the host device is configured to update, when it is determined that N units in the storage device have been successfully erased, a logical address of a target unit to be erased of the storage device according to the logical address of the target unit to be erased and the number N of erased units, where the target unit to be erased is a first unit among the N units, and the target unit to be erased is a first unit after the N units, and N is a positive integer; generating a writing instruction according to the logic address of the target unit to be erased and the number M of the units to be erased, wherein M is a positive integer, the writing instruction indicates the storage equipment to start from the target unit to be erased, all bits in the M units to be erased are written into preset values, and any bit is written into the preset value to indicate that the data of the bit is erased;

The storage device is configured to obtain the write instruction from the host device, and after the write instruction is executed successfully, send a notification message to the host device, where the notification message indicates that the write instruction is executed successfully.

17. An electronic device, the electronic device comprising: one or more processors; one or more memories; wherein the one or more memories store one or more computer instructions that, when executed by the one or more processors, cause the electronic device to perform the method of any of claims 1-5 or 6-7.

18. A computer readable storage medium comprising computer instructions which, when run on a computer, cause the computer to perform the method of any of claims 1 to 5 or 6 to 7.