CN117826963A - Power supply circuit and display device - Google Patents
Power supply circuit and display device Download PDFInfo
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- CN117826963A CN117826963A CN202311863874.5A CN202311863874A CN117826963A CN 117826963 A CN117826963 A CN 117826963A CN 202311863874 A CN202311863874 A CN 202311863874A CN 117826963 A CN117826963 A CN 117826963A
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- 230000033228 biological regulation Effects 0.000 claims abstract description 96
- 230000001105 regulatory effect Effects 0.000 claims description 47
- 238000004146 energy storage Methods 0.000 claims description 30
- 239000003990 capacitor Substances 0.000 claims description 20
- 230000000087 stabilizing effect Effects 0.000 claims description 19
- 238000001914 filtration Methods 0.000 claims description 4
- 230000005611 electricity Effects 0.000 abstract description 4
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- 229910044991 metal oxide Inorganic materials 0.000 description 2
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Abstract
The utility model provides a power supply circuit and display device, power supply circuit includes voltage regulation module, first output module and second output module, through setting up the voltage regulation module of being connected with first power end, second power end and voltage regulation control end electricity, by voltage regulation module under the control of the voltage regulation control signal of voltage regulation control end, based on the first power signal of first power end and the second power signal storage modulation voltage signal of second power end, thereby first output module is under the control of the first output control signal of modulation voltage signal and first output control end, provide first output signal to first output end, the second output module is under the control of the second output control signal of modulation voltage signal and second output control end, provide second output signal to second output end, thereby power supply circuit compatibility provides first output signal and second output signal, the display panel iteration upgrades and need not to change whole set of power supply circuit architecture.
Description
Technical Field
The application relates to the technical field of display, in particular to a power supply circuit and a display device.
Background
The PMIC (Power Management Integrated Circuit ) of the NB (Notebook Computer, notebook computer) in the related art generally uses both an all-positive half-voltage power supply circuit architecture, which is mostly applied to PMIC electrically connected to the a-Si display panel of the NB, and a positive half-voltage power supply circuit architecture, which is mostly applied to PMIC electrically connected to the IGZO display panel of the NB and the LTPS display panel.
However, the full positive and half-voltage power circuit architecture and the positive and negative voltage power circuit architecture in the related art are not compatible, so that the display panel is iteratively upgraded to replace the whole set of power circuit architecture.
Disclosure of Invention
The application provides a power supply circuit and a display device, which can solve the problem that the power supply circuit architecture in the related technology is not compatible.
In a first aspect, the present application provides a power supply circuit comprising:
the voltage regulating module is electrically connected with the first power supply end, the second power supply end and the voltage regulating control end, and is used for storing a modulation voltage signal based on the first power supply signal of the first power supply end and the second power supply signal of the second power supply end under the control of the voltage regulating control signal of the voltage regulating control end;
the first output module is electrically connected with the voltage regulating module, the first output control end and the first output end, and is used for providing a first output signal for the first output end based on the modulation voltage signal under the control of a first output control signal of the first output control end;
the second output module is electrically connected with the voltage regulating module, the second output control end and the second output end, and is used for providing a second output signal for the second output end based on the modulation voltage signal under the control of a second output control signal of the second output control end.
In the power supply circuit provided by the application, the voltage regulating module comprises a first voltage regulating control unit, an energy storage unit and a second voltage regulating control unit;
the first voltage regulation control unit is electrically connected with the first power supply end, a first voltage regulation control sub-end of the voltage regulation control end and the energy storage unit, and the first voltage regulation control unit is used for outputting the first power supply signal to the energy storage unit under the control of a first voltage regulation control signal of the first voltage regulation control sub-end;
the second voltage regulation control unit is electrically connected with the second power supply end, a second voltage regulation control sub-end of the voltage regulation control end and the energy storage unit, and the second voltage regulation control unit is used for outputting the second power supply signal to the energy storage unit under the control of a second voltage regulation control signal of the second voltage regulation control sub-end;
the energy storage unit is also electrically connected with the first output module and the second output module, and is used for storing the modulation voltage signal based on the first power supply signal and the second power supply signal.
In the power supply circuit provided by the application, the first voltage regulation control unit comprises a first switch transistor, a grid electrode of the first switch transistor is electrically connected with the first voltage regulation control sub-end, one of a source electrode and a drain electrode of the first switch transistor is electrically connected with the first power supply end, and the other of the source electrode and the drain electrode of the first switch transistor is electrically connected with the energy storage unit;
the second voltage regulation control unit comprises a second switch transistor, the grid electrode of the second switch transistor is electrically connected with the second voltage regulation control terminal, one of the source electrode and the drain electrode of the second switch transistor is electrically connected with the second power supply terminal, and the other of the source electrode and the drain electrode of the second switch transistor is electrically connected with the energy storage unit;
the energy storage unit comprises an inductor, a first end of the inductor is electrically connected with the first voltage regulation control unit and the first output module, and a second end of the inductor is electrically connected with the second voltage regulation control unit and the second output module.
In the power supply circuit provided by the application, the first output module comprises a third switch transistor, the grid electrode of the third switch transistor is electrically connected with the first output control end, one of the source electrode and the drain electrode of the third switch transistor is electrically connected with the voltage regulating module, and the other of the source electrode and the drain electrode of the third switch transistor is electrically connected with the first output end.
In the power supply circuit provided by the application, the second output module comprises a fourth switching transistor, the grid electrode of the fourth switching transistor is electrically connected with the second output control end, one of the source electrode and the drain electrode of the fourth switching transistor is electrically connected with the voltage regulating module, and the other of the source electrode and the drain electrode of the fourth switching transistor is electrically connected with the second output end.
In the power supply circuit provided by the application, the voltage value of the first power supply signal is larger than the voltage value of the second power supply signal.
In the power supply circuit that this application provided, power supply circuit still includes control module, control module with the voltage regulation control end first output control end and second output control end electricity is connected, control module be used for to the voltage regulation control end provide voltage regulation control signal, to first output control end provide first output control signal and to the second output control end provide second output control signal.
In the power supply circuit provided by the application, the power supply circuit further comprises a first voltage stabilizing module and a second voltage stabilizing module;
the first voltage stabilizing module is electrically connected with the first output end and the grounding end and is used for filtering the first output signal of the first output end;
the second voltage stabilizing module is electrically connected with the second output end and the grounding end, and is used for filtering the second output signal of the second output end.
In the power supply circuit provided by the application, the first voltage stabilizing module comprises a first capacitor, a first polar plate of the first capacitor is electrically connected with the first output end, and a second polar plate of the first capacitor is electrically connected with the grounding end;
the second voltage stabilizing module comprises a second capacitor, a first polar plate of the second capacitor is electrically connected with the second output end, and a second polar plate of the second capacitor is electrically connected with the grounding end.
In a second aspect, the present application further provides a display device, including a display panel and the power supply circuit of any one of the above, where at least one of the first power supply output end and the second power supply output end is electrically connected to the display panel.
The power supply circuit that this application provided sets up the voltage regulating module of being connected with first power end, second power end and voltage regulating control end electricity, by voltage regulating module under the control of the voltage regulating control signal of voltage regulating control end, based on the first power signal of first power end and the second power signal storage modulation voltage signal of second power end, thereby first output module is under the control of the first output control signal of modulation voltage signal and first output control end, provide first output signal to first output end, the second output module is under the control of the second output control signal of modulation voltage signal and second output control end, provide second output signal to second output end, realize that can compatible provide first output signal and second output signal based on same power supply circuit, and then display panel iteration upgrades and need not to change the whole set of power supply circuit architecture.
Drawings
FIG. 1 is a first block diagram of a power supply circuit provided by an embodiment of the present application;
FIG. 2 is a second block diagram of a power supply circuit provided by an embodiment of the present application;
FIG. 3 is a schematic diagram of a first circuit of the power supply circuit shown in FIG. 2;
FIG. 4 is a schematic diagram of a second circuit of the power supply circuit shown in FIG. 2;
FIG. 5 is a schematic diagram of a third circuit of the power supply circuit shown in FIG. 2;
FIG. 6 is a schematic diagram of the current flow of the circuit of FIG. 5 in a first driving mode;
fig. 7 is a schematic diagram of the current flow of the circuit shown in fig. 5 in the second driving mode.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. The described embodiments are only intended to illustrate the inventive idea and should not be taken as limiting the scope of the present application.
In some embodiments provided herein, as shown in fig. 1, a power supply circuit 100 includes a voltage regulation module 10, a first output module 20, and a second output module 30.
The voltage regulating module 10 is electrically connected to the first power source terminal VIN, the second power source terminal VREF, and the voltage regulating control terminal SW. The voltage regulating module 10 is configured to store a modulated voltage signal based on a first power signal of the first power terminal VIN and a second power signal of the second power terminal VREF under control of a voltage regulating control signal provided by the voltage regulating control terminal SW.
Further, as shown in fig. 2, the voltage regulation module 10 includes a first voltage regulation control unit 11, an energy storage unit 12, and a second voltage regulation control unit 13.
The first voltage regulating control unit 11 is electrically connected to the first power source terminal VIN, the first voltage regulating control sub-terminal SW1 of the voltage regulating control terminal SW, and the energy storage unit 12. The first voltage regulation control unit 11 is configured to output a first power signal of the first power source terminal VIN to the energy storage unit 12 under the control of a first voltage regulation control signal of the first voltage regulation control sub-terminal SW 1.
Further, as shown in fig. 3, the first voltage regulation control unit 11 includes a first switching transistor Q1. The gate of the first switching transistor Q1 is electrically connected to the first voltage regulating control terminal SW1, one of the source and the drain of the first switching transistor Q1 is electrically connected to the first power supply terminal VIN, and the other of the source and the drain of the first switching transistor Q1 is electrically connected to the energy storage unit 12.
In some embodiments of the present application, as shown in fig. 3, the first switching transistor Q1 is an N-type metal oxide transistor (NMOS), and the NMOS is turned on when its gate is at a high level and turned off when its gate is at a low level. The duration of the first switch transistor Q1 is controlled by controlling the duration of the first voltage regulation control signal of the first voltage regulation control sub-terminal SW1 to be a high level signal.
In other embodiments of the present application, the first switching transistor Q1 is a P-type metal oxide transistor (PMOS), which is turned on when its gate is low and turned off when its gate is high. The duration of the first switch transistor Q1 is controlled by controlling the duration of the first voltage regulation control signal to be a low level signal.
The second voltage regulation control unit 13 is electrically connected to the second power source terminal VREF, the second voltage regulation control sub-terminal SW2 of the voltage regulation control terminal SW, and the energy storage unit 12. The second voltage regulation control unit 13 is configured to output a second power signal of the second power terminal VREF to the energy storage unit 12 under the control of a second voltage regulation control signal of the second voltage regulation control sub-terminal SW 2.
Further, as shown in fig. 3, the second voltage regulation control unit 13 includes a second switching transistor Q2. The gate of the second switching transistor Q2 is electrically connected to the second voltage regulating control sub-terminal SW2, one of the source and the drain of the second switching transistor Q2 is electrically connected to the second power supply terminal VREF, and the other of the source and the drain of the second switching transistor Q2 is electrically connected to the energy storage unit 12.
In some embodiments of the present application, as shown in fig. 3, the second switching transistor Q2 is an NMOS, which is turned on when its gate is at a high level and turned off when its gate is at a low level. The duration of the second switch transistor Q2 is controlled by controlling the duration of the second voltage regulating control signal of the second voltage regulating control sub-terminal SW2 to be a high level signal.
In other embodiments of the present application, the second switching transistor Q2 is a PMOS, which is turned on when its gate is low and turned off when its gate is high. The duration of the second switching transistor Q2 is controlled by controlling the duration of the second voltage regulation control signal to be a low level signal.
The energy storage unit 12 is also electrically connected to the first output module 20 and the second output module 30. The energy storage unit 12 is used for storing the modulated voltage signal based on the first power signal of the first power terminal VIN and the second power signal of the second power terminal VREF.
In some embodiments of the present application, the energy storage unit 12 includes an inductance L, as shown in fig. 3. The first end of the inductor L is electrically connected with the first voltage regulation control unit 11 and the first output module, and the second end of the inductor L is electrically connected with the second voltage regulation control unit 13 and the second output module.
The inductor L serves as an energy storage device, and when the magnitude of a current flowing through a coil of the inductor L increases from zero, the inductor L generates a certain magnetic field around the inductor L to block the current change, and stores a certain energy by the magnetic field. And when the current flowing through the coil of the inductor L starts to decrease, the inductor L releases a certain amount of stored energy to maintain the magnitude of the current flowing through the coil of the inductor L.
In this embodiment, when the first voltage regulation control unit 11 and the second voltage regulation control unit 13 are both turned on, a path is formed between the first power supply terminal VIN and the second power supply terminal VREF, and when the potential of the first power supply terminal VIN is not equal to that of the second power supply terminal VREF, there is a potential drop between the first power supply terminal VIN and the second power supply terminal VREF, so that the magnitude of the current flowing through the inductor L increases from zero, and a magnetic field is generated around the inductor L and energy stored by the magnetic field.
Specifically, in some embodiments provided herein, the voltage value of the first power supply signal is greater than the voltage value of the second power supply signal. There is a voltage drop between the first power terminal VIN and the second power terminal VREF and a current formed based on the voltage drop flows from the first power terminal VIN to the second power terminal VREF.
The first output module 20 is electrically connected to the voltage regulation module 10, the first output control terminal EN1, and the first output terminal OUT1. The first output module 20 is configured to provide a first output signal to the first output terminal OUT1 based on the voltage regulation control signal provided by the voltage regulation module 10 under the control of the first output control signal of the first output control terminal EN 1.
As shown in fig. 3, the first output module 20 includes a third switching transistor Q3. The gate of the third switching transistor Q3 is electrically connected to the first output control terminal EN1, one of the source and the drain of the third switching transistor Q3 is electrically connected to the voltage regulating module 10, and the other of the source and the drain of the third switching transistor Q3 is electrically connected to the first output terminal OUT1.
In some embodiments of the present application, as shown in fig. 3, the third switching transistor Q3 is an NMOS, which is turned on when its gate is at a high level and turned off when its gate is at a low level. The duration of the third switch transistor Q3 is controlled by controlling the duration of the first voltage regulation control signal of the first voltage regulation control sub-terminal SW1 to be a high level signal.
In other embodiments of the present application, the third switching transistor Q3 is a PMOS, which is turned on when its gate is low and turned off when its gate is high. The duration of the third switching transistor Q3 is controlled by controlling the duration of the first output control signal to be a low level signal.
When the first voltage regulation control unit 11 is turned off and the second voltage regulation control unit 13 and the first output module 20 are turned on, a path is formed between the first output terminal OUT1 and the second power supply terminal VREF, the current flowing through the inductor L decreases, the inductor L is used for preventing the current change from releasing the energy stored in order to maintain the magnitude of the current flowing through the coil of the inductor L, and the current formed by the energy released by the inductor L flows from the second terminal of the inductor L to the first terminal of the inductor L and even flows to the first output terminal OUT1.
The second output terminal OUT2 is electrically connected to the voltage regulating module 10, the second output control terminal EN2, and the second output terminal OUT2. The second output module 30 is configured to provide the second output signal to the second output terminal OUT2 based on the modulation control signal provided by the voltage regulation module 10 under the control of the second output control signal of the second output control terminal EN 2.
In some embodiments provided herein, the second output module 30 includes a fourth switching transistor Q4, as shown in fig. 3. The gate of the fourth switching transistor Q4 is electrically connected to the second output control terminal EN2, one of the source and the drain of the fourth switching transistor Q4 is electrically connected to the voltage regulating module 10, and the other of the source and the drain of the fourth switching transistor Q4 is electrically connected to the second output terminal OUT2.
In some embodiments of the present application, as shown in fig. 3, the fourth switching transistor Q4 is an NMOS, which is turned on when its gate is at a high level and turned off when its gate is at a low level. The duration of the fourth switching transistor Q4 is controlled by controlling the duration of the first voltage regulation control signal of the first voltage regulation control sub-terminal SW1 to be a high level signal.
In other embodiments of the present application, the fourth switching transistor Q4 is a PMOS, which is turned on when its gate is low and turned off when its gate is high. The duration of the fourth switching transistor Q4 is controlled by controlling the duration of the first output control signal to be a low level signal.
When the second voltage regulation control unit 13 is turned off and the first voltage regulation control unit 11 and the second output module 30 are turned on, a path is formed between the second output terminal OUT2 and the first power supply terminal VIN, the current flowing through the inductor L changes, the inductor L is used for preventing the current change from releasing the energy stored in order to maintain the magnitude of the current flowing through the coil of the inductor L, and the current formed by the energy released by the inductor L flows from the first end of the inductor L to the second end of the inductor L and even to the second output terminal OUT2.
The power supply circuit that this application provided sets up the voltage regulating module 10 that is connected with first power supply end VIN, second power supply end VREF and voltage regulating control end SW electricity, by voltage regulating module 10 under the control of the voltage regulating control signal of voltage regulating control end SW, based on the first power supply signal of first power supply end VIN and the second power supply signal storage modulation voltage signal of second power supply end VREF, thereby first output module 20 is under the control of the first output control signal of modulation voltage signal and first output control end, provide first output signal to first output end OUT1, second output module 30 is under the control of the second output control signal of modulation voltage signal and second output control end OUT2, realize providing first output signal and second output signal based on same power supply circuit can be compatible, and then display panel iteration upgrades and need not to change the power supply circuit architecture of whole set.
In some embodiments provided herein, as shown in fig. 4, the difference between fig. 4 and fig. 3 is that the power supply circuit 100 further includes a control module 40. The control module 40 is electrically connected to the voltage regulating control terminal SW, the first output control terminal EN1 and the second output control terminal EN 2. The control module 40 is configured to provide a voltage regulation control signal to the voltage regulation control signal terminal SW, a first output control signal to the first output control terminal EN1, and a second output control signal to the second output control terminal EN 2.
Specifically, the control module 40 is a microcontroller MCU or other component or integrated circuit having a duty cycle for controlling the voltage regulation control signal, the first output control signal, and the second output control signal in a time-sharing or simultaneous manner.
In some embodiments provided herein, as shown in fig. 5, the difference between fig. 5 and fig. 3 and fig. 4 is that the power supply circuit 100 further includes a first voltage stabilizing module 51 and a second voltage stabilizing module 52.
The first voltage stabilizing module 51 is electrically connected to the first output terminal OUT1 and the ground terminal GND, and the first voltage stabilizing module 51 is configured to filter a first output signal of the first output terminal OUT1.
Specifically, the first voltage stabilizing module 51 includes a first capacitor C1. The first plate of the first capacitor C1 is electrically connected to the first output terminal OUT1, and the second plate of the first capacitor C1 is electrically connected to the ground terminal GND.
The second voltage stabilizing module 52 is electrically connected to the second output terminal OUT2 and the ground terminal GND, and the second voltage stabilizing module 52 is configured to filter a second output signal of the second output terminal OUT2.
Specifically, the second voltage stabilizing module 52 includes a second capacitor C2. The first plate of the second capacitor C2 is electrically connected to the second output terminal OUT2, and the second plate of the second capacitor C2 is electrically connected to the ground terminal GND.
The first driving mode of the power supply circuit 100 shown in fig. 5 will be described below based on fig. 6. As shown in fig. 6, the first voltage regulation control unit 11 includes a first switching transistor Q1, the second voltage regulation control unit 13 includes a second switching transistor Q2, the energy storage unit 12 includes an inductance L, the first output module 20 includes a third switching transistor Q3, the second output module 30 includes a fourth switching transistor Q4, the control module 40 includes a microprocessor MCU, the first voltage stabilizing module 51 includes a first capacitor C1, and the second voltage stabilizing module 52 includes a second capacitor C2.
When the power supply circuit 100 is applied to a display panel with a positive-negative voltage architecture, the microprocessor MCU controls the fourth switching transistor Q4 to be continuously in an off state and controls the second switching transistor Q2 to be continuously in an on state, and the microprocessor MCU outputs a waveform of a first voltage regulating control signal with a duty ratio of D1, so as to control the first switching transistor Q1 to be turned on and off, and the microprocessor MCU outputs a waveform of a first output control signal with a duty ratio of D2, so as to control the third switching transistor Q3 to be turned on and off.
In the first stage, the first switching transistor Q1 is turned on, the second switching transistor Q2 is turned on, the third switching transistor Q3 is turned off, and the fourth switching transistor Q4 is turned off. Since the first switching transistor Q1 and the second switching transistor Q2 are both turned on, a path is formed between the first power supply terminal VIN and the second power supply terminal VREF, a current flows from the first terminal of the inductor L to the second terminal of the inductor L, the first power supply signal of the first power supply terminal VIN charges the inductor L, and at the same time, the voltage of the first output terminal OUT1 is maintained by the first capacitor C1. The voltage value of the first power signal of the first power terminal VIN is greater than or equal to 2.5 volts and less than or equal to 5 volts.
It should be noted that the magnitude of the voltage value Vi of the modulated voltage signal stored by the inductor L based on the first phase charging depends on the on-time of the first switching transistor Q1 in the first phase, i.e. depends on the magnitude of the duty cycle D1 of the first voltage regulating control signal.
In the second phase, the first switching transistor Q1 is turned off, the second switching transistor Q2 is turned on, the third switching transistor Q3 is turned on, and the fourth switching transistor Q4 is turned off. Since the second switching transistor Q2 and the third switching transistor Q3 are both turned on, a path is formed between the second power supply terminal VREF and the first output terminal OUT1OUT, the inductor L outputs a reverse current flowing from the second terminal of the inductor L to the first terminal of the inductor L, the reverse current flows to the first output terminal OUT1, and at this time, the voltage value V of the first output signal at the first output terminal OUT1 o1 ＝-[D3/(1-D3)]*Vi。
It will be appreciated that the voltage value V of the first output signal o1 The magnitude of (2) also depends on the on-time of the third switching transistor Q3 in the second stage, i.e. on the magnitude of the duty cycle D3 of the first output control signal.
In this way, the first output terminal OUT1 can provide the AVEE signal and the VGL signal to the display panel, and the first output terminal OUT1 can output the voltage range: greater than or equal to-Vimax and less than or equal to-20V, wherein Vimax refers to the voltage maximum of the modulated voltage signal.
The second driving mode of the power supply circuit 100 shown in fig. 5 is described below based on fig. 7.
When the power supply circuit 100 is applied to the display panel with the full-positive half-voltage architecture, the microprocessor MCU controls the third switching transistor Q3 to be continuously in the off state and controls the first switching transistor Q1 to be continuously in the on state, and the microprocessor MCU outputs a waveform of the second voltage regulating control signal with the duty ratio of D3, further controls the second switching transistor Q2 to be turned on and off, and the microprocessor MCU outputs a waveform of the second output control signal with the duty ratio of D4, further controls the fourth switching transistor Q4 to be turned on and off.
In the first stage, the first switching transistor Q1 is turned on, the second switching transistor Q2 is turned on, the third switching transistor Q3 is turned off, and the fourth switching transistor Q4 is turned off. Since the first switching transistor Q1 and the second switching transistor Q2 are both turned on, a path is formed between the first power supply terminal VIN and the second power supply terminal VREF, a current flows from the first terminal of the inductor L to the second terminal of the inductor L, the first power supply signal of the first power supply terminal VIN charges the inductor L, and at the same time, the voltage of the first output terminal OUT1 is maintained by the first capacitor C1.
It should be noted that the magnitude of the voltage value Vi of the modulated voltage signal stored by the inductor L based on the first phase charging depends on the on-time of the second switching transistor Q2 in the first phase, i.e. on the magnitude of the duty cycle D2 of the second voltage regulating control signal.
In the second phase, the first switching transistor Q1 is turned on, the second switching transistor Q2 is turned off, the third switching transistor Q3 is turned off, and the fourth switching transistor Q4 is turned on. Since the first switching transistor Q1 and the fourth switching transistor Q4 are both turned on, a path is formed between the first power supply terminal VIN and the second output terminal OUT2, the inductor L is connected to discharge the second output terminal OUT2 together with the first power supply terminal VIN, and the voltage value V of the second output signal at the second output terminal OUT2 o2 ＝[D4/(1-D4)]*Vi。
It should be appreciated that the secondVoltage value V of output signal o2 The magnitude of (2) also depends on the on-time of the fourth switching transistor Q4 in the second stage, i.e. on the magnitude of the duty cycle D4 of the second output control signal.
In this way, the second output terminal OUT2 can provide a voltage signal to the LDO (Low Dropout Regulator ) of the display panel, the second output signal can also be used as a gamma voltage signal, an AVDD signal, a VGH signal, a reset signal, and a compensation signal of the display panel, and the second output terminal OUT2 can output a voltage range: greater than or equal to min, which is the voltage minimum of the modulated voltage signal, and less than or equal to 60V.
In a second aspect, embodiments of the present application further provide a display device including the power supply circuit 100 described in any of the above embodiments and a display panel electrically connected to at least one of the first output terminal OUT1 and the second output terminal OUT2 of the power supply circuit 100, so that the power supply circuit 100 can provide multiple voltages to the display panel.
There are, of course, many other embodiments of the invention that can be made by those skilled in the art in light of the present disclosure without departing from the spirit and essential characteristics of the invention, but that such modifications and variations are to be considered as falling within the scope of the claims appended hereto.
Claims (10)
1. A power supply circuit, comprising:
the voltage regulating module is electrically connected with the first power supply end, the second power supply end and the voltage regulating control end, and is used for storing a modulation voltage signal based on the first power supply signal of the first power supply end and the second power supply signal of the second power supply end under the control of the voltage regulating control signal of the voltage regulating control end;
the first output module is electrically connected with the voltage regulating module, the first output control end and the first output end, and is used for providing a first output signal for the first output end based on the modulation voltage signal under the control of a first output control signal of the first output control end;
the second output module is electrically connected with the voltage regulating module, the second output control end and the second output end, and is used for providing a second output signal for the second output end based on the modulation voltage signal under the control of a second output control signal of the second output control end.
2. The power supply circuit of claim 1, wherein the voltage regulation module comprises a first voltage regulation control unit, an energy storage unit, and a second voltage regulation control unit;
the first voltage regulation control unit is electrically connected with the first power supply end, a first voltage regulation control sub-end of the voltage regulation control end and the energy storage unit, and the first voltage regulation control unit is used for outputting the first power supply signal to the energy storage unit under the control of a first voltage regulation control signal of the first voltage regulation control sub-end;
the second voltage regulation control unit is electrically connected with the second power supply end, a second voltage regulation control sub-end of the voltage regulation control end and the energy storage unit, and the second voltage regulation control unit is used for outputting the second power supply signal to the energy storage unit under the control of a second voltage regulation control signal of the second voltage regulation control sub-end;
the energy storage unit is also electrically connected with the first output module and the second output module, and is used for storing the modulation voltage signal based on the first power supply signal and the second power supply signal.
3. The power supply circuit of claim 2, wherein the first voltage regulation control unit comprises a first switching transistor, a gate of the first switching transistor is electrically connected to the first voltage regulation control sub-terminal, one of a source and a drain of the first switching transistor is electrically connected to the first power supply terminal, and the other of the source and the drain of the first switching transistor is electrically connected to the energy storage unit;
the second voltage regulation control unit comprises a second switch transistor, the grid electrode of the second switch transistor is electrically connected with the second voltage regulation control terminal, one of the source electrode and the drain electrode of the second switch transistor is electrically connected with the second power supply terminal, and the other of the source electrode and the drain electrode of the second switch transistor is electrically connected with the energy storage unit;
the energy storage unit comprises an inductor, a first end of the inductor is electrically connected with the first voltage regulation control unit and the first output module, and a second end of the inductor is electrically connected with the second voltage regulation control unit and the second output module.
4. The power supply circuit of claim 1, wherein the first output module comprises a third switching transistor, a gate of the third switching transistor is electrically connected to the first output control terminal, one of a source and a drain of the third switching transistor is electrically connected to the voltage regulation module, and the other of the source and the drain of the third switching transistor is electrically connected to the first output terminal.
5. The power supply circuit of claim 1, wherein the second output module comprises a fourth switching transistor, a gate of the fourth switching transistor being electrically connected to the second output control terminal, one of a source and a drain of the fourth switching transistor being electrically connected to the voltage regulation module, the other of the source and the drain of the fourth switching transistor being electrically connected to the second output terminal.
6. The power supply circuit of claim 1, wherein a voltage value of the first power supply signal is greater than a voltage value of the second power supply signal.
7. The power supply circuit of any one of claims 1 to 6, further comprising a control module electrically connected to the voltage regulation control terminal, the first output control terminal, and the second output control terminal, the control module configured to provide the voltage regulation control signal to the voltage regulation control terminal, the first output control signal to the first output control terminal, and the second output control signal to the second output control terminal.
8. The power supply circuit of any one of claims 1 to 6, further comprising a first voltage regulation module and a second voltage regulation module;
the first voltage stabilizing module is electrically connected with the first output end and the grounding end and is used for filtering the first output signal of the first output end;
the second voltage stabilizing module is electrically connected with the second output end and the grounding end, and is used for filtering the second output signal of the second output end.
9. The power supply circuit of claim 8, wherein the first voltage regulation module comprises a first capacitor having a first plate electrically connected to the first output terminal and a second plate electrically connected to the ground terminal;
the second voltage stabilizing module comprises a second capacitor, a first polar plate of the second capacitor is electrically connected with the second output end, and a second polar plate of the second capacitor is electrically connected with the grounding end.
10. A display device comprising a display panel and the power supply circuit of any one of claims 1 to 9, at least one of the first power supply output and the second power supply output being electrically connected to the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311863874.5A CN117826963A (en) | 2023-12-29 | 2023-12-29 | Power supply circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311863874.5A CN117826963A (en) | 2023-12-29 | 2023-12-29 | Power supply circuit and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117826963A true CN117826963A (en) | 2024-04-05 |
Family
ID=90509300
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311863874.5A Pending CN117826963A (en) | 2023-12-29 | 2023-12-29 | Power supply circuit and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117826963A (en) |
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2023
- 2023-12-29 CN CN202311863874.5A patent/CN117826963A/en active Pending
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