CN117808278A - Processing method and device for stagnant wafer, electronic equipment and medium - Google Patents
Processing method and device for stagnant wafer, electronic equipment and medium Download PDFInfo
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- 235000012431 wafers Nutrition 0.000 claims abstract description 543
- 238000004519 manufacturing process Methods 0.000 claims abstract description 148
- 238000000034 method Methods 0.000 claims abstract description 35
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 92
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Abstract
The application provides a processing method, a processing device, electronic equipment and a medium for a rigid wafer, wherein the processing method comprises the following steps: according to a preset time interval, obtaining the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states; determining newly added rigid wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer; integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers; and after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area. According to the method and the device, the dull wafers are stored in the management area of the dull wafers after being integrated according to the preset time interval, so that the processing efficiency of the dull wafers is improved, and the production efficiency of a machine is improved.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method and apparatus for processing a rigid wafer, an electronic device, and a medium.
Background
In a semiconductor factory, the management of a dull wafer is one of the important tasks of in-situ management personnel. The stagnant wafers are mainly factory engineering laboratory products and defective products with recovery value, are not treated for a long time after being produced, and are required to be stored and treated in a targeted manner. Currently, the management of the stagnant wafers is carried out by on-site personnel for manual inspection and management. The variety of the dull wafers is numerous, and the manual management often cannot be carried out comprehensively, so that the dull wafers are scattered everywhere, the storage space of the normal wafers is occupied, the normal products with shorter dispatching time requirements are affected by the production yield, and the production efficiency of the machine is reduced.
In addition, the factors generated by the rigid wafer are many and the generation time is uncertain, so that the manual processing is not timely, and the processing efficiency of the rigid wafer is not low.
Disclosure of Invention
Accordingly, an object of the present application is to provide a processing method, apparatus, electronic device, and medium for processing a rigid wafer, which can process the rigid wafer, and improve the processing efficiency of the rigid wafer, thereby improving the production efficiency of a machine.
In a first aspect, an embodiment of the present application provides a method for processing a dull wafer, where the method for processing a dull wafer includes:
according to a preset time interval, obtaining the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states;
determining newly added rigid wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer;
integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers;
and after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area.
In one possible embodiment, determining the newly added and fooled wafer from all the wafers according to the production type, production state and duration of the production state of each wafer includes:
judging whether the production state of the wafer is stop production or not;
if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type;
if the duration of the production state is longer than the preset duration corresponding to the production type, the wafer is a newly added and foggy wafer.
In one possible embodiment, integrating all newly added dummy wafers to obtain a plurality of integrated dummy wafers includes:
acquiring attribute information of newly added rigid wafers and the number of silicon chips; each attribute information carries a corresponding priority;
if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, the newly added rigid wafer is split according to the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity are obtained;
and integrating all newly added rigid wafers with the quantity of the silicon chips smaller than the capacity of the preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
In one possible implementation, the splitting the newly added and fooled wafer according to the preset carrier capacity includes:
the ratio of the number of the silicon wafers newly added with the dead wafers to the capacity of the preset carrier is rounded downwards to obtain the splitting number;
splitting the split number of the rigid wafers from the newly added rigid wafers to obtain the integrated rigid wafers with the split number;
and determining the newly added rigid wafer after the splitting is completed as the rigid wafer to be integrated.
In one possible implementation, the attribute information includes a wafer name and a wafer type, and the wafer name is prioritized over the wafer type; according to the order of priority from high to low, integrating all newly added and integrated dull wafers with the quantity of all silicon chips smaller than the capacity of a preset carrier according to the attribute information of the newly added and integrated dull wafers, so as to obtain a plurality of integrated dull wafers, wherein the method comprises the following steps:
integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer name in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated;
integrating the wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the capacity of the preset carrier;
and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
In a second aspect, an embodiment of the present application further provides a processing apparatus for a dull wafer, where the processing apparatus for a dull wafer includes:
the acquisition module is used for acquiring the production types and the production states of all wafers outside the stagnant wafer management area and the duration time of the production states according to a preset time interval;
the determining module is used for determining newly added and dull wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer;
the integration module is used for integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers;
and the storage module is used for storing all newly added rigid wafers in the integrated rigid wafers into the management area of the rigid wafers after the newly added rigid wafers are placed into the same carrier.
In one possible implementation manner, the determining module is specifically configured to determine whether the production state of the wafer is to stop production; if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type; if the duration of the production state is longer than the preset duration corresponding to the production type, the wafer is a newly added and foggy wafer.
In one possible implementation manner, the integration module is specifically configured to obtain attribute information of the newly added and stagnant wafer and the number of silicon chips; each attribute information carries a corresponding priority; if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, splitting the newly added rigid wafer according to the preset carrier capacity to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity; and integrating all newly added rigid wafers with the quantity of the silicon chips smaller than the capacity of the preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
In one possible implementation, the integration module is further configured to:
the ratio of the number of the silicon wafers newly added with the dead wafers to the capacity of the preset carrier is rounded downwards to obtain the splitting number;
splitting the split number of the rigid wafers from the newly added rigid wafers to obtain the integrated rigid wafers with the split number;
and determining the newly added rigid wafer after the splitting is completed as the rigid wafer to be integrated.
In one possible implementation, the attribute information includes a wafer name and a wafer type, and the wafer name is prioritized over the wafer type; the integration module is further used for:
integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer name in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated;
integrating the wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the capacity of the preset carrier;
and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
In a third aspect, an embodiment of the present application further provides an electronic device, including: a processor, a storage medium, and a bus, the storage medium storing machine-readable instructions executable by the processor, the processor and the storage medium in communication over the bus when the electronic device is operating, the processor executing the machine-readable instructions to perform the steps of the method of processing a wafer as in any of the first aspects.
In a fourth aspect, embodiments of the present application also provide a computer readable storage medium having a computer program stored thereon, which when executed by a processor performs the steps of the method for processing a wafer as defined in any one of the first aspects.
The embodiment of the application provides a processing method, a processing device, electronic equipment and a medium for a dull wafer, wherein the processing method comprises the following steps: according to a preset time interval, obtaining the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states; determining newly added rigid wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer; integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers; and after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area. According to the method and the device, the dull wafers are stored in the management area of the dull wafers after being integrated according to the preset time interval, so that the processing efficiency of the dull wafers is improved, and the production efficiency of a machine is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for processing a wafer in a processing mode according to an embodiment of the present application;
FIG. 2 is a flow chart illustrating another method of processing a wafer in a processing chamber according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a processing apparatus for processing a wafer according to an embodiment of the present application;
fig. 4 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it should be understood that the accompanying drawings in the present application are only for the purpose of illustration and description, and are not intended to limit the protection scope of the present application. In addition, it should be understood that the schematic drawings are not drawn to scale. A flowchart, as used in this application, illustrates operations implemented according to some embodiments of the present application. It should be understood that the operations of the flow diagrams may be implemented out of order and that steps without logical context may be performed in reverse order or concurrently. Moreover, one or more other operations may be added to the flow diagrams and one or more operations may be removed from the flow diagrams as directed by those skilled in the art.
In addition, the described embodiments are only some, but not all, of the embodiments of the present application. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.
In order to enable one skilled in the art to use the present disclosure, the following embodiments are presented in connection with a specific application scenario "semiconductor technology field". It will be apparent to those having ordinary skill in the art that the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present application. Although the present application is described primarily in the context of "semiconductor technology," it should be understood that this is but one exemplary embodiment.
It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the presence of the features stated hereinafter, but not to exclude the addition of other features.
A semiconductor technology method provided in the embodiments of the present application is described in detail below.
Referring to fig. 1, a schematic flow chart of a semiconductor technology method provided in an embodiment of the present application is shown, where a specific implementation process of the semiconductor technology method is as follows:
s101, acquiring the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states according to a preset time interval.
S102, determining newly added and dull wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer.
S103, integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers.
S104, after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area.
The embodiment of the application provides a processing method of a dead wafer, which comprises the following steps: according to a preset time interval, obtaining the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states; determining newly added rigid wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer; integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers; and after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area. According to the method and the device, the dull wafers are stored in the management area of the dull wafers after being integrated according to the preset time interval, so that the processing efficiency of the dull wafers is improved, and the production efficiency of a machine is improved.
Exemplary steps of embodiments of the present application are described below:
s101, acquiring the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states according to a preset time interval.
In this embodiment of the present application, since the frequency of the generation of the dull wafer is not high, the search frequency is not too high, and if the search frequency is too high, the load of the automation control platform is increased, and the time interval of the polling that is generally preset may be set to 10 minutes, that is, 10 minutes triggers the process flow of the automation of the dull wafer. And acquiring the production types and the production states of all wafers outside the management area of the rigid wafer from production execution system (Manufacturing Execution System, MES for short) data according to preset polling time intervals, and the duration of the production states. The wafer may be a finished wafer or a wafer in the process.
The production type can comprise factory engineering experiment wafer production type, mass production wafer production type and the like; production status includes stop production and in-process production, etc.; the duration of the production state refers to the duration of the current production state. The management area of the stagnant wafer is preset in advance, and the pool position which is farthest from the production area among the pool positions with the lowest use frequency is required to be arranged; the capacity of the management area of the hysteresis wafer should be the product of the total bin and a predetermined ratio (which may be 5%).
S102, determining newly added and dull wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer.
In this embodiment, the newly added dummy wafer is a newly added dummy wafer, that is, a wafer whose production state is a state in which production is stopped and whose duration is longer than a preset duration corresponding to a production type of the newly added dummy wafer.
Determining a newly added dull wafer from all wafers by the following steps:
step one, judging whether the production state of the wafer is stop production.
And step two, if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type.
In the embodiment of the application, the production types are different, and the corresponding preset durations are also different. The preset time period refers to the longest time that the wafer is in the production stop state.
And step three, if the duration of the production state is longer than the preset duration corresponding to the production type, the wafer is a newly added and foggy wafer.
S103, integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers.
In this embodiment, the integrated dummy wafer is obtained by integrating one or more newly added dummy wafers, and is mainly used for being stored in one carrier together with other newly added dummy wafers when the number of the silicon chips of the newly added dummy wafers is insufficient to fill the one carrier, so as to reduce the waste of resources. At most one integrated dull wafer in all integrated dull wafers has a number of silicon chips smaller than a preset carrier capacity, and the number of the silicon chips of the rest integrated dull wafers is equal to the preset carrier capacity.
Specifically, attribute information of newly added rigid wafers and the number of silicon chips are obtained; each attribute information carries a corresponding priority; if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, the newly added rigid wafer is split according to the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity are obtained; and integrating all newly added rigid wafers with the quantity of the silicon chips smaller than the capacity of the preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
S104, after all newly added rigid wafers in the integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in a rigid wafer management area.
In an embodiment of the present application, for each integrated dummy wafer, all newly added dummy wafers in the integrated dummy wafer are placed into the same carrier and stored into the dummy wafer management area.
Further, the embodiment of the application further comprises: if the capacity of the management area of the stagnant wafer is 0, adding at least one bin which is farthest from the production area among unused bins with lowest use frequency into the management area of the stagnant wafer.
In the present embodiment, the unused bank bits refer to bank bits that are not currently used.
Referring to fig. 2, a flowchart of another processing method for a wafer with a processing method for a processing method according to an embodiment of the present application is shown, and the following description will explain exemplary steps of the embodiments of the present application:
s201, obtaining attribute information of the newly added rigid wafer and the number of the silicon chips.
In this embodiment, each attribute information carries a corresponding priority. The attribute information may include wafer name, wafer type, wafer priority, wafer processing strategy (e.g., contamination level), etc. The priority corresponding to the attribute information refers to the integrated priority of the wafer, which is different from the wafer priority. Wafer type refers to the class of wafers.
S202, if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, splitting the newly added rigid wafer according to the preset carrier capacity to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
In the embodiment of the application, if the number of the silicon wafers of the newly added rigid wafer is greater than or equal to the preset carrier capacity, the number of the silicon wafers of the newly added rigid wafer is required to be split and stored.
Splitting the newly added rigid wafer according to the preset carrier capacity by the following steps:
i. and (3) rounding down the ratio of the number of the silicon chips of the newly added rigid wafer to the capacity of the preset carrier to obtain the split number.
In the embodiment of the present application, the number of split wafers refers to the number of integrated dead wafers with a preset carrier capacity.
For example, the ratio a/b=3.4 of the number of wafers a newly added as a dummy wafer to the preset carrier capacity B is 3.
ii. Splitting the split number of the rigid wafers from the newly added rigid wafers to obtain the integrated rigid wafers with the split number.
And iii, determining the newly added rigid wafer after the splitting is completed as the rigid wafer to be integrated.
In the embodiment of the application, the newly added rigid wafer remained after the splitting is completed is determined as the rigid wafer to be integrated.
And S203, integrating all newly-added rigid wafers with the quantity smaller than the capacity of a preset carrier and all rigid wafers to be integrated according to the attribute information of the newly-added rigid wafers in the order of priority from high to low, so as to obtain a plurality of integrated rigid wafers.
Optionally, if the attribute information includes a wafer name and a wafer type, and the priority of the wafer name is higher than the priority of the wafer type, integrating all newly added and to-be-integrated dummy wafers with the number of the silicon chips smaller than the capacity of the preset carrier according to the attribute information of the newly added and to-be-integrated dummy wafers in order of priority from high to low, to obtain a plurality of integrated dummy wafers, including: integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer names in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated; integrating wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the preset carrier capacity, and at most one rigid wafer to be integrated with the number of silicon chips being smaller than the preset carrier capacity; and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
Optionally, if the attribute information includes a wafer name, a wafer type, and a wafer priority, and the priority of the wafer name > the priority of the wafer type > the priority of the wafer priority, in order of priority from high to low, according to the attribute information of the newly added dummy wafers, integrating all newly added dummy wafers with the number of the silicon chips smaller than the capacity of a preset carrier with all dummy wafers to be integrated to obtain a plurality of integrated dummy wafers, wherein the method comprises the following steps: integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer name in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated; integrating the wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the capacity of the preset carrier; integrating the wafers with the same wafer priority in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of silicon chips being smaller than the capacity of the preset carrier; and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
Optionally, if the attribute information includes a wafer name, a wafer type, a wafer priority and a wafer processing policy, and the priority of the wafer name is greater than the priority of the wafer type, the priority of the wafer priority is greater than the priority of the wafer processing policy, integrating all newly added and to-be-integrated dummy wafers with the number of all wafers smaller than the capacity of the preset carrier according to the attribute information of the newly added and to-be-integrated dummy wafers in order of priority from top to bottom, to obtain a plurality of integrated dummy wafers, including: integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer name in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated; integrating the wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the capacity of the preset carrier; integrating the wafers with the same wafer priority in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of silicon chips being smaller than the capacity of the preset carrier; integrating the wafers with the same wafer processing strategy in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of silicon chips being smaller than the capacity of the preset carrier; and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
The embodiment of the application provides another processing method of a rigid wafer, which comprises the following steps: acquiring attribute information of newly added rigid wafers and the number of silicon chips; each attribute information carries a corresponding priority; if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, the newly added rigid wafer is split according to the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity are obtained; and integrating all newly added rigid wafers with the quantity of the silicon chips smaller than the capacity of the preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers. By means of the method, all newly added and dull wafers can be integrated.
Based on the same inventive concept, the embodiment of the present application further provides a processing device for a solid wafer, which corresponds to the processing method for a solid wafer, and since the principle of solving the problem by the device in the embodiment of the present application is similar to that of the processing method for a solid wafer in the embodiment of the present application, the implementation of the device may refer to the implementation of the method, and the repetition is omitted.
Referring to fig. 3, a schematic diagram of a processing apparatus for a solid wafer according to an embodiment of the present application is shown, where the processing apparatus for a solid wafer includes:
an obtaining module 301, configured to obtain, at a preset time interval, production types and production states of all wafers outside the management area of the stagnant wafer, and a duration of the production states;
a determining module 302, configured to determine a newly added and fooled wafer from all wafers according to a production type, a production state, and a duration of the production state of each wafer;
an integrating module 303, configured to integrate all the newly added dummy wafers to obtain a plurality of integrated dummy wafers;
the storage module 304 is configured to store all newly added dummy wafers in the integrated dummy wafers in the management area of the dummy wafers after the newly added dummy wafers are placed in the same carrier.
In one possible implementation, the determining module 302 is specifically configured to determine whether the production status of the wafer is stop production; if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type; if the duration of the production state is longer than the preset duration corresponding to the production type, the wafer is a newly added and foggy wafer.
In one possible implementation, the integrating module 303 is specifically configured to obtain attribute information of the newly added wafer and the number of silicon chips; each attribute information carries a corresponding priority; if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, splitting the newly added rigid wafer according to the preset carrier capacity to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity; and integrating all newly added rigid wafers with the quantity of the silicon chips smaller than the capacity of the preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
In one possible implementation, the integration module 303 is further configured to:
the ratio of the number of the silicon wafers newly added with the dead wafers to the capacity of the preset carrier is rounded downwards to obtain the splitting number;
splitting the split number of the rigid wafers from the newly added rigid wafers to obtain the integrated rigid wafers with the split number;
and determining the newly added rigid wafer after the splitting is completed as the rigid wafer to be integrated.
In one possible implementation, the attribute information includes a wafer name and a wafer type, and the wafer name is prioritized over the wafer type; the integration module 303 is further configured to:
integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer name in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated;
integrating the wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the capacity of a preset carrier, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the capacity of the preset carrier;
and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
The embodiment of the application provides a processing device for a dull wafer, which comprises: an obtaining module 301, configured to obtain, at a preset time interval, production types and production states of all wafers outside the management area of the stagnant wafer, and a duration of the production states; a determining module 302, configured to determine a newly added and fooled wafer from all wafers according to a production type, a production state, and a duration of the production state of each wafer; an integrating module 303, configured to integrate all the newly added dummy wafers to obtain a plurality of integrated dummy wafers; the storage module 304 is configured to store all newly added dummy wafers in the integrated dummy wafers in the management area of the dummy wafers after the newly added dummy wafers are placed in the same carrier. According to the method and the device, the dull wafers are stored in the management area of the dull wafers after being integrated according to the preset time interval, so that the processing efficiency of the dull wafers is improved, and the production efficiency of a machine is improved.
As shown in fig. 4, an electronic device 400 provided in an embodiment of the present application includes: the processing system comprises a processor 401, a memory 402 and a bus, wherein the memory 402 stores machine readable instructions executable by the processor 401, and when the electronic device is running, the processor 401 communicates with the memory 402 through the bus, and the processor 401 executes the machine readable instructions to perform the steps of the processing method for the wafer as described above.
Specifically, the memory 402 and the processor 401 can be general-purpose memories and processors, and are not limited herein, and the processing method of the wafer can be performed when the processor 401 runs a computer program stored in the memory 402.
Corresponding to the above processing method of the stagnant wafer, the embodiment of the application also provides a computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, and the computer program executes the steps of the above processing method of the stagnant wafer when being executed by a processor.
It will be clearly understood by those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described system and apparatus may refer to corresponding procedures in the method embodiments, which are not described in detail in this application. In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, and the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, and for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, indirect coupling or communication connection of devices or modules, electrical, mechanical, or other form.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical units, may be located in one place, or may be distributed over multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a non-volatile computer readable storage medium executable by a processor. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the information processing method described in the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk, etc.
The foregoing is merely a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes or substitutions are covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A method of processing a solid wafer, the method comprising:
according to a preset time interval, obtaining the production types and the production states of all wafers outside the stagnant wafer management area and the duration of the production states;
determining newly added and dull wafers from all wafers according to the production type, the production state and the duration of the production state of each wafer;
integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers;
and after all newly added rigid wafers in all integrated rigid wafers are placed in the same carrier, storing the newly added rigid wafers in the rigid wafer management area.
2. The method of claim 1, wherein determining newly added dummy wafers from all wafers based on the type of production, the state of production, and the duration of the state of production for each wafer comprises:
judging whether the production state of the wafer is production stop;
if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type;
and if the duration time of the production state is longer than the preset duration time corresponding to the production type, the wafer is a newly added and foggy wafer.
3. The method of claim 2, wherein integrating all newly added wafers to obtain a plurality of integrated wafers comprises:
acquiring attribute information of the newly added rigid wafer and the number of silicon chips; each attribute information carries a corresponding priority;
if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, splitting the newly added rigid wafer according to the preset carrier capacity to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity;
and integrating all newly added rigid wafers with the quantity smaller than the capacity of a preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
4. The method for processing a dummy wafer according to claim 3, wherein the step of dividing the newly added dummy wafer according to a predetermined carrier capacity comprises:
the ratio of the number of the silicon wafers of the newly added rigid wafer to the capacity of the preset carrier is rounded downwards to obtain the splitting number;
splitting the split number of the rigid wafers from the newly added rigid wafers to obtain the split number of integrated rigid wafers;
and determining the newly added rigid wafer after the splitting is completed as the rigid wafer to be integrated.
5. The processing method of the rigid wafer according to claim 3, wherein the attribute information includes a wafer name and a wafer type, and the priority of the wafer name is higher than the priority of the wafer type; according to the order of priority from high to low, integrating all newly added solid wafers with the quantity of all silicon chips smaller than the capacity of a preset carrier and all solid wafers to be integrated according to the attribute information of the newly added solid wafers to obtain a plurality of integrated solid wafers, wherein the method comprises the following steps:
integrating all newly added solid wafers with the number smaller than the preset carrier capacity and wafers with the same wafer names in all solid wafers to be integrated to obtain at least one integrated solid wafer with the number of the silicon wafers being the preset carrier capacity, and at most one solid wafer with the number smaller than the preset carrier capacity to be integrated;
integrating wafers with the same wafer type in all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of silicon chips being the preset carrier capacity, and at most one rigid wafer to be integrated with the number of silicon chips being smaller than the preset carrier capacity;
and integrating all the current unintegrated rigid wafers to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity.
6. A processing apparatus for a solid wafer, the processing apparatus comprising:
the acquisition module is used for acquiring the production types and the production states of all wafers outside the stagnant wafer management area and the duration time of the production states according to a preset time interval;
the determining module is used for determining newly added and stagnant wafers from all the wafers according to the production type, the production state and the duration of the production state of each wafer;
the integration module is used for integrating all the newly added rigid wafers to obtain a plurality of integrated rigid wafers;
and the storage module is used for storing all newly added rigid wafers in each integrated rigid wafer into the management area of the rigid wafer after the newly added rigid wafers are placed into the same carrier.
7. The processing apparatus for processing a wafer according to claim 6, wherein the determining module is specifically configured to:
judging whether the production state of the wafer is production stop;
if the production state of the wafer is production stop, judging whether the duration of the production state is longer than the preset duration corresponding to the production type;
and if the duration time of the production state is longer than the preset duration time corresponding to the production type, the wafer is a newly added and foggy wafer.
8. The processing apparatus for processing a wafer as defined in claim 7, wherein the integration module is specifically configured to:
acquiring attribute information of the newly added rigid wafer and the number of silicon chips; each attribute information carries a corresponding priority;
if the number of the silicon chips of the newly added rigid wafer is larger than or equal to the preset carrier capacity, splitting the newly added rigid wafer according to the preset carrier capacity to obtain at least one integrated rigid wafer with the number of the silicon chips being the preset carrier capacity, and at most one to-be-integrated rigid wafer with the number of the silicon chips being smaller than the preset carrier capacity;
and integrating all newly added rigid wafers with the quantity smaller than the capacity of a preset carrier and all rigid wafers to be integrated according to the attribute information of the newly added rigid wafers in the order of priority from high to low to obtain a plurality of integrated rigid wafers.
9. An electronic device, comprising: a processor, a storage medium and a bus, the storage medium storing machine-readable instructions executable by the processor, the processor and the storage medium communicating over the bus when the electronic device is running, the processor executing the machine-readable instructions to perform the steps of the method of processing a wafer as claimed in any one of claims 1 to 5.
10. A computer-readable storage medium, characterized in that it has stored thereon a computer program which, when being executed by a processor, performs the steps of the method for processing a wafer as defined in any of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311825175.1A CN117808278A (en) | 2023-12-26 | 2023-12-26 | Processing method and device for stagnant wafer, electronic equipment and medium |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311825175.1A CN117808278A (en) | 2023-12-26 | 2023-12-26 | Processing method and device for stagnant wafer, electronic equipment and medium |
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| CN117808278A true CN117808278A (en) | 2024-04-02 |
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| CN202311825175.1A Pending CN117808278A (en) | 2023-12-26 | 2023-12-26 | Processing method and device for stagnant wafer, electronic equipment and medium |
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| CN (1) | CN117808278A (en) |
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- 2023-12-26 CN CN202311825175.1A patent/CN117808278A/en active Pending
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