CN117793052A - Communication interface, bus state monitoring system and method thereof - Google Patents
Communication interface, bus state monitoring system and method thereof Download PDFInfo
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- 238000012544 monitoring process Methods 0.000 title claims abstract description 59
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Abstract
The present disclosure relates to a communication interface for connecting a master and one or more slaves in sequence using a three-wire communication bus, a bus state monitoring system employing the communication interface, and a method for automatically setting a slave address using the communication interface. The communication interface comprises: an address line port for controlling on-line communication address allocation of the slave, address lines between a master and one or more slaves via the address line port being connected in series; and two communication line ports for supplying power and transmitting communication signals, two communication lines between one master and one or more slaves via the communication line ports being connected in parallel.
Description
Technical Field
The present disclosure relates to a communication interface, a bus state monitoring system and a method thereof, and more particularly, to a communication interface compatible with bidirectional wiring for a bus state monitoring system, a bus state monitoring system and a method thereof.
Background
The monitoring module of the bus state monitoring system in the market still takes the traditional communication bus such as RS485 as the main part, and the monitoring module is installed in a centralized mode or in a part of a distributed mode, and a large amount of manual installation and debugging workload is assisted. In general, bus duct type is distributed at a high altitude of a factory building, and when monitoring modules are installed sequentially along a bus, an installation engineer needs to transcribe an address of each monitoring module and a bus part number corresponding to the address, so that a large amount of manual work is required in the field in the conventional scheme.
For example, in the first conventional scheme, that is, the factory preset address scheme, the address of the monitoring module needs to be manually transcribed on site, and then the monitoring module is installed on the bus, or after the monitoring module is installed on the bus, the address of the monitoring module is manually transcribed on the bus.
For example, in the second conventional scheme, i.e., the site setting address scheme, an engineer is required to arrive at the site in advance before the construction and installation, set an address for each monitoring module, and then install the monitoring module on the bus bar.
The defects of the two schemes are large engineering quantity and complicated flow, and the debugging engineers and the installation engineering team are required to work together, so that the labor cost is high and the management is complex.
Therefore, there is a need in the market for a solution that can improve the address setting of the monitoring modules in the bus state monitoring system, thereby reducing a lot of manual work, avoiding errors, and improving efficiency.
Disclosure of Invention
In order to reduce manual operations, the scheme of the application is proposed to realize automatic address allocation for address setting of the monitoring modules in the bus state monitoring system.
According to an aspect of the present application, there is provided a communication interface for connecting a master and one or more slaves in sequence using a three-wire communication bus, comprising: an address line port for controlling on-line communication address allocation of the slave, address lines between a master and one or more slaves via the address line port being connected in series; and two communication line ports for supplying power and transmitting communication signals, two communication lines between one master and one or more slaves via the communication line ports being connected in parallel.
The address line port of the slave is configured to be in an input state or an output state; the address line port of the host is configured to output status.
When the slave is electrified, both a source end address line and a load end address line of the slave are set to be in an input state; when one address line interface in the slave receives an address line signal of the master or a previously connected slave, the address line interface is set to an input state, and the other address line interface in the slave is set to an output end.
The three-wire communication bus adopts a symmetrical design.
Wherein, the communication interface adopts a fool-proof interface.
The two communication wires are communicated by adopting a two-bus type universal bus technology, and the two-bus type universal bus technology at least comprises a narrow-band power carrier PLC, a broadband power carrier HPLC, MBus, powerBus and a fire-fighting two-bus.
The three-wire communication bus connection between the master machine and the slave machine and between the slave machine and the slave machine is forward connection or reverse connection.
According to an aspect of the present application, there is provided a bus condition monitoring system employing the communication interface as described above.
According to an aspect of the present application, there is provided a method for automatically setting a slave address using the communication interface as described above, comprising: step a), a host sends an address allocation signal to a first slave through an address line port; step b), after the first slave machine recognizes the address allocation signal sent by the host machine on the address line port, entering an address configuration state and broadcasting a ready state through the communication line port, wherein the ready state comprises the unique hardware code of the first slave machine; step c), the host broadcasts a new address allocation message on the communication line port, wherein the new address allocation message comprises the unique hardware code of the first slave machine received from the first slave machine; step d), the first slave receives the new address allocation message, configures the communication address, and replies an address setting success message at the communication port; step e), the host computer sends a command to the first slave computer through the communication line port, and the first slave computer is required to send an address allocation signal to the rear-stage slave computer through the address line port; step f), repeating the steps b) -e) by the second slave and the master; and step h), repeating the steps b) -f) by the follow-up slave machine.
According to the communication interface compatible with bidirectional wiring for the bus state monitoring system, the bus state monitoring system and the method thereof, the 3-wire communication interface is provided, the interface comprises a communication bus, an address wire is added, and the on-line dynamic allocation of equipment addresses can be realized, so that the 3-wire communication interface has the following advantages:
1) The addresses of the monitoring modules are not required to be transcribed or manually distributed, so that the engineering quantity is reduced; 2) Firstly, the monitoring module is installed on the bus, then the debugging software is used for remote operation to carry out address allocation of the monitoring module, engineers can enter the bus after the installation team completes installation and acceptance, the process is well connected, responsibility is clear, and labor cost and management cost are reduced.
Drawings
Aspects, features, and advantages of the present disclosure will become more apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
FIG. 1 shows a schematic composition of a bus bar condition monitoring system according to an embodiment of the present invention;
FIG. 2 is a schematic diagram showing the communication bus composition and connections of a bus state monitoring system according to an embodiment of the present invention;
FIG. 3 illustrates a networking connectivity schematic of a bus bar status monitoring system in accordance with an embodiment of the present invention;
FIG. 4 (a) shows a schematic diagram of address assignment of a slave of a bus state monitoring system according to an embodiment of the present invention;
FIG. 4 (b) shows a flow chart of a method of address assignment of a slave of a bus bar status monitoring system according to an embodiment of the present invention; and
fig. 5 shows a schematic diagram of an address line input-output direction configuration between a master and a slave of a bus state monitoring system according to an embodiment of the present invention.
Detailed Description
The present disclosure will be described in detail below with reference to exemplary embodiments thereof. However, the present disclosure is not limited to the embodiments described herein, which may be embodied in many different forms. The described embodiments are intended only to provide a thorough and complete understanding of the present disclosure and to fully convey the concept of the present disclosure to those skilled in the art. Features of the various embodiments described may be combined with or substituted for one another, unless expressly excluded or excluded depending on the context.
Fig. 1 shows a schematic diagram of the composition of a bus bar condition monitoring system 100 according to an embodiment of the present invention.
As shown in fig. 1, the bus state monitoring system 100 according to the embodiment of the present invention mainly comprises a master 110, one or more slaves 120, and one or more preset cables 130, where the master 110 and the one or more slaves 120 are networked through the one or more preset cables 130 to form the bus state monitoring system 100.
The host 110 of the bus state monitoring system 100 according to the embodiment of the present invention is used as a total control unit of the bus state monitoring system, and has a communication bus and 1 fool-proof interface socket according to the embodiment of the present invention. Is responsible for the overall control of the system, is connected with slave equipment in the south direction through a communication bus interface according to the embodiment of the invention, and is directly connected with an upper system in the north direction by using a general communication bus.
The slave 120 of the bus state monitoring system 100 according to the embodiment of the present invention has a communication bus and 2 fool-proof interface sockets according to the embodiment of the present invention as an execution unit of the bus state monitoring system. The slave 120 is responsible for monitoring the status of the bus to which it is connected, such as temperature, humidity, electrical parameters, etc. Which is interconnected with other slaves 120 via a communication bus interface according to an embodiment of the present invention and thus accesses the fool-proof interface of the master 110. Various marks for use as direction marks, such as solid dots as shown in fig. 1, or other direction marks not shown, etc., are arranged on the body of the slave 120.
The pre-fabricated cable 130 of the bus bar status monitoring system 100 according to the embodiment of the present invention has two completely symmetrical fool-proof interface plugs for the interconnection between the slaves 120 and the connection of the slaves 120 with the master 110.
Fig. 2 shows a schematic diagram of the communication bus composition and connections of the bus state monitoring system 100 according to an embodiment of the present invention.
As shown in fig. 2, the communication bus according to the embodiment of the invention is composed of 3 wires, namely a direct current power source positive wire, a direct current power source negative wire and an address wire. The communication terminal line sequence of the bus according to the embodiment of the invention adopts a symmetrical design. The communication bus according to an embodiment of the present invention is sequentially connected through the fool-proof interface socket of the master 110, the fool-proof interface plug of the one or more pre-fabricated cables 130, and the fool-proof interface socket of the one or more slaves 120, which are alternately present.
The communication bus according to an embodiment of the present invention includes two sets of signal lines: the first group of signal wires are a direct current power source positive wire and a direct current power source negative wire which are used as direct current power sources/communication functions; and the second set of signal lines are address lines.
The dc power/communication line of the communication bus according to the embodiment of the present invention includes 2 cables for transmitting the dc power and the communication signal of the bus status monitoring system 100.
The dc power supply is derived from a dc switching power supply on the host 110 side, and is used to distinguish between the positive and negative poles, and to supply power to one or more slaves 120 of the network. The direct current power supply positive electrode wire and the direct current power supply negative electrode wire are connected to a direct current switch power supply of the host computer 110, and the direct current power supply positive electrode wire and the direct current power supply negative electrode wire are also respectively connected to a singlechip of the host computer 110 and a singlechip of the slave computer 120 through a communication interface circuit of the host computer 110 and a communication interface circuit of the slave computer 120.
The communication according to the embodiment of the invention can be implemented by using a two-bus type universal bus technology, such as a narrow-band power carrier (PLC), a broadband power carrier (HPLC), MBus, powerBus, a fire-fighting two-bus, etc. The general two-bus technology is characterized in that an alternating current or direct current power supply and communication signals can share 2 cables for transmission. The master 110 and the slave 120 include communication interface circuits therein for transmitting and receiving communication signals. The communication according to the embodiment of the invention is carried out by adopting a universal two-bus technology through 2 direct current power supply/communication wires (namely a direct current power supply positive wire and a direct current power supply negative wire).
The address line of the communication bus according to the embodiment of the invention takes the level on the negative line of the direct current power supply as the reference level.
The source end of the first group of address lines on the left side in fig. 2 is connected with a switching value output circuit of the host 110, and the switching value output circuit of the host 110 is controlled by an IO port of a singlechip of the host 110; the load end of the first group of address lines is connected with the first slave machine 120, the first group of address lines in the first slave machine 120 are divided into a 1-1 sub-address line and a 1-2 sub-address line, the 1-1 sub-address line in the first slave machine 120 is connected to an IO1 port through a first switching value input circuit, the 1-2 sub-address line is connected to an IO4 through a second switching value output circuit, and the first switching value input circuit and the second switching value output circuit are respectively connected to IO2 and IO3 ports of a singlechip of the slave machine 120 and are controlled by IO2 and IO3 ports of the singlechip of the slave machine 120.
The source end of the second group of address lines on the right side in fig. 2 is connected to the first slave 120, the second group of address lines in the first slave 120 is divided into a 2-1 sub-address line and a 2-2 sub-address line, the 2-1 sub-address line in the first slave 120 is connected to the IO2 port via the first switching value output circuit, the 2-2 sub-address line is connected to the IO3 port via the second switching value input circuit, similarly, the first switching value output circuit and the second switching value input circuit are controlled by the single chip microcomputer IO2 and the IO3 port respectively, the load end of the second group of address lines is connected to the next slave 120, and so on.
Fig. 3 shows a networking connection schematic of the bus bar status monitoring system 100 according to an embodiment of the present invention.
The bus state monitoring system 100 according to the embodiment of the present invention includes a master 110 and one or more slaves 120, where the master 110 and the first slave 120 and the subsequent slaves 120 and slaves 120 are all connected by a prefabricated cable 130 with a foolproof interface.
The socket of the slave 120 and the plug of the pre-fabricated cable 130 are symmetrically designed, and the address lines in the communication bus according to the embodiment of the present invention are compatible with the input and output bidirectional switching values, so as shown in fig. 3, the bus state monitoring system 100 according to the embodiment of the present invention allows the following wiring modes:
1) The master 110 is connected with the slave 120 and the pre-fabricated cable 130 alternately from left to right on the left side, and the slave 120 is arranged in the same direction;
2) The master chassis 110 is on the right side, the slaves 120 and the pre-fabricated cables 130 are alternately connected from right to left, and the directions of the slaves 120 are arranged in the same direction;
3) The master 110 is connected with the slave 120 and the pre-fabricated cable 130 alternately from left to right on the left side, and the direction of part of the slave 120 is reversed, and the part is reversed as shown by a dotted line in the figure;
4) The master 110 is connected to the slave 120 and the pre-made cable 130 alternately from right to left on the right side, and the direction of part of the slave 120 is reversed, and the part is reversed as shown by the broken line in the figure.
Fig. 4 (a) shows an address assignment schematic of the slave 120 of the bus bar status monitoring system 100 according to an embodiment of the present invention. Fig. 4 (b) shows a flowchart of an address allocation method of the slave 120 of the bus bar status monitoring system 100 according to an embodiment of the present invention.
The address lines of the communication bus according to the embodiment of the present invention are used to enable the master 110 to identify the connection sequence of the plurality of slaves 120, and automatically allocate communication addresses to the slaves 120.
Specifically, referring to fig. 4 (a) and 4 (b), in step a), the address line of the master 110 is in an output state, and an address assignment signal is sent to the first slave 120 through the address line.
In step b), the first slave 120 recognizes the address assignment signal input on the address line, enters the address configuration state and broadcasts a "ready" state containing the factory configured globally unique hardware code of the first slave 120 via the universal bus portion (i.e., dc power positive line, dc power negative line) of the communication bus according to an embodiment of the present invention;
in step c), the master 110 broadcasts a new address assignment message on the universal bus portion of the communication bus according to an embodiment of the present invention, the message containing the globally unique hardware code of the first slave 120 received in step b);
in step d), the first slave 120 receives the new address assignment message, configures the communication address, and replies an "address setting success" message to the universal bus portion of the communication bus according to the embodiment of the present invention, when the first slave 120 has entered the network;
in step e), the master 110 sends a command to the first slave 120 via the universal bus portion of the communication bus according to an embodiment of the present invention, requesting the first slave 120 to send an address assignment signal to the next slave 120 via the address bus.
In step f), the second slave 120 repeats steps b) -e) with the master 110.
By repeating the above steps b) -f), the address setting of the slave 120 at the subsequent stage can be automatically completed, saving a lot of manual setting operations.
Fig. 5 shows a schematic diagram of an address line input-output direction configuration between the master 110 and the slave 120 of the bus bar status monitoring system 100 according to an embodiment of the present invention.
As shown in fig. 5, for the host 110 in the bus state monitoring system 100, the address lines have only 1 path of address lines, occupy 1 IO port of the host 110, and have only an output direction.
For the slave 120 in the bus state monitoring system 100, from the outside of the slave 120, the address line has two paths of address lines, which occupy 2 IO ports of the slave 120 respectively, and each path has two directions of input and output.
From the inside of the slave 120, the first group of address lines on the left side of the inside of the slave 120 is divided into a 1-1 st sub-address line and a 1-2 nd sub-address line, the 1-1 st sub-address line is connected to an IO1 port through a first switching value input circuit, the 1-2 nd sub-address line is connected to an IO4 through a second switching value output circuit, and the first switching value input circuit and the second switching value output circuit are respectively connected to IO2 and IO3 ports of a single chip microcomputer of the slave 120 and controlled by IO2 and IO3 ports of the single chip microcomputer of the slave 120.
From the inside of the slave 120, the second group of address lines on the right side of the slave 120 is divided into a 2-1 sub-address line and a 2-2 sub-address line, the 2-1 sub-address line is connected to the IO2 port via a first switching value output circuit in the inside of the slave 120, the 2-2 sub-address line is connected to the IO3 port via a second switching value input circuit, and similarly, the first switching value output circuit and the second switching value input circuit are controlled by the single chip microcomputer IO2 and IO3 ports, respectively.
In the connection of the master 110 and the slave 120 according to the present invention, the direct current power/communication lines of the communication bus according to the embodiment of the present invention are connected in parallel on the master 110 and the slave 120. Address lines of a communication bus according to an embodiment of the present invention are connected in series on the master 110 and the slave 120.
As shown in fig. 5, in the forward connection of the master 110 and the slave 120, the address line of the master 110 is connected to the address line IO interface on the left side of the slave 120, and the address line of the address line IO interface on the right side of the slave 120 is connected to the address line IO interface of the next slave 120.
As shown in fig. 5, in the reverse connection of the master 110 and the slave 120, the address line of the master 110 is connected to the address line IO interface on the right side of the slave 120, and the address line of the address line IO interface on the left side of the slave 120 is connected to the address line IO interface of the next slave 120.
The forward and reverse connections between slaves 120 are the same as described above and will not be discussed again.
In the bus state monitoring system 100 according to the embodiment of the present invention, address lines in a communication bus between the master 110 and the slave 120 and between the slaves 120 may be wired in a forward direction or in a reverse direction, that is, a unique address line IO port of the master 110 may be connected to any one of two address line IO ports of the first slave 120, and the other address line IO port remaining in the two address line IO ports of the first slave 120 may be connected to any one of two address line IO ports of the second slave 120. The address port connection of the subsequent slave 120 and so on.
According to the direct current power supply/communication wire of the communication bus, the direct current power supply/communication wire is of a parallel connection structure, so that the direct current power supply/communication wire does not need to be distinguished from the direct current power supply/communication wire in the forward direction and the reverse direction.
The address lines of the communication bus according to the embodiment of the present invention are in a serial connection structure, and the input and output directions of the two address line IO interfaces of the slave 120 can be automatically configured through the following logic:
1) When the slave 120 is powered on, the left address line and the right address line are set to be in an input state;
2) When one path of address line IO interface in the slave 120 receives an address line signal of a superior device (the master 110 or the slave 120 connected in advance), the path of address IO interface is automatically set as an input end, and the other path of address IO interface is set as an output end.
The bus state monitoring system according to the embodiment of the invention can be applied to monitoring in various fields of industry and civilian use, such as temperature monitoring in the industry field, wherein the slave can be a temperature measuring module with a factory preset concept, the temperature measuring module is installed in a bus factory, after the temperature measuring modules are connected with each other in sequence on site through the communication interface according to the invention, the host computer sends a command to control the host computer to automatically uniformly distribute communication addresses to the temperature measuring modules which are networked, so that a large amount of manual work can be reduced.
Therefore, the communication interface realizes the on-site on-line distribution of the slave machine address, thereby greatly reducing the on-site operation workload, reducing the labor cost and the management cost of bus construction, and substantially reducing the purchase cost of users, so that the equipment such as the temperature measuring module has high cost performance.
Although the present invention describes a communication interface and a method thereof for a bus state monitoring system compatible with bidirectional connection, it is applicable to those skilled in the art in similar application scenarios requiring identification of connection address sequences of a plurality of slave modules. The invention is not limited to the bus bar condition monitoring system described in the embodiments.
The entirety of the hardware computing device described in this disclosure, or components thereof, may be implemented by various suitable hardware means, including but not limited to FPGA, ASIC, soC, discrete gate or transistor logic, discrete hardware components, or any combination thereof.
The block diagrams of circuits, devices, apparatuses, devices, systems referred to in this disclosure are only illustrative examples and are not intended to require or imply that connections, arrangements, configurations must be made in the manner shown in the block diagrams. As will be appreciated by one of skill in the art, these circuits, devices, apparatuses, devices, systems may be connected, arranged, configured in any manner so long as the desired purpose is achieved.
It will be appreciated by persons skilled in the art that the above-described embodiments are merely examples and that various modifications, combinations, partial combinations and substitutions may be made to the embodiments of the present disclosure according to design requirements and other factors, provided that they fall within the scope of the appended claims or their equivalents, i.e., within the scope of the claims to be protected by the present disclosure.
Claims (9)
1. A communication interface for connecting a master and one or more slaves in sequence using a three-wire communication bus, comprising:
an address line port for controlling on-line communication address allocation of the slave, address lines between a master and one or more slaves via the address line port being connected in series; and
two communication line ports for supplying power and transmitting communication signals, two communication lines between a master and one or more slaves via the communication line ports being connected in parallel.
2. The communication interface of claim 1, wherein,
the address line port of the slave is configured to be in an input state or an output state;
the address line port of the host is configured to output status.
3. The communication interface of claim 2, wherein,
when the slave is electrified, both a source end address line and a load end address line of the slave are set to be in an input state;
when one address line interface in the slave receives an address line signal of the master or a previously connected slave, the address line interface is set to an input state, and the other address line interface in the slave is set to an output end.
4. The communication interface of claim 1, wherein,
the line sequence of the three-line communication bus adopts a symmetrical design.
5. The communication interface of claim 1, wherein,
the communication interface adopts a fool-proof interface.
6. The communication interface of claim 1, wherein,
the two communication lines are communicated by adopting a two-bus type universal bus technology, and the two-bus type universal bus technology at least comprises a narrow-band power carrier PLC, a broadband power carrier HPLC, MBus, powerBus and a fire-fighting two-bus.
7. The communication interface of claim 1, wherein,
the three-wire communication bus connection between the master machine and the slave machine and between the slave machine and the slave machine is forward connection or reverse connection.
8. A bus condition monitoring system employing the communication interface of any one of claims 1-7.
9. A method for automatically setting a slave address using a communication interface as claimed in any one of claims 1 to 7, comprising:
step a), a host sends an address allocation signal to a first slave through an address line port;
step b), after the first slave machine recognizes the address allocation signal sent by the host machine on the address line port, entering an address configuration state and broadcasting a ready state through the communication line port, wherein the ready state comprises the unique hardware code of the first slave machine;
step c), the host broadcasts a new address allocation message on the communication line port, wherein the new address allocation message comprises the unique hardware code of the first slave machine received from the first slave machine;
step d), the first slave receives the new address allocation message, configures the communication address, and replies an address setting success message at the communication port;
step e), the host computer sends a command to the first slave computer through the communication line port, and the first slave computer is required to send an address allocation signal to the rear-stage slave computer through the address line port;
step f), repeating the steps b) -e) by the second slave and the master; and
step h), the following slaves repeat the steps b) to f).
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| CN202211157186.2A CN117793052A (en) | 2022-09-22 | 2022-09-22 | Communication interface, bus state monitoring system and method thereof |
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