CN117792896B - Configuration management system and configuration management method based on FPGA - Google Patents
Configuration management system and configuration management method based on FPGA Download PDFInfo
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Abstract
The invention discloses a configuration management system and a configuration management method based on an FPGA, wherein the configuration management system based on the FPGA comprises: the system comprises a command line module, a capability interface module, a capability service module and a built-in component module; the built-in assembly module includes: the system comprises a database management component, an address management component, a protocol processing component, a data receiving and transmitting component and a log management component. The configuration management method based on the configuration management system mainly comprises the following steps: a configuration issue management method, a configuration clear management method, a configuration acquisition management method, an event acquisition management method, a register setting management method, and a register status acquisition management method. The method and the device can seamlessly manage the FPGA supporting the preset 'custom protocol' with different brands and models, reduce the development difficulty of configuration management FPGA, shorten the development period, and reduce the workload of joint debugging, hardware adaptation and the like.
Description
Technical Field
The invention relates to the field of network security, in particular to a configuration management system and a configuration management method based on an FPGA.
Background
With the popularization of the Internet, the increasing of network threats and the explosion of network information quantity, the requirements on network security products are also higher and higher, and the requirements on high performance, low power consumption, low delay, high reliability, high security and the like are required. The main stream of domestic network security products of X86, NP (network processing) and AISC (Application-SPECIFIC INTEGRATED Circuit) architecture have respective disadvantages: the contradiction exists between the high performance and the low power consumption of the X86 architecture; the NP architecture is limited by the technology maturity and cost factors; ASIC has high cost, long period, great difficulty and insufficient domestic technology accumulation. The CPU and FPGA architecture network security product has the flexibility of the CPU, the high performance of the ASIC, the programmability and better unit power consumption performance, and is more and more concerned. With popularization of FPGA use, functions required to be supported by FPGA logic are more and more complex, the high-efficiency management requirement on the FPGA is more urgent, and the management on the FPGA is more modularized and IP (Internet protocol) core.
In the field of network security, no industry standard solution for managing FPGA logic functions through software configuration currently exists, and a general solution is to manage FPGA logic functions through a driving adaptation layer. The following problems exist with the management scheme driving the adaptation layer: the development difficulty is large: firstly, a driving engineer performs driving adaptation for an FPGA logic function, and needs to have relevant basic knowledge of an FPGA device and details of design and implementation of the FPGA engineer; secondly, an application layer engineer needs to know the capability of a drive implementation interface, understand the details of the configuration management implementation of the FPGA logic function, and increase the technical threshold of a software developer. The development period is long: firstly, an FPGA engineer firstly develops logic functions; secondly, driving engineers do driving adaptation of FPGA logic functions; again, the application layer engineer performs configuration management. The three have front-back dependency relationship, can not be developed in parallel at the same time, and has long development period. Joint debugging cost is high: different projects, functions and interfaces realized by the FPGA engineers and the driving engineers are different, and the code development complexity and joint debugging workload of the application layer engineers can be greatly increased. The hardware adaptation cost is high: the FPGA with different brands and different models needs to be subjected to drive development and application layer adaptation, and the labor and time investment is large.
Disclosure of Invention
Aiming at the problems, the invention provides a configuration management system and a configuration management method based on an FPGA.
In order to achieve the purpose of the invention, a configuration management system and a configuration management method based on an FPGA are provided. The FPGA-based configuration management system comprises: the system comprises a command line module, a capability interface module, a capability service module and a built-in component module;
the built-in assembly module includes: the system comprises a database management component, an address management component, a protocol processing component, a data receiving and transmitting component and a log management component;
in configuration issuing management, a user inputs configuration information of an FPGA which is never issued through the command line module, and the command line module receives the configuration issuing information of the FPGA and sends the configuration issuing information to the capability interface module; the capability interface module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability service module; the capability service module calls the database management component, and the database management component processes the configuration issuing information of the FPGA and obtains the corresponding memory address information of the FPGA; the capability service module calls the protocol processing component, and the protocol processing component packages the configuration issuing information of the FPGA and the memory address information of the corresponding FPGA into a corresponding protocol configuration issuing data frame according to a preset custom protocol; the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration transmitting data frame to the FPGA through a network port;
The database management component is used for recording the mapping relation between the configuration command of the FPGA and the memory of the target FPGA or the register address of the FPGA through a linked list node;
The address management component is used for managing the internal RAM (memory) of the FPGA;
the log management component is used for managing logs generated in the running process of the program.
Further, the capability interface module includes: the device comprises a register operation module, a capability abstraction module and an event operation module;
the register operation module is used for setting and checking registers of the FPGA;
The capability abstraction module is configured to perform configuration management on a logic function of the FPGA, and includes: calling functions of adding, deleting, checking and modifying the universal interface, and checking all functions and removing all functions;
The event operation module is used for monitoring and collecting the abnormal alarm information of the FPGA and sending the abnormal alarm information to a user in a polling or notification mode.
Further, the capability service module includes: the system comprises a register service module, an access control management service module, a two-layer firewall management service module, a three-layer firewall management service module, a security policy service module, a security alliance policy service module, a key service module, a random number service module, a routing service module, an ARP (address resolution protocol) service module and an event service module;
the register service module: setting and acquiring states of registers of the FPGA;
the access control management service module: providing the functions of adding, deleting, checking, changing and emptying the access control list;
The two-layer firewall management service module: providing functions of adding, deleting, checking, changing and listing of the second-layer firewall and emptying;
the three-layer firewall management service module: providing the functions of adding, deleting, checking, modifying and listing and emptying the third-layer firewall;
the security policy service module: providing functions of adding, deleting, checking, changing and listing security policies and emptying the security policies;
the security alliance policy service module: providing functions of security alliance addition, deletion, checking, changing and listing and emptying;
The key service module: providing functions of key addition, deletion, checking, changing and listing and emptying;
the random number service module: providing a random number acquisition interface;
the routing service module: providing functions of route addition, deletion, checking, changing, listing and emptying;
the ARP service module: providing functions of adding, deleting, checking, changing and listing address resolution protocols and clearing;
The event service module: providing polling and notification of events.
Further, the capability interface module and the capability service module perform data transmission through a UBUS bus.
Further, the FPGA-based configuration management system further includes: a timer module; the timer module is used for acquiring dynamic attribute information from the FPGA at regular time.
The invention also provides a configuration management method of the configuration management system based on the FPGA, which is characterized by comprising the following steps: a configuration issuing management method, a configuration clearing management method, a configuration acquisition management method, an event acquisition management method, a register setting management method and a register state acquisition management method;
the configuration issuing management method comprises the following steps:
A1: the user inputs the configuration issuing information of the FPGA into the command line module;
a2: the command line module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability interface module;
A3: the capability interface module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability service module;
A4: the capability service module invokes the database management component that queries whether this configuration exists in the linked list node based on the configuration down-set information of the FPGA? If so, returning the existing prompt information to the user, namely finishing configuration issuing operation; if not, continuing the next step;
A5: the capability service module calls the address management component, and the address management component establishes mapping between configuration issuing information of the FPGA and the memory address of the FPGA, and obtains a mapping result and the memory address information of the FPGA;
a6: the capability service module calls the protocol processing component, and the protocol processing component packages the configuration issuing information of the FPGA and the memory address information of the corresponding FPGA into a corresponding protocol configuration issuing data frame according to a preset custom protocol;
A7: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration transmitting data frame to the FPGA through a network port;
a8: the FPGA receives the protocol configuration issuing data frame, analyzes the protocol configuration issuing data frame, generates a response message of successful configuration issuing execution, and returns the response message to the FPGA-based configuration management system, namely, the configuration issuing operation is completed;
the configuration clearing management method comprises the following steps:
B1: the user inputs configuration clearing information of the FPGA into the command line module;
B2: the command line module receives configuration clearing information of the FPGA and sends the configuration clearing information to the capability interface module;
b3: the capability interface module receives the configuration clearing information of the FPGA and sends the configuration clearing information to the capability service module;
B4: the capability service module invokes the database management component that queries whether or not there is configuration information in the linked list node that the FPGA needs to clear based on configuration clearing information of the FPGA? If the configuration information does not exist, returning prompt information of the absence of the configuration information to a user, namely finishing configuration clearing operation; if yes, deleting the configuration information which needs to be cleared by the FPGA from the linked list node by the database management component, and entering a step B5;
B5: the capability service module calls the address management component, and the address management component updates an internal RAM record of the FPGA;
b6: the capability service module calls the protocol processing component, and the protocol processing component packages the configuration clearing information of the FPGA and the memory address information of the FPGA, which corresponds to the configuration clearing information of the FPGA and is obtained by the query operation in the step B4, into a corresponding protocol configuration clearing data frame according to the preset custom protocol;
b7: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration clearing data frame to the FPGA through a network port;
B8: the FPGA receives the protocol configuration clearing data frame, analyzes the protocol configuration clearing data frame, executes corresponding clearing operation, generates a response message of successful configuration clearing execution, and returns the response message to the FPGA-based configuration management system, namely, completes configuration clearing operation;
The configuration acquisition management method comprises the following steps:
c1: inputting configuration acquisition information of the FPGA into the command line module by a user;
c2: the command line module receives configuration acquisition information of the FPGA and sends the configuration acquisition information to the capability interface module;
And C3: the capability interface module receives configuration acquisition information of the FPGA and sends the configuration acquisition information to the capability service module;
And C4: the capability service module invokes the database management component that queries for the presence of this configuration in the linked list node based on configuration acquisition information for the FPGA? If the configuration does not exist, returning information of the configuration does not exist to the user, namely finishing configuration acquisition operation; if so, then further determine if the queried configuration is a static attribute or a dynamic attribute? If the queried configuration is static attribute, directly returning configuration information to a user, namely finishing configuration acquisition operation; if the queried configuration is a dynamic attribute, entering a step C5;
C5: the capability service module calls the protocol processing component, and the protocol processing component packages the memory address information of the FPGA corresponding to the configuration information required to be obtained by the FPGA queried in the step C4 into a corresponding protocol configuration obtaining data frame according to a preset custom protocol;
C6: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration acquisition data frame to the FPGA through a network port;
C7: the FPGA receives the protocol acquisition data frame, analyzes the protocol configuration acquisition data frame, generates a response message of successful configuration acquisition execution, and returns the response message of successful configuration acquisition execution to the FPGA-based configuration management system through the data transceiver component;
And C8: the capability service module calls the protocol processing component, and the protocol processing component analyzes the response message successfully obtained and executed by the configuration according to the preset custom protocol, and obtains the configuration information of the dynamic attribute of the FPGA to be obtained; the capability service module calls the capability interface module, and the capability interface module returns the acquired configuration information of the dynamic attribute of the FPGA to a user; the capability service module calls the database management component, and the database management component updates the configuration information of the dynamic attribute of the FPGA into the linked list node, namely, the configuration acquisition operation is completed;
The event acquisition management method comprises the following steps:
d1: inputting event acquisition information of the FPGA into the command line module by a user;
D2: the command line module receives event acquisition information of the FPGA and sends the event acquisition information to the capability interface module;
D3: the capability interface module receives the event acquisition information of the FPGA and sends the event acquisition information to the capability service module;
D4: the capability service module invokes the database management component that queries whether this configuration exists in the linked list node based on the configuration down-set information of the FPGA? If yes, returning event information to the user, namely finishing event acquisition operation; if the event does not exist, returning a message that the event does not exist to the user, namely finishing the event acquisition operation;
The register setting management method comprises the following steps:
e1: the user inputs the register setting information of the FPGA into the command line module;
e2: the command line module receives the register setting information of the FPGA and sends the register setting information to the capability interface module;
e3: the capability interface module receives the register setting information of the FPGA and sends the register setting information to the capability service module;
e4: the capability service module calls the protocol processing component, and the protocol processing component packages the register setting information (register address information and register value information) of the FPGA into a corresponding protocol register setting data frame according to the preset custom protocol;
E5: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register setting data frame to the FPGA through a network port;
E6: the FPGA receives the protocol register setting data frame, then analyzes the protocol register setting data frame, generates a response message of successful execution of register setting, and returns the response message to the FPGA-based configuration management system, namely finishing the register setting operation;
The register state acquisition management method comprises the following steps:
F1: the user inputs the register state acquisition information of the FPGA into the command line module;
F2: the command line module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability interface module;
F3: the capability interface module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability service module;
F4: the capability service module invokes the database management component that queries for the presence of this state information in the linked list node based on the register state acquisition information for the FPGA? If not, directly entering the step F5; if so, then further determine whether the queried state information is a static attribute or a dynamic attribute? If the queried state information is static attribute, directly returning the state information to a user, namely finishing the register state acquisition operation; if the queried state information is a dynamic attribute, entering a step F5;
and F5: the capability service module calls the protocol processing component, and the protocol processing component packages register state acquisition information (register address) of the FPGA into corresponding protocol register state acquisition data frames according to the preset custom protocol;
F6: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register state acquisition data frame to the FPGA through a network port;
F7: the FPGA receives the protocol register state acquisition data frame, analyzes the protocol register state acquisition data frame, generates a response message of successful execution of the register state acquisition, and returns the response message of successful execution of the register state acquisition to the FPGA-based configuration management system through the data transceiver component;
f8: the capability service module calls the protocol processing component, and the protocol processing component analyzes the response message which is successfully executed for the register state acquisition according to the preset custom protocol, and obtains the register state information of the FPGA to be acquired; and the capability service module calls the capability interface module, and the capability interface module returns the register state information of the FPGA to a user, namely, the register state acquisition operation is completed.
Compared with the prior art, the invention has the following beneficial technical effects:
Ease of use: the configuration management system based on the FPGA interfaces the capability API of the FPGA, the management of the FPGA is converted into the management of the API interface, a user does not need to care about the implementation details of the internal functions of the FPGA, and the FPGA can be operated through the API interface provided by the configuration management system based on the FPGA; meanwhile, a command line management mode is provided, so that the use is more convenient.
The user experience is good: the configuration management system based on the FPGA provides a unified API (application program interface) capability interface for a user layer, the influence of the change of a hardware platform is shielded, and the influence of the platform on the user function is not required to be considered when a plurality of platforms are developed by a user;
excellent expansion capability: the built-in functional module of the FPGA-based configuration management system provides good support for new business capability expansion, and reduces development workload and time period of new functions;
excellent compatibility: the configuration management system based on the FPGA performs message exchange with the FPGA through a preset custom protocol, is irrelevant to specific models, and can seamlessly manage the FPGA supporting different brands and models of management protocols;
Lower latency: the memory database of the configuration management system based on the FPGA can accelerate service configuration response and reduce time consumption;
Higher performance: the configuration management system based on the FPGA supports multithreading concurrency and gives full play to the performance of the CPU;
The platform has good adaptability: the configuration management system based on the FPGA has good portability, and can be conveniently and rapidly deployed on different platforms.
Drawings
FIG. 1 is a comparison of the present solution with a modification of the prior art;
FIG. 2 is a block diagram of an FPGA-based configuration management system of one embodiment;
FIG. 3 is a flow diagram of a method of FPGA-based configuration management of one embodiment;
FIG. 4 is a schematic diagram of a configuration issue management flow of an FPGA-based configuration management method of one embodiment;
FIG. 5 is a schematic diagram of a configuration purge management flow of an FPGA-based configuration management method according to one embodiment;
Fig. 6 is a schematic configuration acquisition management flow chart of an FPGA-based configuration management method according to an embodiment:
FIG. 7 is a schematic diagram of an event acquisition management flow for an FPGA-based configuration management method according to one embodiment;
FIG. 8 is a schematic diagram of a register setting management flow of an FPGA-based configuration management method according to one embodiment;
FIG. 9 is a schematic diagram of a register state acquisition management flow of an FPGA-based configuration management method according to one embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the field of network security, there is no industry standard solution for managing FPGA logic functions through software configuration, as shown in fig. 1, and a general solution is to manage FPGA logic functions through a driver adaptation layer.
The following problems exist with the management scheme driving the adaptation layer: the development difficulty is high, the development period is long, the joint debugging cost is high, and the hardware adaptation cost is high. There are problems with managing FPGAs as described above. The invention constructs a configuration management system based on FPGA at an application layer, and completes configuration management of FPGA logic functions through the configuration management system based on FPGA, comprising configuration issuing (Set), configuration clearing (Unset), state acquisition (Get), FPGA report Event processing (Event), register setting (Set) and register state acquisition (Get).
The configuration management system based on the FPGA is used for summarizing and sorting the functions of the security equipment in the network security field, dividing the functions into service function modules, abstracting the service function modules into objects (capability service), abstracting the capabilities provided by the service function modules into the objects (capability interfaces), mapping the configuration management actions of calling the capability interfaces by a user to the operations of corresponding registers or corresponding memories of the FPGA by means of the function modules (built-in components) of the middleware system, and finally completing the management of the FPGA. The configuration management system based on the FPGA interfaces the capability API of the FPGA, the management of the FPGA is converted into the management of the API interface, and a user can operate the FPGA through the API interface provided by the configuration management system based on the FPGA without paying attention to the details of the implementation of the internal functions of the FPGA; meanwhile, a command line management mode is provided, so that the use is more convenient. The FPGA-based configuration management system performs modularization and interfacing on the capability provided by the FPGA, provides unified API service and command line call upwards, adapts different physical hardware channels and kernel interfaces downwards, and shields the perception of application on middleware on software environment and hardware change.
As shown in fig. 2, the present invention provides a configuration management system based on FPGA, including: a command line module (mlc), a capability interface module (API), a capability service module (mld), and a built-in component module;
The command line directly passes through the configuration management system based on the FPGA, so that the FPGA can be directly managed without additional development work, and in addition, the parameters of the command line use json character string format, so that the method is simple and clear, convenient to read and easy to use. The capability interface module can also directly receive the input configuration command and then carry out the subsequent related operation.
The built-in assembly module includes: the system comprises a database management component, an address management component, a protocol processing component, a data receiving and transmitting component and a log management component;
In configuration issuing management, a user inputs configuration information of an FPGA which is never issued through the command line module, and the command line module receives the configuration issuing information of the FPGA and sends the configuration issuing information to the capability interface module; the capability interface module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability service module; the capability service module calls the database management component, and the database management component processes the configuration issuing information of the FPGA and obtains the corresponding memory address information of the FPGA; the capability service module calls the protocol processing component, and the protocol processing component packages configuration issuing information of the FPGA and memory address information of the corresponding FPGA into corresponding protocol data frames according to a preset custom protocol; the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol data frame to the FPGA through a network port;
the database management component is used for recording the mapping relation between the configuration command of the FPGA and the memory of the target FPGA or the register address of the target FPGA through a linked list node;
the address management component is used for managing the internal RAM of the FPGA;
the log management component is used for managing logs generated in the running process of the program.
And (3) realizing the function of a database (CacheDB) in a memory by using a linked list (or a hash linked list), and recording configuration information by using a linked list Node (Node). When the user sets configuration, the configuration management system based on the FPGA establishes a Node to bear configuration information, establishes and records the association between the configuration information and the address written into the FPGA, and then writes the configuration user information into the address corresponding to the FPGA; when the user reads the configuration information, if the configuration information is static, the recorded configuration details are directly returned from the database; if the dynamic information is the dynamic information, the dynamic data of the FPGA can be immediately or regularly updated to the database, and can be directly returned from the database, so that the response time is quickened.
An address management component: the configuration management system based on the FPGA provides the function of managing the components of the RAM in the FPGA, and can rapidly and conveniently manage configuration information and address mapping.
Protocol processing component: and the configuration management system based on the FPGA and the FPGA adopt a custom protocol to package and analyze data.
Custom protocol: and the data transmitted and received between the configuration management system based on the FPGA and the FPGA are user-defined protocol messages. The configuration management system based on the FPGA uses a standard network port to communicate with the FPGA, so that development work of a driving adaptation layer is avoided.
A log management component: the complete log management function supports detail records such as log level, time stamp, file name, function name, line number and the like, and helps to quickly locate problem points.
In one embodiment, the custom protocol is expressed as follows:
Custom protocol structure:
the self-defined protocol structure is composed of three parts: l2 head, L3 head, load.
The L2 head is used for being compatible with communication through a network port;
the L3 header is used to address, distinguish between traffic types, mapping of requests and responses;
Load: carrying user behavior, configuration and FPGA response information.
L2 head structure:
L2 header field meaning:
L3 head structure:
L3 header field definition:
Payload structure
Payload field definition:
In one embodiment, the capability interface module includes: the device comprises a register operation module, a capability abstraction module and an event operation module;
the register operation module is used for setting and checking registers;
The capability abstraction module is configured to perform configuration management on a logic function of the FPGA, and includes: calling functions of adding, deleting, checking and modifying the universal interface, and checking all functions and removing all functions;
The event operation module is used for monitoring and collecting the abnormal alarm information of the FPGA and sending the abnormal alarm information to a user in a polling or notification mode.
The capability interface module is an abstraction of the FPGA logic function, and there are three main interfaces:
1. Register operation: a Set register (Set) and a view register (Get);
2. Capability Abstraction (API): the abstraction of FPGA logic function configuration management provides the generic interfaces Add (Add), delete (Del), find (Find), modify (Modify), and additionally view all (List) and clear all (Flush) for configuration management, converting FPGA operations into calls to API interfaces.
3. Event operation: when the FPGA logic function detects an abnormal state, alarm event information is triggered to be notified to the middleware, and if a user processes an alarm event of the FPGA, an event interface can be provided through the middleware system to acquire the alarm event information of the FPGA. The user can select the mode of active polling and passive notification to acquire the alarm event information.
In one embodiment, the FPGA-based configuration management system uses UBUS bus communication, FPGA logic extraction
Various service functions are registered on the UBUS bus in the form of service to form the capability service of the configuration management system based on the FPGA. The capability interface module and the capability service module form a C/S (Client/Server) service mode, and the capability interface module and the capability service module are communicated through bus messages.
The capability service module comprises the following components:
Register management service module (Register): setting and state acquisition of a register are realized;
Access control management service module (ACL): providing ACL (Access Control List ) rules of Add (Add), delete (Del), find (Find), change (Modify), list (List) and Flush (Flush);
Two-layer firewall management service module (L2 FW): providing L2FW (L2 FireWall, i.e., two-layer FireWall) rules of Add (Add), delete (Del), find (Find), modify (Modify), list (List) and Flush (Flush);
Three-layer firewall management service module (L3 FW): providing an L3FW (L3 Firewall, i.e. third-layer Firewall) rule of addition (Add), deletion (Del), check (Find), change (Modify), list (List) and Flush (Flush);
Security policy management service module (SP): providing an Add (Add), delete (Del), find (Find), change (Modify), list (List) and Flush (Flush) of SP (Security Policy) rules;
Security alliance policy management service module (SA): providing SA (Security Association ) rules of addition (Add), deletion (Del), check (Find), change (modification), list (List) and Flush (Flush);
Key management service module (Key): providing Key additions (Add), deletions (Del), searches (Find), changes (modification), lists (List) and empties (Flush);
Random number service module (Random): providing a Random acquisition (Get) interface;
Route service module (Route): providing addition (Add), deletion (Del), check (Find), change (Modify), list (List) and Flush (Flush) of Route rules;
ARP service module: providing an addition (Add), deletion (Del), check (Find), change (Modify), list (List) and Flush (Flush) of ARP rules;
Event service module: providing polling and notification of events.
In one embodiment, the capability interface module and the capability service module perform data transmission through a UBUS bus.
In one embodiment, the FPGA-based configuration management system further comprises: a timer module; the timer module is used for acquiring dynamic attribute information from the FPGA at regular time.
As shown in fig. 3, the present solution further provides a configuration management method of the FPGA-based configuration management system, where the configuration management method includes: a configuration issuing management method, a configuration clearing management method, a configuration acquisition management method, an event acquisition management method, a register setting management method and a register state acquisition management method;
As shown in fig. 4, the configuration delivery management flow of one embodiment is as follows:
(1) When the user performs configuration issuing, the capability service module queries the data management component, and if the issued configuration information exists, the information of the existing configuration is returned to the user;
(2) If the database management component does not record the configuration issued at this time, the capability service module calls the interface capability of the address management component, searches the free memory address in the FPGA to store the configuration, and if the free memory address does not exist, the number of the supported configuration items reaches the upper limit, and returns failure information; if the free memory address exists, mapping between the configuration information and the FPGA address is completed, and the configuration information and the memory address information are recorded to a database management component;
(3) Writing configuration information of a user into the FPGA: the configuration management system based on the FPGA packages operation (Set), configuration (user setting) and memory address information into a custom protocol message format by means of a protocol processing component; the method comprises the steps of sending a message of a custom protocol to an FPGA through a data receiving and transmitting assembly, and receiving a response message returned by the FPGA;
(4) And returning the execution result of the user configuration to the user.
As shown in fig. 5, the configuration purge management flow of one embodiment is as follows:
(1) When the user clears the configuration, the capability service module can call and inquire the database management component, and if the configuration is not inquired, the information that the configuration does not exist is returned to the user;
(2) In the process of inquiring the rated configuration, the memory address information stored in the configuration information is recorded, and the inquiring configuration is deleted from the database management component;
(3) Clearing the configuration corresponding to the address: writing all the content of the FPGA memory address for recording configuration into zero, and packaging operation (Unset), configuration (all zeroing) and memory address information into a custom protocol message format by a configuration management system of the FPGA by means of a protocol processing component; the method comprises the steps of sending a message of a custom protocol to an FPGA through a data receiving and transmitting assembly, and receiving a response message returned by the FPGA;
(4) And returning the user configuration clearing execution result to the user.
As shown in fig. 6, the configuration acquisition management flow of one embodiment is as follows:
(1) When a user performs configuration acquisition, the capability service module queries the database management component, and if the configuration is not queried, information that the configuration does not exist is returned to the user;
(2) If the queried configuration information is static attribute, returning the configuration information of the database to the user, and improving the acquired response speed;
(3) If the queried configuration information is a dynamic attribute, the configuration management system based on the FPGA packages the operation (Get) and the memory address information into a custom protocol message format by means of a protocol processing component; the method comprises the steps of sending a message of a custom protocol to an FPGA through a data receiving and transmitting assembly, and receiving a response message returned by the FPGA;
(4) And acquiring the configuration information of the dynamic attribute from the FPGA response message, returning the configuration information to the user, and updating the information of the dynamic attribute to the database management component.
(5) In order to accelerate the response speed of the dynamic attribute acquisition, the configuration of the database management component can be traversed regularly, the dynamic attribute information of the database management component is acquired from the FPGA, and the dynamic attribute information is updated to the database management component. And reserving a switch for a user to open or close and default to close for the function of returning the dynamic attribute information from the database management component.
As shown in fig. 7, the event acquisition management flow for one embodiment is as follows:
(1) When the FPGA detects the risk, a message of an alarm event is generated and sent to a configuration management system based on the FPGA;
(2) The event service of the configuration management system analyzes the message of the FPGA event, analyzes and classifies the information of the event, and records the information to the database management component for users to inquire the event information in a polling mode;
(3) The event service of the configuration management system also notifies event information to the data bus, and notifies the user in the form of event information, so that the user can process the event conveniently.
As shown in fig. 8, the register SET (SET) management flow of one embodiment is as follows:
e1: the user inputs the register setting information of the FPGA into the command line module;
e2: the command line module receives the register setting information of the FPGA and sends the register setting information to the capability interface module;
e3: the capability interface module receives the register setting information of the FPGA and sends the register setting information to the capability service module;
e4: the capability service module calls the protocol processing component, and the protocol processing component packages the register setting information (register address information and register value information) of the FPGA into a corresponding protocol register setting data frame according to the preset custom protocol;
E5: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register setting data frame to the FPGA through a network port;
E6: the FPGA receives the protocol register setting data frame, then analyzes the protocol register setting data frame, generates a response message of successful execution of register setting, and returns the response message to the FPGA-based configuration management system, namely finishing the register setting operation;
as shown in fig. 9, the register state acquisition (GET) management flow of one embodiment is as follows:
F1: the user inputs the register state acquisition information of the FPGA into the command line module;
F2: the command line module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability interface module;
F3: the capability interface module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability service module;
F4: the capability service module invokes the database management component that queries for the presence of this state information in the linked list node based on the register state acquisition information for the FPGA? If not, directly entering the step F5; if so, then further determine whether the queried state information is a static attribute or a dynamic attribute? If the queried state information is static attribute, directly returning the state information to a user, namely finishing the register state acquisition operation; if the queried state information is a dynamic attribute, entering a step F5;
and F5: the capability service module calls the protocol processing component, and the protocol processing component packages register state acquisition information (register address) of the FPGA into corresponding protocol register state acquisition data frames according to the preset custom protocol;
F6: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register state acquisition data frame to the FPGA through a network port;
F7: the FPGA receives the protocol register state acquisition data frame, analyzes the protocol register state acquisition data frame, generates a response message of successful execution of the register state acquisition, and returns the response message of successful execution of the register state acquisition to the FPGA-based configuration management system through the data transceiver component;
f8: the capability service module calls the protocol processing component, and the protocol processing component analyzes the response message which is successfully executed for the register state acquisition according to the preset custom protocol, and obtains the register state information of the FPGA to be acquired; and the capability service module calls the capability interface module, and the capability interface module returns the register state information of the FPGA to a user, namely, the register state acquisition operation is completed.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
It should be noted that, the term "first\second\third" related to the embodiment of the present application is merely to distinguish similar objects, and does not represent a specific order for the objects, it is to be understood that "first\second\third" may interchange a specific order or sequence where allowed. It is to be understood that the "first\second\third" distinguishing aspects may be interchanged where appropriate to enable embodiments of the application described herein to be implemented in sequences other than those illustrated or described.
The terms "comprising" and "having" and any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, apparatus, article, or device that comprises a list of steps or modules is not limited to the particular steps or modules listed and may optionally include additional steps or modules not listed or inherent to such process, method, article, or device.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (4)
1. An FPGA-based configuration management system, comprising: the system comprises a command line module, a capability interface module, a capability service module and a built-in component module;
the built-in assembly module includes: the system comprises a database management component, an address management component, a protocol processing component, a data receiving and transmitting component and a log management component;
in configuration issuing management, a user inputs configuration information of an FPGA which is never issued through the command line module, and the command line module receives the configuration issuing information of the FPGA and sends the configuration issuing information to the capability interface module; the capability interface module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability service module; the capability service module calls the database management component, and the database management component processes the configuration issuing information of the FPGA and obtains the corresponding memory address information of the FPGA; the capability service module calls the protocol processing component, and the protocol processing component packages the configuration issuing information of the FPGA and the memory address information of the corresponding FPGA into a corresponding protocol configuration issuing data frame according to a preset custom protocol; the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration transmitting data frame to the FPGA through a network port;
The database management component is used for recording the mapping relation between the configuration command of the FPGA and the memory of the target FPGA or the register address of the FPGA through a linked list node;
the address management component is used for managing the internal RAM of the FPGA;
The log management component is used for managing logs generated in the running process of the program;
The capability interface module includes: the device comprises a register operation module, a capability abstraction module and an event operation module;
the register operation module is used for setting and checking registers of the FPGA;
The capability abstraction module is configured to perform configuration management on a logic function of the FPGA, and includes: calling functions of adding, deleting, checking and modifying the universal interface, and checking all functions and removing all functions;
The event operation module is used for monitoring and collecting abnormal alarm information of the FPGA and sending the abnormal alarm information to a user in a polling or notification mode;
The capability service module includes: the system comprises a register service module, an access control management service module, a two-layer firewall management service module, a three-layer firewall management service module, a security policy service module, a security alliance policy service module, a key service module, a random number service module, a routing service module, an ARP service module and an event service module;
the register service module: setting and acquiring states of registers of the FPGA;
the access control management service module: providing the functions of adding, deleting, checking, changing and emptying the access control list;
The two-layer firewall management service module: providing functions of adding, deleting, checking, changing and listing of the second-layer firewall and emptying;
the three-layer firewall management service module: providing the functions of adding, deleting, checking, modifying and listing and emptying the third-layer firewall;
the security policy service module: providing functions of adding, deleting, checking, changing and listing security policies and emptying the security policies;
the security alliance policy service module: providing functions of security alliance addition, deletion, checking, changing and listing and emptying;
The key service module: providing functions of key addition, deletion, checking, changing and listing and emptying;
the random number service module: providing a random number acquisition interface;
the routing service module: providing functions of route addition, deletion, checking, changing, listing and emptying;
the ARP service module: providing functions of adding, deleting, checking, changing and listing address resolution protocols and clearing;
The event service module: providing polling and notification of events.
2. The FPGA-based configuration management system of claim 1, wherein the capability interface module and the capability service module perform data transfer via a UBUS bus.
3. The FPGA-based configuration management system of claim 2, further comprising: a timer module; the timer module is used for acquiring dynamic attribute information from the FPGA at regular time.
4. A configuration management method based on an FPGA-based configuration management system according to claim 3, said configuration management method comprising: a configuration issuing management method, a configuration clearing management method, a configuration acquisition management method, an event acquisition management method, a register setting management method and a register state acquisition management method;
the configuration issuing management method comprises the following steps:
A1: the user inputs the configuration issuing information of the FPGA into the command line module;
a2: the command line module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability interface module;
A3: the capability interface module receives configuration issuing information of the FPGA and sends the configuration issuing information to the capability service module;
A4: the capability service module calls the database management component, the database management component inquires whether the configuration exists in the linked list node based on the configuration issuing information of the FPGA, if so, the existing prompt information of the configuration is returned to the user, namely, the configuration issuing operation is completed; if not, continuing the next step;
A5: the capability service module calls the address management component, and the address management component establishes mapping between configuration issuing information of the FPGA and the memory address of the FPGA, and obtains a mapping result and the memory address information of the FPGA;
a6: the capability service module calls the protocol processing component, and the protocol processing component packages the configuration issuing information of the FPGA and the memory address information of the corresponding FPGA into a corresponding protocol configuration issuing data frame according to a preset custom protocol;
A7: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration transmitting data frame to the FPGA through a network port;
a8: the FPGA receives the protocol configuration issuing data frame, analyzes the protocol configuration issuing data frame, generates a response message of successful configuration issuing execution, and returns the response message to the FPGA-based configuration management system, namely, the configuration issuing operation is completed;
the configuration clearing management method comprises the following steps:
B1: the user inputs configuration clearing information of the FPGA into the command line module;
B2: the command line module receives configuration clearing information of the FPGA and sends the configuration clearing information to the capability interface module;
b3: the capability interface module receives the configuration clearing information of the FPGA and sends the configuration clearing information to the capability service module;
B4: the capability service module calls the database management component, the database management component queries and obtains the memory address information of the FPGA corresponding to the configuration clearing information of the FPGA based on the configuration clearing information of the FPGA, and meanwhile, the database management component queries whether the configuration information required to be cleared by the FPGA exists in the linked list node based on the configuration clearing information of the FPGA, if the configuration information does not exist, the database management component returns prompt information of the absence of the configuration information to a user, and the configuration clearing operation is completed; if yes, deleting the configuration information which needs to be cleared by the FPGA from the linked list node by the database management component, and entering a step B5;
B5: the capability service module calls the address management component, and the address management component updates an internal RAM record of the FPGA;
B6: the capability service module calls the protocol processing component, and the protocol processing component packages the configuration clearing information of the FPGA and the memory address information of the FPGA corresponding to the configuration clearing information of the FPGA into a corresponding protocol configuration clearing data frame according to the preset custom protocol;
b7: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration clearing data frame to the FPGA through a network port;
B8: the FPGA receives the protocol configuration clearing data frame, analyzes the protocol configuration clearing data frame, executes corresponding clearing operation, generates a response message of successful configuration clearing execution, and returns the response message to the FPGA-based configuration management system, namely, completes configuration clearing operation;
The configuration acquisition management method comprises the following steps:
c1: inputting configuration acquisition information of the FPGA into the command line module by a user;
c2: the command line module receives configuration acquisition information of the FPGA and sends the configuration acquisition information to the capability interface module;
And C3: the capability interface module receives configuration acquisition information of the FPGA and sends the configuration acquisition information to the capability service module;
And C4: the capability service module invokes the database management component, the database management component queries whether the configuration exists in the linked list node based on the configuration acquisition information of the FPGA, if the configuration does not exist, the capability service module returns the information that the configuration does not exist to a user, and the configuration acquisition operation is completed; if the configuration is static attribute or dynamic attribute, directly returning configuration information to the user, namely finishing configuration acquisition operation; if the queried configuration is a dynamic attribute, entering a step C5;
C5: the capability service module calls the protocol processing component, and the protocol processing component packages the memory address information of the FPGA corresponding to the configuration information required to be obtained by the FPGA queried in the step C4 into a corresponding protocol configuration obtaining data frame according to the preset custom protocol;
C6: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol configuration acquisition data frame to the FPGA through a network port;
C7: the FPGA receives the protocol acquisition data frame, analyzes the protocol configuration acquisition data frame, generates a response message of successful configuration acquisition execution, and returns the response message of successful configuration acquisition execution to the FPGA-based configuration management system through the data transceiver component;
And C8: the capability service module calls the protocol processing component, and the protocol processing component analyzes the response message successfully obtained and executed by the configuration according to the preset custom protocol, and obtains the configuration information of the dynamic attribute of the FPGA to be obtained; the capability service module calls the capability interface module, and the capability interface module returns the acquired configuration information of the dynamic attribute of the FPGA to a user; the capability service module calls the database management component, and the database management component updates the configuration information of the dynamic attribute of the FPGA into the linked list node, namely, the configuration acquisition operation is completed;
The event acquisition management method comprises the following steps:
d1: inputting event acquisition information of the FPGA into the command line module by a user;
D2: the command line module receives event acquisition information of the FPGA and sends the event acquisition information to the capability interface module;
D3: the capability interface module receives the event acquisition information of the FPGA and sends the event acquisition information to the capability service module;
D4: the capability service module invokes the database management component, the database management component queries whether the configuration exists in the linked list node based on the configuration issuing information of the FPGA, if so, event information is returned to a user, and then the event acquisition operation is completed; if the event does not exist, returning a message that the event does not exist to the user, namely finishing the event acquisition operation;
The register setting management method comprises the following steps:
e1: the user inputs the register setting information of the FPGA into the command line module;
e2: the command line module receives the register setting information of the FPGA and sends the register setting information to the capability interface module;
e3: the capability interface module receives the register setting information of the FPGA and sends the register setting information to the capability service module;
E4: the capability service module calls the protocol processing component, and the protocol processing component encapsulates the register setting information of the FPGA into a corresponding protocol register setting data frame according to the preset custom protocol;
E5: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register setting data frame to the FPGA through a network port;
E6: the FPGA receives the protocol register setting data frame, then analyzes the protocol register setting data frame, generates a response message of successful execution of register setting, and returns the response message to the FPGA-based configuration management system, namely finishing the register setting operation;
The register state acquisition management method comprises the following steps:
F1: the user inputs the register state acquisition information of the FPGA into the command line module;
F2: the command line module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability interface module;
F3: the capability interface module receives the register state acquisition information of the FPGA and sends the register state acquisition information to the capability service module;
F4: the capability service module calls the database management component, the database management component inquires whether the state information exists in the linked list node based on the register state acquisition information of the FPGA, and if not, the step F5 is directly carried out; if the state information exists, further judging whether the queried state information is a static attribute or a dynamic attribute, and if the queried state information is the static attribute, directly returning the state information to a user, namely finishing the register state acquisition operation; if the queried state information is a dynamic attribute, entering a step F5;
And F5: the capability service module calls the protocol processing component, and the protocol processing component encapsulates the register state acquisition information of the FPGA into a corresponding protocol register state acquisition data frame according to the preset custom protocol;
F6: the capability service module invokes the data receiving and transmitting assembly, and the data receiving and transmitting assembly transmits the corresponding protocol register state acquisition data frame to the FPGA through a network port;
F7: the FPGA receives the protocol register state acquisition data frame, analyzes the protocol register state acquisition data frame, generates a response message of successful execution of the register state acquisition, and returns the response message of successful execution of the register state acquisition to the FPGA-based configuration management system through the data transceiver component;
f8: the capability service module calls the protocol processing component, and the protocol processing component analyzes the response message which is successfully executed for the register state acquisition according to the preset custom protocol, and obtains the register state information of the FPGA to be acquired; and the capability service module calls the capability interface module, and the capability interface module returns the register state information of the FPGA to a user, namely, the register state acquisition operation is completed.
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