CN117790238A - Relay control circuit and charging device - Google Patents

Abstract

The application discloses a relay control circuit and a charging device, wherein the circuit comprises a controller and N relay circuits; the controller comprises a pulse output interface and N input/output interfaces, the N input/output interfaces are in one-to-one correspondence with the N relay circuits, the pulse output interface is connected with first ends of the N relay circuits, the first input/output interface is connected with second ends of the first relay circuits, the first relay circuit is any one of the N relay circuits, and the first input/output interface is one of the N input/output interfaces corresponding to the first relay circuit; the third ends of the N relay circuits are connected with a power supply port; when the relay in the first relay circuit is required to be connected, the controller configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a high-level signal so as to enable the relay in the first relay circuit to be closed, and the number of interfaces of the controller can be saved.

Description

Relay control circuit and charging device

Technical Field

The present disclosure relates to electronic circuits, and particularly to a relay control circuit and a charging device.

Background

Relays are widely used in electronic fields such as industry, information, automobiles and the like, and a plurality of relays are often used on a plurality of devices at the same time. Meanwhile, in order to meet the functional safety of the relay, the contacts of the relay are required to be detected, and whether the relay is adhered or not is judged. At present, an input/output interface and a pulse output interface of a controller are needed for a control circuit of a relay, the pulse output interface can send out pulse signals with specific proportion to switch and control the relay, and the input/output interface can detect whether the relay is adhered or not. In practical products, the number of interfaces of the controller is often limited, and when the number of relays that the controller needs to control is large, the interfaces of the controller may not be enough.

Disclosure of Invention

The technical problem to be solved by the embodiment of the application is to provide a relay control circuit and a charging device, so that the problem that the interface of a controller is insufficient is solved.

In a first aspect, embodiments of the present application provide a relay control circuit, which may include:

the controller and N relay circuits, N is an integer greater than or equal to 2; the controller comprises a pulse output interface and N input/output interfaces, the N input/output interfaces are in one-to-one correspondence with the N relay circuits, the pulse output interface is connected with a first end of the N relay circuits, a first input/output interface is connected with a second end of a first relay circuit, the first relay circuit is any one of the N relay circuits, and the first input/output interface is one of the N input/output interfaces corresponding to the first relay circuit; the third ends of the N relay circuits are connected with a power supply port;

when the relay in the first relay circuit is required to be connected, the controller configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a high-level signal so as to enable the relay in the first relay circuit to be closed.

In the embodiment of the application, the controller can control N relay circuits only by using N+1 interfaces (one pulse output interface and N input/output interfaces) of the controller, and compared with 2N interfaces (N pulse output interfaces and N input/output interfaces) of the controller required by the N relay circuits, the method can save the number of the interfaces of the controller, realize multiplexing of the pulse output interfaces, improve the interface utilization rate of the controller and avoid waste of interface resources.

In one possible implementation manner, when the relay in the first relay circuit needs to be disconnected, the controller configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a low-level signal so as to disconnect the relay in the first relay circuit.

In one possible implementation manner, when it is required to detect whether the relay in the first relay circuit is stuck, the controller configures the first input/output interface to be an input interface, controls the pulse output interface to output a low-level signal, and determines whether the relay in the first relay circuit is stuck according to the signal received by the first input/output interface.

In one possible implementation, the first relay circuit includes a first relay, a first and gate, a first switching tube circuit, and a first voltage divider circuit; the first input end of the first AND gate is connected with the pulse output interface, the second input end of the first AND gate is connected with the first input/output interface, the output end of the first AND gate is connected with the first end of the first switching tube circuit, the second end of the first switching tube circuit is grounded, the third end of the first switching tube circuit is connected with the first end of the coil of the first relay, the second end of the coil of the first relay is connected with the power supply port the first contact of the first relay, the second contact of the first relay is connected with the first end of the first voltage dividing circuit, the second end of the first voltage dividing circuit is connected with the first input/output interface, and the third end of the first voltage dividing circuit is grounded.

In one possible implementation manner, the first switching tube circuit includes a first resistor, a second resistor, a third resistor and a first switching tube, a first end of the first resistor is connected to an output end of the first and gate, a second end of the first resistor is connected to the first end of the second resistor and the first end of the first switching tube, two ends of the first switching tube and the second end of the second resistor are grounded, a third end of the first switching tube is connected to the first end of the third resistor, and a second end of the third resistor is connected to the first end of the coil of the first relay.

In one possible implementation manner, the first voltage dividing circuit includes a fourth resistor and a fifth resistor, a first end of the fourth resistor is connected to the second contact of the first relay, a second end of the fourth resistor is connected to the first input/output interface and the first end of the fifth resistor, and a second end of the fifth resistor is grounded.

In one possible implementation of the present invention,

the controller determines whether adhesion occurs to a relay in the first relay circuit through a signal received by the first input/output interface, and the method comprises the following steps:

under the condition that the signal received by the first input/output interface is a high-level signal, the controller determines that the relay in the first relay circuit is adhered;

and under the condition that the signal received by the first input/output interface is a low-level signal, the controller determines that the relay in the first relay circuit is not adhered.

In one possible implementation, the first contact of the first relay is a first main contact of the first relay, and the second contact of the first relay is a second main contact of the first relay; or the first contact of the first relay is a first auxiliary contact of the first relay, and the second contact of the first relay is a second auxiliary contact of the first relay.

In one possible implementation, the duty cycle of the pulse signal is greater than or equal to a set threshold.

In a second aspect, embodiments of the present application provide a charging device including the relay control circuit of the first aspect.

Drawings

In order to more clearly describe the technical solutions in the embodiments or the background of the present application, the following description will describe the drawings that are required to be used in the embodiments or the background of the present application.

Fig. 1 is a schematic structural diagram of a relay control circuit according to an embodiment of the present application.

Fig. 2 is a schematic diagram of a specific structure of a relay control circuit according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application.

Fig. 4 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application.

Fig. 5 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application.

Detailed Description

Embodiments of the present application are described below with reference to the accompanying drawings in the embodiments of the present application.

In describing embodiments of the present disclosure, the term "comprising" and its like should be taken to be open-ended, i.e., including, but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like, may refer to different or the same object. Other explicit and implicit definitions are also possible below.

The terms "first," "second," "third," and "fourth" and the like in the description and in the claims of this application and in the drawings, are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. A process, apparatus, system, article, or device that illustratively contains a series of steps or elements is not limited to the listed steps or elements but may alternatively include steps or elements not listed or may alternatively include other steps or elements inherent to such process, apparatus, article, or device.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

A structure or feature may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments.

Those of skill in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.

At present, an input/output interface and a pulse output interface of a controller are needed for a control circuit of a relay, the pulse output interface can send out pulse signals with specific proportion to switch and control the relay, and the input/output interface can detect whether the relay is adhered or not. In the case of a control circuit for N relays, N input/output interfaces and N pulse output interfaces to the controller are required, and a total of 2N interfaces are required. In practical products, the number of interfaces of the controller is often limited, and when the number of relays that the controller needs to control is large, the interfaces of the controller may not be enough. Aiming at the problems, the embodiment of the application provides a relay control circuit and a charging device, which can solve the problem that the interface of a controller is insufficient.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a relay control circuit according to an embodiment of the present application. As shown in fig. 1, the relay control circuit includes a controller 10 and N relay circuits (21 to 2N as shown in fig. 1), N being an integer greater than or equal to 2; the controller 10 includes a pulse output interface (PWM interface is taken as an example of the pulse output interface in fig. 1) and N input/output (I/O) interfaces (I/o_1 to I/o_n as shown in fig. 1), where the N input/output interfaces are in one-to-one correspondence with the N relay circuits (I/o_1 corresponds to 21, I/o_2 corresponds to 22, … I/o_n corresponds to 2N as shown in fig. 1), the pulse output interface is connected to a first end of the N relay circuits, and a first input/output interface (I/o_1 is taken as an example of fig. 1) is connected to a second end of a first relay circuit 21 (I/o_1 is taken as an example of fig. 1), the first relay circuit 21 is any one of the N relay circuits, and the first input/output interface is one of the N input/output interfaces corresponding to the first relay circuit 21; and the third ends of the N relay circuits are connected with a power supply port Vcc.

In the embodiment of the application, each relay control circuit of the N relay circuits comprises a relay. The controller 10 may implement control of N relays through n+1 interfaces (one pulse output interface and N input/output interfaces). Control of the relay may include controlling the closing or opening of the relay. The controller 10 may also implement adhesion detection for N relays through n+1 interfaces.

The controller 10 may be a controller 10 capable of outputting a pulse signal, a high level signal, and a low level signal. For example, the controller 10 may be a microcontroller 10 (microcontroller unit, MCU).

The voltage range corresponding to the high level signal can be 3.3V-5V, and the voltage range corresponding to the low level signal can be 0-0.8V.

The pulse output interface can output pulse signals, and the pulse signals are signals with high and low levels alternating. The power consumption of the controller 10 can be reduced by outputting the pulse signal using the pulse output interface, as compared with outputting the high level signal.

A pulse output interface is an interface in the controller 10 that may be configured to output a pulse signal, such as a pulse width modulation (pulse width modulation, PWM) interface, which outputs a PWM signal. The pulse output interface may also be an I/O interface for analog pulse signal output.

The input/output interface, i.e., I/O interface, may be configured as an input interface or an output interface.

When the relay in the first relay circuit 21 needs to be turned on, the controller 10 configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a high-level signal so as to close the relay in the first relay circuit 21.

The controller 10 has the following functions: in the case where the pulse output interface outputs a pulse signal and the first input/output interface outputs a high level signal, the relay in the first relay circuit 21 is caused to be closed.

The relay is closed, which means that two auxiliary contacts of the relay are communicated, and two main contacts of the relay are communicated.

For other ones of the N relay circuits, the controller 10 may control the relay therein to close in a similar manner. For example, when the relay in the second relay circuit 22 (e.g., 22 in fig. 1) needs to be turned on, the controller 10 configures a second input/output interface (e.g., I/o_2 in fig. 1) as an output interface, controls the pulse output interface to output a pulse signal, and controls the second input/output interface to output a high level signal so as to close the relay in the second relay circuit 22.

In this embodiment of the present application, only n+1 interfaces (a pulse output interface and N input/output interfaces) of the controller 10 are needed, so that the controller 10 can control N relay circuits, and compared with 2N interfaces (N pulse output interfaces and N input/output interfaces) of the controller 10 needed by N relay circuits, the number of interfaces of the controller 10 can be saved, multiplexing of the pulse output interfaces is realized, the interface utilization rate of the controller 10 is improved, and waste of interface resources is avoided.

Alternatively, when the relay in the first relay circuit 21 needs to be turned off, the controller 10 configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a low-level signal, so that the relay in the first relay circuit 21 is turned off.

The relay opening refers to opening between two auxiliary contacts of the relay and opening between two main contacts of the relay.

The controller 10 also has the following functions: in the case where the pulse output interface outputs a pulse signal and the first input/output interface outputs a low-level signal, the relay in the first relay circuit 21 is caused to be turned off.

For other ones of the N relay circuits, the controller 10 may control the relay therein to open in a similar manner. For example, when the relay in the second relay circuit 22 (e.g., 22 in fig. 1) needs to be turned on, the controller 10 configures a second input/output interface (e.g., I/o_2 in fig. 1) as an output interface, controls the pulse output interface to output a pulse signal, and controls the second input/output interface to output a low level signal so as to turn off the relay in the second relay circuit 22.

Optionally, when it is required to detect whether the relay in the first relay circuit 21 is stuck, the controller 10 configures the first input/output interface to be an input interface, controls the pulse output interface to output a low-level signal, and determines whether the relay in the first relay circuit 21 is stuck according to the signal received by the first input/output interface.

The relay adhesion refers to that even if the relay does not meet the closing condition, two auxiliary contacts of the relay are communicated, and two main contacts of the relay are also communicated. For example, when the relay works, a situation of instant heavy current exists, if the overcurrent protection of the relay is not in place, the instant heavy current can cause an arc to be generated on a contact of the relay, and the arc burns out the contact, so that the relay is stuck and fails. When the relay is stuck, the two auxiliary contacts and the two main contacts of the relay are stuck together, and the relay is in a closed state no matter whether the controller 10 outputs signals to the relay or not. Relay adhesion is a fault that requires adhesion detection of the relay prior to use of the relay. To detect whether the relay is stuck.

The controller 10 also has the following functions: a low level signal is output at the pulse output interface, and it is determined whether adhesion occurs in the relay in the first relay circuit 21 based on the signal received at the first input/output interface.

Specifically, in the case where the signal received by the first input/output interface is a high level signal, the controller 10 determines that adhesion occurs in the relay in the first relay circuit 21; in the case where the signal received by the first input/output interface is a low level signal, the controller 10 determines that the relay in the first relay circuit 21 is not stuck.

According to the relay control circuit, only N+1 interfaces (one pulse output interface and N input/output interfaces) of the controller 10 are needed, so that the controller 10 can control N relay circuits and can also realize adhesion detection of the N relay circuits. Compared with N relay circuits requiring 2N interfaces (N pulse output interfaces and N input/output interfaces) of the controller 10, the method can save the number of the interfaces of the controller 10, realize multiplexing of the pulse output interfaces, improve the interface utilization rate of the controller 10 and avoid waste of interface resources.

Referring to fig. 2, fig. 2 is a schematic diagram of a specific structure of a relay control circuit according to an embodiment of the present application. As shown in fig. 2, the relay control circuit includes a controller 10 and N relay circuits (21 to 2N as shown in fig. 1), N being an integer greater than or equal to 2; the controller 10 includes a pulse output interface (PWM interface is taken as an example of the pulse output interface in fig. 1) and N input/output (I/O) interfaces (I/o_1 to I/o_n as shown in fig. 1), where the N input/output interfaces are in one-to-one correspondence with the N relay circuits (I/o_1 corresponds to 21, I/o_2 corresponds to 22, … I/o_n corresponds to 2N as shown in fig. 1), the pulse output interface is connected to a first end of the N relay circuits, and a first input/output interface (I/o_1 is taken as an example of fig. 1) is connected to a second end of a first relay circuit 21 (I/o_1 is taken as an example of fig. 1), the first relay circuit 21 is any one of the N relay circuits, and the first input/output interface is one of the N input/output interfaces corresponding to the first relay circuit 21; and the third ends of the N relay circuits are connected with a power supply port Vcc. The first relay circuit 21 includes a first relay K1, a first and gate U1, a first switching tube circuit 211, and a first voltage dividing circuit 212; the first input end of the first and gate U1 is connected with the pulse output interface, the second input end of the first and gate U1 is connected with the first input/output interface, the output end of the first and gate U1 is connected with the first end of the first switching tube circuit 211, the second end of the first switching tube circuit 211 is grounded, the third end of the first switching tube circuit 211 is connected with the first end 1 of the coil of the first relay K1, the second end 8 of the coil of the first relay K1 is connected with the power supply port and the first contact 4 of the first relay K1, the second contact 3 of the first relay K1 is connected with the first end of the first voltage dividing circuit, the second end of the first voltage dividing circuit 212 is connected with the first input/output interface, and the third end of the first voltage dividing circuit 212 is grounded.

In this embodiment, when the output end of the first and gate U1 outputs a high-level signal, the switch tube in the first switch tube circuit 211 is turned on, so that the first coil is electrified, and a magnetic field is generated after the first coil is electrified, so that the first contact 4 and the second contact 3 of the first relay K1 are closed, that is, the first relay K1 is closed.

When the output end of the first and gate U1 outputs a low level signal, the switching tube in the first switching tube circuit 211 is turned off, so that the first coil is not energized, and the first coil does not generate a magnetic field, so that the first contact 4 and the second contact 3 of the first relay K1 are turned off, i.e., the first relay K1 is turned off.

The switching transistor in the first switching transistor circuit 211 may be a triode or a metal-oxide-semiconductor field-effect transistor (MOSFET), and the MOSFET may also be referred to as a MOS transistor.

The pulse signal output by the pulse output interface and the level signal output by the first input/output interface serve as two inputs of the first and gate U1, and whether the signal output by the output end of the first and gate U1 is in a high level or a low level can be controlled through the pulse signal output by the pulse output interface and the level signal output by the first input/output interface.

The coil of the first relay K1 does not need to be continuously turned on, and the first contact 4 and the second contact 3 of the first relay K1 may be kept closed. For example, the proportion of the time length of the coil of the first relay K1 in one period to the whole period reaches a set threshold, so that the first contact 4 and the second contact 3 of the first relay K1 can be kept closed, and the first relay K1 is ensured to be closed. The set threshold may be determined based on the current of the coil of the relay when conducting. The set threshold is inversely related to the current of the coil of the relay when it is on. In general, the smaller the current of the coil of the relay at the time of conduction, the larger the set threshold value may be set, and the smaller the set threshold value may be set. The set threshold may be set to 30% by way of example.

The magnitude of the threshold is set to be greater than or equal to the minimum value of the lowest threshold at which each of the N relay circuits can be closed. Illustratively, taking n=3 as an example, the lowest threshold value that each relay can close in three relay circuits is: 20%, 25% and 30%. The set threshold may be set to greater than or equal to 30%.

Since the pulse signal is a signal with alternating high and low levels. Duty cycle of the pulse signal: the ratio of the period occupied by the high level signal in one period of the pulse signal.

Optionally, the duty cycle of the pulse signal is greater than or equal to a set threshold.

When the duty ratio of the pulse signal is greater than or equal to the set threshold, if the level signal output by the first input/output interface is a high level signal, and the ratio of the on time of the switching tube of the first switching tube circuit 211 to the whole period is greater than the set threshold in one period, the ratio of the time of the coil of the first relay K1 being energized in one period to the whole period is greater than the set threshold, so that the first contact 4 and the second contact 3 of the first relay K1 are closed.

The duty ratio of the pulse signal is only required to be greater than or equal to the set threshold, and compared with the output of the high-level signal, the pulse output interface is adopted to output the pulse signal with the duty ratio greater than or equal to the set threshold, so that the power consumption of the controller 10 can be reduced.

The first contact 4 of the first relay K1 may be a first main contact of the first relay K1, and the second contact 3 of the first relay K1 may be a second main contact of the first relay K1. Alternatively, the first contact 4 of the first relay K1 may be a first auxiliary contact of the first relay K1, and the second contact 3 of the first relay K1 may be a second auxiliary contact of the first relay K1.

When the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are closed, the first main contact of the first relay K1 and the second main contact of the first relay K1 are driven to be closed. Whether the first main contact of the first relay K1 and the second main contact of the first relay K1 are closed can be detected only by detecting whether the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are closed.

Similarly, when the first main contact of the first relay K1 and the second main contact of the first relay K1 are closed, the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are driven to be closed. Only whether the first main contact of the first relay K1 and the second main contact of the first relay K1 are closed or not needs to be detected, and whether the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are closed or not can be detected.

When the first contact 4 of the first relay K1 is the first main contact of the first relay K1 and the second contact 3 of the first relay K1 is the second main contact of the first relay K1, the first main contact (contact 4 in fig. 2) and the second main contact (contact 3 in fig. 2) of the first relay K1 are connected to a detection circuit (i.e., a detection circuit formed by the coil of the first relay K1, the first and gate U1, the first switching tube circuit 211 and the first voltage dividing circuit 212), the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are connected to a control circuit (circuit controlled by the first relay K1), and the first relay K1 can control a circuit controlled by the first relay K1. For example, the relay control circuit may be used in a vehicle-mounted charger, where it is often required to use 10 relays to switch alternating current (alternating current, AC), if the first contact 4 of the first relay K1 is a first main contact of the first relay K1, the second contact 3 of the first relay K1 is a second main contact of the first relay K1, by detecting whether the first main contact and the second main contact of the first relay K1 are closed, that is, whether the loop is turned on, it may be detected whether the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are closed, and whether the alternating current loop (the loop to which the first auxiliary contact of the first relay K1 and the second auxiliary contact of the first relay K1 are connected) may be detected to switch.

Optionally, the first contact 4 of the first relay K1 is a first main contact of the first relay, and the second contact 3 of the first relay K1 is a second main contact of the first relay; or, the first contact 4 of the first relay K1 is a first auxiliary contact of the first relay K1, and the second contact 3 of the first relay K1 is a second auxiliary contact of the first relay K1.

In this embodiment of the application, under the condition that the first contact 4 of the first relay K1 is the first auxiliary contact of the first relay K1, and the second contact 3 of the first relay K1 is the second auxiliary contact of the first relay K1, the auxiliary contact of the relay is connected to the detection loop, and the main contact of the relay is connected to the control loop, so that direct detection of the main contact of the relay can be avoided, interference and loss to the main contact are reduced, and reliability of the relay control circuit is improved.

Fig. 2 only shows a specific structure of the first relay circuit 21, and other relay circuits have the same structure as the specific structure of the first relay circuit 21, and will not be described here again.

Referring to fig. 3, fig. 3 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application. Fig. 3 is a schematic diagram of fig. 2, where, as shown in fig. 3, the first switching tube circuit 211 includes a first resistor R1, a second resistor R2, a third resistor R3, and a first switching tube Q1, a first end of the first resistor R1 is connected to an output end of the first and gate U1, a second end of the first resistor R1 is connected to a first end of the second resistor R2 and a first end of the first switching tube Q1, two ends of the first switching tube Q1 and a second end of the second resistor R2 are grounded, a third end of the first switching tube Q1 is connected to a first end of the third resistor R3, and a second end of the third resistor R3 is connected to a first end 1 of the coil of the first relay K1.

In this embodiment, the first resistor R1, the second resistor R2, and the third resistor R3 are current limiting resistors. The first switching tube Q1 takes a triode as an example, wherein a first end of the first switching tube Q1 is a base electrode of the triode, a second end of the first switching tube Q1 is an emitter electrode of the triode, and a third end of the first switching tube Q1 is a collector electrode of the triode. The first switching transistor Q1 of fig. 3 is exemplified by an NPN transistor.

Referring to fig. 4, fig. 4 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application. Fig. 4 is a schematic diagram of fig. 3, and as shown in fig. 4, the first voltage divider 212 includes a fourth resistor R4 and a fifth resistor R5, where a first end of the fourth resistor R4 is connected to the second contact 3 of the first relay K1, a second end of the fourth resistor R4 is connected to the first input/output interface and the first end of the fifth resistor R5, and a second end of the fifth resistor R5 is grounded.

In the embodiment of the present application, the fourth resistor R4 and the fifth resistor R5 are voltage dividing resistors. The power supply port Vcc may be a voltage supplied by a power supply. For example, the power supply port Vcc may supply a voltage of 12V, and the I/O port of the controller 10 may only be capable of supplying a voltage of less than 5V, and the voltage supplied by the power supply port Vcc may cause damage to the I/O port if directly inputted to the I/O port. The voltage division is formed by the fourth resistor R4 and the fifth resistor R5, when the power supply port Vcc provides 12V voltage, the voltage division of the fifth resistor R5 is within 3.3-5V, and the I/O port can detect whether the relay is stuck or not.

Referring to fig. 5, fig. 5 is a schematic diagram of a specific structure of another relay control circuit according to an embodiment of the present application. Fig. 5 exemplifies n=3. The relay control circuit includes a controller 10, a first relay circuit 21, a second relay circuit 22, and a third relay circuit 23. The controller 10 includes a PWM interface, an I/o_1 interface, an I/o_2 interface, and an I/o_3 interface, where the first relay circuit 21 includes a first and gate U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first switching tube Q1, and a first relay K1, the PWM interface of the controller 10 is connected to a first input terminal of the first and gate U1, the I/o_1 interface is connected to a second input terminal of the first and gate U1, an output terminal of the first and gate U1 is connected to a first terminal of the first resistor R1, a second terminal of the first resistor R1 is connected to a first terminal of the second resistor R2 and a first terminal of the first switching tube Q1, a second terminal of the first switching tube Q1 is grounded, a first terminal of the first resistor R3 is connected to a first terminal of the third resistor R3, a second terminal of the third resistor R3 is connected to a first terminal of the first relay K1, a first terminal of the first resistor K1 is connected to a second terminal of the fourth resistor R4, and a first terminal of the fourth resistor R4 is connected to a first terminal of the fourth resistor R4.

The second relay circuit 22 comprises a second and gate U2, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a second switching tube Q2 and a second relay K2, wherein the PWM interface of the controller 10 is connected with the first input end of the second and gate U2, the I/o_2 interface is connected with the second input end of the second and gate U2, the output end of the second and gate U2 is connected with the first end of the sixth resistor R6, the second end of the sixth resistor R6 is connected with the first end of the seventh resistor R7 and the first end of the second switching tube Q2, the second end of the second switching tube Q2 and the second end of the seventh resistor R7 are grounded, the third end of the second switching tube Q2 is connected with the first end of the eighth resistor R8, the second end of the eighth resistor R8 is connected with the first end 1 of the coil of the second relay K2, the second end 8 of the coil of the second relay K2 is connected with the port Vcc and the first end of the second relay K2, the second end of the second contact point K2 is connected with the second end of the second resistor K2, and the third end of the tenth resistor R9 is connected with the second end of the ninth resistor R9.

The third relay circuit 23 includes a third and gate U3, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a third switching tube Q3, and a third relay K3, the PWM interface of the controller 10 is connected to the first input terminal of the third and gate U3, the I/o_2 interface is connected to the second input terminal of the third and gate U3, the output terminal of the third and gate U3 is connected to the first terminal of the eleventh resistor R11, the second terminal of the eleventh resistor R11 is connected to the first terminal of the twelfth resistor R12 and the first terminal of the third switching tube Q3, the second terminal of the third switching tube Q3 and the second terminal of the twelfth resistor R12 are grounded, the third terminal of the third switching tube Q3 is connected to the first terminal of the thirteenth resistor R13, the second terminal of the thirteenth resistor R13 is connected to the first terminal 1 of the coil of the third relay K3, the second terminal 8 of the coil of the third relay K3 is connected to the power supply port Vcc and the first terminal of the third relay K3, the second terminal of the third contact point of the third relay K4 is connected to the fifteenth terminal of the third resistor R14, and the fifteenth terminal of the fifteenth resistor R15 is connected to the second terminal of the fifteenth resistor R15.

In fig. 5, 3 relay circuits share a PWM signal, each relay being controlled and detected by an I/O signal.

The relay control circuit of fig. 5 operates as follows:

before all relays are closed, the adhesion detection of the auxiliary contacts is performed. At this time, the PWM interface outputs a normally low level, the relays have no driving signal, the I/O interface is configured as an input interface, if a certain relay is stuck, i.e. the auxiliary contacts are closed, the corresponding I/O interface detects Vcc, i.e. a high level signal, and it can be determined that the relay is stuck.

After the adhesion detection of the auxiliary contact is finished, all the I/O interfaces are configured as output interfaces, all the I/O interfaces output low level by default, then the PWM interface outputs a specific duty ratio signal, and when a relay in which relay circuit is required to be connected, the I/O interface corresponding to the relay circuit is configured as high level.

The circuit shown in fig. 5 is only an example of n=3, and N may be an integer greater than or equal to 2, such as 5,6, and 7. Each relay circuit is duplicated.

According to the relay control circuit, only 4 interfaces (one pulse output interface and 3 input/output interfaces) of the controller 10 are needed, so that the controller 10 can control 3 relay circuits and can also realize adhesion detection of the 3 relay circuits. Compared with the 3 relay circuits requiring 6 interfaces (3 pulse output interfaces and 3 input/output interfaces) of the controller 10, the method can save the number of the interfaces of the controller 10, realize multiplexing of the pulse output interfaces, improve the interface utilization rate of the controller 10 and avoid waste of interface resources.

The embodiment of the application also provides a charging device, and the relay control circuit can be arranged in the charging device. For example, the charging device may be a high-voltage power distribution device of an electric automobile, and the high-voltage power distribution device generally uses more than 5 relays to rapidly charge, and the motor and the power battery distribute power. For another example, the charging device may be a vehicle-mounted charger compatible with single-phase three-phase multi-mode input, and the vehicle-mounted charger often needs to use 10 relays to switch alternating current. In order to save energy, the relay needs to be driven by PWM, and meanwhile, in order to meet functional safety, auxiliary contacts of the relay need to be detected to judge whether the relay is adhered or not.

It should be noted that the flowchart described in the various embodiments of the present application is only one embodiment. The steps in the various flowcharts may be modified or varied in a number of ways, such as performing the steps in the flowcharts in a different order, or deleting, adding, or modifying certain steps, without departing from the spirit of the embodiments of the present application.

"connected" in embodiments of the present application refers to an electrical connection, and two electrical component connections may be direct or indirect connections between two electrical components. For example, a may be directly connected to B, or indirectly connected to B through one or more other electrical components, for example, a may be directly connected to B, or directly connected to C, and C may be directly connected to B, where a and B are connected through C.

In the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

In the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" means two or more. For example, a plurality of nodes refers to two or more nodes. "at least one" means any number, e.g., one, two, or more.

"A and/or B" may be A alone, B alone, or include A and B. "at least one of A, B and C" may be A only, B only, C only, or include A and B, B and C, A and C, or A, B and C. The terms "first", "second", "third", "fourth", etc. in this application are used only to distinguish between different objects and are not used to indicate priority or importance of the objects.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

Claims (10)

1. A relay control circuit is characterized by comprising a controller and N relay circuits, wherein N is an integer greater than or equal to 2; the controller comprises a pulse output interface and N input/output interfaces, the N input/output interfaces are in one-to-one correspondence with the N relay circuits, the pulse output interface is connected with a first end of the N relay circuits, a first input/output interface is connected with a second end of a first relay circuit, the first relay circuit is any one of the N relay circuits, and the first input/output interface is one of the N input/output interfaces corresponding to the first relay circuit; the third ends of the N relay circuits are connected with a power supply port;

when the relay in the first relay circuit is required to be connected, the controller configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a high-level signal so as to enable the relay in the first relay circuit to be closed.

2. The circuit of claim 1, wherein the circuit comprises a plurality of capacitors,

when the relay in the first relay circuit needs to be disconnected, the controller configures the first input/output interface as an output interface, controls the pulse output interface to output a pulse signal, and controls the first input/output interface to output a low-level signal so as to disconnect the relay in the first relay circuit.

3. The circuit of claim 1, wherein the circuit comprises a plurality of capacitors,

when the relay in the first relay circuit needs to be detected to be stuck, the controller configures the first input/output interface as an input interface, controls the pulse output interface to output a low-level signal, and determines whether the relay in the first relay circuit is stuck or not through the signal received by the first input/output interface.

4. A circuit according to any one of claims 1 to 3, wherein the first relay circuit comprises a first relay, a first and gate, a first switching tube circuit and a first voltage divider circuit; the first input end of the first AND gate is connected with the pulse output interface, the second input end of the first AND gate is connected with the first input/output interface, the output end of the first AND gate is connected with the first end of the first switching tube circuit, the second end of the first switching tube circuit is grounded, the third end of the first switching tube circuit is connected with the first end of the coil of the first relay, the second end of the coil of the first relay is connected with the power supply port the first contact of the first relay, the second contact of the first relay is connected with the first end of the first voltage dividing circuit, the second end of the first voltage dividing circuit is connected with the first input/output interface, and the third end of the first voltage dividing circuit is grounded.

5. The circuit of claim 4, wherein the first switching tube circuit comprises a first resistor, a second resistor, a third resistor and a first switching tube, wherein a first end of the first resistor is connected to an output end of the first and gate, a second end of the first resistor is connected to the first end of the second resistor and the first end of the first switching tube, both ends of the first switching tube and the second end of the second resistor are grounded, a third end of the first switching tube is connected to the first end of the third resistor, and a second end of the third resistor is connected to the first end of the coil of the first relay.

6. The circuit of claim 4, wherein the first voltage divider circuit comprises a fourth resistor and a fifth resistor, a first end of the fourth resistor being connected to the second contact of the first relay, a second end of the fourth resistor being connected to the first input/output interface and the first end of the fifth resistor, a second end of the fifth resistor being grounded.

7. The circuit of claim 3, wherein the controller determining whether adhesion of a relay in the first relay circuit occurs via a signal received by the first input/output interface comprises:

under the condition that the signal received by the first input/output interface is a high-level signal, the controller determines that the relay in the first relay circuit is adhered;

and under the condition that the signal received by the first input/output interface is a low-level signal, the controller determines that the relay in the first relay circuit is not adhered.

8. The circuit of claim 4, wherein the first contact of the first relay is a first main contact of the first relay and the second contact of the first relay is a second main contact of the first relay; or the first contact of the first relay is a first auxiliary contact of the first relay, and the second contact of the first relay is a second auxiliary contact of the first relay.

9. The circuit according to any one of claims 1 to 3, 5 to 8, wherein the duty cycle of the pulse signal is greater than or equal to a set threshold.

10. A charging device comprising a relay control circuit according to any one of claims 1 to 9.