CN117786565A - Method and device for determining semiconductor abnormal chip and electronic equipment - Google Patents
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Abstract
The application provides a method and a device for determining a semiconductor abnormal chip and electronic equipment, wherein the method for determining the semiconductor abnormal chip comprises the following steps: acquiring test data respectively corresponding to semiconductor chips of a batch to be detected under each preset test item; screening the first outlier of the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected; based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, and determining a second rejecting chip from the candidate rejecting chips; and determining the first rejecting chip and the second rejecting chip as abnormal chips in the semiconductor chips of the batch to be detected. The method and the device improve the accuracy and stability of the abnormal identification of the chips to be detected in the same batch, and further reduce the analysis difficulty of the test data of the chips to be detected.
Description
Technical Field
The present disclosure relates to the field of chip detection technologies, and in particular, to a method and an apparatus for determining a semiconductor abnormal chip, and an electronic device.
Background
Along with the rapid development of 5G technology, artificial intelligence technology, automatic driving technology, etc., the demands of people for high performance and high reliability chips are increased, and the chip test for chips is an indispensable ring in the current chip production and application process, so as to ensure the high quality production of chips, the chips can be tested in stages and steps in the manufacturing process of the chips so as to cover all the tested parameters, and a large number of tests are helpful for improving the product quality rate on one hand, and further remarkably increasing the difficulty of test data analysis, so that the analysis of the chip test data becomes an important research direction in the chip test field.
In the field of analysis of chip test data, a large amount of sample test data of chips are often required, and sample chips corresponding to the sample test data are often required to have obvious distribution characteristics, however, the sample test data of chips in a certain batch can not necessarily show the clear distribution characteristics of the sample chips in the batch, so that the judgment scale of preset abnormal distribution characteristics needs to be frequently adjusted to adapt to different data distributions, and further the accuracy and stability of abnormal chip detection of chips in the same batch in the prior art are poor, and the analysis difficulty of the test data is high.
Disclosure of Invention
In view of this, an object of the present application is to provide a method, an apparatus and an electronic device for determining abnormal semiconductor chips, which improve accuracy and stability of identifying abnormal chips to be detected in the same batch, and further reduce difficulty in analyzing test data of the chips to be detected.
The embodiment of the application provides a method for determining a semiconductor abnormal chip, which comprises the following steps:
acquiring test data respectively corresponding to semiconductor chips of a batch to be detected under each preset test item;
based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected;
based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, and determining a second rejecting chip from the candidate rejecting chips, wherein the preset two-dimensional regression equation is used for representing the distribution state of the candidate rejecting chips;
and determining the first rejecting chip and the second rejecting chip as abnormal chips in the semiconductor chips of the batch to be detected.
Further, the step of performing a first outlier screening on the test data based on the mean value of the test data and the standard deviation of the test data under any preset test item, and determining a first culling chip and a candidate culling chip from the semiconductor chips of the batch to be detected includes:
determining a first outlier threshold of semiconductor chips of a batch to be detected based on the mean value of test data under any preset test item and the standard deviation of the test data;
comparing the test value corresponding to the test data with the first outlier threshold, determining that the semiconductor chips which are not in the first outlier threshold and correspond to the test value are first rejected chips, and determining that the semiconductor chips except the first rejected chips are candidate rejected chips.
Further, the expression for determining the first outlier threshold of the semiconductor chips of the batch to be detected is specifically:
x∈(-∞,M x -n 1 ＊ σ x )∪(M x -n 1 ＊ σ x ,+∞)；
y∈(-∞,M y -n 2 * σ y )∪(M y -n 2 ＊ σ y ,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; m is M x The average value is used for representing the test data under the first preset test item; sigma (sigma) x Standard deviation for characterizing test data under a first preset test item; n is n 1 Coefficients for characterizing the first outlier screening; m is M y The average value is used for representing the test data under the second preset test item; sigma (sigma) y Standard deviation for characterizing test data under a second preset test item; n is n 2 Coefficients used to characterize the second outlier screening.
Further, the second outlier screening is performed on the test data under each preset test item based on the average value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, and the determining of the second rejecting chip from the candidate rejecting chips includes:
determining a regression line corresponding to the test data of the candidate eliminating chip according to the average value of the test data corresponding to the candidate eliminating chip, the standard deviation of the test data and a preset two-dimensional regression equation;
and performing second outlier screening on the test data under each preset test item according to the distance between the test data of any candidate rejecting chip and the regression line, and determining a second rejecting chip in the semiconductor chip.
Further, the second outlier screening is performed on the test data under each preset test item according to the distance between the test data of any candidate culling chip and the regression line, so as to determine a second culling chip in the semiconductor chip, including:
obtaining the distance between any test data of the candidate eliminating chip and the regression line;
judging the size between the distance and a second outlier threshold;
and if the distance is greater than the second outlier threshold, determining that the candidate culling chip with the distance greater than the second outlier threshold is a second culling chip.
The embodiment of the application also provides a device for determining the semiconductor abnormal chip, which comprises:
the acquisition module is used for acquiring test data corresponding to the semiconductor chips of the batch to be detected under each preset test item;
the first determining module is used for screening the first outlier of the test data based on the mean value of the test data and the standard deviation of the test data under any preset test item, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected;
the screening module is used for screening the outliers of the test data under each preset test item for the second time based on the average value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, and determining a second rejecting chip from the candidate rejecting chips, wherein the preset two-dimensional regression equation is used for representing the distribution state of the candidate rejecting chips;
and the second determining module is used for determining the first rejecting chip and the second rejecting chip as abnormal chips in the semiconductor chips of the batch to be detected.
Further, the first determining module is specifically configured to:
determining a first outlier threshold of semiconductor chips of a batch to be detected based on the mean value of test data under any preset test item and the standard deviation of the test data;
comparing the test value corresponding to the test data with the first outlier threshold, determining that the semiconductor chips which are not in the first outlier threshold and correspond to the test value are first rejected chips, and determining that the semiconductor chips except the first rejected chips are candidate rejected chips.
Further, the first determining module determines an expression of a first outlier threshold of the semiconductor chips of the batch to be detected, specifically:
x∈(-∞,M x -n 1 ＊ σ x )∪(M x -n 1 ＊ σ x ,+∞)；
y∈(-∞,M y -n 2 ＊ σ y )∪(M y -n 2 ＊ σ y ,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; m is M x The average value is used for representing the test data under the first preset test item; sigma (sigma) x Standard deviation for characterizing test data under a first preset test item; n is n 1 Coefficients for characterizing the first outlier screening; m is M y The average value is used for representing the test data under the second preset test item; sigma (sigma) y Standard deviation for characterizing test data under a second preset test item; n is n 2 Coefficients used to characterize the second outlier screening.
The embodiment of the application also provides electronic equipment, which comprises: the system comprises a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, the processor and the memory are communicated through the bus when the electronic device runs, and the machine-readable instructions are executed by the processor to execute the steps of the method for determining the semiconductor abnormal chip.
The embodiments of the present application also provide a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method for determining a semiconductor abnormality chip as described above.
Compared with the identification method of semiconductor chip abnormality in the prior art, the method, the device and the electronic equipment for determining the semiconductor chip abnormality in the embodiment of the application are characterized in that test data respectively corresponding to the semiconductor chips of the batch to be detected under each preset test item are obtained; based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected; based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, determining a second rejecting chip from the candidate rejecting chips, and using the preset two-dimensional regression equation to represent the distribution state of the candidate rejecting chips; the first rejecting chip and the second rejecting chip are determined to be abnormal chips in the semiconductor chips in the batch to be detected, so that the accuracy and the stability of abnormal identification of the chips to be detected in the same batch are improved, and the analysis difficulty of test data of the chips to be detected is further reduced.
In order to make the above objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart illustrating a method for determining a semiconductor abnormal chip according to an embodiment of the present application;
FIG. 2 is a block flow diagram of a method for determining a semiconductor abnormal chip according to an embodiment of the present application;
FIG. 3 is a schematic diagram showing regression lines in a method for determining a semiconductor abnormal chip according to an embodiment of the present disclosure;
fig. 4 is a block diagram showing a configuration of a determination apparatus of a semiconductor abnormal chip provided in an embodiment of the present application;
fig. 5 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
In the figure:
400-determination means of semiconductor abnormal chips; 410-an acquisition module; 420-a first determination module; 430-a screening module; 440-a second determination module; 500-an electronic device; 510-a processor; 520-memory; 530-bus.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. Based on the embodiments of the present application, every other embodiment that a person skilled in the art would obtain without making any inventive effort is within the scope of protection of the present application.
First, application scenarios applicable to the present application will be described. The method and the device can be applied to the technical field of chip detection.
According to research, in the field of analysis of chip test data, a large amount of sample test data of chips are often required, and sample chips corresponding to the sample test data are often required to have obvious distribution characteristics, however, the sample test data of chips in a certain batch can not necessarily show the clear distribution characteristics of the sample chips in the batch, so that the judgment scale of preset abnormal distribution characteristics needs to be frequently adjusted to adapt to different data distributions, and further the accuracy and stability of abnormal chip detection of chips in the same batch in the prior art are poor, and the analysis difficulty of the test data is high.
In the prior art, an abnormal chip in the chip is determined by determining an outlier in test data of the chip, but in the existing univariate analysis method, an average value and a standard deviation are generally used as criteria, an average value is taken as a center, an N-times standard deviation is taken as a radius to divide a value interval (the outside of the interval is the outlier), but N is taken as a hyper-parameter to directly influence the criteria, so that the analysis method has serious dependence on the hyper-parameter, in the existing multivariate analysis method, the correlation analysis of two variables is most, the method takes a regression line as a reference center, and a point far from the regression line is determined as the outlier, but the regression line is also influenced by the outlier in calculation, and particularly when the sample quantity is insufficient, the abnormal discrete point causes the deviation of the regression line.
Based on the above, the embodiment of the application provides a method and a device for determining a semiconductor abnormal chip and electronic equipment, which improve the accuracy and stability of identifying the abnormality of the chip to be detected in the same batch, and further reduce the analysis difficulty of the test data of the chip to be detected.
Referring to fig. 1, fig. 1 is a flowchart of a method for determining a semiconductor abnormal chip according to an embodiment of the present application. As shown in fig. 1, the method for determining a semiconductor abnormal chip provided in the embodiment of the application includes the following steps:
s101, acquiring test data corresponding to semiconductor chips of a batch to be detected under each preset test item.
In this step, the number of preset test items may be selected and set in a user-defined manner according to different application scenarios, and the number of preset test items in the embodiment provided in this application is two, and the two preset test items in the embodiment provided in this application are test items of semiconductor chips (such as test voltages of the semiconductor chips and test currents of the semiconductor chips) that are related to each other, at this time, test data of the semiconductor chips in the test lot under each preset test item needs to be collected first.
Here, it is assumed that two preset test items in the embodiment provided in the present application are X and Y, respectively, and test values of corresponding test data under the preset test items are denoted as X and Y.
S102, based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first reject chip and a candidate reject chip from the semiconductor chips of the batch to be detected.
In the step, based on the mean value of test data under any preset test item and the standard deviation of the test data, a first outlier threshold value of semiconductor chips in a batch to be detected is firstly determined, after the first outlier threshold value is determined, a test value corresponding to the test data is compared with the first outlier threshold value, the semiconductor chips which are not in the first outlier threshold value and correspond to the test value are determined to be first rejecting chips, and the semiconductor chips except the first rejecting chips in the semiconductor chips are determined to be candidate rejecting chips.
Here, the embodiment provided in the application determines the abnormal chip in the semiconductor chip by first determining a correlation algorithm (correlation), and only two stages are needed to determine the abnormal chip in the semiconductor chip, wherein the first stage is a stage of determining the first reject chip and the candidate reject chip, the second stage is a process of determining the second reject chip, and the first stage in the embodiment provided in the application is specifically to firstly determine the average value of the test data under any preset test item, the standard deviation of the test data and the first outlier threshold, and then firstly reject the semiconductor chip which is not within the first outlier threshold, namely the first reject chip in the first stage.
The embodiment provided by the application specifically comprises the following steps:
the method comprises the steps of carrying out separate analysis on a preset test item X and a test item preset test item Y, calculating a mean Mx of X, a mean My of Y and a mean sigma Y of X, determining n sigma as a first outlier threshold, and determining a semiconductor chip corresponding to a test value which is not in n sigma as a first rejecting chip, wherein n is a constant (coefficient), and generally 1, 3, 6 and the like.
In this way, the size of n in the embodiment provided by the application can be selected and set in a self-defined manner according to different application scenes.
Further, the expression for determining the first outlier threshold of the semiconductor chips of the batch to be detected is specifically:
x∈(-∞,Mx-n1*σx)∪(Mx-n1*σx,+∞)；
y∈(-∞,My-n2*σy)∪(My-n2*σy,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; mx is used to characterize a mean value of test data under a first preset test item; sigma x is used for representing standard deviation of test data under a first preset test item; n1 is used for representing the coefficient of the first outlier screening; my is used for representing the mean value of the test data under the second preset test item; sigma y is used for representing the standard deviation of the test data under the second preset test item; n2 is used to characterize the coefficients of the second outlier screening.
In the above, m±n±σ is used to characterize the outlier other than the first outlier threshold.
S103, performing second outlier screening on the test data under each preset test item based on the average value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, and determining a second rejecting chip from the candidate rejecting chips, wherein the preset two-dimensional regression equation is used for representing the distribution state of the candidate rejecting chips.
In the step, a regression line corresponding to the test data of the candidate rejecting chip is determined according to the average value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, and then, a second outlier screening is performed on the test data under each preset test item according to the distance between the test data of any candidate rejecting chip and the regression line, so as to determine a second rejecting chip in the semiconductor chip.
In the above, the test data of the candidate rejecting chip after rejecting the first rejecting chip under two preset test items is subjected to two-dimensional regression analysis according to a preset two-dimensional regression equation, and a regression line corresponding to the test data of the candidate rejecting chip is calculated, an outlier corresponding to the candidate rejecting chip is determined, and then a second rejecting chip corresponding to the outlier and needing to be rejected is determined.
Here, test data x and y of the candidate elimination chip under two preset test items are formed into a point (x and y) on a two-dimensional plane, and correlation analysis is performed on the test data x and y under the two preset test items according to a correlation algorithm.
As shown in fig. 2, fig. 2 is a schematic diagram of the influence of outliers on regression lines in the method for determining semiconductor abnormal chips provided in the embodiment of the present application, for example, in the right schematic diagram in fig. 2, the test values of serious outliers corresponding to the first culling chip have been culled, and in the left schematic diagram in fig. 2, the test values of serious outliers corresponding to the first culling chip have not been culled.
The regression line corresponding to the test data of the candidate rejecting chip is calculated by using the average value of the test data corresponding to the remaining candidate rejecting chip in the schematic diagram on the right side in fig. 2, the standard deviation of the test data and a preset two-dimensional regression equation, wherein the regression line can more represent the distribution trend of the test data of the candidate rejecting chip.
Thus, the preset two-dimensional regression equation in the embodiment provided in the present application is specifically:
Lreg:y＝k*x+b；
where k is used to characterize the slope of the line and b is used to characterize the intercept. Optionally, the second outlier screening is performed on the test data under each preset test item according to the distance between the test data of any candidate culling chip and the regression line, to determine a second culling chip in the semiconductor chip, including:
and obtaining the distance between any test data of the candidate elimination chip and the regression line.
Wherein, assuming that the distance between any test data of the candidate elimination chip and the regression line in the embodiment provided by the application is d, calculating the mean value M of d dis And variance sigma dis 。
And regarding the data points corresponding to any test data of the candidate elimination chip and the test data with the distance between the test data and the regression line exceeding the second outlier threshold r as outliers, therefore, the definition of the distance r between any test data and the regression line is as follows:
r＝M dis +m*σ dis ；
where m is used to characterize the coefficients, which can be set to 1, 3, 6, etc.
And judging the size between the distance and the second outlier threshold.
And if the distance is greater than the second outlier threshold, determining that the candidate culling chip with the distance greater than the second outlier threshold is a second culling chip.
In the above description, as shown in fig. 3, fig. 3 shows a schematic diagram of regression lines in the method for determining a semiconductor abnormal chip according to the embodiment of the present application, where the solid line in fig. 3 is the regression line Lreg and the dotted line is the distance L reg Upper and lower boundary line L of r upper And L lower (i.e., the second outlier threshold), the upper and lower boundary lines can be regarded as regression lines shifted by r/cos θ in the vertical direction, i.e., the equation for the upper and lower boundary lines is shown as follows:
L upper :y＝k ＊ x+b+r/cosθ；
L lowe r:y＝k ＊ x+b-r/cosθ；
wherein θ is used to characterize an acute angle to the horizontal.
S104, determining the first reject chip and the second reject chip as abnormal chips in the semiconductor chips of the batch to be detected.
In the step, the first rejecting chip and the second rejecting chip are combined, and the combined semiconductor chips are determined to be abnormal chips in the semiconductor chips of the batch to be detected.
Here, through summarizing first rejection chip and second rejection chip, obtain final unusual chip set, through two-stage analysis, the embodiment that this application provided more comprehensively discerns unusual chip, the influence of outlier to regression line calculation has been alleviated simultaneously, insensitivity to the sample size of participating in the analysis has better robustness, discernment in the production flow kind is early has the unusual chip of potential risk, promote the yield of the semiconductor chip of final production and practiced thrift manufacturing cost.
Univariate analysis is the most basic one in which the data value being analyzed contains one variable, so that it can reflect the basic information contained in a large number of data materials in the simplest generalized manner.
Based on univariate analysis, the multivariate analysis fully considers the relation among variables and mines data information in higher dimensionality.
The reason why the embodiment provided by the application uses the two-stage analysis mode is that the common univariate analysis method is sensitive to the criterion of the outlier, is not easy to judge where to be the demarcation position, has poor robustness, and the common and related multivariate analysis method can calculate a regression line capable of reflecting the overall trend of the candidate culling chip according to the least square method of the values of all the candidate culling chips, so that the regression line can better predict the value of the target position in the preset test item, but the regression line should reflect the trend of the sample main body under the scene of chip anomaly detection and not be influenced by the outlier.
According to the embodiment provided by the application, the first rejecting chip is determined by using univariate analysis, the correlation under two preset test items is analyzed by using multivariate analysis, the second rejecting chip is determined, the regression line is taken as the center, the distance from the candidate rejecting chip to the regression line is taken as the main judgment factor, the screening accuracy of the semiconductor chip is improved, and the dependence on the super-parameters in the prior art is reduced.
Compared with the method for determining the abnormal chips in the prior art, the method for determining the semiconductor abnormal chips provided by the embodiment of the application has the advantages that the test data respectively corresponding to the semiconductor chips of the batch to be detected under each preset test item are obtained; based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected; based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, determining a second rejecting chip from the candidate rejecting chips, and using the preset two-dimensional regression equation to represent the distribution state of the candidate rejecting chips; the first rejecting chip and the second rejecting chip are determined to be abnormal chips in the semiconductor chips in the batch to be detected, so that the accuracy and the stability of abnormal identification of the chips to be detected in the same batch are improved, and the analysis difficulty of test data of the chips to be detected is further reduced.
Referring to fig. 4, fig. 4 is a block diagram of a determining apparatus for determining a semiconductor abnormal chip according to an embodiment of the present application. As shown in fig. 4, the determination device 400 of the semiconductor abnormal chip includes:
the acquiring module 410 is configured to acquire test data corresponding to each preset test item of the semiconductor chips in the batch to be tested.
The first determining module 420 is configured to perform a first outlier screening on the test data based on a mean value of the test data and a standard deviation of the test data under any preset test item, and determine a first culling chip and a candidate culling chip from the semiconductor chips of the batch to be detected.
Further, the first determining module 420 is specifically configured to:
and determining a first outlier threshold of the semiconductor chips of the batch to be detected based on the mean value of the test data under any preset test item and the standard deviation of the test data.
Comparing the test value corresponding to the test data with the first outlier threshold, determining that the semiconductor chips which are not in the first outlier threshold and correspond to the test value are first rejected chips, and determining that the semiconductor chips except the first rejected chips are candidate rejected chips.
Optionally, the first determining module 420 determines an expression of a first outlier threshold of the semiconductor chips of the lot to be detected, specifically:
x∈(-∞,Mx-n1*σx)∪(Mx-n1*σx,+∞)；
y∈(-∞,My-n2*σy)∪(My-n2*σy,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; mx is used to characterize a mean value of test data under a first preset test item; sigma x is used for representing standard deviation of test data under a first preset test item; n1 is used for representing the coefficient of the first outlier screening; my is used for representing the mean value of the test data under the second preset test item; sigma y is used for representing the standard deviation of the test data under the second preset test item; n2 is used to characterize the coefficients of the second outlier screening.
Optionally, the first determining module 420 determines an expression of a first outlier threshold of the semiconductor chips of the lot to be detected, specifically:
x∈(-∞,Mx-n1*σx)∪(Mx-n1*σx,+∞)；
y∈(-∞,My-n2*σy)∪(My-n2*σy,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; mx is used to characterize a mean value of test data under a first preset test item; sigma x is used for representing standard deviation of test data under a first preset test item; n1 is used for representing the coefficient of the first outlier screening; my is used for representing the mean value of the test data under the second preset test item; sigma y is used for representing the standard deviation of the test data under the second preset test item; n2 is used to characterize the coefficients of the second outlier screening.
The screening module 430 is configured to perform a second outlier screening on the test data under each preset test item based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data, and a preset two-dimensional regression equation, and determine a second rejecting chip from the candidate rejecting chips, where the preset two-dimensional regression equation is used to characterize the distribution state of the candidate rejecting chips.
Optionally, the screening module 430 is specifically configured to:
and determining a regression line corresponding to the test data of the candidate eliminating chip according to the average value of the test data corresponding to the candidate eliminating chip, the standard deviation of the test data and a preset two-dimensional regression equation.
And performing second outlier screening on the test data under each preset test item according to the distance between the test data of any candidate rejecting chip and the regression line, and determining a second rejecting chip in the semiconductor chip.
Further, the second outlier screening is performed on the test data under each preset test item according to the distance between the test data of any candidate culling chip and the regression line, so as to determine a second culling chip in the semiconductor chip, including:
and obtaining the distance between any test data of the candidate elimination chip and the regression line.
And judging the size between the distance and the second outlier threshold.
And if the distance is greater than the second outlier threshold, determining that the candidate culling chip with the distance greater than the second outlier threshold is a second culling chip.
A second determining module 440, configured to determine the first culling chip and the second culling chip as abnormal chips in the semiconductor chips of the batch to be detected.
Compared with the determination device of the abnormal chip in the prior art, the determination device 400 of the semiconductor abnormal chip provided by the embodiment of the application, by acquiring the test data respectively corresponding to the semiconductor chips of the batch to be detected under each preset test item; based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected; based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, determining a second rejecting chip from the candidate rejecting chips, and using the preset two-dimensional regression equation to represent the distribution state of the candidate rejecting chips; the first rejecting chip and the second rejecting chip are determined to be abnormal chips in the semiconductor chips in the batch to be detected, so that the accuracy and the stability of abnormal identification of the chips to be detected in the same batch are improved, and the analysis difficulty of test data of the chips to be detected is further reduced.
Referring to fig. 5, fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 5, the electronic device 500 includes a processor 510, a memory 520, and a bus 530.
The memory 520 stores machine-readable instructions executable by the processor 510, and when the electronic device 500 is running, the processor 510 communicates with the memory 520 through the bus 530, and when the machine-readable instructions are executed by the processor 510, the steps of the method for determining a semiconductor abnormal chip in the method embodiments shown in fig. 1 to 3 can be executed, and detailed implementation can refer to method embodiments and will not be repeated herein.
The embodiment of the present application further provides a computer readable storage medium, where a computer program is stored on the computer readable storage medium, and the computer program may execute the steps of the method for determining a semiconductor abnormal chip in the method embodiment shown in the foregoing fig. 1 to 3 when the computer program is executed by a processor, and a specific implementation manner may refer to the method embodiment and is not repeated herein.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a non-volatile computer readable storage medium executable by a processor. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Finally, it should be noted that: the foregoing examples are merely specific embodiments of the present application, and are not intended to limit the scope of the present application, but the present application is not limited thereto, and those skilled in the art will appreciate that while the foregoing examples are described in detail, the present application is not limited thereto. Any person skilled in the art may modify or easily conceive of the technical solution described in the foregoing embodiments, or make equivalent substitutions for some of the technical features within the technical scope of the disclosure of the present application; such modifications, changes or substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. The method for determining the semiconductor abnormal chip is characterized by comprising the following steps of:
acquiring test data respectively corresponding to semiconductor chips of a batch to be detected under each preset test item;
based on the mean value of the test data and the standard deviation of the test data under any preset test item, performing first outlier screening on the test data, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected;
based on the mean value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, performing second outlier screening on the test data under each preset test item, and determining a second rejecting chip from the candidate rejecting chips, wherein the preset two-dimensional regression equation is used for representing the distribution state of the candidate rejecting chips;
and determining the first rejecting chip and the second rejecting chip as abnormal chips in the semiconductor chips of the batch to be detected.
2. The method for determining abnormal semiconductor chips according to claim 1, wherein the step of performing a first outlier screening on the test data based on a mean value of the test data and a standard deviation of the test data under any preset test item, and determining a first culling chip and a candidate culling chip from the semiconductor chips of the lot to be tested comprises:
determining a first outlier threshold of semiconductor chips of a batch to be detected based on the mean value of test data under any preset test item and the standard deviation of the test data;
comparing the test value corresponding to the test data with the first outlier threshold, determining that the semiconductor chips which are not in the first outlier threshold and correspond to the test value are first rejected chips, and determining that the semiconductor chips except the first rejected chips are candidate rejected chips.
3. The method for determining abnormal semiconductor chips according to claim 2, wherein the expression for determining the first outlier threshold of the semiconductor chips of the lot to be detected is specifically:
x∈(-∞,Mx-n1*σx)∪(Mx-n1*σx,+∞)；
y∈(-∞,My-n2*σy)∪(My-n2*σy,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; mx is used to characterize a mean value of test data under a first preset test item; sigma x is used for representing standard deviation of test data under a first preset test item; n1 is used for representing the coefficient of the first outlier screening; my is used for representing the mean value of the test data under the second preset test item; sigma y is used for representing the standard deviation of the test data under the second preset test item; n2 is used to characterize the coefficients of the second outlier screening.
4. The method for determining abnormal semiconductor chips according to claim 1, wherein the determining the second culling chip from the candidate culling chips by performing a second outlier screening on the test data under each of the preset test items based on the mean value of the test data corresponding to the candidate culling chips, the standard deviation of the test data, and a preset two-dimensional regression equation includes:
determining a regression line corresponding to the test data of the candidate eliminating chip according to the average value of the test data corresponding to the candidate eliminating chip, the standard deviation of the test data and a preset two-dimensional regression equation;
and performing second outlier screening on the test data under each preset test item according to the distance between the test data of any candidate rejecting chip and the regression line, and determining a second rejecting chip in the semiconductor chip.
5. The method for determining abnormal semiconductor chips as defined in claim 4, wherein the determining the second culling chip of the semiconductor chips by performing a second outlier screening of the test data under each of the predetermined test items according to the distance between the test data of any one of the candidate culling chips and the regression line comprises:
obtaining the distance between any test data of the candidate eliminating chip and the regression line;
judging the size between the distance and a second outlier threshold;
and if the distance is greater than the second outlier threshold, determining that the candidate culling chip with the distance greater than the second outlier threshold is a second culling chip.
6. A determination device of a semiconductor abnormal chip, characterized in that the determination device of the semiconductor abnormal chip comprises:
the acquisition module is used for acquiring test data corresponding to the semiconductor chips of the batch to be detected under each preset test item;
the first determining module is used for screening the first outlier of the test data based on the mean value of the test data and the standard deviation of the test data under any preset test item, and determining a first rejecting chip and a candidate rejecting chip from the semiconductor chips of the batch to be detected;
the screening module is used for screening the outliers of the test data under each preset test item for the second time based on the average value of the test data corresponding to the candidate rejecting chip, the standard deviation of the test data and a preset two-dimensional regression equation, and determining a second rejecting chip from the candidate rejecting chips, wherein the preset two-dimensional regression equation is used for representing the distribution state of the candidate rejecting chips;
and the second determining module is used for determining the first rejecting chip and the second rejecting chip as abnormal chips in the semiconductor chips of the batch to be detected.
7. The device for determining abnormal semiconductor chips according to claim 6, wherein the first determining module is specifically configured to:
determining a first outlier threshold of semiconductor chips of a batch to be detected based on the mean value of test data under any preset test item and the standard deviation of the test data;
comparing the test value corresponding to the test data with the first outlier threshold, determining that the semiconductor chips which are not in the first outlier threshold and correspond to the test value are first rejected chips, and determining that the semiconductor chips except the first rejected chips are candidate rejected chips.
8. The apparatus according to claim 7, wherein the expression for determining the first outlier threshold of the semiconductor chips of the lot to be detected in the first determining module is specifically:
x∈(-∞,Mx-n1*σx)∪(Mx-n1*σx,+∞)；
y∈(-∞,My-n2*σy)∪(My-n2*σy,+∞)；
wherein x is used for representing test data under a first preset test item; y is used for representing test data under a second preset test item; mx is used to characterize a mean value of test data under a first preset test item; sigma x is used for representing standard deviation of test data under a first preset test item; n1 is used for representing the coefficient of the first outlier screening; my is used for representing the mean value of the test data under the second preset test item; sigma y is used for representing the standard deviation of the test data under the second preset test item; n2 is used to characterize the coefficients of the second outlier screening.
9. An electronic device, comprising: a processor, a memory and a bus, said memory storing machine readable instructions executable by said processor, said processor and said memory communicating via the bus when the electronic device is running, said machine readable instructions when executed by said processor performing the method steps of determining a semiconductor exception chip according to any one of the preceding claims 1-5.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program which, when executed by a processor, performs the steps of the method for determining a semiconductor anomaly chip as claimed in any one of the preceding claims 1 to 5.
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