CN117785757A - CXL memory module, memory page exchange method, chip, medium and system - Google Patents
CXL memory module, memory page exchange method, chip, medium and system Download PDFInfo
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Abstract
A CXL memory module, a memory page exchange method, a chip, a medium and a system relate to the technical field of data access, wherein the CXL memory module comprises a control chip and a plurality of memory chips managed by the control chip, and the control chip is configured to: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to a memory exchange instruction; and exchanging the data in the first memory page to the memory chip. The excellent performance of the CXL memory module in the aspect of data communication can be utilized, and the efficiency of memory page exchange between the host and the CXL memory module is greatly improved, so that the utilization rate of the host memory is improved.
Description
Technical Field
The embodiment of the disclosure relates to the field of CXL memory modules, in particular to a CXL memory module, a memory page exchange method, a chip, a medium and a system.
Background
CXL (Compute Express Link, computing fast link) is a new PCIe (Peripheral Component Interconnect Express, peripheral component interconnect) physical layer based memory interface protocol, based on which CXL memory modules can extend the memory of a computer. The CXL memory module typically includes a CXL control chip and its managing memory chips.
The memory page exchange is an effective mechanism for relieving the memory pressure of the host, and the principle is that when the memory resources of the host are tense, part of the memory pages are exchanged to external memory resources by the host according to a certain strategy so as to release the memory space of the memory of the host; when the host needs to call the data in the partial memory page, the partial memory page is loaded into the host memory. Currently, according to the type of the external storage resource, the memory page exchange comprises two methods, i.e. a zscap method and a Disk (Disk), wherein the zscap method can utilize compression and decompression to improve the utilization rate of the external storage resource, but correspondingly increases the time consumption; the Disk method is limited by the IO interface, and there is also a problem of lower performance.
Disclosure of Invention
The embodiment of the disclosure provides a CXL memory module, a memory page exchange method, a chip, a medium and a system.
In a first aspect, an embodiment of the present disclosure provides a CXL memory module, including a control chip and a plurality of memory chips managed by the control chip, the control chip configured to: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to a memory exchange instruction; and exchanging the data in the first memory page to the memory chip.
In a second aspect, an embodiment of the present disclosure provides a method for exchanging memory pages, which is applied to the CXL memory module in the foregoing embodiment, and includes: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to a memory exchange instruction; and exchanging the data in the first memory page to the memory chip.
In a third aspect, an embodiment of the present disclosure provides a control chip applied to a CXL memory module, where the CXL memory module further includes a plurality of memory chips managed by the control chip, and a processor of the control chip is configured to perform the method for memory page swapping in the foregoing embodiment.
In a fourth aspect, in an embodiment of the present disclosure, there is provided a non-transitory computer storage medium, where a computer program is stored, where the computer program, when executed by a processor, implements a method for exchanging memory pages in the above embodiment.
In a fifth aspect, an embodiment of the present disclosure provides a computer system, including a host and a CXL memory module in the foregoing embodiment, where the host communicates with the CXL memory module through a CXL interface, so as to implement discovery, configuration, and data transmission of the CXL memory module, and the CXL memory module performs a memory page swap with a memory of the host as a memory swap page back end.
According to the CXL memory module provided by the embodiment of the disclosure, the data in the host memory can be exchanged into the memory chip in the CXL memory module according to the memory exchange instruction of the host, so that the CXL memory module is used as the memory page exchange rear end of the host, the excellent performance of the CXL memory module in terms of data communication can be utilized, the memory page exchange efficiency between the host and the CXL memory module is greatly improved, and the utilization rate of the host memory is further improved.
Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the disclosure. Other advantages of the present disclosure may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The accompanying drawings are included to provide an understanding of the technical aspects of the present disclosure, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present disclosure and together with the embodiments of the disclosure, not to limit the technical aspects of the present disclosure.
FIG. 1 is a schematic diagram of one embodiment of a CXL memory module of the present disclosure;
FIG. 2 is a schematic diagram of another embodiment of a CXL memory module according to the present disclosure;
FIG. 3 is a schematic diagram of one embodiment of a control chip of the present disclosure;
FIG. 4 is a flow chart illustrating an embodiment of a memory page swap method according to the present disclosure;
FIG. 5 is a flow chart illustrating a memory page swap method according to another embodiment of the present disclosure;
FIG. 6 is a flow chart illustrating a memory page swap method according to another embodiment of the present disclosure;
FIG. 7 is a schematic diagram of an embodiment of a computer system of the present disclosure.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be arbitrarily combined with each other.
Embodiments of the present disclosure are not necessarily limited to the dimensions shown in the drawings, the shapes and sizes of the various components in the drawings do not reflect true proportions. Furthermore, the drawings schematically show ideal examples, and the embodiments of the present disclosure are not limited to the shapes or the numerical values shown in the drawings.
The ordinal numbers such as "first," "second," etc., in this disclosure are provided to avoid intermixing of components and do not indicate any order, number, or importance.
In this disclosure, the terms "mounted," "connected," and "connected" are to be construed broadly, unless otherwise specifically indicated and defined. For example, it may be a fixed connection, a removable connection, or an integral connection; may be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intermediate members, or may be in communication with the interior of two elements. The specific meaning of the terms in this disclosure will be understood by those of ordinary skill in the art as the case may be.
For the current memory page swap mechanism, an embodiment of the present disclosure provides a CXL memory module, as shown in fig. 1, where the CXL memory module may include a control chip 110 and a memory chip 120 managed by the control chip, for example, a DRAM (Dynamic Random Access Memory ) chip. The control chip 110 may be configured to: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to a memory exchange instruction; the data in the first memory page is swapped to the memory chip 120.
In general, control chip 110 may also be referred to as a CXL controller, on which a CXL interface based on the CXL protocol may be provided so that a Host CPU (Host CPU) interacts with control chip 110 through the CXL interface. Based on the cxl.io protocol, for example, the host CPU may send instructions to the control chip 110; based on the cxl.mem protocol, the host CPU can read data from the memory chip 120 and write external data to the memory chip 120. A DDR (Double Data Rate) controller is also provided on the control chip 110, so that the CPU of the control chip 110 manages the memory chip 120, which is typically divided into a plurality of memory pages.
The data exchange may include writing data to be exchanged into an exchange back end (e.g., a CXL memory module in this embodiment) and releasing a storage space of the data to be exchanged in an exchange front end (e.g., a host memory), where when a storage space in the host memory (Local DDR) is insufficient, the host may perform a memory page exchange with the CXL memory module, and exchange data in the host memory into the CXL memory module, so as to release the storage space in the host memory.
As an example, the host CPU may determine a specific memory page in the host memory as a first memory page to be exchanged, where data in the first memory page is to be exchanged data, then generate a memory exchange instruction based on a storage address of the first memory page, and transmit the memory exchange instruction and the data to be exchanged to the CXL memory module through the CXL interface, thereby implementing memory page exchange between the host CPU and the CXL memory module.
In this embodiment, the host CPU may send a memory swap instruction to the control chip 110 through CXL. After the control chip 110 receives the memory exchange instruction, a first memory page to be exchanged can be determined in the host memory according to the memory address in the memory exchange instruction, and then the data in the first memory page is exchanged into the memory chip 120, so as to realize the memory page exchange between the host and the CXL memory module.
After the data in the first memory page is written into the memory chip 120, the control chip 110 may also return the memory address in the memory chip 120 to the host CPU, so that the host records the corresponding relationship between the host memory address and the memory address of the first memory page. And subsequently, when the host needs to access the data in the first memory page, the corresponding relation can be searched to obtain the memory address corresponding to the data, and then the data is read from the CXL memory module.
According to the CXL memory module in the embodiment, data in the host memory can be exchanged into a memory chip in the CXL memory module according to a memory exchange instruction of the host, so that the CXL memory module is used as a memory page exchange rear end of the host, excellent performance of the CXL memory module in terms of data communication can be utilized, and the memory page exchange efficiency between the host and the CXL memory module is greatly improved, thereby improving the utilization rate of the host memory.
Referring now to fig. 2, fig. 2 is a schematic diagram illustrating an embodiment of a CXL memory module of the present disclosure, the CXL memory module further including a flash memory chip 210 as illustrated in fig. 2;
the control chip 220 is further configured to use the flash memory chip 210 as a memory page swap back end of the memory chip 200 to swap data in the memory chip 200 into the flash memory chip 210.
As an example, the flash memory chip 210 may employ a nonvolatile memory, such as a NAND flash memory.
In this embodiment, when the memory space in the memory chip 200 is insufficient, the memory page exchange can be performed with the flash memory chip 210, and the data in the memory chip 200 can be exchanged into the flash memory chip 210, so as to release the memory space in the memory chip 200. Through the secondary exchange in the CXL memory module, the utilization rate of the memory chip can be improved, and the back-end space of the memory page exchange of the host is expanded.
In some optional implementations of this embodiment, when the flash memory chip is used as a memory page swap back-end for a memory chip, the control chip may be configured to: determining a second memory page to be exchanged in the memory chip in response to the memory usage of the memory chip reaching a preset threshold; and exchanging the data in the second memory page to the flash memory chip, and recording exchange information of the data, wherein the exchange information comprises the memory address of the second memory page and the exchanged flash memory address.
As shown in fig. 2, the proprietary hardware in the control chip 220 may include an MMU (Memory Management Unit ) by which the control chip 220 can manage the memory chip 200 and the flash memory chip 210. For example, the mapping relationship between the memory address and the flash memory address may be recorded, the authority of the access page may be checked, or the page fault interrupt may be processed by the MMU, that is, when the CPU of the control chip 220 accesses the data in a certain memory page, if the memory page is already swapped into the flash memory chip 210, the loading process of the data from the flash memory chip 210 to the memory chip 200 may be triggered.
Memory page swapping between the memory chip 200 and the flash memory chip 210 in this embodiment may also be implemented by MMU. For example, when the MMU detects that the usage rate of the memory chip 200 reaches the preset threshold, a second memory page to be swapped may be selected in the memory chip 200 based on a preset policy, and then the second memory page is swapped into the flash memory chip 210, so as to release the corresponding storage space in the memory chip 200, and record the corresponding relationship between the memory address and the flash memory address of the second memory page as the swapped information of the data. Subsequently, the control chip 220 may access the data swapped out of the memory chip according to the swapped information.
As an example, the second memory page to be swapped may be selected using the following policies: determining the memory page with the earliest writing time as a second memory page to be exchanged according to the sequence of writing into the memory chip; according to the read-write frequency of the memory pages, determining the memory page with the least read-write times in a preset time period as a second memory page to be exchanged; alternatively, the second memory page to be swapped is determined in a random manner.
In an alternative example, the control chip 220 may also implement prefetching of swap-out data (i.e., data swapped into the flash chip 210) through the MMU to improve the read efficiency of the data.
In some embodiments, the CXL memory module further includes a preset instruction interface configured to receive a Page lock (Page Pin) instruction sent by the host based on the CXL interface; and, the control chip is further configured to: responding to the page locking instruction, and keeping the data in the target memory page pointed by the page locking instruction in the memory chip so as to avoid exchanging the data in the target memory page into the flash memory; or, loading the data in the target memory page to the host memory.
In this embodiment, when the host CPU needs to access or is about to access the exchanged data, a Page Pin (Page Pin) instruction may be sent to the CXL memory module through a preset instruction interface, where the Page Pin may include a memory address of a target memory Page (i.e., a memory Page that needs to be locked (Pin)), so as to notify the CXL memory module that the target memory Page is about to be accessed, and a corresponding response is taken by the CXL memory module.
After receiving the page locking instruction, the control chip can analyze the memory address of the target memory page from the page locking instruction, and then can adopt two response modes according to a preset strategy: in this way, in the case that the target memory page has been swapped into the flash memory chip, the target memory page may be loaded from the flash memory chip to the memory chip first, and then the target memory page may be set to be non-swappable so as to avoid swapping data in the target memory page into the flash memory chip. The other is to load the data in the target memory page into the host memory, in this way, when the target memory page is swapped into the flash memory chip, the target memory page may be loaded into the memory chip first, and then loaded from the memory chip into the host memory.
In this embodiment, through a preset instruction interface constructed based on the CXL interface, the host may control data exchanged into the CXL memory module, and instruct the CXL memory module to hold the target memory page in the memory chip or load the target memory page into the host memory in advance, thereby contributing to improving the loading efficiency of the data exchanged from the host memory.
In some optional implementations of this embodiment, the control chip is configured to hold data in a target memory page pointed to by the page lock instruction in the memory chip, including: determining a target memory address of a target memory page based on the page locking instruction; searching a target memory address in the exchange information; and under the condition that the target memory address exists in the exchange information, loading the data in the flash page pointed by the flash address into the memory chip from the flash chip according to the flash address corresponding to the target memory address.
In this embodiment, the control chip may parse the page lock instruction to obtain the target memory address, and then find the target memory address in the exchange information, so as to determine the storage location of the target memory page. If the target memory address does not exist in the exchange information, the target memory page is not exchanged to the flash memory chip, and the control chip only needs to mark the target memory page as non-exchangeable; if the target memory address exists in the exchange information, the control chip can load corresponding data into the memory chip according to the flash memory address corresponding to the target memory address in the exchange information.
In this embodiment, the control chip may load the swapped target memory page from the flash memory chip into the memory chip, so that the host may more quickly load the target memory page into the host memory when the host accesses the target memory page.
In other optional implementations of this embodiment, the control chip is configured to load data in the target memory page into the host memory, including: determining a target memory address of a target memory page based on the page locking instruction; searching a target memory address in the exchange information; under the condition that the target memory address exists in the exchange information, according to the flash memory address corresponding to the target memory address, loading the data in the flash memory page pointed by the flash memory address into the memory chip from the flash memory chip, and loading the data into the host memory from the memory chip.
In this embodiment, after the control chip parses the page lock instruction to obtain the target memory address, the storage location of the target memory page may be determined by searching for the exchange information. If the target memory address does not exist in the exchange information, the target memory page is not exchanged to the flash memory chip, and at the moment, the control chip can directly load the data in the target memory page from the memory chip to the host memory; if the target memory address exists in the exchange information, the target memory page is indicated to be exchanged to the flash memory chip, and at this time, the control chip can load the target memory page from the flash memory chip to the memory chip according to the flash memory address corresponding to the target memory address, and then load the target memory page from the memory chip to the host memory.
In this embodiment, the control chip may load the target memory page exchanged into the flash memory chip into the memory chip, and then load the target memory page from the memory chip into the host memory, so as to preload the data pointed by the page locking instruction into the host memory, and when the host accesses the data, it is not necessary to read the data from the memory chip, so that the time delay of accessing the data by the host can be reduced.
Based on the CXL memory module in the foregoing embodiment, the present disclosure further provides a control chip, which is applied to the CXL memory module in the foregoing embodiment, as shown in fig. 3, and the CXL memory module further includes a plurality of memory chips 320 managed by the control chip 310, where the control chip includes a processor 311, and the processor 311 is configured to: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to a memory exchange instruction; the data in the first memory page is swapped to the memory chip 320.
In this embodiment, control chip 310 may include a CXL interface for interacting with a host, a DDR controller, and proprietary hardware; the DDR controller is used for managing the memory chip 320; the proprietary hardware may be, for example, an MMU by which the processor can control the process of storing data in the memory chip 320.
The control chip in this embodiment can respond to the memory exchange instruction sent by the host, and store the data exchanged in the host memory in the memory chip, so as to implement that the CXL memory module is used as the memory page exchange back end of the host, and can greatly improve the efficiency of memory page exchange between the host and the CXL memory module, thereby improving the utilization rate of the host memory.
In some embodiments, the CXL memory module further includes a flash memory chip; the processor is further configured to: determining a second memory page to be exchanged in the memory chip in response to the memory usage of the memory chip reaching a preset threshold; and exchanging the data in the second memory page to the flash memory chip, and recording exchange information of the data, wherein the exchange information comprises the memory address of the second memory page and the exchanged flash memory address.
In this embodiment, the control chip may perform secondary exchange of memory pages between the memory chip and the flash memory chip, which is conducive to improving the utilization rate of the memory pages, and further expanding the back-end space of the host memory page exchange.
In some embodiments, the CXL memory module further includes a preset instruction interface configured to receive a Page lock (Page Pin) instruction sent by the host based on the CXL interface; the processor is further configured to: responding to the page locking instruction, and keeping the data in the target memory page pointed by the page locking instruction in the memory chip so as to avoid exchanging the data in the target memory page into the flash memory; or, loading the data in the target memory page to the host memory.
In this embodiment, through a preset instruction interface constructed based on the CXL interface, the host may control data exchanged into the CXL memory module, and instruct the CXL memory module to hold the target memory page in the memory chip or load the target memory page into the host memory in advance, thereby contributing to improving the loading efficiency of the data exchanged from the host memory.
In some optional implementations of this embodiment, the processor is configured to hold data in a target memory page pointed to by the page lock instruction in the memory chip, including: determining a target memory address of a target memory page based on the page locking instruction; searching a target memory address in the exchange information; and under the condition that the target memory address exists in the exchange information, loading the data in the flash page pointed by the flash address into the memory chip from the flash chip according to the flash address corresponding to the target memory address.
In this embodiment, the control chip may load the swapped target memory page from the flash memory chip into the memory chip, so that the host may more quickly load the target memory page into the host memory when the host accesses the target memory page.
In some optional implementations of this embodiment, the processor is configured to load data in the target memory page into the host memory, comprising: determining a target memory address of a target memory page based on the page locking instruction; searching a target memory address in the exchange information; under the condition that the target memory address exists in the exchange information, according to the flash memory address corresponding to the target memory address, loading the data in the flash memory page pointed by the flash memory address into the memory chip from the flash memory chip, and loading the data into the host memory from the memory chip.
In this embodiment, the control chip may load the target memory page exchanged into the flash memory chip into the memory chip, and then load the target memory page from the memory chip into the host memory, so as to preload the data pointed by the page locking instruction into the host memory, and when the host accesses the data, it is not necessary to read the data from the memory chip, so that the time delay of accessing the data by the host can be reduced.
Referring now to fig. 4, fig. 4 is a flow chart illustrating one embodiment of a method of memory page swapping of the present disclosure, which may be performed by the CXL memory module in any of the embodiments described above or the control chip in any of the embodiments described above. As shown in fig. 4, the method includes the following steps.
Step 410, receiving a memory swap instruction sent by a host.
Step 420, determining a first memory page to be swapped in the host memory according to the memory swap instruction.
Step 430, exchanging data in the first memory page to the memory chip.
In this embodiment, the memory page exchange between the host and the CXL memory module may be implemented by determining the first memory page to be exchanged in the host memory according to the memory address in the memory exchange instruction, and then exchanging the data in the first memory page to the memory chip. The CXL memory module is used as the memory page exchange back end of the host, the excellent performance of the CXL memory module in the aspect of data communication can be utilized, the memory page exchange efficiency between the host and the CXL memory module is greatly improved, and therefore the utilization rate of the host memory is improved.
In some embodiments, the CXL memory module further includes a flash memory chip, and the process illustrated in fig. 4 may further include: step 440, the flash memory chip is used as a memory page swap back end of the memory chip to swap the data in the memory chip into the flash memory chip.
In this embodiment, memory page exchange may be performed between the memory chip and the flash memory chip, so as to exchange data in the memory chip into the flash memory chip, thereby releasing the storage space in the memory chip. Through the secondary exchange in the CXL memory module, the utilization rate of the memory chip can be improved, and the back-end space of the memory page exchange of the host is expanded.
In some alternative implementations of the present embodiment, the step 440 may further include the following steps.
Step 442, determining a second memory page to be swapped in the memory chip in response to the memory usage of the memory chip reaching a preset threshold.
Step 444, the data in the second memory page is exchanged to the flash memory chip, and the exchange information of the data is recorded.
The exchange information comprises a memory address of the second memory page and an exchanged flash memory address.
In this embodiment, when the usage rate of the memory chip is high, the data in the memory chip can be exchanged into the flash memory chip, and the usage rate of the memory chip can be improved through the secondary exchange inside the CXL memory module, and the back-end space of the host memory page exchange is expanded.
In some embodiments, the CXL memory module further includes a preset instruction interface configured to receive a Page lock (Page Pin) instruction sent by the host based on the CXL interface; and, the method may further comprise: responding to the page locking instruction, and keeping the data in the target memory page pointed by the page locking instruction in the memory chip so as to avoid exchanging the data in the target memory page into the flash memory; or, loading the data in the target memory page to the host memory.
In this embodiment, through a preset instruction interface constructed based on the CXL interface, the host may control data exchanged into the CXL memory module, and instruct the CXL memory module to hold the target memory page in the memory chip or load the target memory page into the host memory in advance, thereby contributing to improving the loading efficiency of the data exchanged from the host memory.
In some alternative implementations of the present embodiment, the holding of the data in the target memory page pointed to by the page lock instruction in the memory chip may include a flow shown in fig. 5, and the flow includes the following steps, as shown in fig. 5.
Step 510, determining a target memory address of the target memory page based on the page lock instruction.
Step 520, searching the target memory address in the exchange information.
Step 530, under the condition that the target memory address exists in the exchange information, loading the data in the flash page pointed by the flash address to the memory chip from the flash chip according to the flash address corresponding to the target memory address.
In this embodiment, the control chip may load the swapped target memory page from the flash memory chip into the memory chip, so that the host may more quickly load the target memory page into the host memory when the host accesses the target memory page.
In other alternative implementations of the present embodiment, loading the data in the target memory page into the host memory may include the flow shown in fig. 6, and the flow includes the following steps as shown in fig. 6.
Step 610, determining a target memory address of the target memory page based on the page lock instruction.
Step 620, searching the target memory address in the exchange information.
Step 630, in the case that the target memory address exists in the exchange information, according to the flash memory address corresponding to the target memory address, loading the data in the flash memory page pointed by the flash memory address from the flash memory chip to the memory chip, and then loading the data from the memory chip to the host memory.
In this embodiment, the control chip may load the target memory page exchanged into the flash memory chip into the memory chip, and then load the target memory page from the memory chip into the host memory, so as to preload the data pointed by the page locking instruction into the host memory, and when the host accesses the data, it is not necessary to read the data from the memory chip, so that the time delay of accessing the data by the host can be reduced.
The disclosed embodiments also provide a non-transitory computer storage medium storing a computer program which, when executed by a processor, implements the memory page swap method in the above embodiments.
The embodiment of the disclosure further provides a computer system, as shown in fig. 7, where the computer system includes a host 710 and the CXL memory module 720 in any of the foregoing embodiments, and the host 710 communicates with the CXL memory module 720 through a CXL interface, so as to implement discovery, configuration, and data transmission of the CXL memory module 720.
In this embodiment, when the memory space in the host 710 is insufficient, the data in the host 710 can be exchanged to the memory chip in the CXL memory module 720 by exchanging the memory pages with the CXL memory module 720, so that the excellent performance of the CXL memory module 720 in terms of data communication can be utilized, and the efficiency of exchanging the memory pages between the host 710 and the CXL memory module 720 can be greatly improved, thereby improving the utilization rate of the host memory.
In some optional implementations of this embodiment, the CXL memory module may further construct a preset instruction interface based on the CXL interface, where the host CPU sends a Page lock (Page Pin) instruction to the CXL memory module through the preset instruction interface, so as to instruct the CXL memory module to hold a memory Page to be locked (Pin) in the memory chip or preload the memory chip in the host memory, so that the host accesses data in the Page.
In some optional implementations of this embodiment, a Page Pin (Page Pin) instruction may also be defined between the host CPU and the host memory, where the host CPU may keep specific memory pages in the host memory that are not swapped into the CXL memory module, so that the host may more quickly obtain the data from the host memory when accessing the data in the memory pages.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Claims (15)
1. A CXL memory module comprises a control chip and a plurality of memory chips managed by the control chip, and is characterized in that,
the control chip is configured to: receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to the memory exchange instruction; and exchanging the data in the first memory page to the memory chip.
2. The CXL memory module of claim 1, further comprising a flash memory chip;
the control chip is configured to use the flash memory chip as a memory page swap back end of the memory chip to swap data in the memory chip into the flash memory chip.
3. The CXL memory module of claim 2, wherein the control chip swapping the flash memory chip as a memory page swap back-end of the memory chip to swap data in the memory chip into the flash memory chip comprises:
determining a second memory page to be exchanged in the memory chip in response to the memory usage of the memory chip reaching a preset threshold;
and exchanging the data in the second memory page to the flash memory chip, and recording exchange information of the data, wherein the exchange information comprises the memory address of the second memory page and the exchanged flash memory address.
4. The CXL memory module of claim 3, further comprising a preset instruction interface configured to receive a page lock instruction sent by the host based on the CXL interface; the method comprises the steps of,
the control chip is further configured to: responding to the page locking instruction, and keeping the data in the target memory page pointed by the page locking instruction in the memory chip so as not to exchange the data in the target memory page into the flash memory; or, loading the data in the target memory page to the host memory.
5. The CXL memory module of claim 4, wherein the control chip configured to maintain in the memory chip data in a target memory page pointed to by the page lock instruction, comprising:
determining a target memory address of the target memory page based on the page locking instruction;
searching the target memory address in the exchange information;
and under the condition that the target memory address exists in the exchange information, loading the data in the flash page pointed by the flash address to the memory chip from the flash chip according to the flash address corresponding to the target memory address.
6. The CXL memory module of claim 4, wherein the control chip configured to load the data in the target memory page to host memory comprises:
determining a target memory address of the target memory page based on the page locking instruction;
searching the target memory address in the exchange information;
and under the condition that the target memory address exists in the exchange information, according to the flash memory address corresponding to the target memory address, loading the data in the flash memory page pointed by the flash memory address into the memory chip from the flash memory chip, and loading the data into a host memory from the memory chip.
7. A method for exchanging memory pages, applied to the CXL memory module of any one of claims 1 to 6, the CXL memory module comprising a control chip and a plurality of memory chips managed by the control chip, the method comprising:
receiving a memory exchange instruction sent by a host; determining a first memory page to be exchanged in a host memory according to the memory exchange instruction; and exchanging the data in the first memory page to the memory chip.
8. The method of claim 7, wherein the CXL memory module further comprises a flash memory chip;
the method further comprises the steps of: and taking the flash memory chip as a memory page exchange back end of the memory chip so as to exchange data in the memory chip into the flash memory chip.
9. The method of claim 8, wherein using the flash memory chip as a memory page swap back-end for the memory chip comprises:
determining a second memory page to be exchanged in the memory chip in response to the memory usage of the memory chip reaching a preset threshold;
and exchanging the data in the second memory page to the flash memory chip, and recording exchange information of the data, wherein the exchange information comprises the memory address of the second memory page and the exchanged flash memory address.
10. The method of claim 9, wherein the CXL memory module further comprises a preset instruction interface configured to receive a page lock instruction sent by the host based on the CXL interface; the method comprises the steps of,
the method further comprises the steps of: responding to the page locking instruction, and keeping the data in the target memory page pointed by the page locking instruction in the memory chip so as not to exchange the data in the target memory page into the flash memory; or, loading the data in the target memory page to the host memory.
11. The method of claim 10, wherein maintaining data in the target memory page pointed to by the page lock instruction in the memory chip comprises:
determining a target memory address of the target memory page based on the page locking instruction;
searching the target memory address in the exchange information;
and under the condition that the target memory address exists in the exchange information, loading the data in the flash page pointed by the flash address to the memory chip from the flash chip according to the flash address corresponding to the target memory address.
12. The method of claim 10, wherein loading the data in the target memory page into host memory comprises:
determining a target memory address of the target memory page based on the page locking instruction;
searching the target memory address in the exchange information;
and under the condition that the target memory address exists in the exchange information, according to the flash memory address corresponding to the target memory address, loading the data in the flash memory page pointed by the flash memory address into the memory chip from the flash memory chip, and loading the data into a host memory from the memory chip.
13. A control chip for a CXL memory module, the CXL memory module further comprising a plurality of memory chips managed by the control chip, wherein the processor of the control chip is configured to perform the method of memory page swapping of any one of claims 7 to 12.
14. A non-transitory computer storage medium storing a computer program, wherein the computer program when executed by a processor implements the method of memory page swapping of any one of claims 7 to 12.
15. A computer system comprising a host and the CXL memory module of any one of claims 1 to 6, the host communicating with the CXL memory module via a CXL interface to effect discovery, configuration, and data transfer to the CXL memory module, wherein the CXL memory module performs a memory page swap with a memory of the host as a memory swap page back end.
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