CN117713198A - Grid-connected inverter control core module and photovoltaic power conversion cabinet - Google Patents
Grid-connected inverter control core module and photovoltaic power conversion cabinet Download PDFInfo
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- 239000003990 capacitor Substances 0.000 claims description 163
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- 210000000352 storage cell Anatomy 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000007431 microscopic evaluation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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Abstract
The invention provides a grid-connected inverter control core module and a photovoltaic power conversion cabinet. The electric brake control device is respectively connected with the energy storage battery charger and the N single-bin chargers. Each single bin charger charges a battery. The output end of the energy storage battery charger is connected with one end of the energy storage battery pack, the other end of the energy storage battery pack is connected with the input end of the grid-connected inverter control core module, and the output end of the grid-connected inverter control core module is connected with the electric brake control device. After the solar panel converts solar energy into electric energy, the electric energy is stored in an energy storage battery pack, and the electric energy is used for counteracting the standby power consumption of the battery changing cabinet. And on the other hand, redundant electric energy is sent to a power grid through a grid-connected inverter control core module, so that extra electric charge brought by self standby power consumption of the power conversion cabinet is reduced, and power generation benefits are generated.
Description
Technical Field
The invention relates to the technical field of power conversion cabinets, in particular to a grid-connected inverter control core module and a photovoltaic power conversion cabinet.
Background
The battery changing cabinet is also called as a shared battery changing cabinet, a shared battery cabinet, a battery changing station and the like, and is a cabinet capable of storing batteries of electric vehicles and automatically charging. As the name implies, the battery replacement device is used for replacing batteries, and meets the battery renting requirements of people.
Most of the existing power change cabinets are powered by mains supply and then charge batteries, and the existing power change cabinets have less solar panel power generation function. The existing mains supply power conversion cabinet can have certain standby power consumption in work and can consume a lot of electric energy in daily accumulation and month. The reason that the power conversion cabinet with the solar panel power generation function is less common is that the research and development of matched products has a certain technical difficulty and the research and development period is long. In order to solve the energy loss caused by the supply of the commercial power, the existing power conversion cabinet needs to be improved, and the power conversion cabinet with the power generation function of the solar panel compatible with the commercial power is developed.
Disclosure of Invention
The invention aims to provide a grid-connected inverter control core module and a photovoltaic power conversion cabinet, which can solve the problem of energy waste caused by large standby power consumption of the power conversion cabinet which is powered by only mains supply in the prior art.
The aim of the invention is realized by the following technical scheme:
In one aspect, the invention provides a grid-connected inverter control core module, which comprises an isolated push-pull circuit, a single-phase-locked loop circuit, an EMI filter circuit, an MCU signal conditioning circuit and a push-pull inverter waveform generating circuit; the first input end of the isolation push-pull circuit inputs direct-current voltage provided by the solar panel, and the direct-current voltage is boosted into pulsating high-voltage direct-current voltage and then is sent to the single-phase-locked loop circuit from the output end; the single-phase-locked loop circuit tracks the voltage phase of the power grid, synchronizes the pulsating high-voltage direct-current voltage into alternating-current voltage with the same voltage phase of the power grid and outputs the alternating-current voltage to the EMI filter circuit; the EMI filter circuit filters the alternating current and then is integrated into a power grid; the MCU signal conditioning circuit collects the voltage and the frequency of a power grid, samples the voltage and the current output by the solar panel, and outputs a first driving signal to the push-pull inverter waveform generation circuit; the push-pull inverter waveform generating circuit outputs a second driving signal to a second input end of the isolation push-pull circuit according to the first driving signal, and controls a pulsating high-voltage direct-current voltage value output by the isolation push-pull circuit.
Further, the isolated push-pull circuit comprises a resistor R19, a resistor R34, a resistor R27, a resistor R18, a resistor R35, a resistor R26, a sampling resistor Rsense, a capacitor C17, a capacitor C16, a capacitor C9, a MOS tube MOS6, a MOS tube MOS7, a fuse F102, a transformer T1, a common anode diode D1, a common cathode diode D2, an inductor L1 and a capacitor C1; one end of the fuse F102 is connected with the anode of the solar panel, and the other end of the fuse F is connected with the middle tap of the primary winding of the transformer T1; one end of the sampling resistor Rsense is connected with the negative electrode of the solar panel, and the other end of the sampling resistor Rsense is grounded; the capacitor C9 is connected between the middle tap of the primary winding of the transformer T1 and the ground; the second driving signal includes a driving signal OUTA and a driving signal OUTB; the driving signal OUTB is input from one end of a resistor R34 and one end of a resistor R19, the other end of the resistor R34 is connected with the grid electrode of the MOS tube MOS6, and the other end of the resistor R19 is connected with the source electrode of the MOS tube MOS6 and the ground; the drain electrode of the MOS tube MOS6 is connected with one end of a primary winding of the transformer T1; the resistor R27 and the capacitor C17 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 6; the driving signal OUTA is input from one end of a resistor R35 and one end of a resistor R18, the other end of the resistor R35 is connected with the grid electrode of the MOS tube MOS7, and the other end of the resistor R18 is connected with the source electrode of the MOS tube MOS7 and the ground; the drain electrode of the MOS tube MOS7 is connected with the other end of the primary winding of the transformer T1; the resistor R26 and the capacitor C16 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 7; one end of the secondary winding of the transformer T1 is connected with one cathode of the common anode diode D1 and one anode of the common cathode diode D2, and the other end of the secondary winding of the transformer T1 is connected with the other cathode of the common anode diode D1 and the other anode of the common cathode diode D2; the cathode of the common cathode diode D2 is connected with one end of an inductor L1, and a capacitor C1 is connected between the other end of the inductor L1 and the anode of the common anode diode D1; the two ends of the capacitor C1 are used as the output ends of the isolated push-pull circuit.
Further, the single-phase-locked loop circuit includes a MOS transistor MOS1, a MOS transistor MOS2, a MOS transistor MOS3, a MOS transistor MOS4, a resistor R2, a zener diode Z3, a resistor R4, a resistor R8, a resistor R14, a varistor MOV1, a diode D11, a resistor R3, a zener diode Z4, a resistor R5, a resistor R9, a resistor R15, a diode D12, a zener diode Z1, a triode Q1, a capacitor C5, a diode D9, a capacitor C7, a resistor R6, a resistor R10, a resistor R11, a diode D15, a diode D13, a resistor R16, a resistor R17, a zener diode Z2, a triode Q2, a capacitor C6, a diode D10, a capacitor C8, a resistor R7, a resistor R12, a resistor R13, a diode D16, and a diode D14;
the source electrode of the MOS tube MOS1 and the source electrode of the MOS tube MOS2 are used as the input negative terminal of the single-phase-locked loop circuit, and the drain electrode of the MOS tube MOS3 and the drain electrode of the MOS tube MOS4 are used as the input positive terminal of the single-phase-locked loop circuit;
the drain electrode of the MOS tube MOS1 is connected with one output end of the single-phase-locked loop circuit, and the grid electrode is respectively connected with one end of the resistor R2, the cathode of the zener diode Z3 and one end of the resistor R4; the other end of the resistor R2 and the anode of the voltage stabilizing diode Z3 are connected with the source electrode of the MOS tube MOS 1; the other end of the resistor R4 is connected with one end of the resistor R8 and the anode of the diode D11; the other end of the resistor R8 is connected with one end of the resistor R14; the other end of the resistor R14 is respectively connected with one end of the piezoresistor MOV1 and the other output end of the single-phase-locked loop circuit;
The drain electrode of the MOS tube MOS2 is connected with the other output end of the single-phase-locked loop circuit, and the grid electrode is respectively connected with one end of the resistor R3, the cathode of the zener diode Z4 and one end of the resistor R5; the other end of the resistor R3 and the anode of the voltage stabilizing diode Z4 are connected with the source electrode of the MOS tube MOS 2; the other end of the resistor R5 is connected with one end of the resistor R9 and the anode of the diode D12; the other end of the resistor R9 is connected with one end of the resistor R15; the other end of the resistor R15 is connected with one output end of the single-phase-locked loop circuit;
the grid electrode of the MOS tube MOS3 is respectively connected with the cathode of the zener diode Z1, the collector of the triode Q1, one end of the resistor R6 and one end of the resistor R10; the anode of the voltage stabilizing diode Z1, the emitter of the triode Q1, one end of the capacitor C5, the anode of the diode D9 and one end of the capacitor C7 are connected with the source electrode of the MOS tube MOS3 and the other output end of the single-phase-locked loop circuit; the base electrode of the triode Q1 is respectively connected with the other end of the resistor R6, one end of the resistor R11, the other end of the capacitor C5, the cathode of the diode D9 and the anode of the diode D13; the other end of the resistor R10 is respectively connected with the other end of the resistor R11, the cathode of the diode D15 and the other end of the capacitor C7; the anode of the diode D15 and the cathode of the diode D13 are connected with one end of a resistor R16; the other end of the resistor R16 is connected with one end of the resistor R17;
The grid electrode of the MOS tube MOS4 is respectively connected with the cathode of the zener diode Z2, the collector of the triode Q2, one end of the resistor R7 and one end of the resistor R12; the anode of the voltage stabilizing diode Z2, the emitter of the triode Q2, one end of the capacitor C6, the anode of the diode D10 and one end of the capacitor C8 are connected with the source electrode of the MOS tube MOS4 and one output end of the single-phase-locked loop circuit; the base electrode of the triode Q2 is respectively connected with the other end of the resistor R7, one end of the resistor R13, the other end of the capacitor C6, the cathode of the diode D10 and the anode of the diode D14; the other end of the resistor R12 is respectively connected with the other end of the resistor R13, the cathode of the diode D16 and the other end of the capacitor C8; the anode of the diode D16 and the cathode of the diode D14 are connected to the other end of the resistor R17.
Further, the EMI filter circuit includes an inductor L4, a common mode coil L3, a varistor MOV2, a fuse F2, and a capacitor C14; one end of the inductor L4 is used as one input end of the EMI filter circuit, the other end of the inductor L4 is connected with one end of one side of the common-mode coil L3, and the other end of one side of the common-mode coil L3 is connected with one end of the capacitor C14 and one end of the piezoresistor MOV2 and is used as one output end of the EMI filter circuit; one end of the other side of the common mode coil L3 is used as the other input end of the EMI filter circuit, and the other end of the other side of the common mode coil L3 is connected with the other end of the piezoresistor MOV2 and one end of the fuse F2; the other end of the fuse F2 is connected to the other end of the capacitor C14 and serves as the other output terminal of the EMI filter circuit.
Further, the MCU signal conditioning circuit comprises an MCU main control circuit, a power grid voltage frequency sampling circuit, a solar panel generation power control circuit and a temperature control circuit; the MCU master control circuit comprises a control chip U4; the power grid voltage frequency sampling circuit samples the voltage and frequency of the power grid and feeds the voltage and frequency back to the MCU main control circuit; the solar panel power generation power control circuit samples the voltage and the current of the solar panel and feeds the voltage and the current back to the MCU main control circuit, and the MCU main control circuit controls the solar panel power generation power control circuit to output a first driving signal to the push-pull inversion waveform generation circuit according to the voltage and the frequency of the power grid and the voltage and the current of the solar panel; the temperature control circuit samples the temperature of the grid-connected inverter control core module, and when the temperature is greater than a set threshold value, the MCU main control circuit controls the temperature control circuit to start the fan so as to radiate heat of the grid-connected inverter control core module.
Further, the grid voltage frequency sampling circuit comprises an optocoupler U1, a capacitor C24, a resistor R53, a resistor R54, a triode Q3, a resistor R56, a capacitor C27, a resistor R43, a resistor R44, a resistor R45, a resistor R47, a resistor R48, a resistor R49, a resistor R51, a resistor R46, a resistor R50, a resistor R52, a resistor R55, a capacitor C26 and an operational amplifier U2A; the cathode of the optical coupler U1 and one end of the resistor R46 are connected with N lines of a power grid, and one end of the resistor R44 and one end of the resistor R45 are connected with L lines of the power grid; the resistor R44 and the resistor R43 are connected in series and then connected with the anode of the optical coupler U1; the emitter of the optical coupler U1 is connected with one end of the capacitor C24 and the ground; the collector electrode of the optical coupler U1 is connected with one end of a resistor R53 and one end of a resistor R54; the other end of the resistor R53 and the other end of the capacitor C24 are connected with a direct current supply voltage; the other end of the resistor R54 is connected with the base electrode of the triode Q3, the emitter electrode of the triode Q3 is grounded, and the collector electrode of the triode Q3 is connected with one end of the resistor R56 and one end of the capacitor C27 and is used as a power grid frequency sampling output to be connected with a power grid frequency sampling input pin of the control chip U4; the other end of the resistor R56 is connected with a direct current power supply voltage; the other end of the capacitor C27 is grounded; the resistor R45 is connected with the resistor R47, the resistor R49 and the resistor R51 in series and then grounded; one end of the resistor R48 is connected with a direct current supply voltage, and the other end is connected with a series node of the resistor R49 and the resistor R51; the other end of the resistor R48 is also connected with the non-inverting input end of the operational amplifier U2A; the resistor R46, the resistor R50 and the resistor R52 are connected in series and then are connected with the inverting input end of the operational amplifier U2A; the resistor R55 and the capacitor C26 are connected in parallel and then are connected between the non-inverting input end and the output end of the operational amplifier U2A; the output end of the operational amplifier U2A is used as a power grid voltage sampling output and connected with a power grid voltage sampling input pin of the control chip U4.
Further, the solar panel generated power control circuit includes a resistor R63, a resistor R64, a resistor R66, a resistor R67, a resistor R68, a capacitor C32, a capacitor C36, a diode D18, an operational amplifier U6A, a capacitor C29, a resistor R65, a capacitor C33, a capacitor C42, a resistor R74, a capacitor C48, an operational amplifier U6B, a resistor R83, a resistor R84, a resistor R85, a resistor R87, and a variable resistor VR1; one end of the resistor R63 is connected with an analog voltage output pin of the control chip U4, and the other end of the resistor R64 is connected with the non-inverting input end of the operational amplifier U6A in series; the capacitor C32 is connected between the other end of the resistor R63 and ground; the inverting input end of the operational amplifier U6A is connected with the output end, and the output end is connected with the resistor R65 in series and then outputs a control signal A; the capacitor C33 is connected between the output end of the operational amplifier U6A and the ground; one end of the resistor R67 is connected with the anode of the solar panel, and the other end of the resistor R66 is connected with the solar output voltage detection pin of the control chip U4 in series; the capacitor C36 and the resistor R68 are connected in parallel and then connected between the solar output voltage detection pin of the control chip U4 and the ground; the anode of the diode D18 is connected with a solar output voltage detection pin of the control chip U4, and the cathode is connected with a direct current supply voltage; the negative electrode of the solar panel is connected with the non-inverting input end of the operational amplifier U6B through a resistor R74; the capacitor C48 is connected between the non-inverting input end of the operational amplifier U6B and the ground; a capacitor C42 is connected between the inverting input end and the output end of the operational amplifier U6B; the inverting input end of the operational amplifier U6B is connected with the fixed end of the variable resistor VR1, one end of the resistor R83 and one end of the resistor R84; the other end of the resistor R83 is grounded, and the resistor R84 is connected with the variable end of the variable resistor VR1 and the output end of the operational amplifier U6B after being connected with the resistor R85 in series; the output end of the operational amplifier U6B outputs a control signal B; the output end of the operational amplifier U6B is connected with a resistor R87 in series and then is connected with a solar output current detection pin of the control chip U4; the control signal a and the control signal B are first driving signals.
Further, the temperature control circuit comprises a temperature sensor connecting terminal, a fan connecting terminal, a resistor R86, a resistor R88, a capacitor CE2, a capacitor C51, a diode D17, a triode Q4 and a resistor R57; the 2 nd pin of the temperature sensor connecting terminal is connected with an external temperature sensor; one end of the resistor R86 is connected with the 2 nd pin of the temperature sensor connecting terminal, and the other end of the resistor R86 is connected with the temperature reading pin of the control chip U4; the 1 st pin of the temperature sensor connecting terminal inputs a direct current power supply voltage, and the capacitor CE2 is connected between the 1 st pin of the temperature sensor connecting terminal and the ground; one end of the resistor R86 is connected with one end of the resistor R88 and one end of the capacitor C51, and the other end of the resistor R88 is connected with the other end of the capacitor C51; the 1 st pin of the fan wiring terminal inputs another direct current power supply voltage; the positive electrode of the diode D17 is connected with the 2 nd pin of the fan wiring terminal, and the negative electrode is connected with the 1 st pin of the fan wiring terminal; the collector of the triode Q4 is connected with the 2 nd pin of the fan wiring terminal, the emitter is grounded, and the base is connected with the control fan pin of the control chip U4 in series with the resistor R57.
Further, the push-pull inversion waveform generation circuit comprises a control chip U5, a capacitor C40, a resistor R77, a three-pin diode pole tube Q5, a resistor R76, a resistor R81, a resistor R82, a triode Q6, a resistor R72, a resistor R75, a resistor R69, a resistor R78 and a control chip U7; one end of the capacitor C40 and the cathode of the three-pin diode Q5 are connected with an oscillation timing capacitor access pin CT of the control chip U5; the other end of the capacitor C40 is grounded, and the anode of the three-pin diode Q5 is connected with one end of the resistor R76 and the base electrode of the triode Q6; the collector of the triode Q6 and the other end of the resistor R76 are connected with reference voltage; the emitter of the triode Q6 is connected with a resistor R81 and a resistor R82 in series and then is connected with the ground; the series node of the resistor R81 and the resistor R82 is connected with a positive input pin C/S+ of a current detection comparator of the control chip U5; the oscillation timing resistor of the control chip U5 is connected with a pin RT, a resistor R77 and then grounded; the output pin A OUT of the control chip U5 is connected with the input pin INB of the control chip U7 after being connected with the resistor R75 in series, and the resistor R78 is connected between the input pin INB of the control chip U7 and the ground; the output two pins BOUT of the control chip U5 are connected with the input two pins INA of the control chip U7 after being connected with the resistor R72 in series, and the resistor R69 is connected between the input two pins INA of the control chip U7 and the ground; the output one pin OUTA and the output two pin OUTB of the control chip U7 respectively output a driving signal OUTA and a driving signal OUTB; the driving signal OUTA and the driving signal OUTB are second driving signals.
The invention provides a photovoltaic power conversion cabinet, which comprises a switch control device, N single-bin chargers connected in parallel, and is characterized by further comprising an energy storage battery charger, an energy storage battery pack and the grid-connected inverter control core module; the electric brake control device is respectively connected with the energy storage battery charger and the N single-bin chargers; each single-bin charger charges a battery; the output end of the energy storage battery charger is connected with one end of the energy storage battery pack, the other end of the energy storage battery pack is connected with the input end of the grid-connected inverter control core module, and the output end of the grid-connected inverter control core module is connected with the electric brake control device.
The grid-connected inverter control core module and the photovoltaic power conversion cabinet provided by the invention are provided with the following compared with the existing power conversion cabinet
The beneficial effects are that:
from macroscopic analysis, the solar grid-connected power generation device is arranged on the common power conversion cabinet, and the solar grid-connected power generation device has certain social and economic values. Because the electricity changing cabinets are mostly installed outdoors, solar energy is easy to obtain, after a plurality of electricity changing cabinets are connected in a grid mode to generate electricity, the generated power is large, and the power grid pressure in the electricity consumption peak period can be compensated to a certain extent.
From microscopic analysis, the solar grid-connected power generation device is installed, and electricity generated in the daytime is used for counteracting the standby power consumption of the power conversion cabinet on one hand, and redundant electric energy is forwarded to a power grid or stored to a battery according to the need on the other hand, so that extra electricity charge brought by the standby power consumption of the power conversion cabinet is reduced, the electricity consumption cost of a merchant is reduced, and extra power generation benefits can be generated.
In conclusion, the photovoltaic power conversion cabinet with the grid-connected inverter can save energy and reduce emission, and can flexibly adjust the power utilization mode of the power conversion cabinet in peak-to-valley time periods, so that the social value of the power conversion cabinet and the income of merchants are improved.
Drawings
FIG. 1 is a circuit block diagram of a grid-connected inverter control core module of the present invention;
FIG. 2 is a schematic circuit diagram of an isolated push-pull circuit of the present invention;
fig. 3 is a schematic circuit diagram of a single phase locked loop circuit of the present invention;
FIG. 4 is a schematic circuit diagram of an EMI filter circuit of the present invention;
FIG. 5 is a schematic diagram of a control chip U4 according to the present invention;
FIG. 6 is a schematic circuit diagram of a grid voltage frequency sampling circuit of the present invention;
FIG. 7 is a schematic circuit diagram of a solar panel generated power control circuit of the present invention;
FIG. 8 is a schematic circuit diagram of a temperature control circuit of the present invention;
Fig. 9 is a circuit schematic of a push-pull inversion waveform generation circuit of the present invention;
fig. 10 is a circuit block diagram of the photovoltaic charging cabinet of the present invention.
Detailed Description
Embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present disclosure will become readily apparent to those skilled in the art from the following disclosure, which describes embodiments of the present disclosure by way of specific examples. It will be apparent that the described embodiments are merely some, but not all embodiments of the present disclosure. The disclosure may be embodied or practiced in other different specific embodiments, and details within the subject specification may be modified or changed from various points of view and applications without departing from the spirit of the disclosure. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.
The invention discloses a grid-connected inverter control core module, which is shown in figure 1 and comprises an isolated push-pull circuit, a single-phase-locked loop circuit, an EMI filter circuit, an MCU signal conditioning circuit and a push-pull inverter waveform generation circuit. The first input end of the isolation push-pull circuit inputs direct-current voltage provided by the solar panel, and the direct-current voltage is boosted into pulsating high-voltage direct-current voltage and then is sent to the single-phase-locked loop circuit from the output end. The single-phase-locked loop circuit tracks the voltage phase of the power grid, synchronizes the pulsating high-voltage direct-current voltage into alternating-current voltage with the same voltage phase of the power grid and outputs the alternating-current voltage to the EMI filter circuit. The EMI filter circuit filters the alternating current and then is integrated into the power grid. The MCU signal conditioning circuit collects the voltage and the frequency of a power grid, samples the voltage and the current output by the solar panel, and outputs a first driving signal to the push-pull inverter waveform generation circuit. The push-pull inverter waveform generation circuit outputs a second driving signal to a second input end of the isolation push-pull circuit according to the first driving signal, and controls the pulsating high-voltage direct-current voltage output by the isolation push-pull circuit.
As a preferred embodiment of the present invention, a schematic circuit diagram of the isolated push-pull circuit is shown in fig. 2, and includes a resistor R19, a resistor R34, a resistor R27, a resistor R18, a resistor R35, a resistor R26, a sampling resistor Rsense, a capacitor C17, a capacitor C16, a capacitor C9, a MOS transistor MOS6, a MOS transistor MOS7, a fuse F102, a transformer T1, a common anode diode D1, a common cathode diode D2, an inductor L1, and a capacitor C1. One end of the fuse F102 is connected with the positive pole PV+1 of the solar panel, and the other end is connected with the middle tap of the primary winding of the transformer T1. One end of the sampling resistor Rsense is connected with the negative pole PV-1 of the solar panel, and the other end of the sampling resistor Rsense is grounded. Capacitor C9 is connected between the center tap of the primary winding of transformer T1 and ground. The second driving signal includes a driving signal OUTA and a driving signal OUTB. The driving signal OUTB is input from one end of a resistor R34 and one end of a resistor R19, the other end of the resistor R34 is connected with the gate of the MOS transistor MOS6, and the other end of the resistor R19 is connected with the source of the MOS transistor MOS6 and the ground. The drain electrode of the MOS tube MOS6 is connected with one end of the primary winding of the transformer T1. The resistor R27 and the capacitor C17 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 6. The driving signal OUTA is input from one end of the resistor R35 and one end of the resistor R18, the other end of the resistor R35 is connected to the gate of the MOS transistor MOS7, and the other end of the resistor R18 is connected to the source of the MOS transistor MOS7 and the ground. The drain electrode of the MOS tube MOS7 is connected with the other end of the primary winding of the transformer T1. The resistor R26 and the capacitor C16 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 7. One end of the secondary winding of the transformer T1 is connected with one cathode of the common anode diode D1 and one anode of the common cathode diode D2, and the other end of the secondary winding of the transformer T1 is connected with the other cathode of the common anode diode D1 and the other anode of the common cathode diode D2. The cathode of the common cathode diode D2 is connected with one end of an inductor L1, and a capacitor C1 is connected between the other end of the inductor L1 and the anode of the common anode diode D1. The two ends of the capacitor C1 are used as the output ends of the isolated push-pull circuit.
The isolated push-pull circuit is responsible for boosting the direct 60V voltage of the solar panel to a pulsating 220V voltage. The common anode diode D1 and the common cathode diode D2 constitute a rectifier bridge. The upper half period is controlled by the output of the driving signal OUTA, and the lower half period is controlled by the output of the driving signal OUTB, and finally the complete periodic waveform is formed. PV+1 connects the positive pole of the solar energy board, PV-1 connects the negative pole of the solar energy board, when the driving signal OUTA is high level, the positive half cycle of the transformer T1 is conducted, the energy outputs the pulsating high-voltage direct current from the rectifier bridge of the secondary side; similarly, when the driving signal OUTB is at a high level, the negative half cycle of the transformer T1 is turned on, and the energy also outputs pulsating high-voltage direct current from the rectifier bridge at the secondary side.
As a preferred embodiment of the present invention, a schematic circuit diagram of the single-phase-locked loop circuit is shown in fig. 3, and the circuit diagram includes a MOS transistor MOS1, a MOS transistor MOS2, a MOS transistor MOS3, a MOS transistor MOS4, a resistor R2, a zener diode Z3, a resistor R4, a resistor R8, a resistor R14, a varistor MOV1, a diode D11, a resistor R3, a zener diode Z4, a resistor R5, a resistor R9, a resistor R15, a diode D12, a zener diode Z1, a transistor Q1, a capacitor C5, a diode D9, a capacitor C7, a resistor R6, a resistor R10, a resistor R11, a diode D15, a diode D13, a resistor R16, a resistor R17, a zener diode Z2, a triode Q2, a capacitor C6, a diode D10, a capacitor C8, a resistor R7, a resistor R12, a resistor R13, a diode D16, and a diode D14.
The source electrode of the MOS tube MOS1 and the source electrode of the MOS tube MOS2 are used as the input negative terminal of the single-phase-locked loop circuit, and the drain electrode of the MOS tube MOS3 and the drain electrode of the MOS tube MOS4 are used as the input positive terminal of the single-phase-locked loop circuit.
The drain electrode of the MOS tube MOS1 is connected with one output end of the single-phase-locked loop circuit. The grid electrode of the MOS tube MOS1 is respectively connected with one end of a resistor R2, the cathode of a zener diode Z3 and one end of a resistor R4. The other end of the resistor R2 and the anode of the zener diode Z3 are connected with the source electrode of the MOS tube MOS 1. The other end of the resistor R4 is connected to one end of the resistor R8 and the anode of the diode D11. The other end of the resistor R8 is connected to one end of the resistor R14. The other end of the resistor R14 is respectively connected with one end of the piezoresistor MOV1 and the other output end of the single-phase-locked loop circuit.
The drain electrode of the MOS tube MOS2 is connected with the other output end of the single-phase-locked loop circuit. The grid electrode of the MOS tube MOS2 is respectively connected with one end of a resistor R3, the cathode of a zener diode Z4 and one end of a resistor R5. The other end of the resistor R3 and the anode of the zener diode Z4 are connected with the source electrode of the MOS tube MOS 2. The other end of the resistor R5 is connected to one end of the resistor R9 and the anode of the diode D12. The other end of the resistor R9 is connected to one end of the resistor R15. The other end of the resistor R15 is connected with one output end of the single-phase-locked loop circuit.
The grid electrode of the MOS tube MOS3 is respectively connected with the cathode of the zener diode Z1, the collector of the triode Q1, one end of the resistor R6 and one end of the resistor R10. The anode of the voltage stabilizing diode Z1, the emitter of the triode Q1, one end of the capacitor C5, the anode of the diode D9 and one end of the capacitor C7 are connected with the source electrode of the MOS tube MOS3 and the other output end of the single-phase-locked loop circuit. The base of the triode Q1 is respectively connected with the other end of the resistor R6, one end of the resistor R11, the other end of the capacitor C5, the cathode of the diode D9 and the anode of the diode D13. The other end of the resistor R10 is respectively connected with the other end of the resistor R11, the cathode of the diode D15 and the other end of the capacitor C7. The anode of the diode D15 and the cathode of the diode D13 are connected to one end of the resistor R16. The other end of the resistor R16 is connected to one end of the resistor R17.
The grid electrode of the MOS tube MOS4 is respectively connected with the cathode of the zener diode Z2, the collector of the triode Q2, one end of the resistor R7 and one end of the resistor R12; the anode of the voltage stabilizing diode Z2, the emitter of the triode Q2, one end of the capacitor C6, the anode of the diode D10 and one end of the capacitor C8 are connected with the source electrode of the MOS tube MOS4 and one output end of the single-phase-locked loop circuit; the base electrode of the triode Q2 is respectively connected with the other end of the resistor R7, one end of the resistor R13, the other end of the capacitor C6, the cathode of the diode D10 and the anode of the diode D14; the other end of the resistor R12 is respectively connected with the other end of the resistor R13, the cathode of the diode D16 and the other end of the capacitor C8; the anode of the diode D16 and the cathode of the diode D14 are connected to the other end of the resistor R17.
The single-phase-locked loop circuit has the function of tracking the voltage phase of the power grid and synchronously outputting the high-voltage direct current boosted by the solar panel. Two pins 1 and 2 of the terminal CN2 are connected to negative and positive of the high-voltage direct-current voltage output by the isolated push-pull circuit, pins 4 and 5 of the terminal AC1 are connected to serve as one output end of the single-phase-locked loop circuit, and pins 1 and 2 are connected to serve as the other output end of the single-phase-locked loop circuit. The sine wave after being connected into the power grid sequentially gates the MOS transistors MOS1 and MOS3, MOS2 and MOS4 every half period, so that the energy of the solar panel is output to the AC1 interface, and the function of grid-connected output is realized.
The working principle is as follows:
when the AC1 is in the positive half cycle, from the leftmost side, current flows through the resistor R14, the resistor R8, the resistor R4 and the resistor R2 in sequence and also flows to the grid electrode of the MOS tube MOS1, so that the MOS tube MOS1 is in an on state. Meanwhile, the current also flows through the diode D9, the capacitor C5, the diode D13, the resistor R16, the resistor R17 and the diode D16 in sequence, at this time, the circuit is divided into two branches, and the branch a is: the current flows through resistor R13 and resistor R12, resistor R12 and resistor R7 are then combined to the base of transistor Q2, transistor Q2 is turned on, and finally the current returns to pins 5 and 4 of terminal AC 1. At this time, the GS voltage of the MOS transistor MOS4 is the collection-emission voltage of Q2, and the voltage is smaller, so that the MOS transistor MOS4 is in the off state; the branch b is: through capacitor C8 back to the other end of terminal AC1 (pins 4 and 5).
Similarly, when the AC1 is in the negative half cycle, current flows through the resistor R15, the resistor R9, the resistor R5 and the resistor R3 in sequence and also flows to the grid electrode of the MOS tube MOS2, so that the MOS tube MOS2 is in an on state; meanwhile, the current also flows through the diode D10, the capacitor C6, the diode D14, the resistor R17, the resistor R16 and the diode D15 in sequence, at this time, the circuit is divided into two branches, and the branch a is: the current flows through the resistor R11 and the resistor R10, the resistor R10 and the resistor R6 are converged to the base electrode of the triode Q1, the triode Q1 is turned on, and finally the current returns to the other end (pins 1 and 2) of the AC1, at the moment, the GS voltage of the MOS tube MOS3 is the collecting voltage of the Q1, and the voltage is smaller, so that the MOS tube MOS3 is in a closed state; the branch b is: returns to the other end of AC1 (pins 1 and 2) through capacitor C7. After 2 periods, when the MOS transistor MOS1 and the MOS transistor MOS3 are turned on, the MOS transistor MOS2 and the MOS transistor MOS4 are turned off, and the other period is reversed.
Therefore, during the positive half cycle, the MOS transistor MOS1 and the MOS transistor MOS3 are turned on, the high voltage dc+ of the 2 nd pin of the terminal CN2 flows to the source S through the drain D of the MOS transistor MOS3 and then flows to the 1 st and 2 nd pins of the terminal AC1, flows into the 4 th and 5 th pins of the terminal AC1 through the external load, flows to the drain D of the MOS transistor MOS1, and finally returns to the high voltage dc-of the 1 st pin of the terminal CN2 from the source S of the MOS transistor MOS1, thereby completing the output of half cycle solar energy to the power grid. Similarly, in the other half cycle, the MOS tube MOS2 and the MOS tube MOS4 are turned on, high-voltage direct current+ flows to the source electrode S through the drain electrode D of the MOS tube MOS4 and then flows to pins 4 and 5 of the terminal AC1, flows to pins 1 and 2 of the terminal AC1 through an external load, flows to the drain electrode D of the MOS tube MOS2, finally returns to the high-voltage direct current+ from the source electrode S of the MOS tube MOS2, and the solar energy of the other half cycle is output to a power grid.
As a preferred embodiment of the present invention, the schematic diagram of the EMI filter circuit is shown in fig. 4, and includes an inductor L4, a common mode coil L3, a varistor MOV2, a fuse F2, and a capacitor C14. One end of the inductor L4 is used as one input end of the EMI filter circuit, the other end of the inductor L4 is connected with one end of one side of the common-mode coil L3, and the other end of one side of the common-mode coil L3 is connected with one end of the capacitor C14 and one end of the piezoresistor MOV2 and is used as one output end of the EMI filter circuit. One end of the other side of the common mode coil L3 is used as the other input end of the EMI filter circuit, and the other end of the other side of the common mode coil L3 is connected with the other end of the piezoresistor MOV2 and one end of the fuse F2. The other end of the fuse F2 is connected to the other end of the capacitor C14 and serves as the other output terminal of the EMI filter circuit.
The EMI filter circuit has the function of EMI filtering the alternating current output by the single-phase-locked loop circuit. The alternating current flows in from the terminal AC1 and flows out from the terminal AC 2. The alternating current with harmonic wave is filtered by the inductor L4 and then filtered by the common-mode coil L3. Clean alternating current can be obtained. In addition, the varistor MOV2 protects against overvoltage and the fuse F2 fuses out when the output current is too high.
As a preferred embodiment of the invention, the MCU signal conditioning circuit comprises an MCU main control circuit, a power grid voltage frequency sampling circuit, a solar panel generated power control circuit and a temperature control circuit. The power grid voltage frequency sampling circuit samples the voltage and frequency of the power grid and feeds the voltage and frequency back to the MCU main control circuit. The solar panel power generation power control circuit samples the voltage and the current of the solar panel and feeds the voltage and the current back to the MCU main control circuit, and the MCU main control circuit controls the solar panel power generation power control circuit to output a first driving signal to the push-pull inversion waveform generation circuit according to the voltage and the frequency of the power grid and the voltage and the current of the solar panel. The temperature control circuit samples the temperature of the grid-connected inverter control core module, and when the temperature is greater than a set threshold value, the MCU main control circuit controls the temperature control circuit to start the fan so as to radiate heat of the grid-connected inverter control core module.
Further, the MCU master control circuit includes a control chip U4, as shown in fig. 5, where the control chip U4 includes at least a grid voltage sampling input pin (U4 st pin), a grid frequency sampling input pin (U4 th pin), a solar output voltage detection pin (U4 rd pin), a solar output current detection pin (U4 th pin 30), a temperature reading pin (U4 th pin), a control fan pin (U4 th pin 26), and an analog voltage output pin (U4 th pin 23).
Further, as shown in fig. 6, the grid voltage frequency sampling circuit includes an optocoupler U1, a capacitor C24, a resistor R53, a resistor R54, a triode Q3, a resistor R56, a capacitor C27, a resistor R43, a resistor R44, a resistor R45, a resistor R47, a resistor R48, a resistor R49, a resistor R51, a resistor R46, a resistor R50, a resistor R52, a resistor R55, a capacitor C26, and an operational amplifier U2A. The cathode of the optical coupler U1 and one end of the resistor R46 are connected with N lines of a power grid, and one end of the resistor R44 and one end of the resistor R45 are connected with L lines of the power grid. The resistor R44 and the resistor R43 are connected in series and then connected with the anode of the optical coupler U1. The emitter of the optocoupler U1 is connected to one end of the capacitor C24 and ground. The collector of optocoupler U1 is connected to one end of resistor R53 and one end of resistor R54. The other end of the resistor R53 and the other end of the capacitor C24 are connected to +5v voltage. The other end of the resistor R54 is connected with the base electrode of the triode Q3, the emitter electrode of the triode Q3 is grounded, and the collector electrode of the triode Q3 is connected with one end of the resistor R56 and one end of the capacitor C27 and is used as a power grid frequency sampling output to be connected with a power grid frequency sampling input pin of the control chip U4. The other end of the resistor R56 is connected with +5V voltage. The other end of the capacitor C27 is grounded. Resistor R45 is connected in series with resistor R47, resistor R49, and resistor R51, and then grounded. One end of the resistor R48 is connected with +5V voltage, and the other end is connected with a series node of the resistor R49 and the resistor R51. The other end of the resistor R48 is also connected with the non-inverting input end of the operational amplifier U2A. The resistor R46, the resistor R50 and the resistor R52 are connected in series and then connected with the inverting input end of the operational amplifier U2A. Resistor R55 and capacitor C26 are connected in parallel and then connected between the non-inverting input terminal and the output terminal of operational amplifier U2A. The output end of the operational amplifier U2A is used as a power grid voltage sampling output and connected with a power grid voltage sampling input pin of the control chip U4.
The power grid voltage frequency sampling circuit is used for sampling the voltage and the frequency of a power grid. The control chip U4 can control the output voltage and the output frequency of the solar panel through sampling information of the power grid, and realize that the grid-connected alternating current and the power grid are in the same frequency and phase.
The principle of the power grid frequency sampling is as follows: when the alternating current is in the positive half cycle, the current flows out from the L line, and passes through the resistor R44, the resistor R43 and the pins 1 and 2 of the optocoupler U1, so that the optocoupler U1 is conducted. After optocoupler U1 turns on, +5V flows through resistor R53 to pins 4 and 3 of optocoupler U1 to ground. In another loop, resistor R54 is not current flowing, so transistor Q3 is not conductive, and +5V connects resistor R56 to the grid frequency sampling output, so this is the +5V high level. When the alternating current is in the negative half cycle, the optocoupler U1 is not conducted, +5V passes through the resistor R53 and the resistor R54 and finally flows to the ground through the base electrode of the triode Q3, the triode Q3 is conducted, and +5V flows through the current of the resistor R56 to the ground, so that the power grid frequency sampling output end is in a low level. The pulse from high level to low level is detected at the power grid frequency sampling input pin of the control chip U4, and the frequency of alternating current can be calculated by counting the pulse number in the period.
The principle of the power grid voltage sampling is as follows: the live wire L is connected with the 3 pin (positive input end) of the operational amplifier U2 in a voltage dividing way after being connected with the resistor R51 in series through the resistor R45, the resistor R47 and the resistor R49, and is also connected with the 3 pin of the operational amplifier U2 after being connected with the +5V series resistor R48. The zero line N is connected to the 2 pin (inverting input end) of the operational amplifier U2 after being connected in series through the resistor R46, the resistor R50 and the resistor R52, and the resistor R55 and the capacitor C26 are connected in parallel between the 1 pin (output end) and the 2 pin of the operational amplifier U2. When voltage exists in the power grid, the 2 nd pin and the 3 rd pin of the operational amplifier U2 can detect differential values after voltage division and reduction, and then the differential values are output to the 1 st pin of the operational amplifier U2, namely, the power grid voltage sampling output is connected to the power grid voltage sampling input pin of the connection control chip U4, so that the voltage of the power grid can be read.
Further, as shown in fig. 7, the schematic diagram of the solar panel generated power control circuit includes a resistor R63, a resistor R64, a resistor R66, a resistor R67, a resistor R68, a capacitor C32, a capacitor C36, a diode D18, an operational amplifier U6A, a capacitor C29, a resistor R65, a capacitor C33, a capacitor C42, a resistor R74, a capacitor C48, an operational amplifier U6B, a resistor R83, a resistor R84, a resistor R85, a resistor R87, and a variable resistor VR1. One end of the resistor R63 is connected with an analog voltage output pin of the control chip U4, and the other end of the resistor R64 is connected with the non-inverting input end of the operational amplifier U6A in series. The capacitor C32 is connected between the other end of the resistor R63 and ground. The inverting input end of the operational amplifier U6A is connected with the output end, and the control signal A is output after the output end is connected with the resistor R65 in series. The capacitor C33 is connected between the output terminal of the op-amp U6A and ground. One end of the resistor R67 is connected with the positive pole PV+1 of the solar panel, and the other end of the resistor R66 is connected with the solar output voltage detection pin of the control chip U4 in series. The capacitor C36 and the resistor R68 are connected in parallel and then connected between the solar output voltage detection pin of the control chip U4 and the ground. The positive electrode of the diode D18 is connected with a solar output voltage detection pin of the control chip U4, and the negative electrode is connected with +5V voltage. The negative electrode of the solar panel is connected with the non-inverting input end of the operational amplifier U6B through a resistor R74. Capacitor C48 is connected between the non-inverting input of op-amp U6B and ground. A capacitor C42 is connected between the inverting input terminal and the output terminal of the op-amp U6B. The inverting input end of the operational amplifier U6B is connected with the fixed end of the variable resistor VR1, one end of the resistor R83 and one end of the resistor R84. The other end of the resistor R83 is grounded, and the resistor R84 is connected with the variable end of the variable resistor VR1 and the output end of the operational amplifier U6B after being connected with the resistor R85 in series. The output end of the operational amplifier U6B outputs a control signal B. The output end of the operational amplifier U6B is connected with a resistor R87 in series and then is connected with a solar output current detection pin of the control chip U4. The control signal a and the control signal B are first driving signals.
The solar panel generated power control circuit has the function of realizing the generated power control of the solar panel. First, the control chip U4 may obtain the current output power of the solar panel by sampling the output voltage and current of the solar panel.
The principle of the solar panel sampling voltage is as follows: in fig. 7 PV +1 is connected to the solar panel anode and PV-1 is connected to the solar panel cathode. In the isolated push-pull circuit of fig. 2, the negative pole PV-1 of the solar panel is connected to a 10mΩ sampling resistor Rsense to ground. The solar panel voltage is sampled as follows: the PV+1 is sequentially connected with the resistor R67, the resistor R66 and the resistor R68, divided by the resistor R67 and the resistor R68, and then the sampled voltage is output to a solar output voltage detection pin of the control chip U4 from the resistor R66 and the resistor R68, and the control chip U4 can read the voltage of the solar panel through the pin.
The principle of solar panel sampling current is: in the isolated push-pull circuit of fig. 2, a 10mΩ sampling resistor Rsense to GND is connected to the solar panel cathode PV-1. When current flows from the positive pole pv+1 of the solar panel, through the load and back to the negative pole PV-1 to ground, a voltage drop occurs across the sampling resistor Rsense, ISense in fig. 2 and 7. And then flows into the 5 th pin (non-inverting input end) of the operational amplifier U6B through the resistor R74. The amplified signal is output by the 7 th pin (output end) of the operational amplifier U6B. The magnification setting path is: the resistor R85 and the resistor R84 are connected in series and then connected with the variable resistor VR1 in parallel, one end of the parallel circuit is connected with the 7 th pin of the operational amplifier U6B, the other end of the parallel circuit is connected with the 6 th pin (inverting input end) of the operational amplifier U6B, and a resistor R83 is connected between the 6 th pin of the operational amplifier U6B and GND in series. The voltage obtained after the 7 th pin of the operational amplifier U6B is connected with the resistor R87 in series is the value of the current sampling of the solar panel, and the current of the solar panel can be read through the solar output current detection pin of the control chip U4. Meanwhile, the voltage signal output by the 7 th pin of the operational amplifier U6B is a control signal B and is connected to the push-pull inversion waveform generation circuit. The analog voltage output pin of the control chip U4 outputs the analog voltage MCU-PWM/AD, flows into the 3 rd pin (in-phase input end) of the operational amplifier U6A through the resistor R63 and the resistor R64, is enhanced by the 1 st pin (output end) and then is output, and is connected with the resistor R65 after being output, namely the control signal A, and is connected to the push-pull inversion waveform generation circuit. The control signal A and the control signal B are the first driving signals, and the larger the voltage value of the driving signals is, the larger the output power is, so that the power value control of the solar panel is realized.
Further, as shown in fig. 8, the schematic diagram of the temperature control circuit includes a temperature sensor connection terminal TEMP, a FAN connection terminal FAN1, a resistor R86, a resistor R88, a capacitor CE2, a capacitor C51, a diode D17, a transistor Q4, and a resistor R57. The 2 nd pin of the temperature sensor connection terminal TEMP is connected to an external temperature sensor. One end of the resistor R86 is connected with the 2 nd pin of the temperature sensor connecting terminal TEMP, and the other end is connected with the temperature reading pin of the control chip U4. The +5v voltage is input to the 1 st pin of the temperature sensor connection terminal TEMP, and the capacitor CE2 is connected between the 1 st pin of the temperature sensor connection terminal TEMP and the ground. One end of the resistor R86 is connected to one end of the resistor R88 and one end of the capacitor C51, and the other end of the resistor R88 is connected to the other end of the capacitor C51. The 1 st pin of the FAN connection terminal FAN1 inputs +12v voltage. The positive electrode of the diode D17 is connected to the 2 nd pin of the FAN connection terminal FAN1, and the negative electrode is connected to the 1 st pin of the FAN connection terminal FAN 1. The collector of the triode Q4 is connected with the 2 nd pin of the FAN wiring terminal FAN1, the emitter is grounded, and the base is connected with the control FAN pin of the control chip U4 in series with the resistor R57.
The temperature control circuit is used for controlling the temperature of the inverter control core module. The temperature sensor collects the temperature of the radiating fins of the inverter control core module, and feeds the temperature back to the control chip U4, and once the temperature exceeds a set value, the fan is started to radiate heat. TEMP is a temperature sensor connection terminal, and +5v is output from 2 pins of TEMP after being connected to temperature sensor, and is connected to temperature reading pin of control chip U4 through resistor R86. If the temperature of the read radiating fin exceeds the set value, the control fan pin of the control chip U4 outputs a high level, and the high level flows from the resistor R57 to the base electrode of the triode Q4, so that the triode Q4 is conducted. After the triode Q4 is conducted, +12V flows into the 1 st pin of the FAN connecting terminal FAN1, flows out of the 2 nd pin of the FAN connecting terminal FAN1, and finally returns to GND from the collector to the emitter of the triode Q4, so that the turn-on flow of the FAN is completed. The temperature drops below the set value, the control chip U4 controls the fan pin to output a low level, the triode Q4 is cut off, and the fan stops.
As an embodiment of the present invention, a schematic diagram of a push-pull inversion waveform generating circuit is shown in fig. 9, and includes a control chip U5, a capacitor C40, a resistor R77, a three-pin diode Q5, a resistor R76, a resistor R81, a resistor R82, a transistor Q6, a resistor R72, a resistor R75, a resistor R69, a resistor R78, and a control chip U7. One end of the capacitor C40 and the cathode of the three-pin diode Q5 are connected with an oscillation timing capacitor access pin CT (pin 8) of the control chip U5. The other end of the capacitor C40 is grounded, and the anode of the three-pin diode Q5 is connected with one end of the resistor R76 and the base electrode of the triode Q6. The gate electrode of the three-pin diode pole tube Q5 is externally connected with a control signal to control the on and off of the three-pin diode pole tube Q5. The collector of transistor Q6 and the other end of resistor R76 are tied to reference voltage vref_5v. The emitter of the transistor Q6 is connected in series with a resistor R81 and a resistor R82 and then grounded. The series node of the resistor R81 and the resistor R82 is connected with a positive input pin C/S+ (pin 4) of a current detection comparator of the control chip U5. The oscillation timing resistor of the control chip U5 is connected to a pin RT (9 th pin) in series with a resistor R77 and then grounded. The output pin a OUT (11 th pin) of the control chip U5 is connected in series with the resistor R75 and then connected to the input pin INB (4 th pin) of the control chip U7, and the resistor R78 is connected between the input pin INB of the control chip U7 and ground. The output two-pin B OUT (14 th pin) of the control chip U5 is connected in series with a resistor R72 and then connected with the input two-pin INA (2 nd pin) of the control chip U7, and a resistor R69 is connected between the input two-pin INA of the control chip U7 and the ground. The output one pin OUTA and the output two pin OUTB of the control chip U7 output the driving signal OUTA and the driving signal OUTB, respectively. The driving signal OUTA and the driving signal OUTB are second driving signals for driving the isolated push-pull circuit.
In fig. 9, a control chip U5 is a main control chip, and is of model EG3846, and is used for waveform generation and circuit control of the push-pull topology circuit. First is a push-pull waveform generation circuit: pin 8 of the U5 chip is connected with one end of a capacitor C40, and the other end of the capacitor C40 is grounded; the pin 9 is connected with one end of a resistor R77, and the other end of the resistor R77 is grounded; the chip RC frequency setting circuit is composed to generate a waveform with 54KHZ frequency. And (3) circuit control: the control signal A and the control signal B from the solar panel generating power control circuit in the MCU signal conditioning circuit are compared between the pin 5 and the pin 6 of the U5, if the voltage of the control signal A is larger than that of the control signal B, the pin 11 of the U5 outputs a high level, and the high level is connected to the pin 4 of the U7 (EG 27324) through a resistor R75 and finally output through the pin 5 (OUTB) of the U7, so that the signal enhancement purpose is realized. Because pin 11 and pin 14 of U5 are in alternating complementary open relationship, pin 14 is low, likewise connecting resistor R72 to pin 2 of U7, and ultimately output through pin 7 (OUTA) of the U7 chip. The group of signals are used for driving MOS transistors MOS6 and MOS7 in a later-stage isolation push-pull circuit, and the MOS transistors MOS6 and MOS7 drive a push-pull transformer to generate needed high-voltage communication.
The invention also provides a photovoltaic battery changing cabinet, which comprises a switch control device, N single-bin chargers connected in parallel, the grid-connected inverter control core module, an energy storage battery charger and an energy storage battery pack as shown in fig. 10. The electric brake control device is respectively connected with the energy storage battery charger and the N single-bin chargers. Each single bin charger charges a battery. The output end of the energy storage battery charger is connected with one end of the energy storage battery pack, the other end of the energy storage battery pack is connected with the input end of the grid-connected inverter control core module, and the output end of the grid-connected inverter control core module is connected with the electric brake control device.
In fig. 10, the energy storage cell package is a medium for storing electric energy in the solar panel, and the output ends of the energy storage cell package are equivalent to pv+1 and PV-1. After the solar panel converts solar energy into electric energy, the electric energy is stored in an energy storage battery pack, and the electric energy is used for counteracting the standby power consumption of the battery changing cabinet. And on the other hand, redundant electric energy is sent to a power grid through a grid-connected inverter control core module, so that extra electric charge brought by self standby power consumption of the power conversion cabinet is reduced, and power generation benefits are generated.
In the present invention, unless expressly stated or limited otherwise, a first feature "on" a second feature may be that the first and second features are in direct contact, or that the first and second features are in indirect contact via an intervening medium. The meaning of "a plurality of" means at least two, e.g., two, three, etc., unless explicitly defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
The above description is for the purpose of illustrating the embodiments of the present invention and is not to be construed as limiting the invention, but is intended to cover all modifications, equivalents, improvements and alternatives falling within the spirit and principles of the invention.
Claims (10)
1. The grid-connected inverter control core module is characterized by comprising an isolated push-pull circuit, a single-phase-locked loop circuit, an EMI filter circuit, an MCU signal conditioning circuit and a push-pull inverter waveform generating circuit; the first input end of the isolation push-pull circuit inputs direct-current voltage provided by the solar panel, and the direct-current voltage is boosted into pulsating high-voltage direct-current voltage and then is sent to the single-phase-locked loop circuit from the output end; the single-phase-locked loop circuit tracks the voltage phase of the power grid, synchronizes the pulsating high-voltage direct-current voltage into alternating-current voltage with the same voltage phase of the power grid and outputs the alternating-current voltage to the EMI filter circuit; the EMI filter circuit filters the alternating current and then is integrated into a power grid; the MCU signal conditioning circuit collects the voltage and the frequency of a power grid, samples the voltage and the current output by the solar panel, and outputs a first driving signal to the push-pull inverter waveform generation circuit; the push-pull inverter waveform generating circuit outputs a second driving signal to a second input end of the isolation push-pull circuit according to the first driving signal, and controls a pulsating high-voltage direct-current voltage value output by the isolation push-pull circuit.
2. The grid-connected inverter control core module of claim 1, wherein the isolated push-pull circuit comprises a resistor R19, a resistor R34, a resistor R27, a resistor R18, a resistor R35, a resistor R26, a sampling resistor Rsense, a capacitor C17, a capacitor C16, a capacitor C9, a MOS transistor MOS6, a MOS transistor MOS7, a fuse F102, a transformer T1, a common anode diode D1, a common cathode diode D2, an inductor L1, and a capacitor C1; one end of the fuse F102 is connected with the anode of the solar panel, and the other end of the fuse F is connected with the middle tap of the primary winding of the transformer T1; one end of the sampling resistor Rsense is connected with the negative electrode of the solar panel, and the other end of the sampling resistor Rsense is grounded; the capacitor C9 is connected between the middle tap of the primary winding of the transformer T1 and the ground; the second driving signal includes a driving signal OUTA and a driving signal OUTB; the driving signal OUTB is input from one end of a resistor R34 and one end of a resistor R19, the other end of the resistor R34 is connected with the grid electrode of the MOS tube MOS6, and the other end of the resistor R19 is connected with the source electrode of the MOS tube MOS6 and the ground; the drain electrode of the MOS tube MOS6 is connected with one end of a primary winding of the transformer T1; the resistor R27 and the capacitor C17 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 6; the driving signal OUTA is input from one end of a resistor R35 and one end of a resistor R18, the other end of the resistor R35 is connected with the grid electrode of the MOS tube MOS7, and the other end of the resistor R18 is connected with the source electrode of the MOS tube MOS7 and the ground; the drain electrode of the MOS tube MOS7 is connected with the other end of the primary winding of the transformer T1; the resistor R26 and the capacitor C16 are connected in series and then connected between the drain electrode and the source electrode of the MOS tube MOS 7; one end of the secondary winding of the transformer T1 is connected with one cathode of the common anode diode D1 and one anode of the common cathode diode D2, and the other end of the secondary winding of the transformer T1 is connected with the other cathode of the common anode diode D1 and the other anode of the common cathode diode D2; the cathode of the common cathode diode D2 is connected with one end of an inductor L1, and a capacitor C1 is connected between the other end of the inductor L1 and the anode of the common anode diode D1; the two ends of the capacitor C1 are used as the output ends of the isolated push-pull circuit.
3. The grid-connected inverter control core module of claim 1, wherein the single-phase-locked loop circuit comprises MOS transistor MOS1, MOS transistor MOS2, MOS transistor MOS3, MOS transistor MOS4, resistor R2, zener diode Z3, resistor R4, resistor R8, resistor R14, varistor MOV1, diode D11, resistor R3, zener diode Z4, resistor R5, resistor R9, resistor R15, diode D12, zener diode Z1, transistor Q1, capacitor C5, diode D9, capacitor C7, resistor R6, resistor R10, resistor R11, diode D15, diode D13, resistor R16, resistor R17, zener diode Z2, transistor Q2, capacitor C6, diode D10, capacitor C8, resistor R7, resistor R12, resistor R13, diode D16, and diode D14;
the source electrode of the MOS tube MOS1 and the source electrode of the MOS tube MOS2 are used as the input negative terminal of the single-phase-locked loop circuit, and the drain electrode of the MOS tube MOS3 and the drain electrode of the MOS tube MOS4 are used as the input positive terminal of the single-phase-locked loop circuit;
the drain electrode of the MOS tube MOS1 is connected with one output end of the single-phase-locked loop circuit, and the grid electrode is respectively connected with one end of the resistor R2, the cathode of the zener diode Z3 and one end of the resistor R4; the other end of the resistor R2 and the anode of the voltage stabilizing diode Z3 are connected with the source electrode of the MOS tube MOS 1; the other end of the resistor R4 is connected with one end of the resistor R8 and the anode of the diode D11; the other end of the resistor R8 is connected with one end of the resistor R14; the other end of the resistor R14 is respectively connected with one end of the piezoresistor MOV1 and the other output end of the single-phase-locked loop circuit;
The drain electrode of the MOS tube MOS2 is connected with the other output end of the single-phase-locked loop circuit, and the grid electrode is respectively connected with one end of the resistor R3, the cathode of the zener diode Z4 and one end of the resistor R5; the other end of the resistor R3 and the anode of the voltage stabilizing diode Z4 are connected with the source electrode of the MOS tube MOS 2; the other end of the resistor R5 is connected with one end of the resistor R9 and the anode of the diode D12; the other end of the resistor R9 is connected with one end of the resistor R15; the other end of the resistor R15 is connected with one output end of the single-phase-locked loop circuit;
the grid electrode of the MOS tube MOS3 is respectively connected with the cathode of the zener diode Z1, the collector of the triode Q1, one end of the resistor R6 and one end of the resistor R10; the anode of the voltage stabilizing diode Z1, the emitter of the triode Q1, one end of the capacitor C5, the anode of the diode D9 and one end of the capacitor C7 are connected with the source electrode of the MOS tube MOS3 and the other output end of the single-phase-locked loop circuit; the base electrode of the triode Q1 is respectively connected with the other end of the resistor R6, one end of the resistor R11, the other end of the capacitor C5, the cathode of the diode D9 and the anode of the diode D13; the other end of the resistor R10 is respectively connected with the other end of the resistor R11, the cathode of the diode D15 and the other end of the capacitor C7; the anode of the diode D15 and the cathode of the diode D13 are connected with one end of a resistor R16; the other end of the resistor R16 is connected with one end of the resistor R17;
The grid electrode of the MOS tube MOS4 is respectively connected with the cathode of the zener diode Z2, the collector of the triode Q2, one end of the resistor R7 and one end of the resistor R12; the anode of the voltage stabilizing diode Z2, the emitter of the triode Q2, one end of the capacitor C6, the anode of the diode D10 and one end of the capacitor C8 are connected with the source electrode of the MOS tube MOS4 and one output end of the single-phase-locked loop circuit; the base electrode of the triode Q2 is respectively connected with the other end of the resistor R7, one end of the resistor R13, the other end of the capacitor C6, the cathode of the diode D10 and the anode of the diode D14; the other end of the resistor R12 is respectively connected with the other end of the resistor R13, the cathode of the diode D16 and the other end of the capacitor C8; the anode of the diode D16 and the cathode of the diode D14 are connected to the other end of the resistor R17.
4. The grid-tie inverter control core module of claim 1, wherein the EMI filter circuit comprises an inductor L4, a common mode coil L3, a varistor MOV2, a fuse F2, and a capacitor C14; one end of the inductor L4 is used as one input end of the EMI filter circuit, the other end of the inductor L4 is connected with one end of one side of the common-mode coil L3, and the other end of one side of the common-mode coil L3 is connected with one end of the capacitor C14 and one end of the piezoresistor MOV2 and is used as one output end of the EMI filter circuit; one end of the other side of the common mode coil L3 is used as the other input end of the EMI filter circuit, and the other end of the other side of the common mode coil L3 is connected with the other end of the piezoresistor MOV2 and one end of the fuse F2; the other end of the fuse F2 is connected to the other end of the capacitor C14 and serves as the other output terminal of the EMI filter circuit.
5. The grid-connected inverter control core module according to claim 1, wherein the MCU signal conditioning circuit comprises an MCU master control circuit, a grid voltage frequency sampling circuit, a solar panel generated power control circuit and a temperature control circuit; the MCU master control circuit comprises a control chip U4; the power grid voltage frequency sampling circuit samples the voltage and frequency of the power grid and feeds the voltage and frequency back to the MCU main control circuit; the solar panel power generation power control circuit samples the voltage and the current of the solar panel and feeds the voltage and the current back to the MCU main control circuit, and the MCU main control circuit controls the solar panel power generation power control circuit to output a first driving signal to the push-pull inversion waveform generation circuit according to the voltage and the frequency of the power grid and the voltage and the current of the solar panel; the temperature control circuit samples the temperature of the grid-connected inverter control core module, and when the temperature is greater than a set threshold value, the MCU main control circuit controls the temperature control circuit to start the fan so as to radiate heat of the grid-connected inverter control core module.
6. The grid-tied inverter control core module of claim 5, wherein the grid voltage frequency sampling circuit comprises an optocoupler U1, a capacitor C24, a resistor R53, a resistor R54, a triode Q3, a resistor R56, a capacitor C27, a resistor R43, a resistor R44, a resistor R45, a resistor R47, a resistor R48, a resistor R49, a resistor R51, a resistor R46, a resistor R50, a resistor R52, a resistor R55, a capacitor C26, and an op-amp U2A; the cathode of the optical coupler U1 and one end of the resistor R46 are connected with N lines of a power grid, and one end of the resistor R44 and one end of the resistor R45 are connected with L lines of the power grid; the resistor R44 and the resistor R43 are connected in series and then connected with the anode of the optical coupler U1; the emitter of the optical coupler U1 is connected with one end of the capacitor C24 and the ground; the collector electrode of the optical coupler U1 is connected with one end of a resistor R53 and one end of a resistor R54; the other end of the resistor R53 and the other end of the capacitor C24 are connected with a direct current supply voltage; the other end of the resistor R54 is connected with the base electrode of the triode Q3, the emitter electrode of the triode Q3 is grounded, and the collector electrode of the triode Q3 is connected with one end of the resistor R56 and one end of the capacitor C27 and is used as a power grid frequency sampling output to be connected with a power grid frequency sampling input pin of the control chip U4; the other end of the resistor R56 is connected with a direct current power supply voltage; the other end of the capacitor C27 is grounded; the resistor R45 is connected with the resistor R47, the resistor R49 and the resistor R51 in series and then grounded; one end of the resistor R48 is connected with a direct current supply voltage, and the other end is connected with a series node of the resistor R49 and the resistor R51; the other end of the resistor R48 is also connected with the non-inverting input end of the operational amplifier U2A; the resistor R46, the resistor R50 and the resistor R52 are connected in series and then are connected with the inverting input end of the operational amplifier U2A; the resistor R55 and the capacitor C26 are connected in parallel and then are connected between the non-inverting input end and the output end of the operational amplifier U2A; the output end of the operational amplifier U2A is used as a power grid voltage sampling output and connected with a power grid voltage sampling input pin of the control chip U4.
7. The grid-tie inverter control core module of claim 5, wherein the solar panel generated power control circuit comprises resistor R63, resistor R64, resistor R66, resistor R67, resistor R68, capacitor C32, capacitor C36, diode D18, op-amp U6A, capacitor C29, resistor R65, capacitor C33, capacitor C42, resistor R74, capacitor C48, op-amp U6B, resistor R83, resistor R84, resistor R85, resistor R87, and variable resistor VR1; one end of the resistor R63 is connected with an analog voltage output pin of the control chip U4, and the other end of the resistor R64 is connected with the non-inverting input end of the operational amplifier U6A in series; the capacitor C32 is connected between the other end of the resistor R63 and ground; the inverting input end of the operational amplifier U6A is connected with the output end, and the output end is connected with the resistor R65 in series and then outputs a control signal A; the capacitor C33 is connected between the output end of the operational amplifier U6A and the ground; one end of the resistor R67 is connected with the anode of the solar panel, and the other end of the resistor R66 is connected with the solar output voltage detection pin of the control chip U4 in series; the capacitor C36 and the resistor R68 are connected in parallel and then connected between the solar output voltage detection pin of the control chip U4 and the ground; the anode of the diode D18 is connected with a solar output voltage detection pin of the control chip U4, and the cathode is connected with a direct current supply voltage; the negative electrode of the solar panel is connected with the non-inverting input end of the operational amplifier U6B through a resistor R74; the capacitor C48 is connected between the non-inverting input end of the operational amplifier U6B and the ground; a capacitor C42 is connected between the inverting input end and the output end of the operational amplifier U6B; the inverting input end of the operational amplifier U6B is connected with the fixed end of the variable resistor VR1, one end of the resistor R83 and one end of the resistor R84; the other end of the resistor R83 is grounded, and the resistor R84 is connected with the variable end of the variable resistor VR1 and the output end of the operational amplifier U6B after being connected with the resistor R85 in series; the output end of the operational amplifier U6B outputs a control signal B; the output end of the operational amplifier U6B is connected with a resistor R87 in series and then is connected with a solar output current detection pin of the control chip U4; the control signal a and the control signal B are first driving signals.
8. The grid-tie inverter control core module of claim 5, wherein the temperature control circuit comprises a temperature sensor connection terminal, a fan connection terminal, a resistor R86, a resistor R88, a capacitor CE2, a capacitor C51, a diode D17, a transistor Q4, and a resistor R57; the 2 nd pin of the temperature sensor connecting terminal is connected with an external temperature sensor; one end of the resistor R86 is connected with the 2 nd pin of the temperature sensor connecting terminal, and the other end of the resistor R86 is connected with the temperature reading pin of the control chip U4; the 1 st pin of the temperature sensor connecting terminal inputs a direct current power supply voltage, and the capacitor CE2 is connected between the 1 st pin of the temperature sensor connecting terminal and the ground; one end of the resistor R86 is connected with one end of the resistor R88 and one end of the capacitor C51, and the other end of the resistor R88 is connected with the other end of the capacitor C51; the 1 st pin of the fan wiring terminal inputs another direct current power supply voltage; the positive electrode of the diode D17 is connected with the 2 nd pin of the fan wiring terminal, and the negative electrode is connected with the 1 st pin of the fan wiring terminal; the collector of the triode Q4 is connected with the 2 nd pin of the fan wiring terminal, the emitter is grounded, and the base is connected with the control fan pin of the control chip U4 in series with the resistor R57.
9. The grid-connected inverter control core module of claim 1, wherein the push-pull inverter waveform generation circuit comprises a control chip U5, a capacitor C40, a resistor R77, a three-pin diode Q5, a resistor R76, a resistor R81, a resistor R82, a triode Q6, a resistor R72, a resistor R75, a resistor R69, a resistor R78, and a control chip U7; one end of the capacitor C40 and the cathode of the three-pin diode Q5 are connected with an oscillation timing capacitor access pin CT of the control chip U5; the other end of the capacitor C40 is grounded, and the anode of the three-pin diode Q5 is connected with one end of the resistor R76 and the base electrode of the triode Q6; the collector of the triode Q6 and the other end of the resistor R76 are connected with reference voltage; the emitter of the triode Q6 is connected with a resistor R81 and a resistor R82 in series and then is connected with the ground; the series node of the resistor R81 and the resistor R82 is connected with a positive input pin C/S+ of a current detection comparator of the control chip U5; the oscillation timing resistor of the control chip U5 is connected with a pin RT, a resistor R77 and then grounded; the output pin A OUT of the control chip U5 is connected with the input pin INB of the control chip U7 after being connected with the resistor R75 in series, and the resistor R78 is connected between the input pin INB of the control chip U7 and the ground; the output two pins B OUT of the control chip U5 are connected with the input two pins INA of the control chip U7 after being connected with the resistor R72 in series, and the resistor R69 is connected between the input two pins INA of the control chip U7 and the ground; the output one pin OUTA and the output two pin OUTB of the control chip U7 respectively output a driving signal OUTA and a driving signal OUTB; the driving signal OUTA and the driving signal OUTB are second driving signals.
10. A photovoltaic power conversion cabinet comprising a switch control device and N single-bin chargers connected in parallel, and further comprising an energy storage battery charger, an energy storage battery pack and the grid-connected inverter control core module according to any one of claims 1 to 9; the electric brake control device is respectively connected with the energy storage battery charger and the N single-bin chargers; each single-bin charger charges a battery; the output end of the energy storage battery charger is connected with one end of the energy storage battery pack, the other end of the energy storage battery pack is connected with the input end of the grid-connected inverter control core module, and the output end of the grid-connected inverter control core module is connected with the electric brake control device.
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